JP2004134657A - Semiconductor device fabricating process and semiconductor fabricating equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the occupied space of a chip sorter for wafers with different diameters by using an identical equipment. <P>SOLUTION: On an identical wafer ring cassette lifter 410, a wafer ring cassette 210 for the wafer of 200 mmϕ and the cassette 310 for the wafer of 300 mmϕ are mounted so as to be adjacent to each other to attain common usage thereof. Besides, on an identical XY table 500, the wafer ring setting portion 220 for 200 mmϕ and the portion 320 for 300 mmϕ are mounted to attain common usage thereof. The common usage of a wafer extractor 600 and a wafer ring correcting portion may be performed. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device manufacturing technique, and more particularly to a technique effective when applied to a chip sorting technique in a semiconductor device manufacturing process.
[0002]
[Prior art]
The technology described below has been studied by the inventor when researching and completing the present invention, and the outline thereof is as follows.
[0003]
In the current semiconductor field, a manufacturing line corresponding to a wafer size of 200 mm (8 inches) is mainly used. Of course, a production line of φ300 mm (12 inches) has been set up in response to the demand for a larger wafer size, but the yield of good chips at φ300 mm is not sufficient at present, and the production line operates efficiently. It has not yet been reached.
[0004]
A chip mounter compatible with φ300 mm is larger than a current chip mounter compatible with φ200 mm, and requires a considerable installation space. Therefore, considering the yield rate of non-defective products at the current φ300 mm, he is hesitant to introduce a production line of φ300 mm including the chip mounter.
[0005]
Therefore, a so-called compromise plan that attempts to operate at φ300 mm while utilizing the current production line of φ200 mm has been adopted. In other words, the chip is manufactured on a φ300 mm wafer, the manufactured good chips are sorted for φ200 mm, and a current φ200 mm apparatus is used as a chip mounter.
[0006]
Until a yield of φ300 mm is sufficiently ensured and a target operating efficiency is predicted to be realized, a method of configuring a production line using such an eclectic method can certainly be nod.
[0007]
On the other hand, unlike such a compromise, there are cases where a production line corresponding to φ300 mm is actually constructed. However, under the current situation where a good chip cannot be manufactured with a sufficient yield, a method of once selecting chips manufactured with a diameter of 300 mm and flowing only good products to a downstream process to improve the operation efficiency has been adopted. I have.
[0008]
As described above, when a process of forming chips on a φ300 mm wafer is incorporated, it is necessary to sort chips formed on a φ300 mm wafer at present until the yield rate of conforming products is improved.
[0009]
On the other hand, a chip sorting function may be required even in a production line of φ200 mm, and in this case, a layout in which a chip sorter dedicated to φ300 mm and a chip sorter dedicated to φ200 mm coexist is installed.
[0010]
[Problems to be solved by the invention]
However, the present inventor has found that the following problems are involved in the technique having the above-described configuration in which both the φ200 mm and φ300 mm dedicated chip sorters coexist.
[0011]
Since an increase in the layout space of the manufacturing line accompanying an increase in the wafer diameter has a large effect on the manufacturing cost, there is a strong demand for space saving.
[0012]
For example, when using a current φ200 mm production line and incorporating a process for making chips on a new φ300 mm wafer, in addition to the installation space for the φ200 mm dedicated chip sorter, the installation of a φ300 mm chip sorter Space must be reserved separately.
[0013]
However, it does not mean that a consistent production line corresponding to φ300 mm is to be constructed, and in the case where a full-scale introduction is to be made after waiting for an increase in the yield rate at φ300 mm, the current φ200 mm production line must be used. However, it is not easy to secure a space for installing a new chip sorter dedicated to φ300 mm while constructing a consistent layout with φ200 mm.
[0014]
When laying out a φ200mm mass production line, we have carefully considered the transfer efficiency, etc., and have performed an optimal equipment layout that does not waste space, making it easy to arrange a large-sized φ300mm chip sorter. There has not been enough free space since the beginning. Changing the layout is difficult.
[0015]
Until now, wafer diameters have been aggressively promoted.However, when such diameters are increased, the equipment area increases with the size of the equipment, and the proportion of the mass production line layout to the production cost increases. Space saving in the layout of mass production lines is being strictly required.
[0016]
Under such circumstances, even in the current mass production line of φ200 mm, space saving has been thoroughly promoted, and as described above, it is presently difficult to secure an empty space.
[0017]
On the other hand, it is conceivable to replace the dedicated chip sorters of φ200 mm and φ300 mm with each other as appropriate, but replacing large-sized devices each time is always effective from the viewpoint of operation efficiency. Not a solution.
[0018]
On the other hand, it is not surprising that a configuration in which both dedicated chip sorters are combined as one device is conceivable.However, in a configuration in which both functions coexist, a certain degree of space reduction can be achieved as compared with a case where they are independently installed. Even if it is achieved, an effect that can sufficiently contribute to space saving cannot be obtained.
[0019]
This means that when combining the two dedicated chip sorters into one, not only the occupied space when both chip sorters are at rest, but also the movable range when each function is exhibited must be taken into consideration, and they must coexist independently. This is because this does not mean that the space can be significantly reduced as compared with the configuration.
[0020]
Therefore, the present inventor focuses on having a common mechanism as a sorter mechanism for both φ200 mm and φ300 mm, and by sharing the mechanism, it is possible to support φ200 mm and φ300 mm with the same device. We thought it was necessary to develop technology that could actively save space.
[0021]
An object of the present invention is to enable a sort mechanism to be shared by different wafer sizes so that the sorter function can be applied to different wafer sizes in the same apparatus.
[0022]
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
[0023]
[Means for Solving the Problems]
The following is a brief description of an outline of typical inventions disclosed in the present application.
[0024]
That is, in the present invention, since the mechanism of the chip sorter is shared so as to be compatible with different wafer sizes such as, for example, φ300 mm and φ200 mm, the case where separate mechanisms for φ300 mm and φ200 mm are separately provided. Unlike this, the overall configuration of the chip sorter can be reduced in size, and its space can be actively reduced.
[0025]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all the drawings for describing the embodiments, members having the same functions are denoted by the same reference numerals, and repeated description thereof will be omitted.
[0026]
(Embodiment 1)
FIG. 1 is a schematic front view of a chip sorter for both φ200 mm and φ300 mm. FIG. 2 is a plan view schematically showing a layout example of a device mechanism of a chip sorter for both φ200 mm and φ300 mm. FIG. 3 is an explanatory cross-sectional view schematically showing a state in which the chip sorter in FIG. 2 is cut along the AA cutting line.
[0027]
As shown in FIG. 1, buttons and switches for controlling device functions are provided on the front side of the chip sorter 100, and a wafer monitor is provided so that an operator can monitor the status of a wafer to be sorted. 110 is provided. The quality of the chips formed on the wafer can be confirmed by the image on the mapping display 120.
[0028]
Further, the operator performs an appropriate operation of the buttons and switches based on the operation state of the tip sorter 100 shown on the front operation panel 130 to start, end, and interrupt various sorts of device functions such as the sorter. Control can be performed.
[0029]
As shown in FIG. 2, the chip sorter 100 having such a front configuration is provided with a wafer ring cassette 210 for φ200 mm wafers and a wafer ring cassette 310 for φ300 mm wafers. The two wafering cassettes 210 and 310 can be moved up and down to a predetermined height so as to store and store φ200 mm wafers and φ300 mm wafers.
[0030]
Although the wafer ring cassettes 210 and 310 to be used have a single-stage configuration in the case shown in the drawing, for example, they may be stacked in a plurality of stages.
[0031]
Such vertical movement of both wafering cassettes 210 and 310 is performed by one wafering cassette lifter 410. That is, unlike the case where the wafer ring cassette lifter 410 is configured to be shared by the wafer ring cassette 210 for φ200 mm and the wafer ring cassette 310 for φ300 mm, a dedicated lifter is provided individually, Has been planned. Furthermore, since the number of dedicated lifter mechanisms provided for two can be reduced to one by sharing, the cost of the apparatus is also reduced.
[0032]
The wafer ring cassette lifter 410 can vertically move a cassette base on which the wafer ring cassettes 210 and 310 are mounted by a motor mechanism using a motor 420.
[0033]
The pitch data can be set arbitrarily so that the pitch of the vertical movement can correspond to both φ200 mm and φ300 mm. According to the setting from the operator side, it is possible to move up and down at a pitch of, for example, 5.5 mm at φ200 mm and at a pitch of, for example, 10 mm at φ300 mm. FIG. 3 shows a state in which the wafer ring 330 is taken in and out of the wafer ring cassette 310.
[0034]
The wafering cassette 310 for φ300 mm wafers is compatible with a code port, and if the cassette base is configured to be compatible with both PGV (Personal Guided Vehicle) and AGV (Automated Guided Vehicle), it is larger than φ200 mm wafer. It is possible to cope with a φ300 mm wafer transfer, which is not easy to transfer manually due to its weight.
[0035]
As shown in FIG. 2, a wafer ring set section 220 for a φ200 mm wafer and a wafer ring set section 320 for a φ300 mm wafer are provided, as shown in FIG. I have.
[0036]
The two wafering sets 220 and 320 are mounted on a set of XY tables 500 shared by both, and a configuration in which XY tables dedicated to the wafering sets 220 and 320 are not provided is not adopted.
[0037]
By configuring the XY table section 500 as a shared mechanism, space saving can be promoted, unlike the case where a dedicated XY table section is provided individually. Furthermore, since the XY table section 500 is shared, the number of such mechanical sections is reduced to one, so that the cost of the apparatus can be reduced accordingly.
[0038]
The XY table section 500 includes an X axis table 510 and a Y axis table 520 as shown in FIG. The X-axis table 510 and the Y-axis table 520 may be configured to have a large movable range of φ300 mm so as to be able to support both φ200 mm wafers and φ300 mm wafers. By configuring so as to be able to cope with φ300 mm, it is possible to sufficiently cope with φ200 mm having a smaller movable range.
[0039]
Movement along the X-axis table 510 can be performed by a drive motor 530 configured as an X-axis drive AC servomotor, and movement along the Y-axis table 520 can be performed by a drive motor 540 configured as a Y-axis drive AC servomotor. It has become.
[0040]
The wafer ring set units 220 and 320 can be moved in the X-axis and Y-axis directions by the shared XY table unit 500 in this manner. A θ rotation mechanism is provided so that the position adjustment of the set wafer ring can be finely adjusted by rotating, for example, 90 °, 180 °, and 270 °.
[0041]
FIG. 2 schematically shows a state where wafer ring 330 is set in wafer ring setting section 320. The wafer ring 330 schematically shows a state in which chips C singulated by dicing are provided on an adhesive wafer tape.
[0042]
FIG. 2 shows a state in which wafer ring 230 is also set in wafer ring setting section 220. On the wafer ring 230, a state is shown in which chips C formed on an adjacent φ300 mm wafer are transferred from the wafer ring 330.
[0043]
On the other hand, in order to take out or store the wafer rings 230 and 330 for φ200 mm or φ300 mm between the wafer ring set units 220 and 320 and the wafer ring cassettes 210 and 310 respectively, A tractor section 600 is provided.
[0044]
The wafer extractor unit 600 is provided with a chuck 630 that reciprocates in the Y-axis direction along the Y-axis table 620 by carrying drive by a motor 610. The chuck 630 moves to, for example, the wafer ring cassette 310 along the Y-axis direction, grips one end of the wafer ring 330 in the wafer ring cassette 310, returns to the wafer ring set section 320, and transfers the wafer ring 330 to the wafer ring cassette. An operation of placing the device at a predetermined position of the setting section 320 is performed.
[0045]
In addition, the wafer ring 330 from which the necessary chips C have been removed after the sorter of the chips C has been removed can be gripped by the chuck 630 by the wafer ring set unit 320 and transported to the wafer ring cassette 310 for storage.
[0046]
The wafer extractor unit 600 having such a configuration is configured as a shared mechanism of φ200 mm and φ300 mm, and the same wafer ring transfer can be performed on the wafer ring set unit 220 corresponding to φ200 mm. However, the configuration is such that it can cope with φ300 mm, and can be applied to φ200 mm, which has a smaller movable range.
[0047]
That is, the wafer ring 230 is moved along the X-axis table (not shown) toward the wafer ring setting unit 220 for φ200 mm, and the wafer ring 230 is taken out of the wafer ring cassette 210 by the chuck 630 that reciprocates along the Y-axis table 620. Or it can be stored. By sharing the wafer extractor unit 600, the cost of the apparatus can be reduced.
[0048]
In the above description, the case where the mechanism of the wafer extractor unit 600 is a shared mechanism of φ200 mm and φ300 mm has been described. However, if there is no need to pay special attention to reducing the cost of the apparatus, it is dedicated to φ200 mm and φ300 mm respectively. The wafer extractor unit 600 may be provided.
[0049]
Since the configuration of the wafer extractor unit 600 is configured within the movable range of the XY table unit 500 on which the wafer ring set units 320 and 220 described above are mounted, the wafer ring cassette lifter 410 and the The contribution of sharing the XY table 500 cannot be expected. Therefore, if the apparatus is configured from the viewpoint of space saving, sharing the wafer extractor unit 600 does not significantly affect the space saving even if it is adopted or not.
[0050]
The chip sorter 100 is further provided with a chip transfer mechanism 700 used for transferring the chips C. As shown in FIGS. 2 and 3, the chip transfer mechanism 700 includes a transfer collet conveyance guide 710, a transfer collet 720 reciprocating along the transfer collet conveyance guide 710, and a predetermined chip C by the transfer collet 720. An optical chip recognizing unit 730 for recognizing the chip C for surely adsorbing is provided.
[0051]
In the optical system mechanism section of the optical system chip recognition section 730, for example, the magnification of an optical system such as an imaging camera may be configured to be a programmable zoom type so that accurate recognition can be performed corresponding to large and small chip sizes. Just fine.
[0052]
The transfer collet 720 is configured to be driven by a drive motor 740 configured as an AC servo motor for driving the transfer collet transport. By using the transfer collet 720 as a pick-and-place mechanism, a desired chip C is sucked from a φ300 mm wafer and placed on a φ200 mm wafer ring 230 for transfer.
[0053]
When the chip C is sucked by the transfer collet 720, for example, a push-up unit 321 is provided in the wafer ring set section 320 as shown in FIG. Although not shown, a similar push-up unit may be provided in the wafer ring set section 220.
[0054]
The push-up needle (not shown) of the push-up unit 321 is configured to control push-up timing such as push-up height and push-up time. By adjusting the push-up timing and adjusting the speed of the vertical movement operation (Z operation) of the transfer collet 720 for sucking the chip C, the movement of both is motivated, and the suction is performed without damaging the thin film chip and the like. You should be able to do it.
[0055]
By using the chip sorter 100 having such a configuration, it is possible to transfer only the non-defective chips C from the chips C formed on a wafer of φ300 mm to the wafer ring 230 for φ200 mm. Since the transferred chips are only non-defective chips, by using such non-defective chips C, efficient production of a semiconductor device using the existing φ200 mm production line can be ensured.
[0056]
In the transfer, since the wafer ring set units 220 and 320 for φ200 mm and φ300 mm are mounted adjacent to each other on the same XY table unit 500, the transfer distance is shorter than when this configuration is not adopted. Can be shortened to shorten the pick-and-place time.
[0057]
Furthermore, if the movement of each of the chip transfer mechanism 700 and the XY table 500 is controlled so as to operate relative to each other so as to reduce the chip transfer distance, the transfer speed can be further increased, and And the place time can be further reduced.
[0058]
In the chip sorter 100 shown in FIG. 2, the case where a sorter function for transferring from φ300 mm to φ200 mm is provided has been described. However, by adopting the above-described shared mechanism of the configuration, the transfer mechanism to the chip tray is also provided. I can do it.
[0059]
In the case shown in FIG. 4, in addition to the configuration shown in FIG. 2, a transfer mechanism to a tray is added. That is, in the configuration shown in FIG. 4, the chip tray mechanism 800 is provided, and among the chips C formed on, for example, φ300 mm wafers, only good chips C can be transferred to the chip tray 810.
[0060]
The chip tray 810 is mounted on a Y-axis table 820 as shown in FIG. In other words, a plurality of chip trays 810 are provided on a chip tray setting section 840 whose position can be adjusted by a driving motor 830 such as an AC servo motor for driving the chip tray.
[0061]
In this manner, only the good chips are transferred onto the chip tray 810, and in this state, the chips may be put into, for example, a production line for φ200 mm as described above. Alternatively, since only non-defective products are stored in the chip tray 810, they may be put into a production line for φ300 mm.
[0062]
If the non-defective product rate of the φ300 mm wafer is sufficient, the process of transferring the wafer to the chip tray 810 may not be performed as described above, but the chip sorter 100 is used until the yield rate is sufficiently improved and stabilized for the time being. It is effective to sort such non-defective products on the chip tray 810.
[0063]
Sorting from the φ300 mm wafer to the chip tray 810 can be performed by preparing not only good chips, but also defective chips, dummy mirror chips, and the like, in a chip tray 810 different from the good chips. Therefore, the chip C including the mirror chip can be prevented from being left on the wafering tape for φ300 mm, and the operation of manually removing the mirror chip and the like from the wafering tape afterward can be omitted. Labor saving and efficiency improvement of the part can be achieved.
[0064]
Further, as shown in FIG. 5, the wafering correction unit 900 may be shared. Note that the wafering correction unit 900 is not shown in FIGS.
[0065]
As shown in FIG. 6A, for example, as shown in FIG. 6A, when the attitude of the wafer ring 330 removed from the wafer ring cassette 310 or the wafer ring 330 to be stored is shifted, the wafer ring correction unit 900 may By sandwiching the straight portions 331 on both side surfaces in parallel from both sides by the posture correcting grip 910, the posture can be corrected as shown in FIG. 6B. By configuring the holding interval of the posture correction gripping portion 910 to be adjustable, it is possible to set both for φ200 mm and φ300 mm.
[0066]
As described above, in the first embodiment, the wafer ring cassette lifter 410 and the XY table unit 500 are configured as a common mechanism, so that the wafer ring cassettes 210 and 310 for φ200 mm and φ300 mm, and the wafer ring set unit 220 , 320 and the like are arranged adjacent to each other to save the space of the chip sorter 100.
[0067]
In order to save the space of the chip sorter 100 described in the first embodiment, from the layout point of view, the wafer ring cassette lifter 410 and the XY table unit 500 are commonly used, so that the wafer ring cassettes for φ200 mm and φ300 mm are used. It can be said that this is a configuration in which the planar layout of the 210, 310, the wafering set units 220, 320, etc., saves space.
[0068]
(Embodiment 2)
In the present embodiment, unlike the space saving in the planar layout of the first embodiment, the wafer ring cassettes 210 and 310 for φ200 mm and φ300 mm, and the wafer ring set units 220 and 320 are three-dimensionally configured. Next, a case where space is saved in a three-dimensional layout will be described.
[0069]
FIG. 7 is a plan view schematically showing a plane arrangement when a three-dimensional layout different from that of the first embodiment is employed. FIG. 8 is a cross-sectional explanatory view schematically showing a three-dimensional layout, taken along a line AA in FIG. 7. FIG. 9 is a cross-sectional explanatory view schematically showing a three-dimensional layout in a cross section taken along line BB of FIG.
[0070]
In the chip sorter 100 of the present embodiment, as shown in FIG. 8, wafer ring cassettes 210 and 310 are provided one above the other, and unlike the first embodiment, both wafer ring cassettes 210 and 310 are different from each other. It is not a configuration of being arranged adjacently in a plane. That is, both wafering cassettes 210 and 310 are configured to be vertically mounted on a shared wafering cassette lifter 410.
[0071]
As shown in FIG. 8, a wafer ring set section 320 is provided corresponding to the wafer ring cassette 310 installed on the lower side. The wafer ring set section 320 has a push-up unit 321 inside, and is configured similarly to the first embodiment.
[0072]
However, the XY table section 550 on which the wafer ring set section 320 is mounted and is moved in two axial directions is provided exclusively for φ300 mm. Unlike the first embodiment, the XY table unit 550 is not shared. The XY table section 550 includes an X-axis table 551 and a Y-axis table 552, and can be driven by drive motors 553 and 554, respectively.
[0073]
On the other hand, as shown in FIG. 8, the wafer ring set section 220 corresponding to the wafer ring cassette 210 is provided above the wafer ring set section 320 set for φ300 mm, that is, upside down.
[0074]
As shown in FIG. 8, the wafer ring set section 220 is mounted on an XY table section 560 provided on the upper base 221. The XY table 560 is provided exclusively for φ200 mm independently of the XY table 550 for φ300 mm.
[0075]
The XY table section 560 includes an X-axis table 561 and a Y-axis table 562, and can move the wafer ring set section 220 in two axial directions by drive motors 563 and 564, respectively.
[0076]
As described above, in chip sorter 100 of the present embodiment, wafer ring set section 220 for φ200 mm and wafer ring set section 320 for φ300 mm are provided facing each other in the vertical direction, and both wafer ring set sections 220, The space saving in the plane space is more strongly promoted than in the case where the 320 is laid out in a plane.
[0077]
Wafer extractor units 650 and 660 are independently provided in both wafer ring set units 320 and 220, respectively, so that wafer rings 330 and 230 can be moved between wafer ring cassette 310 and wafer ring set unit 320, respectively. The wafer can be transferred between the wafer ring cassette 210 and the wafer ring set section 220.
[0078]
That is, the wafer extractor unit 650 is provided with a chuck 653 that reciprocates in the Y-axis direction along the Y-axis table 652 by carrying drive by the motor 651. The chuck 653 moves, for example, to the wafer ring cassette 310 along the Y-axis direction, grips one end of the wafer ring 330 in the wafer ring cassette 310, returns to the wafer ring set section 320, and attaches the wafer ring 330 to the wafer. An operation of placing the ring set unit 320 at a predetermined position is performed.
[0079]
Similarly, the wafer extractor unit 660 is provided with a chuck 663 that reciprocates in the Y-axis direction along the Y-axis table 662 by carrying drive by the motor 661, and performs the same operation as described above.
[0080]
On the other hand, a chip tray mechanism section 800 is provided adjacent to the wafer ring set section 320 having such a configuration, as schematically shown in the plan view of FIG. 7 and the cross-sectional view of FIG. In FIG. 7, the configurations of the wafer ring cassette 210, the wafer ring set section 220, etc. for φ200 mm in FIG. 8 are omitted from the drawing, and the configuration for φ300 mm is shown from above for easy viewing.
[0081]
Incidentally, FIG. 8 is a cross-sectional view schematically shown along a cutting line AA of the plan view of FIG. 7, and FIG. 9 is a schematic view along a cutting line BB of the plan view of FIG. It is sectional drawing shown in FIG.
[0082]
As shown in FIGS. 7 and 9, the chip tray mechanism 800 is mounted on the Y-axis table 820 and can be adjusted by a driving motor 830 such as an AC servomotor for driving the chip tray. The chip tray setting section 840 has a chip tray setting section 840, and among the chips C formed on a wafer having a diameter of, for example, 300 mm, only good chips C can be transferred to the chip tray 810 on the chip tray setting section 840.
[0083]
Further, a chip transfer mechanism 700 is provided so that chips C formed on a φ300 mm wafer can be transferred onto a wafer ring for φ200 mm or onto a chip tray 810.
[0084]
In the chip transfer mechanism 700, as shown in FIGS. 7 and 9, a transfer collet transfer guide 710 is provided over the wafer ring set section 320 and the chip tray 810.
[0085]
The transfer collet transport guide 710 is provided with a transfer collet 720 reciprocating along the transfer collet 720 and an optical chip recognition unit 730 for recognizing a predetermined chip C sucked by the transfer collet 720. The transfer collet 720 is driven by a drive motor 740 configured as a transfer collet transport drive AC servomotor or the like.
[0086]
In the configuration of the present embodiment, the transfer collet 720 is provided with a flip mechanism as a pick-and-place mechanism, so that the suction side can be turned upside down.
[0087]
That is, as shown in FIGS. 8 and 9, the transfer collet 720 can reverse the direction in which the chip C is sucked from below to above or from above to below according to the control instruction by the flip mechanism. By performing such inversion, the chip C can be transferred between the wafer ring set units 220 and 320 laid out three-dimensionally up and down.
[0088]
Non-defective chips C are sucked by the transfer collet 720 from the lower wafer ring 330 for φ300 mm, and then flipped upside down by the flip mechanism, and the sucked chips C are placed on the wafer tape on the upper wafer ring 230 for φ200 mm. It may be placed so that it is pressed against.
[0089]
As described above, according to the configuration of the second embodiment in which the chips C can be transferred up and down, the pick-and-place distance can be further reduced as compared with the planar configuration of the first embodiment, Further higher speed can be achieved.
[0090]
(Embodiment 3)
In this embodiment, a method for manufacturing a semiconductor device using the chip sorter 100 according to the present invention described in the first and second embodiments will be described.
[0091]
The chip sorter 100 used has the configuration of the first embodiment in which the wafer ring set sections 220 and 320 are laid out in a plane, or the configuration of the second embodiment in which the wafer ring set sections 220 and 320 are laid out vertically. However, any configuration may be used.
[0092]
As shown in the flowchart of FIG. 10, in step S110, chips are formed on a φ300 mm wafer. The fabricated chips are not shown in the flow chart, but are identified so that good and defective products can be identified by inspection.
[0093]
A wafer is provided on the wafer tape provided on the wafer ring 330 in a state where the non-defective products can be distinguished by the identification display, and chips are singulated in a dicing process as shown in step S120.
[0094]
A plurality of wafer rings 330 on which individualized chips are placed are housed in a wafer cassette, transported to the chip sorter 100 by a PGV or AGV, etc., and Be attached.
[0095]
While moving the wafer ring cassette lifter 410 at an appropriate pitch, the stored wafer ring 330 is pulled out by the wafer extractor mechanism and set in the wafer ring setting section 320.
[0096]
That is, in the start operation of the chip sorter 100, the wafer ring 330 is pulled out of the wafer ring cassette 310 by the wafer extractor unit 600, set on the wafer ring set unit 320, and alignment is adjusted by the θ rotation mechanism in the set state. . During such alignment adjustment, the wafer ring 230 is pulled out from the wafer ring cassette 210 and set on the wafer ring setting section 220.
[0097]
Except for the start operation, during the continuous operation, the wafer ring cassette lifter 410 moves up and down as needed in accordance with the storage and withdrawal of each of the wafer rings 330 and 230.
[0098]
In this state, the chip to be picked up is recognized by the optical chip recognition unit 730 included in the chip transfer mechanism 700.
[0099]
For such recognition, an operator may perform appropriate control based on information on the wafer monitor 110, the mapping display 120, and the like, for example. Based on the recognition of the optical system, the chip C is sorted in step S130. It is to be noted that, without using the mapping data, for example, picking up in order from any one of up, down, left, and right may be performed.
[0100]
In this sorter process, non-defective chips are transferred to the wafer ring 230 side for φ200 mm or to the chip tray 810. When transferring to the wafer ring 230 for φ200 or the like, the transfer position within the transfer range may be obtained by automatic calculation so that transfer can be performed based on a control command.
[0101]
In step S200, non-defective chips are transferred to the wafer ring 230 for φ200 mm. After the transfer, the die bonding is performed in step S210, the lead bonding is performed in step S220, the resin sealing is performed in step S230, and the manufacturing of the semiconductor device is performed as shown in step S400, along the manufacturing line for φ200 mm. Do.
[0102]
On the other hand, by transferring non-defective chips to the chip tray 810 in step S140, the non-defective rate of chips to be input to the subsequent steps can be set to 100%. Therefore, after step S140, the semiconductor device can be efficiently manufactured on any of the production lines for φ200 mm and φ300 mm.
[0103]
Along the production line for φ200 mm, die bonding is performed in step S210, lead bonding is performed in step S220, resin sealing is performed in step S230, and the semiconductor device can be manufactured as shown in step S400. Similarly, in a manufacturing line of φ300 mm, die bonding is performed in step S310, lead bonding is performed in step S320, resin sealing is performed in step S330, and the semiconductor device can be manufactured as shown in step S400.
[0104]
For example, as shown in FIG. 10, when the yield is not good and as it is, sufficient operation efficiency cannot be expected even if it is put into a production line after the die bonding step, as shown in FIG. By interpolating only the non-defective chips and inserting chips having a non-defective rate of 100% into the subsequent production line, sufficient operation efficiency can be ensured. At the same time, UPH (Unit Per Hour)
) Can also be improved.
[0105]
When transferring from a φ300 mm wafer to the chip tray 810, for example, not only good chips but also all chips may be transferred. The distribution may be performed for each chip ID number.
[0106]
In the current situation where chips are manufactured at φ300 mm, a sufficient yield is not secured. Therefore, by adopting the above configuration, chips manufactured at φ300 mm can be efficiently used by using an existing φ200 mm production line. Can be manufactured.
[0107]
Further, even when a production line having a diameter of 300 mm is formed, by using a chip sorter, only non-defective chips are sorted once, and production with good operation efficiency in the steps after die bonding can be ensured.
[0108]
However, even in a production line of φ200 mm or a production line of φ300 mm, the space required for the above-mentioned sorter process is limited by the space required for the above-mentioned sorter. However, if the chip sorter according to the present invention exemplified in the above-described embodiment is used, the space saving is remarkably different from the chip sorter having the conventional configuration. Therefore, installation space can be easily secured in the existing production line.
[0109]
By the way, compared to the average installation space of the configuration in which the chip sorters for φ200 mm and φ300 mm are juxtaposed and side by side, the installation space of the chip sorter configured to share the above description reduces the installation space by about 50%. I was able to.
[0110]
As described above, the invention made by the inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the gist of the invention. Needless to say.
[0111]
For example, in the second embodiment, the configuration in which the wafer ring set section 320 for φ300 mm is provided below and the wafer ring set section 220 for φ200 mm is provided above and opposed thereto, but the configuration is reversed. Alternatively, the configuration for φ300 mm above and the configuration for φ200 mm below may be adopted.
[0112]
For example, in the above description, a chip sorter has been described, but a wafer appearance inspection function may be provided. By adopting such a configuration, by sorting the chips having defective bump shapes or chips among the non-defective chips, it is possible to further increase the non-defective rate and further improve the yield in the final product.
[0113]
In addition, it can be considered to be used in a process of W-CSP (Wafer Level Chip Size Package) or for selecting non-defective products at the time of shipment.
[0114]
【The invention's effect】
The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.
[0115]
By sharing the sort function, chips and the like corresponding to wafers having different diameters can be sorted by the same apparatus while saving space.
[Brief description of the drawings]
FIG. 1 is a front view schematically showing an example of a chip sorter according to an embodiment of the present invention.
FIG. 2 is a plan view schematically showing a planar layout of a chip sorter according to one embodiment of the present invention.
FIG. 3 is a cross-sectional view of a principal part schematically showing a configuration of the chip sorter shown in FIG. 2;
FIG. 4 is a plan view schematically showing a planar layout of a modified example of the chip sorter in one embodiment according to the present invention.
FIG. 5 is a plan view schematically showing a shared wafering correction unit in the planar configuration of the chip sorter shown in FIG. 2;
FIG. 6A is a plan view schematically showing a state before a wafer ring position is corrected, and FIG. 6B is a plan view showing a state after the correction.
FIG. 7 is a plan view schematically showing a modification of the chip sorter according to one embodiment of the present invention.
8 is a cross-sectional view of a principal part schematically showing a configuration of the chip sorter along a cutting line AA in FIG. 7;
9 is a cross-sectional view of a principal part schematically showing a configuration of the chip sorter along a cutting line BB in FIG. 7;
FIG. 10 is a flowchart showing a semiconductor device manufacturing procedure including a sorter process.
[Explanation of symbols]
100 chip sorter
110 Wafer Monitor
120 mapping display
130 operation panel
210 Wafering cassette
220 Wafering set part
221 Upper Base
230 Wafering
310 Wafering cassette
320 Wafering set section
321 Push-up unit
330 Wafering
331 straight section
410 Wafering cassette lifter
420 motor
500 XY table section
510 X-axis table
520 Y-axis table
530 drive motor
540 drive motor
550 XY table section
551 X-axis table
552 Y-axis table
553 drive motor
554 drive motor
560 XY table section
561 X-axis table
562 Y axis table
563 drive motor
564 drive motor
600 Wafer extractor
610 motor
620 Y-axis table
630 chuck
650 Wafer extractor
651 motor
652 Y-axis table
653 chuck
660 Wafer extractor unit
661 motor
662 Y axis table
663 chuck
700 Chip transfer mechanism
710 Transfer Collet Transport Guide
720 transfer collet
730 Optical system chip recognition unit
740 drive motor
800 Chip tray mechanism
810 Chip tray
820 Y-axis table
830 drive motor
840 Chip tray setting section
900 Wafering correction unit
910 Posture correction gripper
C chip
S110 Step
S120 Step
S130 Step
S140 Step
S200 Step
S210 Step
S220 step
S230 step
S310 step
S320 step
S330 step
S400 Step

Claims (5)

A method for manufacturing a semiconductor device having a step of sorting using a sorter,
The method for manufacturing a semiconductor device, wherein the sorter has a shared mechanism applied to wafers of different sizes in its mechanism. A method for manufacturing a semiconductor device, comprising: a step of performing sorting using a sorter having a two-axis table section, a wafer cassette lifter section, a wafer extractor section, and a wafer ring correction section,
A semiconductor device manufacturing method, wherein any one of the two-axis table unit, the wafer cassette lifter unit, the wafer extractor unit, and the wafer ring correction unit is a common mechanism for wafers having different diameters. Method. A method for manufacturing a semiconductor device having a chip sorting step from a φ300 mm wafer using a chip sorter,
The method for manufacturing a semiconductor device, wherein the chip sorter has a common mechanism for φ200 mm and φ300 mm. A method for manufacturing a semiconductor device having a chip sorting step,
The chip sorting step is a step of sorting non-defective chips fabricated on a φ300 mm wafer by a chip sorter in which one of an XY table section and a wafer cassette lifter section is a shared mechanism section for φ300 mm and φ200 mm. A method for manufacturing a semiconductor device. A semiconductor manufacturing apparatus having a chip sorter function having a two-axis table section, a wafer cassette lifter section, a wafer extractor section, and a wafer ring correction section as mechanism sections,
A semiconductor manufacturing apparatus, wherein any one of the two-axis table unit, the wafer cassette lifter unit, the wafer extractor unit, and the wafer ring correction unit is a shared mechanism unit adapted to different wafer sizes. .

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