JP2004123427A - Dielectric ceramic, ceramic capacitor and method of manufacturing the same - Google Patents
Dielectric ceramic, ceramic capacitor and method of manufacturing the same Download PDFInfo
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Abstract
Description
【０００１】
【発明の属する技術分野】
この発明は、例えば温度補償用磁器コンデンサや高誘電率系の磁器コンデンサの誘電体層の材料として好適な、特にＺｒを含む誘電体材料を基本とする、耐還元性の高い誘電体磁器とこの誘電体磁器を誘電体層とした磁器コンデンサ及びその製造方法に関するものである。
【０００２】
【従来の技術】
磁器コンデンサとして、例えば、積層タイプの磁器コンデンサは次のような方法によって製造されている。すなわち、ドクターブレード法等によりセラミックグリーンシートを作成し、このグリーンシート上に内部電極となる金属粉末のペーストを印刷し、これらを複数枚積み重ねて熱圧着し、大気雰囲気中において１３００℃以上の温度で焼成して焼結体を作り、内部電極と導通する外部電極を焼結体の端面に焼き付けている。
【０００３】
ここで、内部電極の材料としては、パラジウム、白金、銀−パラジウムのような貴金属であれば、上記製造条件下でも酸化しないため、この様な貴金属がこれまで多くの積層磁器コンデンサに使用されていた。
【０００４】
しかし、上記のような貴金属は、内部電極の材料として優れた特性を有しているが、反面、高価であるためコスト高の原因になっていた。そこで、このような問題を解決する手段として、内部電極の材料としてニッケル等の卑金属を用いることが試みられている。
【０００５】
しかし、内部電極の材料として、例えばニッケルを用いると、大気雰囲気中における焼成でニッケルが酸化され、内部電極として機能できなくなる。このような卑金属の酸化を防止するためには、還元性雰囲気中で焼成を行なわなければならない。
【０００６】
【発明が解決しようとする課題】
しかし、誘電体材料を還元性雰囲気中で焼成すると、還元されて半導体化し、その比抵抗（絶縁）が低下し、磁器コンデンサの電気的特性に対する信頼性が低下してしまう。
【０００７】
また、近年、電子回路の小型化、高密度化に伴い、積層磁器コンデンサも小型化、大容量化が強く求められており、それらを達成するためには誘電体層を薄膜或いはできるだけ薄い層にする手法が採られているが、その際、誘電体層の材料としてはより高い比抵抗を持つものが望ましい。
【０００８】
この発明は、できるだけ耐還元性の大きい、できるだけ比抵抗の高い誘電体磁器とこの誘電体磁器を誘電体層とした磁器コンデンサ及びその製造方法を得ることを目的とする。
【０００９】
【課題を解決するための手段】
この発明に係る誘電体磁器は、誘電体材料を焼成して焼結させて得られたものであって、その微細構造はセラミック粒子相と該セラミック粒子相を連結・被覆する粒界相と該粒界相中に析出する二次相からなり、該セラミック粒子相は前記誘電体材料の主成分を含有し、該粒界相は前記誘電体材料の副成分を含有し、該二次相はＣａ３Ｚｒ１７Ｏ３７を含有することを特徴とするものである。
【００１０】
また、この発明に係る磁器コンデンサは１又は２以上の誘電体層と、該誘電体層を各々挟持している少なくとも２以上の内部電極とを備え、該誘電体層が前記誘電体磁器からなるものである。
【００１１】
また、この発明に係る磁器コンデンサの製造方法は、誘電体材料を調整する誘電体材料調整工程と、該誘電体材料調整工程で得られた誘電体材料を用いてセラミックグリーンシートを形成するシート形成工程と、該シート形成工程で得られたセラミックグリーンシートに内部電極パターンを印刷する印刷工程と、該印刷工程を経たセラミックグリーンシートを積層して積層体を得る積層工程と、該積層工程で得られた積層体を内部電極パターンごとに裁断してチップ状の積層体を得る裁断工程と、該裁断工程で得られたチップ状の積層体を焼成する焼成工程とを備え、前記誘電体材料調整工程が、該誘電体材料の主成分を合成して仮焼きしたものと、該誘電体材料の副成分と、あらかじめ合成したＣａ３Ｚｒ１７Ｏ３７を混合する工程を有しているものである。
【００１２】
ここで、前記誘電体材料の主成分は、ＡＢＯ３（ただし、ＡはＣａ，Ｓｒ及びＢａから選択された１種又は２種以上の元素、ＢはＴｉ及び／又はＺｒ）で表わされるペロブスカイト相により形成することができる。また、前記粒界相は、ガラス状物質、例えばＳｉ及び／又はＭｎの酸化物を含有するガラス状物質により形成することができる。
【００１３】
また、Ｘ線回折測定においてＣａ３Ｚｒ１７Ｏ３７を含有する二次相の（１１１）面の回折ピーク強度と前記セラミック粒子相の（１１０）面の回折ピーク強度の比（回折ピーク強度比）は０．３５〜９．５０％が好ましい。
【００１４】
ここで、Ｘ線回折測定における上記回折ピーク強度比を０．３５〜９．５０％としたのは、回折ピーク強度比が０．３５％未満では焼結性が悪くなるとともに、所望の比抵抗値が得られなくなり、絶縁破壊電圧が低下する。回折ピーク強度比が９．５％を越えると焼結性が悪くなるとともに、所望の比抵抗値が得られなくなり、絶縁破壊電圧が低下するが、回折ピーク強度比が０．３５〜９．５％の範囲ではこのような不都合がないからである。
【００１５】
また、前記印刷工程は、卑金属材料を含む内部電極パターンを形成するものであってもよい。前記焼成工程は、チップ状の積層体を非酸化性雰囲気で焼成して焼結させるようにしてもよい。前記焼成工程は、チップ状の積層体を非酸化性雰囲気で焼成した後、酸化性雰囲気中で酸化処理するようにしてもよい。
【００１６】
【実施例】
炭酸カルシウム（ＣａＣＯ３）を０．４０ａｔｍ％、炭酸ストロンチウム（ＳｒＣＯ３）を０．４５ａｔｍ％、炭酸バリウム（ＢａＣＯ３）を０．１５ａｔｍ％、酸化ジルコニウム（ＺｒＯ２）を０．９５ａｔｍ％、酸化チタン（ＴｉＯ２）を０．０５ａｔｍ％の比となるように各々を秤量した。
【００１７】
次に、これら主成分の出発原料１００重量部とジルコニアボール３００重量部と純水３００重量部をポットミルに入れ、湿式で１５時間撹拌し、得られたスラリーをステンレスバットに移し、これを熱風乾燥機に入れ、１５０℃で４時間乾燥させた。
【００１８】
次に、この乾燥によって得られた固形物を粗粉砕し、得られた粗粉をトンネル炉に入れ、大気雰囲気中において、１２００℃で、２時間仮焼して主成分材料（誘電体のベース材）を得た。
【００１９】
次に、炭酸カルシウム（ＣａＣＯ３）を０．１５ａｔｍ％、酸化ジルコニウム（ＺｒＯ２）を０．８５ａｔｍ％秤量し、これらの出発原料１００重量部とジルコニアボール３００重量部と純水３００重量部をポットミルに入れ、湿式で１５時間撹拌してスラリーを得た。
【００２０】
次に、得られたスラリーをステンレスバットに移し、これを熱風乾燥機に入れ、１５０℃で４時間乾燥させ、得られた固形物を粗粉砕して粗粉を得、この粗粉をトンネル炉に入れ、大気雰囲気中において、１０００℃で、２時間仮焼してＣａ３Ｚｒ１７Ｏ３７を得た。
【００２１】
次に、前記主成分材料とＣａ３Ｚｒ１７Ｏ３７と副成分材料とを表１に示された割合となるように各々の材料の量を秤量し、混合して誘電体材料を得た。ここで、副成分材料の酸化珪素（ＳｉＯ２）は純度９９％のものを、酸化マンガン（ｉｉｉ）（Ｍｎ２Ｏ３）純度９９．９％のものを使用した。
【００２２】
【表１】
次に、これらに、誘電体材料１００重量部に対して、有機バインダーとしてポリブチルフタレートを１５重量部、可塑剤としてジオクチルフタレート（ＤＯＰ）を４０重量部、溶剤としてトルエンを１５０重量部添加し、ボールミルを用いて１５時間、撹拌混合してスラリーを得た。
【００２４】
次に、このスラリーを真空脱泡機に入れて脱泡し、このスラリーをリバースロールコーターによってポリエステルフィルム上に薄膜状に塗布し、これを１００℃で乾燥し、厚さ約６μｍのセラミック未焼結シート（セラミックグリーンシート）を得た。
【００２５】
一方、平均粒径０．５μｍのＮｉ粉末と、エチルセルロースをブチルカルビトールに溶解させたものとを撹拌機に入れ、十分に混合、混練して内部電極用の導電ペーストを得た。
【００２６】
そして、この導電ペーストを用いて、未焼結シート上に、短冊状の導電パターンをスクリーン印刷した。この時、導電パターンが、長手方向に約１／３ずれるよう、２種類の導電パターンを印刷した。
【００２７】
次に、２種類の導電パターンを印刷した２種類の未焼結シートを交互に５１枚（誘電体５０層）積層し、この積層によって得られた積層物の上下に、導電パターンが印刷されていない未焼結シートを積層した。
【００２８】
そして、この積層体を７０℃の温度の下で５０ＭＰａの圧力を加えて押圧し、これらを圧着した。その後、この積層体を格子状に切断し、積層体チップ（素子）を得た。
【００２９】
次に、この積層体チップを大気雰囲気中において１００℃／時間の速度で６００℃まで昇温させ、積層体チップの内部に含まれている有機バインダを加熱除去させた。そして、炉の雰囲気を大気雰囲気からＨ２（２体積％）＋Ｎ２（９８体積％）の混合雰囲気に切り替え、１００℃／時間の速度で１２５０℃（焼成温度）まで昇温させ、２時間保持した後、１００℃／時間の速度で６００℃まで降温し、雰囲気を大気雰囲気に切り替え、６００℃で３０分間保持して酸化処理を行ない、その後、室温まで冷却した。
【００３０】
このようにして、積層体チップを焼成し、電極が露出した状態で焼結された焼結体チップの側面に、Ｎｉ粉末とガラスフリットとビヒクルからなる導電ペーストを塗布して乾燥し、大気中５５０℃、１５分間焼き付けてＮｉ電極層を形成した。
【００３１】
更に、この上に無電解メッキによりＣｕを被着させ、この上に電解メッキによりＰｂ−Ｓｎ半田層を被着させて、一対の外部電極を形成して積層磁器コンデンサを得た。
【００３２】
なお、得られた積層磁器コンデンサは、２ｍｍ（Ｌ）×１．２５ｍｍ（Ｗ）×１ｍｍ（Ｔ）（２１２タイプ）であり、内部電極の交差面積は１ｍｍ２、誘電体層の１層当たりの厚みは４μｍであった。
【００３３】
次に、完成した積層磁器コンデンサの比誘電率εｓ、温度係数ＴＣＣ、比抵抗ρ、Ｘ線回折、絶縁破壊電圧を測定したところ、表２に示す通りであった。
【００３４】
なお、これらの電気的特性等は次の要領で測定した。
【００３５】
（Ａ）比誘電率εｓ
ＬＣＲメータを用い、温度２５℃、周波数１ＭＨｚ、交流電圧１Ｖ（実効値）の条件で、静電容量を測定した。得られた静電容量と内部電極の交差面積と誘電体層１層当たりの厚みから、比誘電率εｓを算出した。
【００３６】
（Ｂ）温度係数ＴＣＣ
２５℃及び１２５℃の場合の静電容量を上記のようにして測定し、この静電容量から温度変化に対する容量変化率を算出して温度係数ＴＣＣを求めた。
【００３７】
（Ｃ）比抵抗ρ
温度１５０℃、測定電圧１００Ｖの条件から、メガオームメータにより抵抗値を測定し、内部電極の交差面積と誘電体層１層当たりの厚みから比抵抗ρを算出した。
【００３８】
（Ｄ）Ｘ線回折測定
Ｘ線回折測定装置を用いて、２θ／θ＝２０〜６０°の範囲で連続スキャン法によりＸ線回折測定を行い、Ｃａ３Ｚｒ１７Ｏ３７の（１１１）面と誘電体磁器の（１１０）面との強度比（単位：％）を算出した。
【００３９】
（Ｅ）絶縁破壊電圧（ＢＤＶ）
１５０℃の恒温槽に試料を入れ、５Ｖ／秒で電圧を増加し、絶縁破壊試験を行った。絶縁破壊したときの電圧を単位誘電体厚みに換算した値を絶縁破壊電圧（ＢＤＶ）とした。
【００４０】
【表２】
表２に示す結果から、試料Ｎｏ．８に示すように回折ピーク強度比が０の場合は焼結温度が１２７５℃で比抵抗が４．６９Ｅ＋１１、ＢＤＶが７３Ｖ／μｍ、試料Ｎｏ．７に示すように回折ピーク強度比が０．１２の場合は焼結温度が１２６０℃で比抵抗が８．１９Ｅ＋１２、ＢＤＶが１０２Ｖ／μｍであるが、試料Ｎｏ．６に示すように回折ピーク強度比が０．５１の場合は焼結温度が１２５０℃で比抵抗が１．６９Ｅ＋１３で、このときＢＤＶが１２８Ｖ／μｍと良好であった。
【００４２】
また、試料Ｎｏ．１に示すように回折ピーク強度比が１３．１の場合は焼結温度が１２７５℃で比抵抗が１．４９Ｅ＋１０、ＢＤＶが４７Ｖ／μｍであったが、試料Ｎｏ．２に示すように回折ピーク強度比が８．７の場合は焼結温度が１２５０℃で比抵抗が１．３４Ｅ＋１３で、このときＢＤＶは１２５Ｖ／μｍと良好であった。
【００４３】
【発明の効果】
この発明によれば、Ｚｒを含む誘電体磁器について、非酸化性雰囲気中における焼結温度を下げることができるので、焼結の際の半導体化が抑制され、比抵抗が高く、信頼性に優れた誘電体磁器及び磁器コンデンサを得ることができる。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a dielectric ceramic having a high reduction resistance, which is preferably used as a material of a dielectric layer of a ceramic capacitor for temperature compensation or a high dielectric constant type ceramic capacitor, particularly a dielectric material containing Zr. The present invention relates to a ceramic capacitor using a dielectric ceramic as a dielectric layer and a method for manufacturing the same.
[0002]
[Prior art]
As a porcelain capacitor, for example, a laminated type porcelain capacitor is manufactured by the following method. That is, a ceramic green sheet is prepared by a doctor blade method or the like, a paste of a metal powder to be used as an internal electrode is printed on the green sheet, a plurality of these are stacked and thermocompression-bonded, and a temperature of 1300 ° C. or more is set in an air atmosphere. To form a sintered body, and external electrodes that are electrically connected to the internal electrodes are baked on the end face of the sintered body.
[0003]
Here, as a material of the internal electrode, if it is a noble metal such as palladium, platinum or silver-palladium, it will not be oxidized even under the above manufacturing conditions, and thus such a noble metal has been used in many laminated ceramic capacitors. Was.
[0004]
However, such a noble metal as described above has excellent characteristics as a material for the internal electrode, but on the other hand, it is expensive and causes high cost. In order to solve such a problem, attempts have been made to use a base metal such as nickel as the material of the internal electrode.
[0005]
However, if, for example, nickel is used as the material of the internal electrode, the nickel is oxidized by firing in an air atmosphere, and cannot function as an internal electrode. In order to prevent such oxidation of the base metal, firing must be performed in a reducing atmosphere.
[0006]
[Problems to be solved by the invention]
However, when the dielectric material is fired in a reducing atmosphere, the dielectric material is reduced to a semiconductor, the specific resistance (insulation) thereof is reduced, and the reliability of the electrical characteristics of the ceramic capacitor is reduced.
[0007]
In recent years, as electronic circuits have become smaller and higher in density, multilayer ceramic capacitors have also been strongly required to be smaller and have higher capacitance. To achieve these, the dielectric layer must be made thin or as thin as possible. In this case, a material having a higher specific resistance is desirable as a material of the dielectric layer.
[0008]
An object of the present invention is to provide a dielectric ceramic having as high a reduction resistance as possible and a specific resistance as high as possible, a ceramic capacitor using the dielectric ceramic as a dielectric layer, and a method for manufacturing the same.
[0009]
[Means for Solving the Problems]
The dielectric porcelain according to the present invention is obtained by firing and sintering a dielectric material, and its fine structure has a ceramic particle phase, a grain boundary phase connecting and coating the ceramic particle phase, and a The ceramic particle phase contains a main component of the dielectric material, the grain boundary phase contains a subcomponent of the dielectric material, and the secondary phase comprises a secondary phase precipitated in a grain boundary phase. It is characterized by containing Ca 3 Zr 17 O 37 .
[0010]
Further, a porcelain capacitor according to the present invention includes one or more dielectric layers, and at least two or more internal electrodes sandwiching each of the dielectric layers, and the dielectric layers are made of the dielectric porcelain. Things.
[0011]
Further, the method of manufacturing a ceramic capacitor according to the present invention includes a step of adjusting a dielectric material, and a step of forming a ceramic green sheet using the dielectric material obtained in the step of adjusting the dielectric material. A step of printing an internal electrode pattern on the ceramic green sheet obtained in the sheet forming step; a laminating step of laminating the ceramic green sheets after the printing step to obtain a laminate; A cutting step of cutting the obtained laminated body for each internal electrode pattern to obtain a chip-shaped laminated body; and a firing step of firing the chip-shaped laminated body obtained in the cutting step. process, and those calcined to synthesize the main component of the dielectric material, and the secondary component of the dielectric material, a step of mixing Ca 3 Zr 17 O 37 was previously synthesized It is what you are.
[0012]
Here, the main component of the dielectric material is a perovskite phase represented by ABO 3 (where A is one or more elements selected from Ca, Sr and Ba, and B is Ti and / or Zr). Can be formed. Further, the grain boundary phase can be formed of a glassy substance, for example, a glassy substance containing an oxide of Si and / or Mn.
[0013]
Further, in the X-ray diffraction measurement, the ratio of the diffraction peak intensity of the (111) plane of the secondary phase containing Ca 3 Zr 17 O 37 to the diffraction peak intensity of the (110) plane of the ceramic particle phase (diffraction peak intensity ratio). Is preferably from 0.35 to 9.50%.
[0014]
Here, the reason why the diffraction peak intensity ratio in the X-ray diffraction measurement is 0.35 to 9.50% is that when the diffraction peak intensity ratio is less than 0.35%, the sinterability deteriorates and the desired specific resistance is obtained. Value cannot be obtained, and the dielectric breakdown voltage decreases. If the diffraction peak intensity ratio exceeds 9.5%, the sinterability deteriorates, the desired specific resistance value cannot be obtained, and the dielectric breakdown voltage decreases, but the diffraction peak intensity ratio is 0.35 to 9.5. This is because there is no such inconvenience in the range of%.
[0015]
Further, the printing step may include forming an internal electrode pattern including a base metal material. In the firing step, the chip-shaped laminate may be fired and sintered in a non-oxidizing atmosphere. In the firing step, the chip-shaped laminated body may be fired in a non-oxidizing atmosphere and then oxidized in an oxidizing atmosphere.
[0016]
【Example】
0.40 atm% of calcium carbonate (CaCO 3 ), 0.45 atm% of strontium carbonate (SrCO 3 ), 0.15 atm% of barium carbonate (BaCO 3 ), 0.95 atm% of zirconium oxide (ZrO 2 ), and titanium oxide (TiO 2 ) was weighed so as to have a ratio of 0.05 atm%.
[0017]
Next, 100 parts by weight of the starting materials of these main components, 300 parts by weight of zirconia balls and 300 parts by weight of pure water are put into a pot mill, stirred for 15 hours in a wet system, and the obtained slurry is transferred to a stainless steel vat and dried with hot air. It was put on a machine and dried at 150 ° C. for 4 hours.
[0018]
Next, the solid obtained by this drying is coarsely pulverized, and the obtained coarse powder is put into a tunnel furnace, and calcined at 1200 ° C. for 2 hours in an air atmosphere to obtain a main component material (base of dielectric). Material).
[0019]
Next, 0.15 atm% of calcium carbonate (CaCO 3 ) and 0.85 atm% of zirconium oxide (ZrO 2 ) were weighed, and 100 parts by weight of these starting materials, 300 parts by weight of zirconia balls and 300 parts by weight of pure water were weighed. And stirred for 15 hours in a wet system to obtain a slurry.
[0020]
Next, the obtained slurry was transferred to a stainless steel vat, placed in a hot air drier and dried at 150 ° C. for 4 hours, and the obtained solid was coarsely pulverized to obtain coarse powder. And calcined in the air at 1000 ° C. for 2 hours to obtain Ca 3 Zr 17 O 37 .
[0021]
Next, the main component material, Ca 3 Zr 17 O 37 and the sub component material were weighed and mixed so as to have the ratio shown in Table 1, and mixed to obtain a dielectric material. Here, silicon oxide (SiO 2 ) having a purity of 99% and manganese oxide (iii) (Mn 2 O 3 ) having a purity of 99.9% were used as the auxiliary component materials.
[0022]
[Table 1]
Next, 15 parts by weight of polybutyl phthalate as an organic binder, 40 parts by weight of dioctyl phthalate (DOP) as a plasticizer, and 150 parts by weight of toluene as a solvent are added to 100 parts by weight of the dielectric material. The mixture was stirred and mixed using a ball mill for 15 hours to obtain a slurry.
[0024]
Next, this slurry was placed in a vacuum defoaming machine to remove bubbles, and this slurry was applied on a polyester film in the form of a thin film by a reverse roll coater, dried at 100 ° C., and fired with a ceramic unfired having a thickness of about 6 μm. A sintered sheet (ceramic green sheet) was obtained.
[0025]
On the other hand, a Ni powder having an average particle size of 0.5 μm and a solution obtained by dissolving ethyl cellulose in butyl carbitol were placed in a stirrer, sufficiently mixed and kneaded to obtain a conductive paste for an internal electrode.
[0026]
Then, a strip-shaped conductive pattern was screen-printed on the unsintered sheet using the conductive paste. At this time, two types of conductive patterns were printed so that the conductive patterns were shifted by about 1/3 in the longitudinal direction.
[0027]
Next, two types of unsintered sheets on which two types of conductive patterns are printed are alternately stacked (50 dielectric layers), and conductive patterns are printed on the upper and lower sides of the laminate obtained by this stacking. No unsintered sheets were laminated.
[0028]
Then, the laminate was pressed at a temperature of 70 ° C. by applying a pressure of 50 MPa, and these were pressed. Thereafter, the laminate was cut into a lattice to obtain a laminate chip (element).
[0029]
Next, the temperature of the laminated chip was raised to 600 ° C. at a rate of 100 ° C./hour in an air atmosphere, and the organic binder contained in the laminated chip was removed by heating. Then, the atmosphere of the furnace was switched from the air atmosphere to a mixed atmosphere of H 2 (2% by volume) + N 2 (98% by volume), the temperature was raised to 1250 ° C. (sintering temperature) at a rate of 100 ° C./hour, and held for 2 hours. After that, the temperature was lowered to 600 ° C. at a rate of 100 ° C./hour, the atmosphere was switched to the air atmosphere, the oxidation treatment was performed at 600 ° C. for 30 minutes, and then cooled to room temperature.
[0030]
In this way, the laminated chip is fired, and a conductive paste composed of Ni powder, glass frit and vehicle is applied to the side surface of the sintered chip sintered with the electrodes exposed, and dried, Baking was performed at 550 ° C. for 15 minutes to form a Ni electrode layer.
[0031]
Further, Cu was deposited thereon by electroless plating, and a Pb-Sn solder layer was deposited thereon by electrolytic plating to form a pair of external electrodes to obtain a laminated ceramic capacitor.
[0032]
The obtained laminated ceramic capacitor was 2 mm (L) × 1.25 mm (W) × 1 mm (T) (212 type), the cross area of the internal electrodes was 1 mm 2 , and the dielectric layer per one layer was The thickness was 4 μm.
[0033]
Next, the relative dielectric constant εs, temperature coefficient TCC, specific resistance ρ, X-ray diffraction, and dielectric breakdown voltage of the completed laminated ceramic capacitor were measured.
[0034]
In addition, these electric characteristics etc. were measured in the following way.
[0035]
(A) relative permittivity εs
The capacitance was measured using an LCR meter under the conditions of a temperature of 25 ° C., a frequency of 1 MHz, and an AC voltage of 1 V (effective value). The relative dielectric constant εs was calculated from the obtained capacitance, the intersection area of the internal electrodes, and the thickness per dielectric layer.
[0036]
(B) Temperature coefficient TCC
The capacitance at 25 ° C. and 125 ° C. was measured as described above, and the rate of capacitance change with respect to temperature change was calculated from the capacitance to obtain the temperature coefficient TCC.
[0037]
(C) Specific resistance ρ
The resistance was measured with a mega-ohm meter under the conditions of a temperature of 150 ° C. and a measurement voltage of 100 V, and the specific resistance ρ was calculated from the intersection area of the internal electrodes and the thickness per dielectric layer.
[0038]
(D) X-ray Diffraction Measurement Using an X-ray diffraction measurement apparatus, X-ray diffraction measurement was performed by the continuous scanning method in the range of 2θ / θ = 20 to 60 °, and the (111) plane of Ca 3 Zr 17 O 37 was measured. The intensity ratio (unit:%) to the (110) plane of the dielectric ceramic was calculated.
[0039]
(E) Breakdown voltage (BDV)
The sample was placed in a thermostat at 150 ° C., and the voltage was increased at 5 V / sec, and a dielectric breakdown test was performed. The value obtained by converting the voltage at the time of dielectric breakdown into the unit dielectric thickness was defined as the dielectric breakdown voltage (BDV).
[0040]
[Table 2]
From the results shown in Table 2, Sample No. As shown in FIG. 8, when the diffraction peak intensity ratio was 0, the sintering temperature was 1275 ° C., the specific resistance was 4.69E + 11, the BDV was 73 V / μm, and the sample No. As shown in FIG. 7, when the diffraction peak intensity ratio was 0.12, the sintering temperature was 1,260 ° C., the specific resistance was 8.19E + 12, and the BDV was 102 V / μm. As shown in FIG. 6, when the diffraction peak intensity ratio was 0.51, the sintering temperature was 1250 ° C., the specific resistance was 1.69E + 13, and the BDV was as good as 128 V / μm.
[0042]
Further, the sample No. As shown in FIG. 1, when the diffraction peak intensity ratio was 13.1, the sintering temperature was 1275 ° C., the specific resistance was 1.49E + 10, and the BDV was 47 V / μm. As shown in FIG. 2, when the diffraction peak intensity ratio was 8.7, the sintering temperature was 1250 ° C., the specific resistance was 1.34E + 13, and the BDV was 125 V / μm, which was good.
[0043]
【The invention's effect】
According to the present invention, the sintering temperature of a dielectric ceramic containing Zr in a non-oxidizing atmosphere can be reduced, so that the formation of a semiconductor during sintering is suppressed, the specific resistance is high, and the reliability is excellent. Dielectric ceramic and porcelain capacitor can be obtained.
Claims (15)
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103460316A (en) * | 2011-09-29 | 2013-12-18 | 株式会社村田制作所 | Layered ceramic capacitor and method for producing layered ceramic capacitor |
| CN112687467A (en) * | 2019-10-17 | 2021-04-20 | 太阳诱电株式会社 | Ceramic electronic device and method for manufacturing the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103460316A (en) * | 2011-09-29 | 2013-12-18 | 株式会社村田制作所 | Layered ceramic capacitor and method for producing layered ceramic capacitor |
| CN112687467A (en) * | 2019-10-17 | 2021-04-20 | 太阳诱电株式会社 | Ceramic electronic device and method for manufacturing the same |
| JP2021068734A (en) * | 2019-10-17 | 2021-04-30 | 太陽誘電株式会社 | Ceramic electronic component and manufacturing method thereof |
| JP7480459B2 (en) | 2019-10-17 | 2024-05-10 | 太陽誘電株式会社 | Ceramic electronic components and their manufacturing method |
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