JP2004119964A - Method of manufacturing semiconductor light-emitting device, semiconductor light-emitting device, method of manufacturing integrated type semiconductor light-emitter, integrated type semiconductor light-emitting apparatus, method of manufacturing image display device, image display device, method of manufacturing illuminator, and illuminator. - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a semiconductor light-emitting device with significantly improved emission efficiency. <P>SOLUTION: An n-type GaN layer 12 is grown on a sapphire substrate 11, and a growth mask is formed of an SiO<SB>2</SB>film or the like on it. The n-type GaN layer 15 in a hexagonal pyramid shape is selectively grown on the n-type GaN layer 12 at the opening part of the growth mask. After the growth mask is etched away, an active layer 16 and a p-type GaN layer 17 are successively grown over the entire surface of the substrate, in such a manner as to cover the n-type GaN layer 15, to form a light-emitting device structure. After this, an n-side electrode 19 and a p-side electrode 20 are formed. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to a method for manufacturing a semiconductor light emitting device, a semiconductor light emitting device, a method for manufacturing an integrated semiconductor light emitting device, an integrated semiconductor light emitting device, a method for manufacturing an image display device, an image display device, a method for manufacturing a lighting device, and a lighting device. In particular, it is suitable for application to a light emitting diode using a nitride III-V compound semiconductor.

Conventionally, as a semiconductor light emitting device, an n-type GaN layer is grown on a sapphire substrate, a growth mask having a predetermined opening is formed thereon, and a main substrate is formed on the n-type GaN layer in the opening of the growth mask. A light emitting diode in which a hexagonal pyramid-shaped n-type GaN layer having a tilted crystal plane inclined with respect to the plane is selectively grown, and an active layer, a p-type GaN layer, and the like are grown on the tilted crystal plane, has been proposed by the present applicant. It has been proposed (for example, see Patent Document 1). According to this light-emitting diode, propagation of threading dislocations from the substrate side to the layer forming the element structure can be suppressed, and the crystallinity of those layers can be improved, so that high luminous efficiency can be obtained. be able to.

WO 02/07231 pamphlet (pages 47-50, Figures 3 to 9)

However, according to the knowledge of the present inventor, although silicon oxide (SiO ₂ ) or silicon nitride (SiN) is usually used as a material for the above-described growth mask for selective growth, the selective growth of the n-type GaN layer can be improved. Since the subsequent growth of the p-type GaN layer is performed at a high temperature of about 1000 ° C., during this growth, silicon (Si) and oxygen (O) are desorbed from the surface of the growth mask and are taken into the growth layer in the vicinity. A phenomenon occurs. The effect of this phenomenon is particularly remarkable during the growth of the p-type GaN layer. If Si acting as an n-type impurity with respect to GaN is taken into the growth layer during the growth of the p-type GaN layer, it is unlikely to become p-type. It became clear that both the hole concentration and the mobility drastically decreased even when the device became a p-type, and this was found to be a factor that hindered the improvement of the light emitting efficiency of the light emitting diode.

Furthermore, a photolithography step is required to form the opening of the growth mask, but in that case, a step of bringing the resist into close contact with the mask surface and partially removing the resist is required. However, at the time of this removal, the resist tends to remain in the minute gaps of the growth mask, and the removal is extremely difficult. For this reason, during the subsequent high-temperature growth, the remaining resist may serve as an impurity source to deteriorate the characteristics of the p-type GaN layer and the like.

Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor light emitting device that can easily manufacture a semiconductor light emitting device with significantly improved luminous efficiency.
Another object to be solved by the present invention is to provide a semiconductor light-emitting device having significantly improved luminous efficiency.
Another problem to be solved by the present invention is to provide a method of manufacturing an image display device capable of easily manufacturing an image display device with significantly improved luminous efficiency and an image display device with significantly improved luminous efficiency. It is in.
Still another object of the present invention is to provide a method of manufacturing a lighting device that can easily manufacture a lighting device with significantly improved luminous efficiency and a lighting device with significantly improved luminous efficiency. is there.

In order to solve the above problems, a first invention of the present invention is:
Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of the first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
Sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer.

Here, as long as the growth mask has a sufficiently small number of nuclei on the growth mask during the growth of the second semiconductor layer as compared with the nucleation on the first semiconductor layer and is capable of selective growth, the growth mask is basically used. May be formed of any material, but typically, a silicon oxide (SiO ₂ ) film, a silicon nitride (SiN (particularly, Si ₃ N ₄ )) film, a silicon oxynitride (SiON) film, It consists of those laminated films. In addition, as the growth mask, an aluminum oxide (Al ₂ O ₃ ) film, a tungsten (W) film, a stacked film of the above films, or the like may be used.

The substrate is basically made of any material as long as the first semiconductor layer, the second semiconductor layer, the active layer, the third semiconductor layer, and the like can be grown with good crystallinity. May be used. Specifically, sapphire (Al ₂ O ₃ ) (including C-plane, A-plane, and R-plane), SiC (including 6H, 4H, and 3C), nitride-based III-V compound semiconductors (GaN, InAlGaN, AlN), a substrate made of Si, ZnS, ZnO, LiMgO, GaAs, MgAl ₂ O _4, or the like can be used, and a hexagonal substrate or a cubic substrate made of these materials is preferably used. A crystal substrate is used. For example, when the first semiconductor layer, the second semiconductor layer, the active layer, and the third semiconductor layer are made of a nitride III-V compound semiconductor, a sapphire substrate having a C-plane as a main surface is used. Can be. However, the C plane referred to here includes a crystal plane which is inclined to about 5 to 6 ° with respect to this and can be substantially regarded as a C plane.

The second semiconductor layer to be selectively grown is typically a crystal layer having a tilted crystal plane tilted with respect to the main surface of the substrate. As a material of the first semiconductor layer, the second semiconductor layer or the crystal layer, the active layer, and the third semiconductor layer, basically, any semiconductor may be used, but typically, wurtz is used. It has a mineral-type crystal structure. Examples of the semiconductor having such a wurtzite crystal structure include a nitride III-V compound semiconductor, a II-VI compound semiconductor such as a BeMgZnCdS compound semiconductor, and a BeMgZnCdO compound semiconductor. Nitride III-V compound semiconductor is most commonly _{Al X B y Ga 1-xyz} In z As u N 1-uv P v ( however, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ u ≦ 1,0 ≦ v ≦ 1,0 ≦ x + y + z <1,0 ≦ u + v consists <1), more specifically, _{Al X B y Ga 1-xyz} in z N ( provided that , 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ x + y + z <1), typically Al _x Ga _1-xz In _z N (where 0 ≦ x ≦ 1, 0 ≦ z ≦ 1). Specific examples of the nitride III-V compound semiconductor include GaN, InN, AlN, AlGaN, InGaN, and AlGaInN. In this case, the inclined crystal plane is typically an S plane (particularly, an S + plane). However, the S plane referred to here includes a crystal plane which is inclined to about 5 to 6 ° with respect to this and can be substantially regarded as an S plane.

The crystal layer serving as the second semiconductor layer typically has a hexagonal pyramid shape in which the S plane is an inclined crystal plane, or a truncated hexagonal pyramid in which the S plane is an inclined crystal plane and the upper surface is a C plane. It has the shape of An electrode of the second conductivity type is formed on the second semiconductor layer. In the former case, typically, the S-plane (inclined) of the third semiconductor layer on the second semiconductor layer is typically used. This electrode is formed on the crystal plane), and in the latter case, typically, this electrode is formed on the C plane (the upper surface of a hexagonal pyramid) of the third semiconductor layer on the second semiconductor layer. Preferably, it is formed so as to avoid corners on the outer periphery of the upper surface of the truncated hexagonal pyramid, which generally have poor crystallinity.
The crystal layer serving as the second semiconductor layer may have, for example, a stripe shape extending in one direction.

In the growth of a nitride III-V compound semiconductor, an S-plane and a C-plane are relatively likely to be formed on the growth surface, but when the S-plane is formed, most of the thickness of the grown layer, for example, 90% The above growth rate (the growth rate here refers to the amount of raw material supplied; that is, the net growth rate of the nitride-based III-V compound semiconductor per unit area of growth. Therefore, when growing on the C-plane, Has the same growth rate, but care must be taken when growing on an inclined surface such as the S-plane.) When the growth rate is set to 10 μm / h, the growth also occurs on the S-plane. However, when the growth rate is smaller than 10 μm / h, for example, 4 μm / h, the growth rate on the C plane is much higher than the growth rate on the S plane, and a layer having a required thickness is grown on the S plane. It becomes difficult to make it. Therefore, when growing a growth layer including an active layer made of a nitride III-V compound semiconductor and a third semiconductor layer, at least 90% or more of the thickness is preferably 10 μm / h or more. Grow at growth rate. On the other hand, when growing on the C plane, if the growth rate is 10 μm / h or more, a large number of pits will undesirably appear, which is not preferable. Therefore, when growing on the C-plane, the growth rate is preferably lower than 10 μm / h.

{Circle around (2)} The second semiconductor layer is typically selectively grown so as to extend in the lateral direction more than the opening of the growth mask, but it is not always necessary to do so, and the second semiconductor layer may fit in the opening.

After the growth mask is removed, before growing the active layer, preferably just before growing the active layer, a fourth semiconductor layer of the first conductivity type is grown on the second semiconductor layer. Is also good. By doing so, the following advantages can be obtained. First, when an active layer is directly grown on the second semiconductor layer after removing the growth mask, the light emitting characteristics of the active layer are increased due to the presence of an oxide film at the interface between the second semiconductor layer and the active layer. However, if a fourth semiconductor layer is first grown and then an active layer is grown thereon, the active layer can be grown on a clean surface free of an oxide film or the like. Can be prevented. Second, when the substrate is exposed to the air to remove the growth mask, the surface of the second semiconductor layer is oxidized and an oxide film is formed unevenly. Although the growth is difficult to occur in a large part, and the surface of the active layer tends to be uneven as a result of growing first from a part with a small oxide film, as described above, when the active layer is grown on the fourth semiconductor layer, the oxidation is Since the active layer can be grown on a clean surface where no film or the like exists, the flatness of the surface of the active layer can be improved. Third, since the growth rate of the second semiconductor layer during the selective growth is generally slow, the surface of the second semiconductor layer (particularly, the C-plane layer) tends to be relatively rough and have poor flatness. When the fourth semiconductor layer is grown on the second semiconductor layer at a sufficiently high growth rate, the second semiconductor layer can be planarized by filling the unevenness of the rough surface of the second semiconductor layer. For example, when the first semiconductor layer, the second semiconductor layer, the active layer, and the third semiconductor layer are made of a nitride III-V compound semiconductor, the material of the fourth semiconductor layer is, for example, GaN, A nitride III-V compound semiconductor such as InGaN, AlGaN, or AlGaInN can be used.

As a method of growing the first semiconductor layer, the second semiconductor layer, the active layer, and the third semiconductor layer, for example, metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxial growth, or halide vapor phase epitaxial growth (HVPE) Etc. can be used.

According to a second aspect of the present invention,
A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially stacked on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
A semiconductor light-emitting element provided on a second-conductivity-type semiconductor layer on a crystal part and having a second electrode electrically connected to the second-conductivity-type semiconductor layer,
The size of the second electrode is 50% or less of the size of the crystal part in which the active layer and the semiconductor layer of the second conductivity type are stacked.
Here, the size of the second electrode is preferably selected to be about 33% or less of the size of the crystal part where the active layer and the semiconductor layer of the second conductivity type are stacked.

According to a third aspect of the present invention,
Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of the first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
Sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer. A method of manufacturing an integrated semiconductor light emitting device, comprising:
Here, the integrated semiconductor light emitting device may be used for any purpose, but typical applications are an image display device and a lighting device.

According to a fourth aspect of the present invention,
A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially stacked on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
An integrated semiconductor light emitting device in which a plurality of semiconductor light emitting elements provided on a second conductivity type semiconductor layer on a crystal part and having a second electrode electrically connected to the second conductivity type semiconductor layer are integrated. A device,
The size of the second electrode is 50% or less of the size of the crystal part in which the active layer and the semiconductor layer of the second conductivity type are stacked.
Here, the size of the second electrode is preferably selected to be about 33% or less of the size of the crystal part where the active layer and the semiconductor layer of the second conductivity type are stacked.

According to a fifth aspect of the present invention,
Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of the first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
Sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer.

According to a sixth aspect of the present invention,
A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially stacked on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
An image display device provided on a second conductivity type semiconductor layer on a crystal part and having a second electrode electrically connected to the second conductivity type semiconductor layer,
The size of the second electrode is 50% or less of the size of the crystal part in which the active layer and the semiconductor layer of the second conductivity type are stacked.
Here, the size of the second electrode is preferably selected to be about 33% or less of the size of the crystal part where the active layer and the semiconductor layer of the second conductivity type are stacked.

According to a seventh aspect of the present invention,
Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of the first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
A step of sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer.

According to an eighth aspect of the present invention,
A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially stacked on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
A lighting device including a second electrode provided on the second conductivity type semiconductor layer over the crystal part and electrically connected to the second conductivity type semiconductor layer,
The size of the second electrode is 50% or less of the size of the crystal part in which the active layer and the semiconductor layer of the second conductivity type are stacked.

Here, the size of the second electrode is preferably selected to be about 33% or less of the size of the crystal part where the active layer and the semiconductor layer of the second conductivity type are stacked.
In the second to eighth aspects of the present invention, what has been described in relation to the first aspect holds as long as the property is not violated.

According to the first, third, fifth and seventh aspects of the present invention configured as described above, the active layer and the third semiconductor layer of the second conductivity type are grown after removing the growth mask. Thus, when a silicon oxide film or a silicon nitride film is used as a growth mask, there is essentially no problem that silicon released from the growth mask is taken into the third semiconductor layer. Further, there is no problem of contamination by a resist or the like.

According to the second, fourth, sixth and eighth aspects of the present invention configured as described above, the size of the second electrode is such that the active layer and the semiconductor layer of the second conductivity type are stacked. Since the size of the crystal part is 50% or less, even if an abnormally grown part occurs below the inclined crystal plane formed in the semiconductor layer of the second conductivity type, the second electrode is formed in this part. Can be avoided.

According to the present invention, the active layer and the third semiconductor layer of the second conductivity type are grown after the growth mask is removed, so that the semiconductor light emitting element, the integrated semiconductor light emitting device, and the image have significantly improved luminous efficiency. The display device and the lighting device can be easily manufactured.

Further, according to the present invention configured as described above, the size of the second electrode is 50% or less of the size of the crystal part on which the active layer and the semiconductor layer of the second conductivity type are stacked. Accordingly, it is possible to provide a semiconductor light emitting element, an integrated semiconductor light emitting device, an image display device, and a lighting device whose luminous efficiency is greatly improved.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings of the embodiments, the same or corresponding parts are denoted by the same reference numerals.
1 to 6 show a method of manufacturing a GaN-based light-emitting diode according to a first embodiment of the present invention in the order of steps, where A is a perspective view and B is a cross-sectional view. FIG. 7 is a sectional view showing a completed state of the GaN-based light emitting diode.

In the first embodiment, as shown in FIG. 1, first, for example, a sapphire substrate 11 whose main surface is a C + surface is prepared, and its surface is cleaned by thermal cleaning or the like. Then, an n-type GaN layer 12 doped with, for example, Si as an n-type impurity is grown by, for example, a metal organic chemical vapor deposition (MOCVD) method. The n-type GaN layer 12 desirably has as few crystal defects as possible, in particular, threading dislocations, and a thickness of, for example, about 2 μm or more is usually sufficient. There are various methods for forming the low-defect n-type GaN layer 12, but as a general method, first, a GaN buffer layer or an AlN buffer layer (shown in FIG. And then growing the temperature to about 1000 ° C. for crystallization, and then growing the n-type GaN layer 12 thereon.

Next, an SiO ₂ film having a thickness of, for example, about 100 nm is formed on the entire surface of the n-type GaN layer 12 by, for example, a CVD method, a vacuum deposition method, a sputtering method, or the like, and a resist pattern having a predetermined shape is formed thereon by lithography. (Not shown), and using this resist pattern as a mask, SiO ₂ is formed by wet etching using a hydrofluoric acid-based etching solution or RIE using an etching gas containing fluorine such as CF ₄ or CHF _3. The film is etched and patterned to form a growth mask 14 having a predetermined opening 13 at an element formation position. The shape of the opening 13 is preferably a circle or a hexagon whose one side is parallel to the <11-20> direction. Here, the opening 13 is a circle as an example. The diameter of the opening 13 is determined as needed, but is, for example, about 10 μm.

(2) Next, as shown in FIG. 2, an n-type GaN layer 15 doped with, for example, Si as an n-type impurity is selectively grown on the n-type GaN layer 12 in the opening 13 using the growth mask 14. By this selective growth, a hexagonal pyramid-shaped n-type GaN layer 15 is obtained. The six surfaces of the n-type GaN layer 15 having the shape of a hexagonal pyramid are formed as S surfaces inclined with respect to the main surface of the sapphire substrate 11. The size of the n-type GaN layer 15 having the shape of a hexagonal pyramid is determined as necessary. In this case, the size is selected to be slightly larger than the diameter of the opening 13.

Next, as shown in FIG. 3, the growth mask 14 is removed by wet etching using, for example, a hydrofluoric acid-based etchant, or by RIE using an etching gas containing fluorine such as CF ₄ or CHF _3. . In this manner, a GaN processed substrate in which the hexagonal pyramid-shaped n-type GaN layer 15 is formed on the n-type GaN layer 12 is obtained.

Next, the GaN-processed substrate is placed in a reaction tube of an MOCVD apparatus, and thermal cleaning is performed in the reaction tube for, for example, 1 to 2 minutes to clean the surface. Subsequently, as shown in FIG. An InGaN-based active layer 16 and a p-type GaN layer 17 doped with, for example, Mg as a p-type impurity are sequentially grown on the substrate at a growth rate of preferably 10 μm / h or more. Thus, the hexagonal pyramid-shaped n-type GaN layer 15 and the active layer 16 and the p-type GaN layer 17 grown on the inclined crystal plane form a light emitting diode structure having a double hetero structure. The thicknesses of the active layer 16 and the p-type GaN layer 17 are determined as necessary. The thickness of the active layer 16 is, for example, 3 nm, and the thickness of the p-type GaN layer 17 is, for example, 0.2 μm. The growth temperature of these GaN-based semiconductor layers is, for example, 650-800 ° C. for the active layer 16 and 900-1050 ° C. for the p-type GaN layer 17. The active layer 16 may be composed of a single InGaN layer, for example, or may have a multiple quantum well structure in which two InGaN layers having different In compositions are alternately stacked, for example. , The emission wavelength is set. Further, in the p-type GaN layer 17, preferably, the Mg concentration of the uppermost layer is increased so that a good ohmic contact with a p-side electrode described later can be obtained. However, on the p-type GaN layer 17, a p-type InGaN layer in which Mg is doped as a p-type impurity, which makes it easier to make ohmic contact, is grown as a p-type contact layer, and a p-side electrode is formed thereon. Is also good. If necessary, immediately before growing the active layer 16, a thin n-type GaN layer, for example, doped with Si as an n-type impurity, is grown on the GaN-processed substrate. May be grown. By doing so, the active layer 16 can be grown on the clean surface of the n-type GaN layer, so that the active layer 16 having good crystallinity can be obtained reliably. In this case, when growing the n-type GaN layer, it is empirically found that the growth is preferably started at a growth temperature of about 850 ° C. and then gradually increased to about 950 ° C. Has been issued. Also, the apex of the n-type GaN layer 15 having a hexagonal pyramid shape is slightly rounded due to the heat treatment effect at the time of the thermal cleaning, so that the apex of the active layer 16 and the p-type GaN layer 17 grown thereon are also rounded. Therefore, since the p-side electrode formed on the p-type GaN layer 17 is formed on the p-type GaN layer 17 in the region including the rounded apex, the p-type GaN in the region including the sharp vertex is formed. As compared with the case where the p-side electrode is formed on the layer 17, the problem of the deterioration of the p-side electrode with time caused by the electric field concentration near the apex generated during the operation of the light emitting diode can be alleviated.

What is important here is that the growth mask 14 does not exist when the active layer 16 and the p-type GaN layer 17 are grown. For this reason, even if a SiO ₂ film or a SiN film is used as the growth mask 14, there is essentially no problem that Si is desorbed and taken into the growth layer during the growth of the p-type GaN layer 17. Also, there is no problem of resist contamination.
When the GaN-based semiconductor layer is grown at a growth temperature of about 1000 ° C., it is generally necessary to greatly increase the supply amount of the Ga material (for example, 100 μmol / min or more).

The growth material for the GaN-based semiconductor layer is, for example, trimethylgallium ((CH ₃ ) ₃ Ga, TMG) as a Ga material, trimethylaluminum ((CH ₃ ) ₃ Al, TMA), In as an Al material. the raw materials trimethylindium _{((CH 3) 3 in,} TMI), as a raw material for N using NH _3. As for the dopant, for example, silane (SiH ₄ ) is used as an n-type dopant, and bis = methylcyclopentadienyl magnesium ((CH ₃ C ₅ H ₄ ) ₂ Mg) or bis = cyclopentadienyl is used as a p-type dopant. used magnesium _{((C 5 H 5) 2} Mg).

Further, as the carrier gas atmosphere during the growth of the GaN-based semiconductor layer, the n-type GaN layer 12 and the n-type GaN layer 15 are a mixed gas of N ₂ and H ₂ , the active layer 16 is an N ₂ gas atmosphere, For the type GaN layer 17, a mixed gas of N ₂ and H ₂ is used. In this case, in growing the active layer 16, the carrier gas atmosphere is an N ₂ atmosphere, and H ₂ is not included in the carrier gas atmosphere, so that the desorption of In can be suppressed, and the deterioration of the active layer 16 can be prevented. can do. Since the carrier gas atmosphere is a mixed gas atmosphere of N ₂ and H ₂ when growing the p-type GaN layer 17, these p-type layers can be grown with good crystallinity.

Next, the sapphire substrate 11 on which the GaN-based semiconductor layer has been grown as described above is taken out of the MOCVD apparatus.
Next, a resist pattern (not shown) is formed by lithography to cover the surface of the p-type GaN layer 17 in a region excluding the hexagonal pyramid-shaped n-type GaN layer 15 and a region other than the n-side electrode formation region.
Next, using the resist pattern as a mask, the p-type GaN layer 17 and the active layer 16 are etched by, for example, RIE to form an opening 18, and the n-type GaN layer 12 is exposed in the opening 18. After that, the resist pattern is removed.

Next, after a Ti film, a Pt film, and an Au film are sequentially formed on the entire surface of the substrate by, for example, a vacuum deposition method, a resist pattern having a predetermined shape is formed thereon by lithography, and the Ti film and the Pt film are formed using the resist pattern as a mask. And the Au film are etched. As a result, an n-side electrode 19 having a Ti / Pt / Au structure in contact with the n-type GaN layer 12 through the opening 18 of the p-type GaN layer 17 and the active layer 16 is formed.

Next, in a similar process, the p-side electrode 20 having a Ni / Pt / Au structure is formed in a region including the apexes of the active layer 16 and the p-type GaN layer 17 grown on the hexagonal pyramid-shaped n-type GaN layer 15. To form

After that, the substrate on which the light emitting diode structure is formed as described above is formed into chips by etching by RIE or dicer. FIG. 6 shows a GaN-based light-emitting diode chipped. FIG. 7 shows a cross-sectional view of a GaN-based light emitting diode in a completed state.

When a current was passed between the p-side electrode 20 and the n-side electrode 19 of the GaN-based light-emitting diode manufactured in this manner, the light-emitting diode was driven within a light emission wavelength range of 380 to 620 nm according to the In composition of the active layer 16. Thus, light emission through the sapphire substrate 11 could be confirmed.

FIG. 8 shows the current-light characteristics of the GaN-based light emitting diode. FIG. 8 also shows, for comparison, current-light characteristics of a conventional ordinary GaN-based light emitting diode in which a GaN-based semiconductor layer is grown without forming a hexagonal pyramid-shaped n-type GaN layer to form an element structure. Also shown. As is clear from FIG. 8, the GaN-based light-emitting diode according to the first embodiment has a luminous efficiency approximately two to three times that of the conventional GaN-based light-emitting diode. This is because the light emission from the active layer 16 can be efficiently extracted to the outside due to the hexagonal pyramid shape of the element structure, and in addition, the removal of Si from the growth mask 14 hinders the formation of the p-type. It is considered that the absence of such a structure enabled the reduction in the specific resistance of the p-type GaN layer 17.

FIGS. 9, 10 and 11 show a GaN-based material in which the size of the p-type GaN layer 17 grown in a hexagonal pyramid shape is about 12 μm, and the size of the p-side electrode 20 is changed every 2 μm in the range of 2 to 12 μm. The result of examining the light emitting characteristics of the light emitting diode is shown. Here, FIG. 9 shows current-voltage characteristics, FIG. 10 shows current-light output characteristics, and FIG. 11 shows the relationship between electrode size and luminous efficiency. 9 to 11, it can be seen that the optimal size of the p-side electrode 20 from the viewpoint of light emission characteristics is about 6 μm or less, in other words, 50% or less of the size of the n-type GaN layer 15 having a hexagonal pyramid shape. Therefore, based on this experimental data, the luminous efficiency is maximized when the size of the p-side electrode 20 is set to 50% or less of the size of the hexagonal pyramidal p-type GaN layer 17 and the area ratio is set to 25% or less. Further, as shown in FIG. 11, when the size of the p-side electrode 20 is about 33% or less of the size of the p-type GaN layer 17 having a hexagonal pyramid shape and the area ratio is about 11% or less, the luminous efficiency can be further increased. .

The reason why the luminous efficiency is increased by setting the size of the p-side electrode 20 to 50% or less of the size of the p-type GaN layer 17 having a hexagonal pyramid shape can be considered as follows. That is, FIG. 12A shows a state immediately after the growth of the p-type GaN layer 17. As can be seen from FIG. 12A, a pit 21 exists below the hexagonal pyramid-shaped p-type GaN layer 17, and an abnormally grown portion exists near the pit 21. 22 are formed. If the p-side electrode 20 is formed on the abnormally grown portion 22, the contact characteristics of the p-side electrode 20 are deteriorated, and the luminous efficiency is reduced. Therefore, as shown in FIG. 12B, when the size of the p-side electrode 20 is set to 50% or less of the size of the hexagonal pyramid-shaped p-type GaN layer 17, the p-side electrode 20 is prevented from covering the abnormally grown portion 22. Can be.

As described above, according to the first embodiment, the hexagonal pyramid-shaped n-type GaN layer 15 is selectively grown on the n-type GaN layer 12 in the opening 13 of the growth mask 14 made of SiO ₂ and then grown. By removing the mask 14 by etching and then growing the active layer 16 and the p-type GaN layer 17, Si is detached from the growth mask 14 during the growth of the p-type GaN layer 17 and is taken into the growth layer. There is no problem. Therefore, it is possible to obtain a p-type GaN layer 17 sufficiently doped with Mg and having a low specific resistance, thereby improving the luminous efficiency of the GaN-based light emitting diode. Further, by setting the size of the p-side electrode 20 to 50% or less of the size of the p-type GaN layer 17 having a hexagonal pyramid shape, the luminous efficiency of the GaN-based light emitting diode can be maximized, and the luminous efficiency can be greatly improved. Can be achieved.

Further, the opening 18 is formed in the p-type GaN layer 17 and the active layer 16 by dry etching such as RIE for forming the n-side electrode 19, and the elements are separated when manufacturing an integrated semiconductor light emitting device. When the p-type GaN layer 17 and the active layer 16 are etched by dry etching such as RIE, it is difficult to avoid that the active layer 16 is damaged at that portion. Is sufficiently away from the portion where light emission actually occurs (p-side electrode 20 and its vicinity in the range of 2 to 5 μm), and thus has no adverse effect on the light emission characteristics.

Next, a GaN-based light emitting diode according to a second embodiment of the present invention will be described.
In the second embodiment, as shown in FIG. 13, the p-side electrode 20 is not formed near the apex of the p-type GaN layer 17 having a hexagonal pyramid shape, but is formed only at the middle portion thereof. More specifically, the size of the p-side electrode 20 is set to 50% or less of the size of the p-type GaN layer 17 having a hexagonal pyramid shape, and the p-side electrode 20 is not formed near the apex. This is because the crystallinity of the portion near the vertex of the hexagonal pyramid-shaped p-type GaN layer 17 is worse than that of other portions according to the observation result by the atomic force microscope (AFM). The p-side electrode 20 is formed avoiding the vicinity of the bad vertex, and the size of the p-side electrode 20 is set to 50% or less of the size of the hexagonal pyramidal p-type GaN layer 17 as described in the first embodiment. Thereby, the p-side electrode 20 can be prevented from covering the abnormally grown portion 22.

According to the second embodiment, the same advantages as those of the first embodiment can be obtained, and the size of the p-side electrode 20 is set to 50% or less of the size of the hexagonal pyramid-shaped p-type GaN layer 17. In addition, since the p-side electrode 20 is not formed near the apex, the luminous efficiency of the GaN-based light emitting diode can be further improved.

Next, a GaN-based light emitting diode according to a third embodiment of the present invention will be described.
In the third embodiment, the p-side electrode 20 is formed on the p-type GaN layer 17 after the process is advanced to the p-type GaN layer 17 in the same manner as in the first embodiment. Next, a portion above the n-type GaN layer 12 is separated from the sapphire substrate 11 by irradiating a laser beam from the back surface side of the sapphire substrate 11 with, for example, an excimer laser. Next, after the rear surface of the n-type GaN layer 12 thus peeled is planarized by etching or the like, an n-side electrode 19 is formed on the rear surface of the n-type GaN layer 12, as shown in FIG. The n-side electrode 19 may be a transparent electrode made of, for example, ITO. In this case, the n-side electrode 19 is formed over a wide area on the back surface of the n-type GaN layer 12 including a portion corresponding to a hexagonal pyramid-shaped portion. Can be. When the n-side electrode 19 is formed of a metal laminated film having a Ti / Pt / Au structure, light is radiated to the outside through the n-type GaN layer 12, as shown in FIG. An opening 19a is provided in the n-side electrode 19 at a portion corresponding to the hexagonal pyramid-shaped portion.
According to the third embodiment, advantages similar to those of the first embodiment can be obtained.

Next, an image display device according to a fourth embodiment of the present invention will be described. This image display device is shown in FIG.
As shown in FIG. 16, in this image display device, GaN-based light-emitting diodes are regularly arranged in the x-direction and the y-direction orthogonal to each other in the plane of the sapphire substrate 11, and a two-dimensional array of GaN-based light-emitting diodes is formed. Is formed. The structure of each GaN-based light emitting diode is the same as, for example, the first embodiment.

In the y direction, a GaN-based light emitting diode for emitting red (R) light, a GaN-based light emitting diode for emitting green (G) light, and a GaN-based light emitting diode for emitting blue (B) light are arranged adjacent to each other. One pixel is formed by two GaN-based light emitting diodes. The p-side electrodes 20 of the GaN-based light emitting diodes for red light emission arranged in the x direction are connected to each other by wiring 23, and similarly, the p-side electrodes 20 of the GaN-based light emitting diodes for green light emission arranged in the x direction. The p-side electrodes 20 of the GaN-based light emitting diodes for blue light emission arranged in the x direction are connected to each other by a wiring 25. On the other hand, the n-side electrode 19 extends in the y-direction and serves as a common electrode for GaN-based light-emitting diodes arranged in the y-direction.

In the thus configured simple matrix type image display device, the wirings 23 to 25 and the n-side electrode 19 are selected according to the signal of the image to be displayed, and the selected GaN-based light emission of the selected pixel is selected. An image can be displayed by driving a diode by causing a current to flow to cause light emission.

According to the fourth embodiment, since each GaN-based light-emitting diode has the same configuration as the GaN-based light-emitting diode according to the first embodiment, the luminous efficiency is high, and a high-luminance full-color image display device is realized. be able to.

Next, a lighting device according to a fifth embodiment of the present invention will be described. This lighting device has the same configuration as the image display device shown in FIG.
In this illuminating device, the wirings 23 to 25 and the n-side electrode 19 are selected according to the color of the illuminating light, and a current is applied to a selected GaN-based light emitting diode of a selected pixel to drive the GaN-based light emitting diode, thereby causing light emission. By doing so, illumination light can be generated.

According to the fifth embodiment, since each GaN-based light-emitting diode has the same configuration as the GaN-based light-emitting diode according to the first embodiment, the luminous efficiency is high, so that a high-luminance lighting device can be realized. it can.

FIGS. 17 to 22 show a method of manufacturing a GaN-based light-emitting diode according to the sixth embodiment of the present invention in the order of steps, where A is a perspective view and B is a cross-sectional view. FIG. 23 is a sectional view showing a completed state of the GaN-based light emitting diode.

In the sixth embodiment, as in the first embodiment, up to the growth mask 14 having the opening 13 as shown in FIG.
Next, as shown in FIG. 18, the n-type GaN layer 15 is grown in a hexagonal pyramid shape on the n-type GaN layer 12 in the opening 13 as in the first embodiment. Before closing, the growth of the n-type GaN layer 15 is stopped to form a truncated hexagonal pyramid. In the n-type GaN layer 15 having a truncated hexagonal pyramid shape, its six side surfaces are made up of S-planes, and its upper surface is made up of C-planes. The size of the n-type GaN layer 15 having a truncated hexagonal pyramid shape is determined as necessary, but is, for example, about 10 μm, and its height is, for example, about 5 to 10 μm.

Next, as shown in FIG. 19, the growth mask 14 is removed by etching in the same manner as in the first embodiment. In this manner, a GaN processed substrate in which the n-type GaN layer 15 having a truncated hexagonal pyramid shape is formed on the n-type GaN layer 12 is obtained.

Next, the GaN-processed substrate is put into a reaction tube of an MOCVD apparatus, and, as in the first embodiment, following surface cleaning, as shown in FIG. An active layer 16 and a p-type GaN layer 17 doped with, for example, Mg as a p-type impurity are sequentially grown at a growth rate preferably lower than 10 μm / h. As a result, a light emitting diode structure having a double hetero structure is formed by the n-type GaN layer 15 having a truncated hexagonal pyramid shape, the active layer 16 and the p-type GaN layer 17 grown on the upper surface and the inclined crystal plane.

What is important here is that the growth mask 14 does not exist when the active layer 16 and the p-type GaN layer 17 are grown, as in the first embodiment. For this reason, even if the SiO ₂ film is used as the growth mask 14, there is essentially no problem that the Si is desorbed and taken into the growth layer during the growth of the p-type GaN layer 17. Similarly, there is no problem of contamination by resist.

Next, the sapphire substrate 11 on which the GaN-based semiconductor layer has been grown as described above is taken out of the MOCVD apparatus.
Next, as shown in FIG. 21, an opening 18 is formed in the p-type GaN layer 17 and the active layer 16 in the same manner as in the first embodiment, and the n-type GaN layer 12 is exposed in the opening 18. Then, an n-side electrode 19 contacting the n-type GaN layer 12 through the opening 18 is formed.

Next, similarly, a p-side electrode 20 having, for example, a Ni / Pt / Au structure is formed on the upper surface of the active layer 16 and the p-type GaN layer 17 grown on the n-type GaN layer 15 on the upper surface of the truncated hexagonal pyramid. Form. Here, this p-side electrode 20 is preferably formed so as not to be on the corner between the upper surface and the side surface of the truncated hexagonal pyramid. This is because the crystallinity of the active layer 16 and the p-type GaN layer 17 in the vicinity of the corner is often worse than other portions.

Thereafter, the substrate on which the light emitting diode structure is formed as described above is chipped by etching by RIE, dicer, or the like. FIG. 22 shows a GaN-based light-emitting diode chipped. FIG. 23 shows a cross-sectional view of a completed GaN-based light emitting diode.
Except for the above, the third embodiment is the same as the first embodiment.

FIG. 24 shows a scanning electron microscope (SEM) photograph of the surface of the GaN processed substrate immediately after the growth of the active layer 16 and the p-type GaN layer 17. For comparison, FIG. 25 shows an SEM photograph of the surface of a GaN processed substrate obtained by a conventional manufacturing method. From FIG. 24, it can be seen that in the growth after the growth mask is removed, the pits are buried, the flatness is improved, and an extremely good growth layer is obtained.

When a current was passed between the p-side electrode 20 and the n-side electrode 19 of the GaN-based light-emitting diode manufactured in this manner, the light-emitting diode was driven within a light emission wavelength range of 380 to 620 nm according to the In composition of the active layer 16. Thus, light emission through the sapphire substrate 11 could be confirmed.

According to the sixth embodiment, as in the first embodiment, a truncated hexagonal pyramidal n-type GaN layer 15 is selected on the n-type GaN layer 12 in the opening 13 of the growth mask 14 made of SiO _2. After the growth, the growth mask 14 is removed by etching, and then the active layer 16 and the p-type GaN layer 17 are grown. Thus, when the p-type GaN layer 17 is grown, Si is desorbed from the growth mask 14. The problem introduced into the growth layer is fundamentally solved. Therefore, it is possible to obtain a p-type GaN layer 17 sufficiently doped with Mg and having a low specific resistance, thereby improving the luminous efficiency of the GaN-based light emitting diode.

In addition to the fact that the crystallinity of the active layer 16 and the p-type GaN layer 17 grown on the upper surface composed of the C-plane of the n-type GaN layer 15 having a truncated hexagonal shape is very good, Since the p-side electrode 20 is formed on the upper surface composed of the C-plane at a distance from the peripheral corners, light can be emitted only from the active layer 16 having very good crystallinity. Therefore, high luminous efficiency can be obtained.

Further, the opening 18 is formed in the p-type GaN layer 17 and the active layer 16 by dry etching such as RIE for forming the n-side electrode 19, and the elements are separated when manufacturing an integrated semiconductor light emitting device. When the p-type GaN layer 17 and the active layer 16 are etched by dry etching such as RIE, it is difficult to avoid that the active layer 16 is damaged at that portion. Is sufficiently away from the portion where light emission actually occurs (p-side electrode 20 and its vicinity in the range of 2 to 5 μm), and thus has no adverse effect on the light emission characteristics.

Further, by taking a certain height of the step of the n-type GaN layer 15 having a truncated hexagonal pyramid shape, light generated from the active layer 16 on the upper surface thereof can be reflected downward on the side surface of the truncated hexagonal pyramid. The takeout efficiency can be increased, and the luminous efficiency can be increased. Further, instead of using the Ni / Pt / Au structure as the p-side electrode 20, a metal film having a high reflectance, for example, a silver (Ag) film or the like is used to form the p-type GaN layer 17 having a truncated hexagonal pyramid shape. The reflectance on the upper surface can be increased, the light extraction efficiency can be increased, and the light emission efficiency can be increased.

Next, a GaN-based light emitting diode according to a seventh embodiment of the present invention will be described.
In the seventh embodiment, after the process is advanced to the p-type GaN layer 17 in the same manner as in the sixth embodiment, the p-side electrode 20 is formed on the upper surface of the p-type GaN layer 17. Next, a portion above the sapphire substrate 11 from the n-type GaN layer 12 is peeled off and separated from the sapphire substrate 11 by irradiating a laser beam from, for example, an excimer laser. Next, after the rear surface of the n-type GaN layer 12 thus peeled is planarized by etching or the like, an n-side electrode 19 is formed on the rear surface of the n-type GaN layer 12, as shown in FIG. The n-side electrode 19 may be a transparent electrode made of, for example, ITO. In this case, the n-side electrode 19 is formed over a wide area on the back surface of the n-type GaN layer 12 including a portion corresponding to a hexagonal pyramid-shaped portion. Can be. When the n-side electrode 19 is formed of a metal laminated film having a Ti / Pt / Au structure, light is radiated to the outside through the n-type GaN layer 12, as shown in FIG. An opening 19a is provided in the n-side electrode 19 at a portion corresponding to the hexagonal pyramid-shaped portion.
According to the seventh embodiment, advantages similar to those of the first embodiment can be obtained.

Next, an image display device according to an eighth embodiment of the present invention will be described.
In this image display device, the GaN-based light emitting diode according to the sixth embodiment is used instead of the GaN-based light emitting diode in the image display device according to the fourth embodiment. Others are the same as the fourth embodiment.
According to the eighth embodiment, advantages similar to those of the fourth embodiment and the sixth embodiment can be obtained.

Next, a lighting device according to a ninth embodiment of the present invention will be described.
In this lighting device, the GaN-based light emitting diode according to the sixth embodiment is used instead of the GaN-based light emitting diode in the lighting device according to the fifth embodiment. Other points are the same as in the fifth embodiment.
According to the ninth embodiment, advantages similar to those of the fifth embodiment and the sixth embodiment can be obtained.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above embodiments, and various modifications based on the technical idea of the present invention are possible.
For example, the numerical values, materials, structures, shapes, substrates, raw materials, processes, and the like described in the above-described first to ninth embodiments are merely examples, and if necessary, different numerical values, materials, structures, Shapes, substrates, raw materials, processes, and the like may be used.

Specifically, for example, in the above-described first to ninth embodiments, in order to improve the characteristics of the active layer 16, an AlGaN layer having excellent light confinement characteristics is provided in the vicinity thereof, or an InGaN layer having a small In composition is provided. A layer or the like may be provided. If necessary, AlGaInN may be obtained by adding Al to InGaN in order to obtain a band gap reduction effect by so-called bowing. Further, if necessary, an optical waveguide layer may be provided between the active layer 16 and the n-type GaN layer 15 or between the active layer 16 and the p-type GaN layer 17.

In the first to ninth embodiments, the sapphire substrate is used. However, if necessary, another substrate such as the above-described SiC substrate or Si substrate may be used. Further, a GaN substrate having a low dislocation density obtained by using a lateral crystal growth technique such as ELO (Epitaxial Lateral Overgrowth) or pendeo may be used.

Further, in the above-described first to ninth embodiments, for example, Au or Ag is used as a material of the p-side electrode 20, and the active layer 16 is generated between the p-type GaN layer 17 and the p-side electrode 20. A contact metal layer having a thickness equal to or less than the light penetration length and made of Ni, Pd, Co, Sb, or the like may be formed. By doing so, it is possible to further improve the luminous efficiency of the GaN-based light emitting diode due to the reflection enhancement effect of the contact metal layer.

FIGS. 4A and 4B are a perspective view and a cross-sectional view for explaining the method for manufacturing the GaN-based light emitting diode according to the first embodiment of the present invention. FIGS. FIGS. 4A and 4B are a perspective view and a cross-sectional view for explaining the method for manufacturing the GaN-based light emitting diode according to the first embodiment of the present invention. FIGS. FIGS. 4A and 4B are a perspective view and a cross-sectional view for explaining the method for manufacturing the GaN-based light emitting diode according to the first embodiment of the present invention. FIGS. FIGS. 4A and 4B are a perspective view and a cross-sectional view for explaining the method for manufacturing the GaN-based light emitting diode according to the first embodiment of the present invention. FIGS. FIGS. 4A and 4B are a perspective view and a cross-sectional view for explaining the method for manufacturing the GaN-based light emitting diode according to the first embodiment of the present invention. FIGS. FIGS. 4A and 4B are a perspective view and a cross-sectional view for explaining the method for manufacturing the GaN-based light emitting diode according to the first embodiment of the present invention. FIGS. FIG. 1 is a sectional view of a GaN-based light emitting diode according to a first embodiment of the present invention. FIG. 2 is a schematic diagram illustrating current-light characteristics of the GaN-based light emitting diode according to the first embodiment of the present invention. FIG. 4 is a schematic diagram illustrating current-voltage characteristics of the GaN-based light emitting diode according to the first embodiment of the present invention, using the size of a p-side electrode as a parameter. FIG. 2 is a schematic diagram illustrating current-light characteristics of the GaN-based light emitting diode according to the first embodiment of the present invention, using the size of a p-side electrode as a parameter. FIG. 2 is a schematic diagram illustrating a relationship between the size of a p-side electrode and luminous efficiency of the GaN-based light emitting diode according to the first embodiment of the present invention. FIG. 3 is a schematic diagram for explaining the reason for reducing the size of the p-side electrode in the GaN-based light emitting diode according to the first embodiment of the present invention. FIG. 6 is a sectional view illustrating a GaN-based light emitting diode according to a second embodiment of the present invention. FIG. 9 is a sectional view illustrating a GaN-based light emitting diode according to a third embodiment of the present invention. FIG. 9 is a perspective view of a GaN-based light emitting diode according to a third embodiment of the present invention as viewed from an n-side electrode. It is a perspective view showing the image display device by a 4th embodiment of the present invention. It is the perspective view and sectional view for explaining the manufacturing method of the GaN-based light emitting diode according to the sixth embodiment of the present invention. It is the perspective view and sectional view for explaining the manufacturing method of the GaN-based light emitting diode according to the sixth embodiment of the present invention. It is the perspective view and sectional view for explaining the manufacturing method of the GaN-based light emitting diode according to the sixth embodiment of the present invention. It is the perspective view and sectional view for explaining the manufacturing method of the GaN-based light emitting diode according to the sixth embodiment of the present invention. It is the perspective view and sectional view for explaining the manufacturing method of the GaN-based light emitting diode according to the sixth embodiment of the present invention. It is the perspective view and sectional view for explaining the manufacturing method of the GaN-based light emitting diode according to the sixth embodiment of the present invention. FIG. 13 is a sectional view of a GaN-based light emitting diode according to a sixth embodiment of the present invention. 15 is a photograph as a substitute for a drawing showing a state of a surface of a GaN processed substrate immediately after a light emitting element structure is formed in a method for manufacturing a GaN-based light emitting diode according to a sixth embodiment of the present invention. 4 is a photograph as a substitute of a drawing showing a state of a surface of a GaN processed substrate immediately after a light emitting element structure is formed in a conventional method for manufacturing a GaN-based light emitting diode. It is a sectional view of a GaN-based light emitting diode according to a seventh embodiment of the present invention.

Explanation of reference numerals

11 sapphire substrate, 12 n-type GaN layer, 13 opening, 14 growth mask, 15 n-type GaN layer, 16 active layer, 17 p-type GaN layer, 18 opening, 19 n side Electrode, 20 ... p-side electrode, 23, 24, 25 ... wiring

Claims (28)

Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of a first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
A step of sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer. 2. The method according to claim 1, wherein the growth mask is made of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a stacked film thereof. 2. The method according to claim 1, wherein the second semiconductor layer is a crystal layer having an inclined crystal plane inclined with respect to a main surface of the substrate. 3. The method according to claim 3, wherein the crystal layer has a wurtzite crystal structure. The method according to claim 3, wherein the crystal layer is made of a nitride III-V compound semiconductor. The semiconductor light-emitting device according to claim 1, wherein the first semiconductor layer, the second semiconductor layer, the active layer, and the third semiconductor layer are made of a nitride III-V compound semiconductor. Production method. The method according to claim 4, wherein the inclined crystal plane is an S plane. The method according to claim 7, wherein at least 90% or more of the thickness of the growth layer including the active layer and the third semiconductor layer is grown at a growth rate of 10 µm / h or more. The method for manufacturing a semiconductor light emitting device according to claim 4, wherein the crystal layer has a hexagonal pyramid shape having an S plane as the inclined crystal plane. The method of manufacturing a semiconductor light emitting device according to claim 9, further comprising a step of forming an electrode of the second conductivity type on the S-plane of the third semiconductor layer on the second semiconductor layer. The method for manufacturing a semiconductor light emitting device according to claim 4, wherein the crystal layer has a truncated hexagonal pyramid shape in which an S plane is the inclined crystal plane and an upper surface is a C plane. The method for manufacturing a semiconductor light emitting device according to claim 11, further comprising a step of forming an electrode of a second conductivity type on a C-plane of the third semiconductor layer on the second semiconductor layer. The method according to claim 1, wherein a main surface of the substrate is a C-plane. The method for manufacturing a semiconductor light emitting device according to claim 1, wherein the second semiconductor layer is selectively grown so as to be wider in a lateral direction than the opening of the growth mask. The semiconductor according to claim 1, wherein after removing the growth mask and before growing the active layer, a fourth semiconductor layer of a first conductivity type is grown on the second semiconductor layer. A method for manufacturing a light-emitting element. A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially laminated on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
A semiconductor light-emitting element provided on the second conductivity type semiconductor layer on the crystal part and having a second electrode electrically connected to the second conductivity type semiconductor layer,
The size of the second electrode is 50% or less of the size of the crystal part in which the active layer and the semiconductor layer of the second conductivity type are stacked. The semiconductor light emitting device according to claim 16, wherein the crystal part has a wurtzite crystal structure. 17. The semiconductor light emitting device according to claim 16, wherein the crystal part is made of a nitride III-V compound semiconductor. 17. The semiconductor light emitting device according to claim 16, wherein the semiconductor layer of the first conductivity type, the active layer, and the semiconductor layer of the second conductivity type are made of a nitride III-V compound semiconductor. The semiconductor light emitting device according to claim 16, wherein the inclined crystal plane is an S plane. 17. The semiconductor light emitting device according to claim 16, wherein the crystal part has a hexagonal pyramid shape having an S plane as the inclined crystal plane. 17. The semiconductor light emitting device according to claim 16, wherein the crystal part has a truncated hexagonal pyramid shape in which an S plane is the inclined crystal plane and an upper surface is a C plane. Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of a first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
Sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer. A method of manufacturing an integrated semiconductor light emitting device, comprising: A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially laminated on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
An integrated structure in which a plurality of semiconductor light emitting elements provided on the second conductive type semiconductor layer on the crystal part and having a second electrode electrically connected to the second conductive type semiconductor layer are integrated. Type semiconductor light emitting device,
An integrated semiconductor light emitting device, wherein the size of the second electrode is 50% or less of the size of the crystal part in which the active layer and the semiconductor layer of the second conductivity type are stacked. Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of a first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
Sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer. A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially laminated on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
An image display device, comprising: a second electrode provided on the second conductivity type semiconductor layer on the crystal part, the second electrode being electrically connected to the second conductivity type semiconductor layer,
An image display device, wherein the size of the second electrode is 50% or less of the size of the crystal part on which the active layer and the semiconductor layer of the second conductivity type are stacked. Growing a first semiconductor layer of a first conductivity type on a substrate;
Forming a growth mask having an opening in a predetermined portion on the first semiconductor layer;
Selectively growing a second semiconductor layer of a first conductivity type on the first semiconductor layer in the opening of the growth mask;
Removing the growth mask;
A step of sequentially growing at least an active layer and a third semiconductor layer of the second conductivity type on the second semiconductor layer. A first-conductivity-type semiconductor layer having a convex-shaped crystal part having an inclined crystal plane inclined with respect to the principal plane on one principal plane;
At least an active layer and a semiconductor layer of the second conductivity type, which are sequentially laminated on at least the inclined crystal plane of the crystal part;
A first electrode electrically connected to the semiconductor layer of the first conductivity type;
A lighting device, comprising: a second electrode provided on the second conductivity type semiconductor layer on the crystal part, the second electrode being electrically connected to the second conductivity type semiconductor layer,
A lighting device, wherein the size of the second electrode is 50% or less of the size of the crystal part on which the active layer and the semiconductor layer of the second conductivity type are stacked.

Images