KR100857410B1 - Fabrication method of white led - Google Patents

Abstract

The present invention relates to a method of manufacturing a white LED, and to a method of manufacturing a white LED that emits light of various wavelengths in one chip as the active layer is grown thereon by changing the size of a mask in manufacturing ELOG. . The present invention is a buffer layer on the sapphire substrate, u-GaN layer, n-GaN layer doped with Si, SiO₂ After growing the layers in order, the SiO₂ At least two window / mask patterns are formed on the layer each having a constant ratio. After etching the SiO ₂ layer by opening only the window portion of the window / mask pattern having a predetermined ratio, a pyramidal ELOG GaN layer and InGaN / GaN MQW (Multiple) are formed on the partially etched SiO₂ layer. Quantum Well) to grow an active layer and P-GaN. The present invention can produce a single chip white light emitting device by designing a single chip to emit light of multiple wavelengths, and because the color rendering index is also high because it can emit the entire visible light region, there is an effect suitable for use as indoor lighting or display lighting .

Description

Manufacturing method of white LED {FABRICATION METHOD OF WHITE LED}

1 is a block diagram showing the procedure of the manufacturing process of the white LED of the present invention.

Figure 2 shows in sequence the manufacturing process of the white LED of the present invention.

FIG. 3 shows growth of an active layer represented by varying wavelengths of light on the SiO 2 layer of FIG. 2.

4A and 4B measure the CL of the inclined plane of grown ELOG according to the window / mask size.

5a and 5b measure the PL of the slope of the grown ELOG according to the window / mask size.

The present invention relates to a method of manufacturing a white LED, and more particularly to a method of manufacturing a white LED to emit light of various wavelengths in a single chip as the active layer is grown on it by varying the size of the mask in manufacturing ELOG. It is about.

In general, white LEDs are widely used as backlights of lighting devices or display devices.

The method of manufacturing the white light emitting device can be largely divided into a method using a phosphor and a method not using a phosphor.

First, as a method of using a phosphor, a method of applying a yellow phosphor to a blue light emitting device is the simplest and widely used. However, the method of using a phosphor has a problem that the color rendering index, which is an index indicating how close to sunlight is expressed based on sunlight as 100, is too low to be suitable for lighting.

In addition, the method that does not use the phosphor is a method of manufacturing three types of chips, red, green, and blue into one, but the color rendering index is superior to the method using the above phosphor, but the price is less competitive, red, green, blue If any one of the three types of chip output drops, the overall efficiency of the module is reduced, which in turn adversely affects the service life. In addition, in order to obtain a desired white light, the current of each light emitting diode chip needs to be adjusted, and a complicated circuit configuration is required. In addition, a space limitation arises in that a plurality of light emitting diode chips are used. It is an obstacle to increase.

The present invention to solve the above problems is to produce a white light emitting device to vary the size of the mask is designed to emit light of different wavelengths in a single chip is good for indoor lighting devices and display devices having a high color rendering index It is to provide a method for manufacturing a white LED.

In order to achieve the above object, the present invention provides a buffer layer, a u-GaN layer, an n-GaN layer doped with Si, SiO₂ on a sapphire substrate. Growing the layers (or SiNx) in order; Forming at least two window / mask patterns each having a different ratio on the SiO2 layer; Etching the SiO ₂ layer corresponding to the lower portion of the window pattern among the window / mask patterns having different ratios; Growing a pyramidal ELOG GaN layer over the unetched SiO ₂ layer corresponding to the bottom of the mask pattern; Growing an InGaN / GaN multi quantum well (MQW) active layer on the slope of the pyramid ELOG GaN layer; It provides a method of manufacturing a white LED comprising a; growing P-GaN on the InGaN / GaN MQW active layer.

The ratio of the window / mask is m × n, and the ratio of m: n is 1: 1 to 1:10.

It also provides that the range of m is 1 <m <20μm and the range of n is 1 <n <40μm.

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Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

1 is a block diagram showing the procedure of the manufacturing process of the white LED of the present invention, Figure 2 shows the sequence of the manufacturing process of the white LED of the present invention sequentially.

The white LED manufacturing method of the present invention is a n-GaN layer doped with a low temperature Gan buffer layer 12, u-GaN layer 14, Si on a sapphire substrate 10 commonly used as a substrate for manufacturing GaN thin film (16) After the SiO ₂ layer 18 is grown sequentially, the SiO ₂ layer 18 is partially etched using the windows 22a, 22b ... / mask pattern 22. The GaN layer is grown by an epitaxial lateral over growth (ELOG) method in which a high quality GaN thick film is grown on the partially etched SiO ₂ layer. And growing a p-GaN layer after growing an InGaN / GaN MQW active layer on the ELOG GaN layer.

The growth of the low temperature GaN buffer layer 12 on the sapphire substrate is for growing the GaN layer having better crystallinity by suppressing the solid phase reaction between the sapphire substrate 10 and the GaN layer. The GaN buffer layer 12 grown on the sapphire substrate is preferably a 30 nm GaN nucleation layer at 530 degrees (S1).

Next, a thin u-GaN layer 14 is grown on the buffer layer 12. When the u-GaN layer 14 is grown, it is grown without cracking in a size of 1.0 μm to several μm at 900 to 1200 ° C.

Then, an n-GaN (16) layer doped with Si is grown on the u-GaN layer (14). When the n-GaN layer 16 doped with Si is grown without cracking at a size of 1 to several μm at 900 to 1200 ° C. (S3).

In addition, a 100 nm thin SiO ₂ layer 18 is grown on the wafer plate grown up to the n-GaN layer 16 using CVD (Chemical Vapor Deposition) (S5).

The Chemical Vapor Deposion (CVD) refers to vapor deposition of a compound produced by a chemical reaction on a wafer by injecting a chemical gas into a reactor during a semiconductor manufacturing process. The type of CVD may be an atmospheric pressure chemical vapor deposition (APCVD), There are low pressure chemical vapor deposition (LPCVD), thermochemical deposition, and plasma enhanced chemical vapor deposition (PECVD). In the present invention, the SiO 2 layer 18 is grown using plasma chemical vapor deposition among various deposition methods of CVD. PECVD enables the film formation at low temperatures below 400 ° C due to the role of plasma than other CVD. In other words, PECVD is caused by plasma decomposition even at low temperatures, and due to the activation of the ions to create a better film.

Meanwhile, at least two window / mask patterns are formed on the SiO 2 layer 18 grown by the PECVD method at different rates in the {1-100} wafer direction by lithography. do.

In particular, the ratio of the window / mask pattern is preferably 1: 1 to 1:10, wherein the window size range is 1 <window <20μm, and the size range of the mask is 1 <mask <40μm.

Further, the photoresist to etching (etching), the SiO ₂ layer 18 in response to the window / mask pattern 22, first, the light to SiO ₂ layer 18 sensitive material; a (Pohto Resist 20) SiO ₂ After spreading evenly for layer 18, the photoresist is solidified on the wafer by a simple baking process.

The photoresist 20 and the SiO ₂ layer 18 located under the mask pattern are placed under the mask pattern by placing a window / mask pattern 22 having a predetermined ratio for the SiO ₂ layer 18 coated with the photoresist 20. The photosensitive liquid in the parts except for) is changed by light, and then the photosensitive liquid whose property is changed to a specific solution can be removed. That is, only SiO ₂ of the window portion 22b is exposed.

The exposed SiO ₂ is etched to the GaN layer 16 by using reactive ion etching (RIE). Finally, the remaining photoresist is removed with a solution such as acetone. As a result, the GaN layer 16 is exposed in the window portion 22b and the mask pattern portion 22a is covered with SiO ₂ .

According to the pattern process, first to nth SiO 2 layers 18a,..., 18n etched at different intervals are formed in a stripe shape on the n-GaN layer 16. In the present invention, only the first to fourth SiO 2 layers 18a,..., 18n are shown for convenience of drawing. Reference numerals 19a, ..., 19n denote portions where SiO ₂ was etched.

That is, the SiO 2 layer 18 etched at different intervals may have a different size and spacing depending on the ratio of the window / mask pattern 22.

3 illustrates the growth of the active layer on the SiO 2 layer of FIG. 2 by varying the wavelength of light, and GaN is formed into pyramid shapes 30a, 30b, 30c ...; 30 using the ELOG method (S7).

More specifically, as shown in FIG. 3, a pyramidal first ELOG GaN 30a is grown over the first SiO 2 layer 18a and the second SiO 2 18b layer, and the second SiO 2 layer 18b and the second SiO 2 layer 18b are formed. Pyramid-shaped second ELOG GaN 30b is grown over the SiO 2 (18c) layer. In this way it is possible to grow up to n-th ELOG GaN.

The MQW active layers 32a, 32b, 32c ...; 32, and p-GaN (34a, 34b, 34c ...; 34), which are layers to actually emit light, are sequentially grown on the GaN layers of each of the ELOG methods. To act as a white light emitting device (S8, S9).

The growth method of the ELOG method is greatly influenced by the growth pressure and the growth temperature, and according to the present invention, the control of the slope of the ELOG can be changed according to the size of the mask pattern.

At this time, the size of the ELOG GaN (30a, 30b, 30c ...; 30) grown in the pyramid shape increases as the size of the mask of the window / mask pattern (22).

The size of the ELOG GaN layer 30 grown in the pyramid shape increases as the size of the mask 22a of the window / mask pattern 22 increases, which is why the ELOG GaN layer 30 is not grown on the SiO₂ layer 18a. This is because Ga or In and N atoms described later are supplied to GaN exposed by the window portion. That is, if the ELOG GaN layer 30 is fabricated with various sizes of masks in a single chip, and the MQW (32) and p-GaN (34) active layers are grown on it, the wavelength from the pyramid formed according to the mask size is different. The sizes of are different from each other, and the combination of these wavelengths can produce a white light emitting device having a spectrum closer to sunlight.

The MQW layer 32 may be grown as an active layer of components of InGaN / GaN. Particularly, at the growth temperature of the InGaN well, the diffusion rate of In is faster than that of Ga, and thus, when the MQW layer 32 is grown, Are more affected by the difference. In other words, the larger the mask, the greater the In composition, and the longer the wavelength can be seen.

More specifically, the size of the ELOG GaN is changed according to the size of the mask 18a so that the color of light emitted from each pyramid is different. In addition, white may be produced by synthesizing two or more colors according to the Commission Internationale de l'Eclairage (CIE) marker system. In other words, the white light emitting device of the present invention may come out with one color necessary for white light emission from a pyramid consisting of members 30a, 32a and 34a, and one color necessary for white light emission from a pyramid consisting of members 30b, 32b and 34b. have. In addition, in the pyramid consisting of the reference numerals 30c, 32c, and 34c, one color required for white light emission may come out. The color from the pyramid consisting of the part numbers 30a, 32a and 34a, the light from the pyramid consisting of the part numbers 30b, 32b and 34b and the respective color from the pyramid consisting of the part numbers 30c, 32c and 34c are added together to emit white light. have.

For example, in the pyramid consisting of the members 30a, 32a, 34a, the wavelength corresponding to red comes out, and in the pyramid consisting of the members 30b, 32b, 34b, the wavelength corresponding to green comes out, and the members 30c, 32c, 34c In the pyramid consisting of a wavelength corresponding to blue, a single chip combines red, green, and blue wavelengths, resulting in white light.

In the above example, the white light is emitted according to the combination of wavelengths coming from the three pyramids, but the number of wavelengths to be combined can be adjusted according to the size of the mask. That is, the size of the mask can be adjusted to produce white light by combining the wavelengths of light from two pyramids, or the white light can be combined by combining the wavelengths of light from four pyramids. A single chip can emit white light with a combination of wavelengths of light from two to four pyramids, depending on the size of the mask.

Therefore, in order to emit white light from a single chip, the size of the mask may be changed by varying the size of the mask, and the white light may be emitted according to the size of the wavelength of different light to be combined.

Figures 4a and 4b is a measure of the CL of the slope of the ELOG grown according to the window / mask size, Figure 4a with a window / mask ratio of 4 / 4μm compared to Figure 4b with a window / mask ratio of 4 / 10μm It can be seen that the wavelength of the mask having a larger mask size is shorter by about 50 nm.

By combining masks of different sizes together, more wavelengths can be obtained on a single chip.

5a and 5b are measured PL (photo luminescence) of the slope of the grown ELOG according to the window / mask size, Figure 5a with a window / mask ratio of 4 / 4μm, Figure 5b with a window / mask ratio of 4 / 10μm It can be seen that the wavelength of the larger mask is longer than that of.

Hereinafter, the manufacturing method of the white LED of the present invention will be described with reference to Examples.

Example 1

After the GaN buffer layer was grown to a thickness of 15 μm on a 300 × 300 μm sapphire substrate, u-GaN was grown to 1.2 μm at 1045 ° C. Then n-GaN doped with Si was grown to 2 μm thickness at 1045 ° C., and again a thin SiO ₂ layer was grown.

After applying the photoresist on the SiO ₂ layer, the window / mask pattern patterned at a ratio of 4/4, 4/7, 4/10, 4/12 is disposed at a predetermined interval with the SiO ₂ layer to transfer the light It was. Light etched the SiO ₂ layer corresponding to the bottom of the window layer. When the photoresist was removed using RIE, four SiO ₂ layers were formed in a stripe shape. When GaN was grown on the SiO ₂ layer at 1033 ° C., three pyramidal ELOG GaNs were sequentially grown. InGaN / GaN MQW layers and p-GaN layers were sequentially grown on the slopes of the three ELOG GaN pyramids.

In the first pyramid, the supply of In from SiO ₂ was smaller than the other two pyramids, resulting in a wavelength of 450 nm, corresponding to blue. In the second pyramid, the supply of In was larger than that of the first pyramid, resulting in a 525 nm wavelength, which is a medium wavelength corresponding to green. Finally, in the third pyramid, the supply of In is larger than that of the second pyramid, resulting in a red wavelength of 650 nm.

Therefore, in a single chip, wavelengths of 450 nm, 525 nm, and 650 nm were combined to output white light.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described above, the manufacturing method of the white LED of the present invention is designed to emit light of various wavelengths in a single chip by varying the size of the mask, thereby producing a single chip white light emitting device.

In particular, the ELOG method, which is mainly used for controlling dislocation density, grows in a pyramid shape rather than a general film form when the growth pressure or growth temperature is appropriately controlled, and when an active layer is grown thereon, light is emitted along the slope of the pyramid. The wavelength is different.

That is, the single chip white light emitting device according to the present invention can produce a multi-colored light in one active layer, so that the color rendering index is also high, so that it can be suitably used as indoor lighting or display lighting.

Claims (3)

Buffer layer, u-GaN layer, Si-doped n-GaN layer on sapphire substrate, SiO₂ Growing the layers in order; Forming at least two window / mask patterns each having a different ratio on the SiO2 layer; Etching the SiO ₂ layer corresponding to the lower portion of the window pattern among the window / mask patterns having different ratios; Growing a pyramidal ELOG GaN layer over the unetched SiO ₂ layer corresponding to the bottom of the mask pattern; Growing an InGaN / GaN multiple quantum well (MQW) active layer on the slope of the pyramid ELOG GaN layer; And  And growing P-GaN on the InGaN / GaN MQW active layer.  The window / mask ratio is m × n, and the ratio of m: n is 1: 1 to 1:10, the range of m is 1 <m <20μm, and the range of n is 1 <n < Method for producing a white LED, characterized in that 40μm. delete delete

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