JP2004119723A

JP2004119723A - Method of manufacturing semiconductor thin film

Info

Publication number: JP2004119723A
Application number: JP2002281757A
Authority: JP
Inventors: Yasuyuki Umenaka; 梅中　靖之; Yoshinobu Nakamura; 中村　好伸
Original assignee: Sharp Corp
Current assignee: Sharp Corp
Priority date: 2002-09-26
Filing date: 2002-09-26
Publication date: 2004-04-15

Abstract

<P>PROBLEM TO BE SOLVED: To remove a remaining catalyst material while forming a single domain. <P>SOLUTION: This method of manufacturing a semiconductor thin film comprises a process for patterning an amorphous silicon film 2 so as to include a crystallization accelerating region 5a where the catalyst material is added, a crystal growth accelerating region 5b where a gettering element for moving the catalyst material is added, and a connecting region 5c where the crystallization accelerating region is connected with the crystal growth accelerating region, a process for forming a gettering element adding region 8 in the crystal growth accelerating region 5b to add the gettering element therein, a process for forming a catalyst material adding region 10 in the crystallization accelerating region 5a to add the catalyst material therein, and a process for moving the the catalyst material to the gettering element adding region 8 while crystal-growing a crystalline semiconductor film of the single crystal grain in the crystal growth region 13 in the crystal growth accelerating region 5b based on the crystal nuclei selected from the crystallization accelerating region 5a by heating the amorphous silicon film 5 in which the catalyst material and gettering element are added. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体薄膜の作製方法に関し、特に、基板上に形成された半導体膜に触媒物質を添加し、加熱処理等の熱エネルギーを印加することにより結晶化させた半導体薄膜の作製方法に関する。
【０００２】
【従来の技術】
近年、薄膜トランジスタ（Ｔｈｉｎ　Ｆｉｌｍ　Ｔｒａｎｓｉｓｔｏｒ：ＴＦＴ、以下、ＴＦＴと記述する）に代表される薄膜半導体素子は、絶縁性表面を有する基板上に、ＣＶＤ（Ｃｈｅｍｉｃａｌ　Ｖａｐｏｒ　Ｄｅｐｏｓｉｔｉｏｎ）法等によって厚さ数１０ｎｍ〜数１００ｎｍの半導体薄膜を形成し、この半導体薄膜を活性層として用いて、絶縁ゲート型電界効果型半導体素子、ダイオード等を構成するものである。
【０００３】
このような絶縁ゲート型電界効果型半導体素子等の応用分野としては、アクティブマトリクス型の液晶ディスプレイ装置が知られている。アクティブマトリクス型の液晶ディスプレイ装置は、マトリクス状に配置された数１０万以上の画素電極のそれぞれに１つ以上の絶縁ゲート型電界効果型半導体素子から成るＴＦＴを配置し、画素電極に供給する電荷をＴＦＴによって制御するようになっている。
【０００４】
ＴＦＴの活性層に用いられる半導体薄膜としては、成膜が容易な非晶質珪素膜が挙げられる。しかしながら、非晶質珪素膜は、キャリアの移動度が小さいという電気的特性を有し、スイッチング速度が遅いという問題がある。非晶質珪素膜を用いたＴＦＴの電気的特性の向上を図るには、結晶性を有する珪素薄膜を利用すればよい。結晶性を有する珪素膜は、多結晶珪素、微結晶珪素等と称されている。
【０００５】
結晶性を有する珪素膜は、基板上に非晶質珪素膜を形成し、その非晶質珪素膜に結晶化を助長する触媒物質を添加し、その後に加熱処理を行うことにより作製することができる。さらに、結晶化された珪素膜にゲッタリング元素を添加して加熱処理を行い、触媒物質をゲッタリング元素の添加された領域に移動させ、その領域を除去して結晶化された珪素膜内に残留する触媒物質濃度を低減することによって、結晶化された珪素膜の結晶性の向上が図れる。ここで、ゲッタリング元素は、ゲッタリング元素の添加領域に触媒物質を移動（ゲッタリング）させる作用を有する。
【０００６】
また、非晶質珪素膜に触媒物質を添加して結晶化を行う加熱処理工程と、結晶化された珪素膜にゲッタリング元素を添加して触媒物質をゲッタリング元素の添加領域に集める加熱処理工程とを同一工程にて行うことによって、工程の簡略化を図り、結晶化された珪素膜内に残留する触媒物質濃度を低減する技術もある。
【０００７】
非晶質珪素膜から結晶性珪素膜を作製する従来技術の構成は、特開２０００−２１６０８９号公報（特許文献１）に開示されている。
【０００８】
特開２０００−２１６０８９号公報に開示される構成は、まず、基板上に形成した非晶質珪素膜の表面にフォトレジストをパターニングし、フォトレジストをマスクとしてイオン注入等によってゲッタリング元素を非晶質珪素膜の表面の露出した領域内にドーピングする。次に、非晶質珪素膜上のフォトレジストを剥離し、ゲッタリング元素を所定領域に含んでいる非晶質珪素膜の表面全体に珪素の結晶化を助長する触媒物質を含む溶液を回転塗布法により添加する。その後、加熱処理（アニール処理）を行うことによって、触媒物質のシリサイドが核となって結晶化が進行するとともに、この触媒物質のシリサイドはゲッタリング元素に引き寄せられ、ゲッタリング元素の添加領域に集まる。最後に、触媒物質のシリサイドが集められたゲッタリング元素の添加領域をエッチングによって除去し、結晶性珪素膜が得られる。
【０００９】
上記の触媒物質を用いた半導体薄膜の結晶化方法は、低温および短時間にて半導体薄膜を結晶化できるという点において有効である。
【００１０】
【特許文献１】
特開２０００−２１６０８９号公報（第８―１０頁、第２図）
【００１１】
【発明が解決しようとする課題】
しかしながら、このような従来技術の構成に基づいて作製された結晶性珪素膜を用いたＴＦＴは、電気的特性の安定性および信頼性に問題がある。この原因として、次の２点の要因が考えられる。
【００１２】
第１の要因は、結晶性珪素膜内の結晶粒界の存在が挙げられる。上記従来技術の構成に基づいて作製された結晶性珪素膜は、隣接点間の結晶方位のずれの大きな傾角粒界が多数存在する。結晶方位のずれの大きな傾角粒界の結晶性珪素膜内での発生位置を制御することは困難である。
【００１３】
このような結晶性珪素膜を用いてＴＦＴを作製すると、ＴＦＴの活性層であるチャネル領域に大きな傾角粒界が発生する可能性が多くなる。ＴＦＴのチャネル領域に大きな傾角粒界が存在すると、チャネル領域のキャリア移動度が低下しＴＦＴの電気的特性が悪化するとともに、ＴＦＴの電気的特性にばらつきが生じる原因となる。
【００１４】
第２の要因は、結晶性珪素膜内の残留不純物の存在が挙げられる。残留不純物としては、非晶質珪素膜に添加される触媒物質自体が挙げられる。上記の触媒物質は、加熱処理工程において非晶質珪素膜の結晶化を促進し、その後、触媒物質の一部が結晶粒界にトラップされて、結晶性珪素膜内の結晶粒界の付近に残留する。
【００１５】
ＴＦＴの活性層であるチャネル領域を形成する結晶性半導体珪素膜内に、触媒物質が多量に存在することは、ＴＦＴの電気的特性の安定性および信頼性を阻害する。ＴＦＴは、このような触媒物質を用いて結晶化した結晶性半導体珪素膜にて作製されると、残留した触媒物質の影響によって、主に、ＴＦＴオフ動作時におけるリーク電流の増大等の現象が現れる。このように、触媒物質は、ＴＦＴのチャネル領域の結晶性を向上させるため、電界効果移動度、オン電流の立ち上がり係数（Ｓ係数）等のＴＦＴの電流駆動能力を向上させるが、その一方で、ＴＦＴのオフ動作特性、電気的特性の安定化および信頼性を悪化させる原因となる。
【００１６】
ＴＦＴ等の半導体素子の微細化および電気的特性の安定化には、結晶性の良好な半導体薄膜を用いることが不可欠である。特に、単一ドメインを形成している結晶は、非常に結晶性が良いために、高性能が要求される薄膜半導体素子にも利用することができる。ここで、単一ドメインとは、結晶内での結晶方位のずれが５°以上である大きな傾角粒界が存在しない領域のことである。尚、単一ドメイン内には、結晶方位のずれが数°以下である小さな傾角粒界は存在している。
【００１７】
大きな傾角粒界は、通常、不純物原子をトラップしやすいが、触媒物質を用いて非晶質半導体薄膜の結晶化を行い、単一ドメインになるように結晶性半導体薄膜を成膜すれば、触媒物質をトラップする大きな傾角粒界が存在しないため、結晶性半導体膜内に残留する触媒物質を所定の領域に移動（ゲッタリング）させ除去することが可能となる。
【００１８】
このことから、ＴＦＴ等の薄膜半導体素子の電気的特性を向上させるには、活性層（チャネル領域）に用いる半導体薄膜の結晶状態が単一ドメインになるように結晶成長を行うとともに、結晶化された結晶性半導体薄膜内に残留する触媒物質を除去すれば良い。
【００１９】
ところが、特開２０００−２１６０８９号公報に開示される構成では、触媒物質を非晶質珪素膜上の全面に添加するため、多数の結晶核が非晶質珪素膜内に発生し、そのまま成長するため、単一ドメインになるように結晶性半導体薄膜を成膜することができない。また、上記公報の構成では、ゲッタリング効果によって、ゲッタリング元素の添加領域に触媒物質を移動させて集め、集められた触媒物質を除去しているが、実際には、結晶化した直後に拡散してくる触媒物質の一部が結晶粒界にトラップされて残留してしまう。
【００２０】
本発明は、このような課題を解決するものであり、その目的は、単一ドメインを形成するとともに、残留する触媒物質を除去した半導体薄膜の作製方法を提供することにある。
【００２１】
【課題を解決するための手段】
本発明の半導体薄膜の作製方法は、絶縁性基板または絶縁膜上に形成された半導体膜に、半導体膜の結晶化を助長する触媒物質を添加し、加熱処理を行うことによって、半導体薄膜を成長させる半導体薄膜の作製方法において、半導体膜を、触媒物質が添加され、一方の始端部から他方の終端部にかけて結晶化が促進される結晶化促進領域と、触媒物質を移動させるゲッタリング元素が添加され、結晶化促進領域の終端部に一方の始端部が隣接して配置されて始端部から他方の終端部にかけて、結晶化促進領域の結晶化方向と同方向に結晶成長される結晶成長促進領域と、結晶化促進領域の終端部および結晶成長促進領域の始端部を接続する連結領域とを有するようにパターニングする工程と、結晶成長促進領域にゲッタリング元素添加領域を形成しゲッタリング元素を添加する工程と、結晶化促進領域に触媒物質添加領域を形成し触媒物質を添加する工程と、触媒物質および該ゲッタリング元素が添加された半導体膜を加熱処理して、結晶化促進領域から選択された結晶核に基づいて、結晶成長促進領域の結晶成長領域に単一結晶粒の結晶性半導体薄膜を結晶成長させるとともに、触媒物質を該ゲッタリング元素添加領域に移動させる工程と、を包含するものであり、そのことにより上記目的が達成される。
【００２２】
また、好ましくは、本発明の半導体薄膜の作製方法は、結晶成長領域とゲッタリング元素添加領域との間隔が５μｍ以上、５００μｍ以下である。
【００２３】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、半導体膜の厚さは、１０〜２００ｎｍである。
【００２４】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、半導体膜がシリコン（Ｓｉ）材料である。
【００２５】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、触媒物質には、Ｆｅ、Ｃｏ、Ｎｉ、Ｇｅ、Ｒｕ、Ｒｈ、Ｐｄ、Ｏｓ、Ｉｒ、Ｐｔ、Ｃｕ、Ａｕから選ばれた少なくとも一種類の元素を用いる。
【００２６】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、結晶成長領域には、濃度１×１０^１５ｃｍ^−３〜５×１０^１９ｃｍ^−３の前記触媒物質が添加されている。
【００２７】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、ゲッタリング元素には、Ｐ、Ｓ、Ａｓ、Ｓｅから選ばれた少なくとも一種類の元素を用いる。
【００２８】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、ゲッタリング元素添加領域には、濃度１×１０^１５ｃｍ^−２〜１×１０^１８ｃｍ^−２の前記ゲッタリング元素が添加されている。
【００２９】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、加熱処理は、温度５５０℃〜６５０℃にて行われる。
【００３０】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、ゲッタリング元素を添加する前に、ゲッタリング元素添加領域を除いて半導体膜の表面をフォトレジストで被覆する。
【００３１】
さらに、好ましくは、本発明の半導体薄膜の作製方法において、触媒物質を添加する前に、触媒物質添加領域を除いて半導体膜の表面を厚さ１０ｎｍ以上の窒化珪素膜、酸化珪素膜、炭化珪素膜のうち少なくとも１種類で被覆する。
【００３２】
さらに、好ましくは、本発明の半導体薄膜の作製方法は、活性層に用いる結晶成長領域以外の結晶性半導体薄膜をエッチング処理によって除去する。
【００３３】
上記構成により、以下、その作用を説明する。
【００３４】
本発明の半導体薄膜の作製方法は、絶縁性基板または絶縁性膜上に半導体膜である非晶質珪素膜を積層した後、この非晶質珪素膜を、触媒物質が添加され、一方の始端部から他方の終端部にかけて結晶化が促進される結晶化促進領域と、ゲッタリング元素が添加され、結晶化促進領域の終端部に一方の始端部が隣接して配置されて始端部から他方の終端部にかけて、結晶化促進領域の結晶化方向と同方向に結晶成長される結晶成長促進領域と、結晶化促進領域の終端部および結晶成長領域の始端部を接続する連結領域とを有するようにパターニングし、その後、結晶成長促進領域のゲッタリング元素添加領域にゲッタリング元素を添加し、さらに、結晶化促進領域の触媒物質添加領域に触媒物質を添加し、その後、加熱処理を行うことによって、結晶化促進領域の触媒物質添加領域から選択された結晶核に基づいて、触媒物質が添加されていない結晶成長促進領域の結晶成長領域に、単一結晶粒の単一ドメインを有する結晶性半導体薄膜を形成するように非晶質珪素膜を結晶化する。
【００３５】
すなわち、上記加熱処理工程において、選択された一つの結晶核に基づいて結晶化が進むために大きな傾角粒界が生じないとともに、ゲッタリング元素添加領域内のゲッタリング元素によって、触媒物質がトラップされることなくゲッタリング元素添加領域に引き寄せられる。
【００３６】
これにより、結晶成長促進領域の結晶成長領域には、残留する触媒物質のほとんどない単一の結晶粒のみの単一ドメインを有する結晶性珪素膜を形成することができる。
【００３７】
【発明の実施の形態】
以下、図面を参照しながら本発明の実施の形態を説明する。
【００３８】
図１（ａ）〜（ｈ）は、それぞれ本発明の実施形態である半導体薄膜の作製方法における各工程を説明するための断面図、図２（ａ）〜（ｄ）は、それぞれ本発明の実施形態である半導体薄膜の作製方法における各工程を説明するための概略平面図である。
【００３９】
まず、図１（ａ）に示すように、基板１上に減圧ＣＶＤ法によってＳｉ_２Ｈ_６ガスを用いて厚さ１００ｎｍの非晶質珪素膜２を形成する。ここで、基板１には、石英基板またはガラス基板などの絶縁性の表面を有する基板、または、表面に絶縁膜であるＳｉＯ_２膜、ＳｉＮ膜等を形成したシリコンウエハが用いられる。
【００４０】
次に、図１（ｂ）に示すように、常圧ＣＶＤ法によってＳｉＨ_４ガスおよびＯ_２ガスを用いて非晶質珪素膜２上の全体を覆うように厚さ１００ｎｍのＳｉＯ_２膜３を形成する。
【００４１】
次に、図１（ｃ）に示すように、ＳｉＯ_２膜３上にレジスト４を塗布し、露光および現像のフォトリソグラフィの各工程を経て、ドライエッチングによって、所定形状にパターニングする。この場合、例えば、図２（ａ）に示すように、パターニングされた非晶質珪素膜５は、触媒物質が添加され、一方の始端部から他方の終端部にかけて結晶化が促進される矩形状の結晶化促進領域５ａと、ゲッタリング元素が添加され、結晶化促進領域５ａの終端部に一方の始端部が隣接して配置されて始端部から他方の終端部にかけて、結晶化促進領域５ａの結晶化方向と同方向に結晶成長される矩形状の結晶成長促進領域５ｂと、結晶化促進領域５ａの終端部および結晶成長促進領域５ｂの始端部を接続する連結領域５ｃとを有する。ここで、結晶成長促進領域５ｂには、活性層が形成される。また、結晶化促進領域５ａおよび結晶成長促進領域５ｂの形状は、矩形状に限定されない。
【００４２】
次に、レジスト４を剥離し、非晶質珪素膜５上のＳｉＯ_２膜３を全面除去する。
その後、図１（ｄ）に示すように、非晶質珪素膜５および基板上を覆うように常圧ＣＶＤ法によってＳｉＨ_４ガスおよびＯ_２ガスを用いて厚さ１００ｎｍのＳｉＯ_２膜６を形成し、さらに、ＳｉＯ_２膜６上にレジスト膜７を塗布する。
【００４３】
次に、図１（ｅ）に示すように、露光および現像のフォトリソグラフィの各工程を経て、ＳｉＯ_２膜６およびレジスト膜７の一部にドライエッチングによって非晶質珪素膜５の結晶成長促進領域５ｂの所定の領域に、結晶成長促進領域５ｂの表面が露出した開口部を形成する。この開口部から露出した結晶成長促進領域５ｂがゲッタリング元素添加領域８となる。図２（ｂ）に示すように、ゲッタリング元素添加領域８は、結晶成長促進領域５ｂの連結領域５ｃ側とは反対側の端部近傍に、例えば矩形状で形成される。
【００４４】
次に、レジスト膜７および非晶質珪素膜のゲッタリング元素添加領域８にイオン注入等によってＰ（リン）をドーピングする。ここで、Ｐ（リン）は、ＳｉＯ_２膜６およびレジスト膜７に覆われた非晶質珪素膜５には添加されずに、ゲッタリング元素添加領域８内に選択的に注入される。ドーピング条件は、ドーピングガスとしてＰＨ_３（ホスフィン）を用い、加速電圧を５〜３０ｋＶ、例えば１０ｋＶとし、ドーズ量を１×１０^１５ｃｍ^−２〜１×１０^１８ｃｍ^−２、例えば、１×１０^１６ｃｍ^−２である。本実施形態では、このＰ（リン）がゲッタリング元素となる。
【００４５】
次に、図１（ｆ）に示すように、基板１および非晶質珪素膜５上のレジスト膜７を剥離するとともに、ＳｉＯ_２膜６も全面除去する。
【００４６】
次に、図１（ｇ）に示すように、基板１および非晶質珪素膜５上の全体に常圧ＣＶＤ法によってＳｉＨ_４ガスおよびＯ_２ガスを用いて厚さ２００ｎｍのＳｉＯ_２マスク層９を形成する。その後、フォトリソグラフィの各工程を経て、レジスト膜にてパターニングされたＳｉＯ_２マスク層９の一部に１０：１ＢＨＦを用いたエッチングによって、非晶質珪素膜５の結晶化促進領域５ａの所定の領域に、結晶化促進領域５ａの表面が露出した開口部を形成する。この開口部から露出した結晶化促進領域５ａが触媒物質添加領域１０となる。図２（ｃ）に示すように、触媒物質添加領域１０は、結晶化促進領域５ａの連結領域５ｃ側と反対側の端部近傍に、例えば矩形状で形成される。
【００４７】
次に、図１（ｈ）に示すように、レジスト膜を剥離すると、結晶化促進領域５ａの触媒物質添加領域１０上のＳｉＯ_２マスク層９に、触媒物質添加領域１０の表面が露出した窓１１が形成される。
【００４８】
次に、ＳｉＯ_２マスク層９および非晶質珪素膜５の触媒物質添加領域１０にスパッタリング法等によって厚さ１ｎｍのニッケル薄膜を形成し、その後、温度６００℃にて加熱処理を行うと、図２（ｄ）に示すように、結晶化促進領域５ａの触媒物質添加領域１０内で結晶核１２の発生が起こり、露出していない領域へと触媒物質が拡散して結晶成長を促進する。触媒物質添加領域１０内で発生した複数の結晶核は、それらのいくつかの結晶核が非晶質珪素膜５の結晶化促進領域５ａの終端部および連結領域５ｃの端に追いやられて成長が止まり、最終的に成長を続ける一つの結晶核が連結領域５ｃを経て結晶成長促進領域５ｂにおいて選択される。これにより、結晶成長促進領域５ｂでは、選択された一つの結晶核に基づいて結晶化が進み結晶成長領域１３が形成される。この結果、結晶成長促進領域５ｂの結晶成長領域１３には、単一ドメイン１４が形成される。
【００４９】
同時に、ゲッタリング元素添加領域８内のゲッタリング元素によって、触媒物質が、結晶成長促進領域５ｂの結晶成長領域１３を経てゲッタリング元素添加領域８に引き寄せられる。結晶成長領域１３に形成された結晶性珪素膜は、大きな傾角粒界のない単一ドメイン１４であるため、触媒物質が結晶成長領域１３にてトラップされずにゲッタリング元素添加領域８まで拡散する。その後、活性層の形成に用いる結晶成長領域１３以外の触媒物質が集められたゲッタリング元素添加領域８および触媒物質添加領域１０を含む結晶化促進領域５ａの結晶性珪素膜をエッチング処理等によって除去する。
【００５０】
これにより、上記の結晶成長領域５ｂに不純物である触媒物質の極めて少ない単一結晶粒の結晶性珪素膜を作製することができる。
【００５１】
このような構成により、本発明の半導体薄膜の作製方法は、基板上に非晶質珪素膜を積層した後、この非晶質珪素膜を、触媒物質が添加され、一方の始端部から他方の終端部にかけて結晶化が促進される矩形状の結晶化促進領域５ａと、ゲッタリング元素が添加され、結晶化促進領域５ａの終端部に一方の始端部が隣接して配置されて始端部から他方の終端部にかけて、結晶化促進領域５ａの結晶化方向と同方向に結晶成長される矩形状の結晶成長促進領域５ｂと、結晶化促進領域５ａの終端部および結晶成長領域５ｂの始端部を接続する連結領域５ｃとを有するようにパターニングし、その後、結晶成長促進領域５ｂのゲッタリング元素添加領域８にゲッタリング元素を添加し、さらに、結晶化促進領域５ａの触媒物質添加領域１０に触媒物質を添加し、その後、加熱処理を行うことによって、結晶化促進領域５ａの触媒物質添加領域１０から選択された結晶核に基づいて、触媒物質が添加されていない結晶成長促進領域５ｂの結晶成長領域１３に、単一結晶粒の単一ドメイン１４を有する結晶性珪素膜を形成するように非晶質珪素膜を結晶化する。
【００５２】
すなわち、上記加熱処理工程において、選択された一つの結晶核に基づいて結晶化が進むために大きな傾角粒界が生じないとともに、ゲッタリング元素添加領域８内のゲッタリング元素によって、触媒物質がトラップされることなくゲッタリング元素添加領域に引き寄せられる。
【００５３】
これにより、結晶成長促進領域５ｂの結晶成長領域１３には、残留する触媒物質のほとんどない単一の結晶粒のみの単一ドメイン１４を有する結晶性珪素膜を形成することができる。
【００５４】
したがって、上記結晶成長領域１３を、例えば、ＴＦＴ等の半導体装置の活性領域に用いることによって、電気的特性に優れた半導体装置を作製することが可能となる。
【００５５】
以下、本発明の半導体薄膜の作製方法におけるプロセス条件の設定について説明する。
【００５６】
本発明の半導体薄膜の作製方法は、結晶成長領域１３とゲッタリング元素添加領域８との間隔が５μｍ以上、５００μｍ以下に設定する。結晶成長領域１３とゲッタリング元素添加領域８との間隔が５μｍよりも小さいと、加熱処理工程における加熱条件（加熱温度および加熱時間）によって、ゲッタリング元素が結晶成長領域１３に拡散し、結晶成長領域１３の結晶性珪素膜内の不純物となり、この結晶性珪素膜をＴＦＴ等に用いる場合、ＴＦＴの電気的特性が悪化する。また、結晶成長領域１３とゲッタリング元素添加領域８との間隔が５００μｍよりも大きいと、触媒物質をゲッタリング元素添加領域８に引き寄せるゲッタリング効果が得られない。本実施形態では、結晶成長領域１３とゲッタリング元素添加領域８との間隔が５μｍ以上、５００μｍ以下であるので、触媒物質をゲッタリング元素添加領域８に引き寄せるゲッタリング効果が得られる。
【００５７】
また、本発明の半導体薄膜の作製方法は、半導体膜である非晶質珪素膜の厚さが１０ｎｍ以上、２００ｎｍ以下に設定する。非晶質珪素膜の厚さが１０ｎｍよりも薄いと、結晶成長時に成長不良等の問題が起こりやすくなる。また、非晶質珪素膜の厚さが２００ｎｍよりも厚いと、結晶成長領域１３に単一ドメインが形成されにくい。本実施形態では、非晶質珪素膜の厚さが１００ｎｍであるので、加熱処理工程における結晶成長時に成膜不良などの問題が発生せず、結晶成長領域１３に単一の結晶粒のみの単一ドメイン１４を有する結晶性珪素膜を形成することができる。
【００５８】
さらに、本発明の半導体薄膜の作製方法は、非晶質珪素膜の結晶化を助長する触媒物質としてＦｅ、Ｃｏ、Ｎｉ、Ｇｅ、Ｒｕ、Ｒｈ、Ｐｄ、Ｏｓ、Ｉｒ、Ｐｔ、Ｃｕ、Ａｕから選ばれた少なくとも一種類の元素を用いるように設定する。
【００５９】
さらに、本発明の半導体薄膜の作製方法は、触媒物質であるＦｅ、Ｃｏ、Ｎｉ、Ｇｅ、Ｒｕ、Ｒｈ、Ｐｄ、Ｏｓ、Ｉｒ、Ｐｔ、Ｃｕ、Ａｕから選ばれた少なくとも一種類の元素が、結晶成長領域１３内に濃度１×１０^１５ｃｍ^−３以上、１×１０^１９ｃｍ^−３以下で含まれるように設定する。結晶成長領域１３内に存在する触媒物質の濃度が１×１０^１５ｃｍ^−３よりも少ないと、非晶質珪素膜の結晶化が起こりにくい。また、結晶成長領域１３内に存在する触媒物質の濃度が１×１０^１９ｃｍ^−３よりも多くなると、ゲッタリング元素によって触媒物質をゲッタリング元素添加領域に十分に引き寄せることができず、結晶成長領域１３の結晶性半導体膜に残留する触媒物質が過大となる。このため、この結晶性珪素膜をＴＦＴ等に用いる場合、ＴＦＴの電気的特性が悪化する。本実施形態では、結晶成長領域１３内の触媒物質の濃度が１×１０^１５ｃｍ^−３以上、１×１０^１９ｃｍ^−３以下であるので、非晶質珪素の結晶化が起こりやすいとともに、触媒物質をゲッタリング元素添加領域に引き寄せるゲッタリング効果も得られる。
【００６０】
さらに、本発明の半導体薄膜の作製方法は、触媒物質を引き寄せるゲッタリング元素としてＰ、Ｓ、Ａｓ、Ｓｅから選ばれた少なくとも一種類の元素を用いるように設定する。
【００６１】
さらに、本発明の半導体薄膜の作製方法は、ゲッタリング元素添加領域８に、Ｐ、Ｓ、Ａｓ、Ｓｅから選ばれた少なくとも一種類のゲッタリング元素が濃度１×１０^１５ｃｍ^−２以上、５×１０^１８ｃｍ^−２以下になるように設定する。ゲッタリング元素添加領域８内に存在するゲッタリング元素の濃度が１×１０^１５ｃｍ^−２よりも少ないと、触媒物質をゲッタリング元素添加領域８に十分に引き寄せるゲッタリング効果が得られない。また、ゲッタリング元素添加領域８内に存在するゲッタリング元素の濃度が５×１０^１８ｃｍ^−２よりも多くなると、加熱処理工程における加熱条件（加熱温度および加熱時間）によって、ゲッタリング元素が結晶成長領域１３に拡散し、結晶成長領域１３の結晶性珪素膜内の不純物となり、この結晶性珪素膜をＴＦＴ等に用いる場合、ＴＦＴの電気的特性が悪化する。本実施形態では、ゲッタリング元素添加領域８内のゲッタリング元素の濃度が１×１０^１６ｃｍ^−２であるので、触媒物質が結晶成長領域１３にほとんど残留することなく結晶成長させることができる。
【００６２】
さらに、本発明の半導体薄膜の作製方法は、結晶成長の加熱処理を温度５５０℃以上、６５０℃以下で行うように設定する。結晶成長の加熱処理の温度が５５０℃よりも低いと、非晶質珪素膜の結晶化が急激に進行することが難くなり、結晶化に時間がかかる。また、結晶成長の加熱処理の温度が６５０℃よりも高いと、触媒物質を添加していない領域においても非晶質珪素膜の結晶化が始まり結晶性珪素膜の結晶粒が微小になってしまい、結晶成長領域１３に単一の結晶粒のみの単一ドメイン１４を成長させることができないとともに、ゲッタリング元素が結晶成長領域１３に拡散し、結晶成長領域１３の結晶性珪素膜内の不純物となり、この結晶性珪素膜をＴＦＴ等に用いる場合、ＴＦＴの電気的特性が悪化する。本実施形態では、加熱処理を温度６００℃で行うことによって、所定の時間にて結晶成長させることができるとともに、結晶成長領域１３に単一の結晶粒のみの単一ドメイン１４を成長させることができる。
【００６３】
さらに、本発明の半導体薄膜の作製方法は、触媒物質の添加を行う前に、触媒物質添加領域１０を除く非晶質珪素膜の表面を厚さ１０ｎｍ以上の窒化珪素膜、酸化珪素膜、炭化珪素膜のうち少なくとも１種類で被覆するように設定する。これにより、触媒物質添加領域のみに触媒物質を添加することができる。
【００６４】
さらに、本発明の半導体薄膜の作製方法は、ゲッタリング元素の添加を行う前に、ゲッタリング元素添加領域を除く非晶質珪素膜上をフォトレジストで被覆するように設定する。これにより、ゲッタリング元素添加領域のみにゲッタリング元素を添加することができる。
【００６５】
さらに、本発明の半導体薄膜の作製方法は、触媒物質添加領域を含む結晶化促進領域５ａ、触媒物質が集められたゲッタリング元素添加領域および活性層に用いる結晶成長領域１３以外の結晶性珪素膜をエッチング処理等によって除去する。
これにより、触媒物質等の不純物のない単一ドメインの結晶性半導体膜を用いてＴＦＴ等の半導体装置を作製することができる。
【００６６】
ここで、本実施形態では、露出した結晶化促進領域５ａの触媒物質添加領域１０内の非晶質珪素膜の露出した表面にスパッタリング法で触媒物質であるニッケル（Ｎｉ）を蒸着したが、スパッタリング法の代わりにスピンコーターによって濃度１〜１００ｐｐｍ、例えば、濃度２０ｐｐｍの酢酸ニッケルエタノール溶液を塗布しても同様の結果が得られた。また、ニッケルの代わりに、Ｆｅ、Ｃｏ、Ｎｉ、Ｇｅ、Ｒｕ、Ｒｈ、Ｐｄ、Ｏｓ、Ｉｒ、Ｐｔ、Ｃｕ、Ａｕのうちの少なくとも一種類の元素を含む物質を触媒物質として用いても同様の結果が得られた。さらに、ゲッタリング元素であるリン（Ｐ）の代わりに、Ｓ、Ａｓ、Ｓｅのうちの少なくとも一種類の元素を含む物質をゲッタリング元素として用いても同様の効果が得られた。
【００６７】
以上、本発明の半導体薄膜の作成方法は、基板上に形成した非晶質珪素膜に触媒物質およびゲッタリング元素を添加し、加熱処理等の熱エネルギーを加えることによって、非晶質珪素膜を結晶化させるとともに、同時に触媒物質を所望の結晶性珪素膜から移動させることが可能となり、結晶性のよい珪素薄膜が容易に得られる。
【００６８】
【発明の効果】
本発明の半導体薄膜の作製方法は、絶縁性基板または絶縁膜上に形成された半導体膜に、半導体膜の結晶化を助長する触媒物質を添加し、加熱処理を行うことによって、半導体薄膜を成長させるものであり、半導体膜を、触媒物質が添加され、一方の始端部から他方の終端部にかけて結晶化が促進される結晶化促進領域と、触媒物質を移動させるゲッタリング元素が添加され、結晶化促進領域の終端部に一方の始端部が隣接して配置されて始端部から他方の終端部にかけて、結晶化促進領域の結晶化方向と同方向に結晶成長される結晶成長促進領域と、結晶化促進領域の終端部および結晶成長促進領域の始端部を接続する連結領域とを有するようにパターニングする工程と、結晶成長促進領域にゲッタリング元素添加領域を形成しゲッタリング元素を添加する工程と、結晶化促進領域に触媒物質添加領域を形成し触媒物質を添加する工程と、触媒物質およびゲッタリング元素が添加された半導体膜を加熱処理して、結晶化促進領域から選択された結晶核に基づいて、結晶成長促進領域の結晶成長領域に単一結晶粒の結晶性半導体薄膜を結晶成長させるとともに、触媒物質をゲッタリング元素添加領域に移動させる工程と、を包含することにより、単一結晶粒の単一ドメインが形成できるとともに、残留する触媒物質も除去できる。
【図面の簡単な説明】
【図１】（ａ）〜（ｈ）は、それぞれ本発明の実施形態である半導体薄膜の作製方法における各工程を説明するための断面図である。
【図２】（ａ）〜（ｄ）は、それぞれ本発明の実施形態である半導体薄膜の作製方法における各工程を説明するための概略平面図である。
【符号の説明】
１　　基板
２　　非晶質珪素膜
３　　ＳｉＯ_２膜
４　　レジスト膜
５　　非晶質珪素膜
５ａ　結晶化促進領域
５ｂ　結晶成長促進領域
５ｃ　連結領域
６　　ＳｉＯ_２膜
７　　レジスト膜
８　　ゲッタリング元素添加領域
９　　ＳｉＯ_２マスク層
１０　触媒物質添加領域
１１　窓
１２　結晶核
１３　結晶成長領域
１４　単一ドメイン[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor thin film, and more particularly to a method for manufacturing a semiconductor thin film formed by adding a catalytic substance to a semiconductor film formed over a substrate and applying heat energy such as heat treatment.
[0002]
[Prior art]
2. Description of the Related Art In recent years, a thin film semiconductor element typified by a thin film transistor (TFT; hereinafter, referred to as a TFT) has a thickness of several tens nm to several tens on a substrate having an insulating surface by a CVD (Chemical Vapor Deposition) method or the like. A semiconductor thin film having a thickness of 100 nm is formed, and this semiconductor thin film is used as an active layer to constitute an insulated gate field effect semiconductor device, a diode, and the like.
[0003]
As an application field of such an insulated gate type field effect type semiconductor device or the like, an active matrix type liquid crystal display device is known. In an active matrix type liquid crystal display device, one or more TFTs each composed of an insulated gate type field effect semiconductor element are arranged on each of several hundred thousand or more pixel electrodes arranged in a matrix, and electric charges supplied to the pixel electrodes are provided. Is controlled by the TFT.
[0004]
Examples of the semiconductor thin film used for the active layer of the TFT include an amorphous silicon film that can be easily formed. However, the amorphous silicon film has an electrical characteristic of low carrier mobility and has a problem of a low switching speed. In order to improve the electrical characteristics of a TFT using an amorphous silicon film, a silicon thin film having crystallinity may be used. The silicon film having crystallinity is called polycrystalline silicon, microcrystalline silicon, or the like.
[0005]
A silicon film having crystallinity can be formed by forming an amorphous silicon film over a substrate, adding a catalytic substance that promotes crystallization to the amorphous silicon film, and then performing heat treatment. it can. Further, a gettering element is added to the crystallized silicon film and a heat treatment is performed to move the catalyst substance to a region to which the gettering element is added, and the region is removed to form a crystallized silicon film. By reducing the concentration of the remaining catalyst substance, the crystallinity of the crystallized silicon film can be improved. Here, the gettering element has an action of moving (gettering) the catalyst substance to a region where the gettering element is added.
[0006]
A heat treatment step of adding a catalyst substance to the amorphous silicon film to perform crystallization; and a heat treatment step of adding a gettering element to the crystallized silicon film and collecting the catalyst substance in a region where the gettering element is added. There is also a technique in which the steps are performed in the same step, thereby simplifying the steps and reducing the concentration of the catalyst substance remaining in the crystallized silicon film.
[0007]
A configuration of a conventional technique for producing a crystalline silicon film from an amorphous silicon film is disclosed in Japanese Patent Application Laid-Open No. 2000-216089 (Patent Document 1).
[0008]
In the configuration disclosed in Japanese Patent Application Laid-Open No. 2000-216089, first, a photoresist is patterned on the surface of an amorphous silicon film formed on a substrate, and a gettering element is made amorphous by ion implantation or the like using the photoresist as a mask. The exposed region on the surface of the silicon nitride film is doped. Next, the photoresist on the amorphous silicon film is peeled off, and a solution containing a catalyst substance for promoting crystallization of silicon is spin-coated on the entire surface of the amorphous silicon film containing the gettering element in a predetermined region. Add by the method. Thereafter, by performing a heat treatment (annealing treatment), crystallization proceeds with the silicide of the catalyst substance serving as a nucleus, and the silicide of the catalyst substance is attracted to the gettering element and gathers in the gettering element addition region. . Finally, the region to which the gettering element is added, in which the silicide of the catalyst substance is collected, is removed by etching to obtain a crystalline silicon film.
[0009]
The method for crystallizing a semiconductor thin film using the above-described catalyst substance is effective in that the semiconductor thin film can be crystallized at a low temperature and in a short time.
[0010]
[Patent Document 1]
JP-A-2000-216089 (pages 8-10, FIG. 2)
[0011]
[Problems to be solved by the invention]
However, a TFT using a crystalline silicon film manufactured based on such a configuration of the related art has a problem in stability and reliability of electric characteristics. The following two factors can be considered as the cause.
[0012]
The first factor is the existence of crystal grain boundaries in the crystalline silicon film. In a crystalline silicon film manufactured based on the configuration of the above-described conventional technique, there are a large number of tilt boundaries in which the crystal orientation between adjacent points is large. It is difficult to control the generation position in the crystalline silicon film of a tilt grain boundary having a large shift in crystal orientation.
[0013]
When a TFT is manufactured using such a crystalline silicon film, there is a high possibility that a large tilt grain boundary is generated in a channel region which is an active layer of the TFT. When a large tilt grain boundary exists in the channel region of the TFT, the carrier mobility of the channel region decreases, the electrical characteristics of the TFT deteriorate, and the electrical characteristics of the TFT vary.
[0014]
The second factor is the presence of residual impurities in the crystalline silicon film. Examples of the residual impurities include a catalyst substance itself added to the amorphous silicon film. The above-mentioned catalyst substance promotes crystallization of the amorphous silicon film in the heat treatment step, and thereafter, a part of the catalyst substance is trapped in the crystal grain boundary, and becomes close to the crystal grain boundary in the crystalline silicon film. Remains.
[0015]
The presence of a large amount of the catalytic substance in the crystalline semiconductor silicon film forming the channel region which is the active layer of the TFT impairs the stability and reliability of the electrical characteristics of the TFT. When a TFT is manufactured using a crystalline semiconductor silicon film crystallized using such a catalyst material, phenomena such as an increase in leakage current during the TFT off operation are mainly caused by the influence of the remaining catalyst material. appear. As described above, the catalyst substance improves the current drive capability of the TFT, such as the field-effect mobility and the on-current rise coefficient (S coefficient), in order to improve the crystallinity of the channel region of the TFT. This is a cause of destabilizing OFF operation characteristics and electrical characteristics of TFTs and deteriorating reliability.
[0016]
For miniaturization of semiconductor elements such as TFTs and stabilization of electrical characteristics, it is essential to use semiconductor thin films having good crystallinity. In particular, a crystal forming a single domain has very good crystallinity, so that it can be used for a thin film semiconductor element requiring high performance. Here, the single domain is a region where there is no large tilt boundary in which the deviation of the crystal orientation in the crystal is 5 ° or more. Note that, within a single domain, there is a small tilt grain boundary having a crystal orientation shift of several degrees or less.
[0017]
A large tilt grain boundary usually tends to trap impurity atoms. However, if a crystalline semiconductor thin film is formed into a single domain by crystallization of an amorphous semiconductor thin film using a catalyst substance, a catalyst Since there is no large tilt grain boundary for trapping the substance, the catalyst substance remaining in the crystalline semiconductor film can be moved (gettered) to a predetermined region and removed.
[0018]
Therefore, in order to improve the electrical characteristics of a thin film semiconductor device such as a TFT, the crystal growth is performed so that the crystal state of the semiconductor thin film used for the active layer (channel region) is a single domain, and the crystal is crystallized. What is necessary is just to remove the catalytic substance remaining in the crystalline semiconductor thin film.
[0019]
However, in the structure disclosed in Japanese Patent Application Laid-Open No. 2000-216089, since a catalytic substance is added to the entire surface of the amorphous silicon film, a large number of crystal nuclei are generated in the amorphous silicon film and grow as they are. Therefore, a crystalline semiconductor thin film cannot be formed to have a single domain. Further, in the configuration of the above publication, the catalyst material is moved to the gettering element addition region and collected by the gettering effect, and the collected catalyst material is removed. Some of the resulting catalyst material is trapped at the crystal grain boundaries and remains.
[0020]
An object of the present invention is to solve such a problem, and an object of the present invention is to provide a method for manufacturing a semiconductor thin film in which a single domain is formed and a remaining catalyst substance is removed.
[0021]
[Means for Solving the Problems]
According to the method for producing a semiconductor thin film of the present invention, a semiconductor substance formed on an insulating substrate or an insulating film is added with a catalyst substance that promotes crystallization of the semiconductor film, and heat treatment is performed to grow the semiconductor thin film. In the method for producing a semiconductor thin film, a catalytic substance is added to the semiconductor film, and a crystallization promoting region in which crystallization is promoted from one start end to the other end, and a gettering element for moving the catalytic substance are added. A crystal growth promoting region in which one starting end is disposed adjacent to the terminal end of the crystallization promoting region and the crystal grows from the starting end to the other terminal in the same direction as the crystallization direction of the crystallization promoting region. And a patterning step having a connection region that connects an end portion of the crystallization promotion region and a start end portion of the crystal growth promotion region; and a gettering element addition region in the crystal growth promotion region. Forming and adding a gettering element, and forming a catalyst substance addition region in the crystallization promoting region and adding a catalyst substance, and heating the semiconductor film to which the catalyst substance and the gettering element are added, Based on a crystal nucleus selected from the crystallization promoting region, a crystalline semiconductor thin film of a single crystal grain is grown in the crystal growing region of the crystal growth promoting region, and the catalytic substance is moved to the gettering element addition region. And the above steps, whereby the above object is achieved.
[0022]
Preferably, in the method for manufacturing a semiconductor thin film of the present invention, the distance between the crystal growth region and the gettering element added region is 5 μm or more and 500 μm or less.
[0023]
More preferably, in the method for manufacturing a semiconductor thin film of the present invention, the thickness of the semiconductor film is 10 to 200 nm.
[0024]
More preferably, in the method for manufacturing a semiconductor thin film of the present invention, the semiconductor film is a silicon (Si) material.
[0025]
More preferably, in the method for producing a semiconductor thin film of the present invention, the catalyst material includes at least one selected from the group consisting of Fe, Co, Ni, Ge, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au. Element is used.
[0026]
More preferably, in the method for manufacturing a semiconductor thin film of the present invention, the concentration of 1 × 10 ^Fifteen cm ^-3 ~ 5 × 10 ¹⁹ cm ^-3 Is added.
[0027]
More preferably, in the method for manufacturing a semiconductor thin film of the present invention, at least one element selected from P, S, As, and Se is used as the gettering element.
[0028]
More preferably, in the method for manufacturing a semiconductor thin film of the present invention, the concentration of 1 × 10 ^Fifteen cm ^-2 ~ 1 × 10 ¹⁸ cm ^-2 Is added.
[0029]
Still preferably, in the method for manufacturing a semiconductor thin film of the present invention, the heat treatment is performed at a temperature of 550 ° C to 650 ° C.
[0030]
More preferably, in the method for manufacturing a semiconductor thin film of the present invention, before adding the gettering element, the surface of the semiconductor film is coated with a photoresist except for the region where the gettering element is added.
[0031]
Still preferably, in a method of manufacturing a semiconductor thin film of the present invention, before adding a catalytic substance, a surface of the semiconductor film is formed to have a thickness of 10 nm or more, excluding a catalytic substance-added region, by a silicon nitride film, a silicon oxide film, and a silicon carbide. Coating with at least one of the films.
[0032]
Still preferably, in a method of manufacturing a semiconductor thin film of the present invention, a crystalline semiconductor thin film other than a crystal growth region used for an active layer is removed by etching.
[0033]
The operation of the above configuration will be described below.
[0034]
According to the method for manufacturing a semiconductor thin film of the present invention, after an amorphous silicon film which is a semiconductor film is laminated on an insulating substrate or an insulating film, a catalyst substance is added to the amorphous silicon film to form one of the starting films. A crystallization promoting region in which crystallization is promoted from the part to the other terminal part, and a gettering element is added, and one starting end is arranged adjacent to the terminal part of the crystallization promoting region, and A crystal growth-promoting region that grows in the same direction as the crystallization direction of the crystallization-promoting region over the terminal portion, and a connecting region that connects the terminal portion of the crystallization-promoting region and the start end of the crystal growth region. After patterning, a gettering element is added to the gettering element addition region of the crystal growth promoting region, a catalyst substance is further added to the catalyst material addition region of the crystallization promoting region, and then heat treatment is performed. A crystalline semiconductor having a single domain of a single crystal grain in a crystal growth region of a crystal growth promotion region to which no catalyst material is added, based on a crystal nucleus selected from a catalyst material addition region of a crystallization promotion region. The amorphous silicon film is crystallized so as to form a thin film.
[0035]
That is, in the heat treatment step, crystallization proceeds based on one selected crystal nucleus, so that a large tilt grain boundary does not occur, and the catalyst substance is trapped by the gettering element in the gettering element addition region. It is attracted to the gettering element added region without being.
[0036]
Thus, in the crystal growth region of the crystal growth promotion region, a crystalline silicon film having a single domain of only a single crystal grain with almost no remaining catalyst substance can be formed.
[0037]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0038]
FIGS. 1A to 1H are cross-sectional views for explaining respective steps in a method of manufacturing a semiconductor thin film according to an embodiment of the present invention, and FIGS. FIG. 3 is a schematic plan view for explaining each step in a method for manufacturing a semiconductor thin film according to the embodiment.
[0039]
First, as shown in FIG. 1A, Si is formed on a substrate 1 by a low pressure CVD method. ₂ H ₆ An amorphous silicon film 2 having a thickness of 100 nm is formed using a gas. Here, the substrate 1 is a substrate having an insulating surface, such as a quartz substrate or a glass substrate, or SiO 2 which is an insulating film on the surface. ₂ A silicon wafer on which a film, a SiN film, etc. are formed is used.
[0040]
Next, as shown in FIG. ₄ Gas and O ₂ 100 nm thick SiO 2 so as to cover the entire surface of the amorphous silicon film 2 using a gas. ₂ The film 3 is formed.
[0041]
Next, as shown in FIG. ₂ A resist 4 is applied on the film 3, is subjected to exposure and development photolithography steps, and is patterned into a predetermined shape by dry etching. In this case, for example, as shown in FIG. 2A, the patterned amorphous silicon film 5 has a rectangular shape in which a catalytic substance is added and crystallization is promoted from one start end to the other end. And a gettering element is added, and one start end is disposed adjacent to the end of the crystallization promotion region 5a. From the start end to the other end, the crystallization promotion region 5a It has a rectangular crystal growth promoting region 5b in which the crystal grows in the same direction as the crystallization direction, and a connection region 5c that connects the end of the crystallization promotion region 5a and the start of the crystal growth promotion region 5b. Here, an active layer is formed in the crystal growth promoting region 5b. Further, the shapes of the crystallization promoting region 5a and the crystal growth promoting region 5b are not limited to rectangular shapes.
[0042]
Next, the resist 4 is peeled off, and the SiO 2 on the amorphous silicon film 5 is removed. ₂ The film 3 is entirely removed.
Thereafter, as shown in FIG. 1D, the amorphous silicon film 5 and the SiH ₄ Gas and O ₂ 100 nm thick SiO using gas ₂ A film 6 is formed, and SiO 2 ₂ A resist film 7 is applied on the film 6.
[0043]
Next, as shown in FIG. 1E, through each step of photolithography of exposure and development, ₂ An opening in which the surface of the crystal growth promoting region 5b is exposed is formed in a predetermined region of the crystal growth promoting region 5b of the amorphous silicon film 5 by dry etching in a part of the film 6 and the resist film 7. The crystal growth promoting region 5b exposed from this opening becomes the gettering element addition region 8. As shown in FIG. 2B, the gettering element addition region 8 is formed, for example, in a rectangular shape near the end of the crystal growth promoting region 5b opposite to the connection region 5c side.
[0044]
Next, P (phosphorus) is doped into the resist film 7 and the gettering element addition region 8 of the amorphous silicon film by ion implantation or the like. Here, P (phosphorus) is SiO ₂ Instead of being added to the amorphous silicon film 5 covered with the film 6 and the resist film 7, it is selectively implanted into the gettering element addition region 8. The doping condition is PH as the doping gas. ₃ (Phosphine), the acceleration voltage is 5 to 30 kV, for example, 10 kV, and the dose is 1 × 10 ^Fifteen cm ^-2 ~ 1 × 10 ¹⁸ cm ^-2 , For example, 1 × 10 ¹⁶ cm ^-2 It is. In the present embodiment, this P (phosphorus) is a gettering element.
[0045]
Next, as shown in FIG. 1F, the resist film 7 on the substrate 1 and the amorphous silicon film 5 is removed, and ₂ The film 6 is also entirely removed.
[0046]
Next, as shown in FIG. 1 (g), the entire surface of the substrate 1 and the amorphous silicon ₄ Gas and O ₂ 200 nm thick SiO using gas ₂ A mask layer 9 is formed. After that, through each step of photolithography, the SiO patterned by the resist film ₂ By performing etching using 10: 1 BHF for a part of the mask layer 9, an opening is formed in a predetermined region of the crystallization promoting region 5a of the amorphous silicon film 5 where the surface of the crystallization promoting region 5a is exposed. The crystallization-promoting region 5a exposed from this opening becomes the catalytic substance addition region 10. As shown in FIG. 2C, the catalytic substance addition region 10 is formed, for example, in a rectangular shape near the end of the crystallization promoting region 5a opposite to the connection region 5c side.
[0047]
Next, as shown in FIG. 1 (h), when the resist film is peeled off, the SiO 2 on the catalyst substance added region 10 of the crystallization promoting region 5a is removed ₂ A window 11 is formed in the mask layer 9 so that the surface of the catalytic substance-added region 10 is exposed.
[0048]
Next, SiO 2 ₂ When a nickel thin film having a thickness of 1 nm is formed on the mask layer 9 and the catalytic substance added region 10 of the amorphous silicon film 5 by a sputtering method or the like, and then subjected to a heat treatment at a temperature of 600 ° C., FIG. As shown, the generation of crystal nuclei 12 occurs in the catalyst material addition region 10 of the crystallization promotion region 5a, and the catalyst material diffuses into the unexposed region to promote crystal growth. A plurality of crystal nuclei generated in the catalytic substance added region 10 are repelled to the terminal portion of the crystallization promoting region 5a of the amorphous silicon film 5 and to the end of the connection region 5c, and the crystal nuclei grow. One crystal nucleus that stops and eventually grows is selected in the crystal growth promoting region 5b via the connection region 5c. Thereby, in the crystal growth promotion region 5b, crystallization proceeds based on one selected crystal nucleus, and a crystal growth region 13 is formed. As a result, a single domain 14 is formed in the crystal growth region 13 of the crystal growth promotion region 5b.
[0049]
At the same time, the gettering element in the gettering element addition region 8 causes the catalyst substance to be drawn to the gettering element addition region 8 via the crystal growth region 13 of the crystal growth promotion region 5b. Since the crystalline silicon film formed in the crystal growth region 13 is a single domain 14 without a large tilt boundary, the catalyst material diffuses to the gettering element added region 8 without being trapped in the crystal growth region 13. . Thereafter, the crystalline silicon film in the crystallization promoting region 5a including the gettering element addition region 8 and the catalyst material addition region 10 in which the catalyst material other than the crystal growth region 13 used for forming the active layer is collected is removed by etching or the like. I do.
[0050]
As a result, a crystalline silicon film having single crystal grains with a very small amount of a catalytic substance as an impurity in the crystal growth region 5b can be manufactured.
[0051]
With such a configuration, in the method for manufacturing a semiconductor thin film of the present invention, after laminating an amorphous silicon film on a substrate, a catalyst substance is added to the amorphous silicon film, and from the beginning of one side to the other, A rectangular crystallization promoting region 5a in which crystallization is promoted toward the end portion, a gettering element is added, and one start end is disposed adjacent to the end portion of the crystallization promotion region 5a, and Is connected to a rectangular crystal growth promoting region 5b in which the crystal grows in the same direction as the crystallization direction of the crystallization promoting region 5a, and the terminal portion of the crystallization promoting region 5a and the start end of the crystal growth region 5b. Then, a gettering element is added to the gettering element addition region 8 of the crystal growth promotion region 5b, and further, a catalyst is added to the catalyst material addition region 10 of the crystallization promotion region 5a. The crystal growth promoting region 5b to which no catalyst substance is added is based on the crystal nuclei selected from the catalyst substance adding region 10 of the crystallization promoting region 5a by adding a material and then performing a heat treatment. The amorphous silicon film is crystallized so as to form a crystalline silicon film having a single domain 14 of a single crystal grain in the region 13.
[0052]
That is, in the heat treatment step, crystallization proceeds on the basis of one selected crystal nucleus, so that a large tilt grain boundary does not occur, and the catalyst substance is trapped by the gettering element in the gettering element addition region 8. It is drawn to the gettering element addition region without being performed.
[0053]
As a result, a crystalline silicon film having a single domain 14 of only a single crystal grain having almost no remaining catalyst substance can be formed in the crystal growth region 13 of the crystal growth promotion region 5b.
[0054]
Therefore, by using the crystal growth region 13 as an active region of a semiconductor device such as a TFT, for example, a semiconductor device having excellent electrical characteristics can be manufactured.
[0055]
Hereinafter, setting of process conditions in the method for manufacturing a semiconductor thin film of the present invention will be described.
[0056]
In the method of manufacturing a semiconductor thin film according to the present invention, the distance between the crystal growth region 13 and the gettering element added region 8 is set to 5 μm or more and 500 μm or less. If the distance between the crystal growth region 13 and the gettering element added region 8 is smaller than 5 μm, the gettering element diffuses into the crystal growth region 13 depending on the heating conditions (heating temperature and heating time) in the heat treatment step, and the crystal growth occurs. It becomes an impurity in the crystalline silicon film in the region 13, and when this crystalline silicon film is used for a TFT or the like, the electrical characteristics of the TFT deteriorate. If the distance between the crystal growth region 13 and the gettering element added region 8 is larger than 500 μm, the gettering effect of drawing the catalyst substance to the gettering element added region 8 cannot be obtained. In the present embodiment, since the distance between the crystal growth region 13 and the gettering element addition region 8 is 5 μm or more and 500 μm or less, a gettering effect of attracting the catalyst substance to the gettering element addition region 8 can be obtained.
[0057]
In the method for manufacturing a semiconductor thin film of the present invention, the thickness of the amorphous silicon film, which is a semiconductor film, is set to 10 nm or more and 200 nm or less. If the thickness of the amorphous silicon film is less than 10 nm, problems such as poor growth are likely to occur during crystal growth. If the thickness of the amorphous silicon film is larger than 200 nm, it is difficult to form a single domain in the crystal growth region 13. In the present embodiment, since the thickness of the amorphous silicon film is 100 nm, a problem such as a film formation defect does not occur at the time of crystal growth in the heat treatment step, and only a single crystal grain is formed in the crystal growth region 13. A crystalline silicon film having one domain 14 can be formed.
[0058]
Further, the method for producing a semiconductor thin film according to the present invention is characterized in that a catalyst material for promoting crystallization of an amorphous silicon film is formed from Fe, Co, Ni, Ge, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au. It is set so that at least one selected element is used.
[0059]
Furthermore, in the method for producing a semiconductor thin film of the present invention, at least one element selected from the group consisting of Fe, Co, Ni, Ge, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au, The concentration of 1 × 10 in the crystal growth region 13 ^Fifteen cm ^-3 Above 1 × 10 ¹⁹ cm ^-3 Set to be included below. The concentration of the catalyst substance existing in the crystal growth region 13 is 1 × 10 ^Fifteen cm ^-3 If it is less than the above, crystallization of the amorphous silicon film is less likely to occur. Further, the concentration of the catalyst substance existing in the crystal growth region 13 is 1 × 10 ¹⁹ cm ^-3 If the amount is larger than that, the catalytic substance cannot be sufficiently attracted to the gettering element added region by the gettering element, and the catalytic substance remaining in the crystalline semiconductor film in the crystal growth region 13 becomes excessive. Therefore, when this crystalline silicon film is used for a TFT or the like, the electrical characteristics of the TFT deteriorate. In this embodiment, the concentration of the catalyst substance in the crystal growth region 13 is 1 × 10 ^Fifteen cm ^-3 Above 1 × 10 ¹⁹ cm ^-3 Because of the following, amorphous silicon is easily crystallized, and a gettering effect of attracting the catalyst substance to the gettering element addition region can be obtained.
[0060]
Further, the method for manufacturing a semiconductor thin film of the present invention is set so that at least one element selected from P, S, As, and Se is used as a gettering element for attracting a catalytic substance.
[0061]
Further, in the method for manufacturing a semiconductor thin film of the present invention, the gettering element addition region 8 contains at least one type of gettering element selected from P, S, As, and Se at a concentration of 1 × 10 5 ^Fifteen cm ^-2 5 × 10 or more ¹⁸ cm ^-2 Set as follows. The concentration of the gettering element existing in the gettering element added region 8 is 1 × 10 ^Fifteen cm ^-2 If the amount is less than this, a gettering effect of sufficiently attracting the catalyst substance to the gettering element addition region 8 cannot be obtained. Further, the concentration of the gettering element present in the gettering element added region 8 is 5 × 10 ¹⁸ cm ^-2 If the amount is larger than that, the gettering element diffuses into the crystal growth region 13 depending on the heating conditions (heating temperature and heating time) in the heat treatment step, and becomes an impurity in the crystalline silicon film in the crystal growth region 13, and this crystalline silicon When the film is used for a TFT or the like, the electrical characteristics of the TFT deteriorate. In the present embodiment, the concentration of the gettering element in the gettering element added region 8 is 1 × 10 ¹⁶ cm ^-2 Therefore, the crystal can be grown without leaving the catalyst substance in the crystal growth region 13.
[0062]
Further, the method for manufacturing a semiconductor thin film of the present invention is set so that the heat treatment for crystal growth is performed at a temperature of 550 ° C. or more and 650 ° C. or less. If the temperature of the heat treatment for crystal growth is lower than 550 ° C., it becomes difficult for the crystallization of the amorphous silicon film to proceed rapidly, and it takes time for crystallization. When the temperature of the heat treatment for crystal growth is higher than 650 ° C., crystallization of the amorphous silicon film starts even in a region where no catalytic substance is added, and the crystal grains of the crystalline silicon film become minute. In addition, the single domain 14 having only a single crystal grain cannot be grown in the crystal growth region 13, and the gettering element diffuses into the crystal growth region 13 and becomes an impurity in the crystalline silicon film of the crystal growth region 13. When this crystalline silicon film is used for a TFT or the like, the electrical characteristics of the TFT deteriorate. In this embodiment, by performing the heat treatment at a temperature of 600 ° C., the crystal can be grown for a predetermined time, and the single domain 14 having only a single crystal grain can be grown in the crystal growth region 13. it can.
[0063]
Further, in the method of manufacturing a semiconductor thin film according to the present invention, before adding the catalytic substance, the surface of the amorphous silicon film excluding the catalytic substance-added region 10 is covered with a silicon nitride film, a silicon oxide film, It is set so as to cover at least one of the silicon films. Thereby, the catalyst substance can be added only to the catalyst substance addition region.
[0064]
Further, in the method for manufacturing a semiconductor thin film of the present invention, before adding the gettering element, the amorphous silicon film excluding the gettering element added region is set to be covered with the photoresist. Thereby, the gettering element can be added only to the gettering element addition region.
[0065]
Further, the method for producing a semiconductor thin film according to the present invention is characterized in that the crystalline silicon film other than the crystallization promoting region 5a including the catalytic material added region, the gettering element added region where the catalytic material is collected, and the crystal growth region 13 used for the active layer Is removed by etching or the like.
Accordingly, a semiconductor device such as a TFT can be manufactured using a single-domain crystalline semiconductor film without impurities such as a catalyst substance.
[0066]
Here, in the present embodiment, nickel (Ni) as a catalyst substance is vapor-deposited on the exposed surface of the amorphous silicon film in the catalyst substance addition region 10 of the exposed crystallization promoting region 5a by a sputtering method. Similar results were obtained by applying a nickel acetate ethanol solution having a concentration of 1 to 100 ppm, for example, 20 ppm by a spin coater instead of the method. The same applies to the case where a substance containing at least one element of Fe, Co, Ni, Ge, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au is used as a catalyst substance instead of nickel. The result was obtained. Further, a similar effect was obtained by using a substance containing at least one of S, As, and Se as a gettering element instead of phosphorus (P) as a gettering element.
[0067]
As described above, the method for producing a semiconductor thin film of the present invention includes the steps of: adding a catalytic substance and a gettering element to an amorphous silicon film formed on a substrate; and applying heat energy such as heat treatment to form the amorphous silicon film. At the same time as the crystallization, the catalyst substance can be moved from the desired crystalline silicon film, and a silicon thin film having good crystallinity can be easily obtained.
[0068]
【The invention's effect】
According to the method for producing a semiconductor thin film of the present invention, a semiconductor substance formed on an insulating substrate or an insulating film is added with a catalyst substance that promotes crystallization of the semiconductor film, and heat treatment is performed to grow the semiconductor thin film. In the semiconductor film, a catalyst substance is added, a crystallization promoting region where crystallization is promoted from one start end to the other end, and a gettering element for transferring the catalyst substance are added, A crystal growth promoting region in which one starting end is disposed adjacent to the terminal end of the crystallization promoting region and from the starting end to the other terminal end, the crystal grows in the same direction as the crystallization direction of the crystallization promoting region; Patterning to have an end portion of the crystallization promoting region and a connecting region connecting the beginning of the crystal growth promoting region; and forming a gettering element-added region in the crystal growth promoting region. A step of adding an element, a step of forming a catalyst substance addition region in the crystallization promotion region and adding a catalyst material, and a heat treatment of the semiconductor film to which the catalyst material and the gettering element are added, and Based on the selected crystal nuclei, growing a single-crystalline crystalline semiconductor thin film in the crystal growth region of the crystal growth promotion region, and moving the catalyst substance to the gettering element addition region. Thereby, a single domain of a single crystal grain can be formed, and the remaining catalyst substance can be removed.
[Brief description of the drawings]
FIGS. 1A to 1H are cross-sectional views for explaining respective steps in a method for manufacturing a semiconductor thin film according to an embodiment of the present invention.
FIGS. 2A to 2D are schematic plan views for explaining respective steps in a method of manufacturing a semiconductor thin film according to an embodiment of the present invention.
[Explanation of symbols]
1 substrate
2 Amorphous silicon film
3 SiO ₂ film
4 Resist film
5 Amorphous silicon film
5a Crystallization promoting region
5b Crystal growth promotion area
5c Connection area
6 SiO ₂ film
7 Resist film
8 Gettering element addition region
9 SiO ₂ Mask layer
10 Catalyst material addition area
11 windows
12 Crystal nucleus
13 Crystal growth area
14 Single domain

Claims

In a method of manufacturing a semiconductor thin film, a semiconductor substance formed on an insulating substrate or an insulating film is added with a catalyst substance that promotes crystallization of the semiconductor film and subjected to heat treatment to grow the semiconductor thin film.
The semiconductor film is added with the catalyst substance, a crystallization promoting region where crystallization is promoted from one start end to the other end, and a gettering element for moving the catalyst substance are added. A crystal growth-promoting region in which one start end is disposed adjacent to the end of the promotion region and extends from the start end to the other end, and the crystal grows in the same direction as the crystallization direction of the crystallization-promotion region; Patterning to have a connection region connecting the end of the crystallization promoting region and the beginning of the crystal growth promoting region,
Forming a gettering element addition region in the crystal growth promoting region and adding the gettering element;
Forming a catalyst material addition region in the crystallization promoting region and adding the catalyst material;
Heat treating the semiconductor film to which the catalyst substance and the gettering element are added,
Based on the crystal nuclei selected from the crystallization promoting region, a single crystal grain crystalline semiconductor thin film is grown in the crystal growing region of the crystal growth promoting region, and the catalytic substance is added to the gettering element added region. Moving to the
A method for producing a semiconductor thin film, comprising:

2. The method according to claim 1, wherein a distance between the crystal growth region and the gettering element added region is 5 μm or more and 500 μm or less.

3. The method according to claim 1, wherein the thickness of the semiconductor film is 10 to 200 nm. 4.

4. The method according to claim 1, wherein the semiconductor film is a silicon (Si) material.

5. The catalyst material according to claim 1, wherein at least one element selected from the group consisting of Fe, Co, Ni, Ge, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au is used. Of manufacturing a semiconductor thin film.

The method for producing a semiconductor thin film according to claim 1, wherein the catalyst substance having a concentration of 1 × 10 ¹⁵ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ is added to the crystal growth region.

The method for producing a semiconductor thin film according to claim 1, wherein at least one element selected from P, S, As, and Se is used as the gettering element.

Wherein the gettering element doping region, for manufacturing a semiconductor thin film according to any one of the concentration of ^{^{1 × 10 15 cm -2 ~1 ×}} 10 18 cm the gettering claim element is added 1-7 ^-2 Method.

9. The method according to claim 1, wherein the heat treatment is performed at a temperature of 550 ° C. to 650 ° C. 10.

The method of manufacturing a semiconductor thin film according to claim 1, wherein before adding the gettering element, a surface of the semiconductor film is coated with a photoresist except for the gettering element added region.

2. The semiconductor device according to claim 1, wherein a surface of the semiconductor film is covered with at least one of a silicon nitride film, a silicon oxide film, and a silicon carbide film having a thickness of 10 nm or more, except for the catalyst material addition region, before adding the catalyst material. 11. The method for producing a semiconductor thin film according to any one of items 10 to 10.

The method for producing a semiconductor thin film according to claim 1, wherein the crystalline semiconductor thin film other than the crystal growth region used for the active layer is removed by an etching process.