JP2001102587A - Thin film transistor and fabrication thereof and method for forming semiconductor thin film - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain good characteristics exhibiting an excellent on-off ratio. SOLUTION: The thin film transistor comprises an insulating substrate 2, a semiconductor layer 4 formed thereon, a gate insulating film 12 formed in contact with the semiconductor layer, a gate electrode 14 formed in contact with the gate insulating film, a channel part 4a formed in a region of the semiconductor layer corresponding to the gate electrode, and a source part 4b1 and a drain part 4b2 formed in the semiconductor layer on the outside of the channel part wherein the channel part comprises a polycrystalline layer 8 having crystal grains and a grain boundary formed in contact with the gate insulating film, a mixture layer 7 of crystal part and amorphous part formed in contact with the polycrystalline layer, and an amorphous layer 6 touching the mixture layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a thin film transistor, a method for manufacturing the same, and a method for manufacturing a semiconductor thin film.

[0002]

2. Description of the Related Art In general, in an active matrix type liquid crystal display device, a voltage applied to liquid crystal of each pixel is controlled by a thin film semiconductor element connected to the pixel. Hydrogenated amorphous silicon has been used as the semiconductor layer of this thin film semiconductor device. 2. Description of the Related Art In recent years, liquid crystal display devices using polycrystalline silicon as semiconductor layers of high performance thin film semiconductor elements have been manufactured.

[0003] By using polycrystalline silicon as a semiconductor layer of a thin film semiconductor element, a driving circuit of a liquid crystal display device or a part thereof can be formed on the same glass substrate as a thin film semiconductor element formed in a pixel. Further, the fact that the concept of system-on-glass can be developed is a feature of the liquid crystal display device using polycrystalline silicon for the semiconductor layer of the thin film semiconductor element. In the current liquid crystal display device, many functions other than display, for example, input and output functions are not formed on the glass substrate on which the liquid crystal display device is formed. Normally, these input / output functions connect an LSI chip or the like based on crystalline silicon via a TAB or the like. The concept of system-on-glass is that circuits for performing these functions are formed on a glass substrate. The cost can be reduced by integrating the display device and all the functions associated therewith. More importantly, the possibility of developing a new device that is small, light and thin with integrated various functions can be developed.

As described above, it is important to form a polycrystalline silicon film on a glass substrate in order to realize system-on-glass. However, high temperatures generally need to be used to form polycrystalline silicon. When a crystal substrate is used and polycrystalline silicon is formed over the crystal substrate, a high temperature can be used. However, when a glass substrate is used as in a liquid crystal display device,
High temperatures above 600 ° C. exceed the strain point of the glass and are not adaptable. In particular, the use of expensive high-melting glass or a quartz substrate for a liquid crystal display device is disadvantageous in terms of cost.
Therefore, a method for obtaining polycrystalline silicon at a low temperature is needed.

[0005] As a method for obtaining polycrystalline silicon at a low temperature, a laser annealing method or the like is well known. When this method is used, there is an advantage that an inexpensive glass can be used as well as an expensive transparent insulator such as quartz as a substrate. In this sense, it is mainly used as a method for obtaining a polycrystalline silicon film at a low temperature in a large area like a liquid crystal display device.

FIG. 11 is a diagram conceptually showing a cross-sectional structure of a polycrystalline silicon film obtained when laser annealing is used on a glass substrate 41. In general, a laser-annealed polycrystalline silicon film has a columnar structure or a cross-sectional structure in which crystal grains are stacked. In the laser annealing method, a laser is scanned in parallel with the substrate surface, and the film portion irradiated with the laser melts from the substrate surface to the surface of the initial film, and is rapidly cooled after the laser irradiation is completed. Therefore, in the crystal growth, crystal grains 62 are obtained centering on the crystal nuclei formed when the laser-irradiated film is cooled. In many cases, crystal nuclei are formed on the substrate surface, and grow from the substrate / film interface toward the upper surface of the film. The polycrystalline silicon film obtained by the laser annealing method in this manner has a columnar structure as schematically shown in FIG.

The columnar polycrystalline silicon film will be described. The crystal part forms one crystal grain 62 from the substrate 41 to the surface. A grain boundary 63 is formed between the crystal grains 62, and the grain boundary 63 is not crystallized. Since polycrystalline silicon has a crystal part in a film, when used for an electronic element, carrier of the element is hardly scattered in the crystal part, and good carrier mobility can be obtained. Therefore, the smaller the number of grain boundaries 63 in the electronic element,
It can be said that the fewer the defects at the grain boundaries 63, the better the polycrystalline silicon film. Further, the width y of the grain boundary 63 in a favorable polycrystalline silicon film is about several nm. On the other hand, the width x of the crystal grain 62 is generally several tens of times or more the width of the grain boundary on average.

When a thin-film transistor having a MOS structure, which is one of the thin-film semiconductor elements, is formed by using a polycrystalline silicon film as shown in FIG.
Is preferably equal to or longer than the channel length of the thin film transistor.

To explain this, description will be made with reference to FIG. 10 which is a sectional view of a thin film transistor. Substrate 41
A semiconductor layer 44 is formed thereon. The semiconductor layer 44 includes a channel region 44a and contact regions 44b ₁ , 44
and a b ₂ Metropolitan. Contact region 44b
_1, each electrode ₄₈ 1 to 44b _2, 48 ₂ are connected, constituting the source and the drain of the thin film transistor. The carrier concentration in the channel region 44a is controlled by the gate electrode 46 via the gate insulating film 45.

The arrow 51 indicates the path of majority carriers in the semiconductor layer 44. In order to improve the performance of a thin film transistor using polycrystalline silicon, a majority carrier flow 51 is required.
It is necessary to minimize the effect of the grain boundary that hinders, ie, carrier scattering.

On the other hand, when the quality of the polycrystalline silicon film is improved, a parasitic bipolar effect occurs as in the case of a MOS transistor of crystalline silicon. When the quality of the polycrystalline silicon film is improved, the carrier energy near the drain increases. When the carrier energy near the drain exceeds a certain threshold, an electron-hole pair is generated secondarily.
Assuming that majority carriers are electrons, holes, which are minority carriers generated near the drain, are pressed by the gate potential in the direction of the interface between the substrate 41 and the semiconductor layer 44 as indicated by an arrow 53 in FIG. It flows to the source side 44b _1. Injection of electrons occurs in order to maintain neutral conditions near the interface between the source substrate and the semiconductor layer, which becomes a source of leakage current between the source and the drain.
Such a leak current appears remarkably as the film quality of polycrystalline silicon is improved.

Considering the case of a liquid crystal display device using such a polycrystalline silicon film as a semiconductor layer of a thin film transistor, the leak current of the thin film transistor causes a significant deterioration in image quality. The leakage current of the thin film transistor used in the pixel causes loss of image information to be held in the pixel. Further, when used as a functional element of a peripheral circuit, for example, a CMOS element, the operation of the CMOS element deviates from a normal operation due to a small on / off ratio. Therefore, a system-on-glass in which the functional element is formed on the same substrate as the liquid crystal display device cannot be realized.

[0013]

As described above, it is important to reduce the defects of the polycrystalline silicon film in order to obtain the ON characteristics of the thin film transistor. A problem arises that the leakage current increases due to the mechanical effect. As described above, a thin film transistor having excellent characteristics with an excellent on / off ratio cannot be obtained with the conventional polycrystalline silicon film structure.

The present invention has been made in view of the above circumstances, and has as its object to provide a thin film transistor having excellent characteristics with an excellent on / off ratio and a method of manufacturing the same.

Another object of the present invention is to provide a method of manufacturing a semiconductor thin film capable of improving the characteristics of a device.

[0016]

According to a first aspect of the thin film transistor according to the present invention, there is provided an insulating substrate, a semiconductor layer formed on the insulating substrate, and a gate insulating film formed in contact with the semiconductor layer. A gate electrode formed in contact with the gate insulating film; a channel portion formed in a region of the semiconductor layer corresponding to the gate electrode; and a source portion formed in the semiconductor layer outside the channel portion. And a drain portion, wherein the channel portion is in contact with the gate insulating film, a polycrystalline layer having crystal grains and grain boundaries,
It is characterized by having a mixed layer in which a crystal part and an amorphous part are mixed in contact with the polycrystalline layer, and an amorphous layer in contact with the mixed layer.

Preferably, the crystal part has a conical shape having an apex at an interface with the amorphous layer.

The width of the grain boundary of the polycrystalline layer is preferably smaller than the width of the amorphous portion of the mixed layer.

The second aspect of the thin film transistor according to the present invention
The aspect of the insulating substrate, a semiconductor layer formed on the insulating substrate, a gate insulating film formed in contact with the semiconductor layer, a gate electrode formed in contact with the gate insulating film, A channel portion formed in a region of the semiconductor layer corresponding to the gate electrode; a source portion and a drain portion formed in the semiconductor layer outside the channel portion;
Wherein the channel portion is formed between a polycrystalline layer having crystal grains and grain boundaries in contact with the gate insulating film, an amorphous layer, and the amorphous layer and the polycrystalline layer. , An amorphous part and a crystal part are combined with each other.

It is preferable that a crystal part in a region where the amorphous part and the crystal part are mutually combined has a conical shape having an apex at an interface with the amorphous layer.

It is preferable that the width of the grain boundary of the polycrystalline layer is smaller than the width of the amorphous portion in a region where the amorphous portion and the crystal portion are mutually combined.

Further, in the method of manufacturing a semiconductor thin film according to the present invention, before introducing the insulating substrate into the process chamber, the process chamber may be covered with a polycrystalline semiconductor film. Introducing a substrate, introducing a source gas including a silicon halide gas into the process chamber to form an amorphous semiconductor on the insulating substrate, and forming the amorphous semiconductor on the insulating substrate. Continuously switching the source gas to a gas containing silicon halide to form a film continuously.

It is preferable that the step of forming the amorphous semiconductor film and the step of subsequently forming the film are performed by a CVD method.

A method of manufacturing a thin film transistor according to the present invention is characterized in that a semiconductor layer serving as a channel portion is formed by using the above-described method of manufacturing a semiconductor thin film.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) A first embodiment of the present invention will be described with reference to FIGS. This first
1 is a thin film transistor. FIG. 1 is a sectional view showing the structure of the thin film transistor, and FIG. 2 is a sectional view showing the structure of a semiconductor layer of the thin film transistor 1 according to this embodiment.

The thin film transistor 1 of this embodiment has a configuration in which a semiconductor layer 4 is formed on an insulating substrate (eg, a glass substrate) 2. The semiconductor layer 4 has a channel portion 4a and contact portions 4b ₁ and 4b ₂ provided on both sides of the channel portion 4a. The contact portions 4b ₁ and 4b ₂ constitute a source portion and a drain portion, respectively. A gate insulating film 12 is formed in contact with channel portion 4a, and a gate electrode 14 is formed in contact with gate insulating film 12. An interlayer insulating film 15 is formed so as to cover gate electrode 14. The contact hole is provided, each communicating with the source unit 4b ₁ and the drain part 4b ₂ in the interlayer insulating film 15, source electrode 18 ₁ and the drain electrode 18 ₂ to fill these contact holes are formed .

As shown in FIG. 2, the semiconductor layer 4 of the thin film transistor 1 of this embodiment has an amorphous layer 6 and a mixed layer 7.
And a polycrystalline layer 8. An amorphous layer 6 is formed on an insulating substrate 2, a mixed layer 7 is formed on the amorphous layer 6, and a polycrystalline layer 8 is formed on the mixed layer 7.
Here, the polycrystalline layer 8 is a layer composed of crystal grains 9 and grain boundaries 10. The mixed layer 7 is a layer composed of a crystal part 7a and an amorphous part 7b. The crystal part 7a is a part of the crystal grains 9 of the polycrystalline layer 8, and the amorphous part 7b is Part of.
The crystal part 7 a of the mixed layer 7 has a conical shape having a vertex at the interface with the amorphous layer 6. Therefore, the semiconductor layer 4 has a structure in which the crystal part 7a grows with a certain point of the amorphous layer 6 as a nucleus. The conical shape is TEM
(Transparent Electron-Microscope) and the like, it has a fan-shaped shape.

For this reason, as can be seen from FIG.
The width y of the grain boundary 10 is smaller than the width z of the amorphous portion 7b of the mixed layer 7.

The semiconductor layer 4 is provided between the amorphous layer 6 formed on the insulating substrate 2 and the polycrystalline layer 8. It can also be said that a configuration is provided in which a region 7 in which the crystal part 7b and the crystal part 7a which is a part of the polycrystalline layer 8 are mutually combined is provided.

The method of manufacturing the semiconductor layer 4 will be described later.

Next, the reason why the MOS type thin film transistor of the present embodiment can realize a low leakage current while maintaining a good on-current will be described with reference to an example in which the thin film transistor is an n-channel type thin film transistor.

As shown in this embodiment, the amorphous layer 6 and the mixed layer 7 as shown in FIG.
The use of the polycrystalline layer 8 makes it possible to block the path of minority carriers causing the parasitic bipolar effect by the amorphous layer 6 formed at the interface of the substrate 2, thereby suppressing the parasitic bipolar effect. it can.

More specifically, description will be made sequentially as follows. A channel is formed at the interface between the polycrystalline layer of the channel portion 4 a and the gate insulating film 12 by the potential of the gate electrode 14.
According to the source / drain potential, the generated electrons, which are carriers, flow according to the arrow 21 shown in FIG. Since these electrons flow through the polycrystalline layer 8, they can flow well from the source to the drain similarly to the conventional polycrystalline silicon thin film transistor. In such a case, the energy of electrons is high near the drain of the polycrystalline layer 8 and the secondary electrons
Hole pairs are generated. Most of the generated electrons are collected in the drain according to the source-drain potential. On the other hand, the holes are pressed against the substrate 2 by the potential of the gate electrode 14, and
To the interface with the substrate 2. In a conventional thin film transistor, a leak current occurs due to the hole current reaching the source. In the case of the present embodiment, the holes reach the amorphous portion 7b. The amorphous portion 7b has a level serving as a hole trap. Since the hole trap level density of the amorphous portion 7b is higher than that of the crystal portion 7a, the holes are trapped by the trap levels and cannot reach the source. Therefore, no leak current occurs.

As described above, according to the thin film transistor of the present embodiment, it is possible to minimize the leak current while maintaining a good on-current, and to obtain a good characteristic with an excellent on / off ratio. Can be provided.

(Second Embodiment) Next, a method of manufacturing a semiconductor thin film used as a semiconductor layer of the above-mentioned thin film transistor will be described as a second embodiment of the present invention.

FIGS. 3 to 7 show a second embodiment of the present invention.
This will be described with reference to FIG. FIG. 3 shows a manufacturing process of the method for manufacturing a semiconductor thin film according to the second embodiment, FIG. 4 shows a configuration of a manufacturing apparatus used in the manufacturing method, and FIG. 5 shows a timing chart of the manufacturing process.

Referring to FIG. 4, a support 103 for supporting a substrate 102 is provided in a vacuum chamber (process chamber) 101.
And a heater 104 for heating the substrate 102 to a desired temperature is provided in the support table 103.
An electrode 105 also serving as a shower head for introducing a source gas into the vacuum vessel 101 is provided above the support 103. The vacuum vessel 101 has a gate valve 1
06 and a pressure adjusting valve 107, and a turbo molecular pump 108 and a rotary pump 109 can exhaust air. 13.56 MHz high frequency energy can be applied between the electrode 105 and the support 103. In the vacuum vessel 101,
SiH ₄ , SiF ₄ , H ₂ , H ₂ with flow rate controlled via valves 110, 111, 112, 113, 114
In this configuration, a source gas such as e can be introduced.

A case where a polycrystalline silicon film is formed on a substrate using such an apparatus will be described. Substrate 10
The coating process is performed on the inside of the vacuum vessel 101 in a state where there is no 2 (see step F1 in FIG. 3). This processing is performed as follows. While the support 103 is heated to a desired temperature, for example, 400 degrees by the heater 104, the vacuum vessel 101 is exhausted by the exhaust systems 108 and 109. For example, exhaust is performed to 5 × 10 ⁻⁶ Torr. Then, for example, when the raw gas component ratio is SiH ₄ / SiF ₄ / H ₂ =
A gas is introduced at 2/98/50 sccm, and the pressure regulating valve 107 is controlled to control a desired pressure, for example, 1 Torr.
Set to. Wait until the gas flow stabilizes, introduce high-frequency energy to decompose the raw material gas, and start coating. The time required for coating (eg 2
After 0 minutes), the introduction of high frequency energy is stopped and the coating is completed. As conditions for this coating, conditions for forming a polycrystalline silicon film on the substrate 102 are generally desirable. Thereafter, the pressure regulating valve 107,
The gate valve 106 is fully opened, and the inside of the vacuum vessel 101 is evacuated to a desired pressure of 5 × 10 ⁻⁶ Torr. It is known from our experiments that columnar crystals as shown in FIG. 11 grow when a film is formed on a substrate under these coating conditions.

Subsequently, following the above process, the substrate 10
2 is set on the support 103, and the heater 104
Do not heat the substrate 102 to a desired temperature, for example, 400 degrees.
Then, the vacuum vessel 101 is evacuated by the exhaust systems 108 and 109.
I care. For example, 5 × 10 ^-6Exhaust to Torr
You. Then, the conditions for growing the amorphous (for example, the component
The ratio is SiH₄/ SiF₄/ H₂= 2/98 / 0s
ccm) to introduce the source gas (timing chart of FIG. 5)
Time t₁Control) and control the pressure regulating valve 107.
To a desired pressure (for example, 1 Torr) (see FIG. 5).
See). Wait until the temperature of the substrate 102 becomes constant,
Time t shown in FIG.₂To decompose the raw material gas at
Is introduced (at time t in FIG. 5).₂Refer to
), And start film formation (see step F2 in FIG. 3). Film formation
After a certain period of time (for example, 16 minutes) elapses,
In the state as it is, the raw material gas is, for example,₄
/ SiF₄/ H₂= Switch to 0/130 / 0sccm
(Time t in FIG. 5)₃See, for example, for 1 minute
(See step F3 in FIG. 3). Then high frequency
The energy is stopped (at time t in FIG. 5).₄See)
Stop the gas (at time t in FIG. 5).₅See pressure control)
Fully open the regulating valve 107 and the gate valve 106 to vacuum
A desired pressure of 5 × 10 in the container^-6Exhaust to Torr
You.

FIG. 6 is a schematic diagram showing a cross section of the semiconductor thin film thus formed when viewed with a transmission electron microscope.
An amorphous silicon layer 36 is formed on the substrate 31 on which the undercoat film 32 is formed, and a conical crystal part 38 grown from the amorphous silicon layer 36 is formed on the amorphous silicon layer 36. It takes 16 minutes to form the amorphous silicon layer 36, and the crystal part 3
The formation of 8 takes only one minute.

It is known that, unlike the present embodiment, when the gas is not switched, the conical crystal part 38 is not formed. Therefore, in order to form the conical crystal part 38, it is understood that a one-minute film forming process with gas switching as in the present embodiment is necessary.
Further, experimental results show that a process of coating the inside of the vacuum vessel 101 with polycrystalline silicon before introducing the substrate into the vacuum vessel 101 is also necessary to obtain a conical crystal part. Further, a method different from the above-described method may be used for manufacturing a polycrystalline silicon film for coating the inside of the vacuum vessel 101.

FIG. 7 shows the relationship between the processing conditions after gas switching in this embodiment, that is, the raw material gas component ratio and the film thickness of the conical crystal part 38 when the processing time is changed. As can be seen from FIG. 7, when the source gas component ratio after gas switching is SiF ₄ / H ₂ = 100/30 sccm and the processing time is 30 seconds, the film thickness of the conical crystal part 38 is about 600 Å. . Source gas component ratio is S
When iF ₄ / H ₂ = 100/30 sccm and the processing time is 60 seconds, the thickness of the crystal part 38 is about 1150 angstroms. In addition, the raw gas component ratio is SiF ₄ /
In the case where H ₂ = 130/0 sccm and the processing time is 30 seconds, the thickness of the crystal part 38 is about 1300 Å, and the source gas component ratio is SiF ₄ / H ₂ = 130 /
When the processing time is 60 seconds at 0 sccm, the thickness of the crystal part 38 is about 1400 angstroms.

In this embodiment, the formation of amorphous
As a matter of fact, the source gas component ratio is SiH₄ / SiF₄/ H
₂= 2/98/0 sccm, pressure 1 Torr, film formation
Substrate temperature 400 degrees, high frequency energy power 200
W. In addition, as a processing condition after gas switching,
Component ratio is SiH₄/ SiF₄/ H₂= 0/13
0/0 sccm and a pressure of 1 Torr were used. these
May be appropriately changed as needed.

When the thickness of the conical crystal part 38 is increased, the upper layer of the crystal part 38 becomes a polycrystalline layer, and the semiconductor layer 4 described in the first embodiment can be obtained.

As described above, according to the method of manufacturing a semiconductor thin film of the present embodiment, it is possible to form a conical crystal portion made of silicon, so that the characteristics of the element can be improved.

(Third Embodiment) Next, a third embodiment of the present invention will be described with reference to FIG. The third embodiment is a method of manufacturing a semiconductor thin film, and FIG. 8 shows a configuration of a manufacturing apparatus used in the method.

The manufacturing apparatus shown in FIG. 8 has a process chamber (hereinafter also referred to as P / C) 801 having the same configuration as that of FIG.
And a transfer chamber (hereinafter also referred to as T / C) 802 in which a substrate transfer mechanism 803 is provided, and a loading chamber (hereinafter also referred to as L / C) 8 for loading a substrate.
04. The P / C 801 and the T / C 802 and the T / C 802 and the L / C 804 are connected via a gate valve 810. P / C801
Is a vacuum container, and the substrate 1 is contained in the vacuum container 801.
02 is provided. An electrode 105 also serving as a heater for heating the substrate 102 to a desired temperature is provided in the support 103 above the support 103. The vacuum vessel 801 includes a gate valve 106,
In addition, the gas is exhausted by a turbo molecular pump 108 and a rotary pump 109 via a pressure adjusting valve 107. Further, a valve 11 is provided in the vacuum container 801.
It is configured such that a source gas such as SiH ₄ , SiF ₄ , H ₂ , He, etc., whose flow rate is controlled via 0, 111, 112, 113, 114 can be introduced.

A case where a polycrystalline silicon film is formed on a substrate by using such an apparatus will be described. A coating process is performed in the vacuum container 801 without a substrate. The method is as follows. The heater 104 heats the support table 103 to a desired temperature, for example, 400 degrees, while the vacuum vessel 8 is heated.
01 is exhausted by the exhaust systems 108 and 109. For example, exhaust is performed to 5 × 10 ⁻⁶ Torr. Then, for example, the component ratio is SiH ₄ / SiF ₄ / H ₂ = 2/98.
/ 50 sccm feed gas at a pressure of 50
07 is set to a desired pressure, for example, 1 Torr. Wait until the gas flow stabilizes, introduce high-frequency energy to decompose the raw material gas, and start coating. The time required for coating (for example, 20
Minutes), stop introducing high-frequency energy,
Complete the coating. As conditions for this coating, conditions for forming a polycrystalline silicon film on a substrate are usually desirable. Thereafter, the pressure regulating valve 107 and the gate valve 106 are fully opened, and a desired pressure of 5 × 10
Exhaust to ^-6 Torr. When a film is formed on a substrate under the coating conditions, a columnar crystal as shown in FIG. 11 may grow.

Then, in order to form a film on an actual substrate, following the above-described process, the substrate is transferred from the loading chamber 804 by using the transport mechanism 803 without breaking the vacuum.
/ C801. After placing the substrate 102 on the support 103, the vacuum vessel 801 is evacuated by the exhaust systems 108 and 109 while heating the substrate to a desired temperature, for example, 400 degrees by the heater 104. For example, 5x1
Until 0 ^-6 Torr to exhaust. After that, the conditions for growing the amorphous (for example, the component ratio is SiH ₄ / SiF ₄
/ H ₂ = 2/98/0 sccm), the source gas is introduced (time t _{1 in} the timing chart of FIG. 5), and the pressure regulating valve 107 is controlled to obtain a desired pressure (for example, 1 Torr).
r) (see FIG. 5). Furthermore wait until the temperature of the substrate is constant, and introduces a high-frequency energy for decomposing the raw material gas at the point of time t ₂ shown in FIG. 5, start deposition. After a certain period of time (for example, 16 minutes) required for film formation has elapsed, the gas is removed as it is, for example, with a component ratio of S
iH ₄ / SiF ₄ / H ₂ = 0/130/0 sccm
To switch (see time t ₃ when shown in FIG. 5), it continued for an additional example for one minute for film formation. Thereafter, the high-frequency energy is stopped (see time t ₄ in FIG. 5), then stops the gas (Fig. 5
Time _t see ₅₎ of, after the pressure regulating valve 107 to evacuate the vacuum chamber to a desired pressure 5 × ¹⁰ -6 Torr by a gate valve 106 is fully opened.

After that, the substrate is moved to P /
The sheet is conveyed from the C 801 to the L / C 804, and the processing of one sheet is completed. In the film thus formed, a conical crystal region as shown in FIG. 6 is formed as in the second embodiment. In order to form this conical crystal,
It has been found that processing for one minute after the above gas switching is necessary.

In the third embodiment, as a condition for forming an amorphous material, the source gas component ratio is SiH ₄ / SiF
₄ / H ₂ = 2/98/0 sccm, pressure is 1 Torr
r, the film formation substrate temperature was 400 degrees, and the RF power was 200 W. Further, as the processing conditions after the gas switching, the component ratio is SiH ₄ / SiF ₄ / H ₂ = 0/130/0 sc
cm and a pressure of 1 Torr. These combinations may be appropriately changed as needed.

As described above, also in the method of manufacturing a semiconductor thin film according to the third embodiment, a conical crystal part made of silicon can be formed, as in the second embodiment. Therefore, the characteristics of the element can be improved.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described with reference to FIG. The fourth embodiment is a method for manufacturing a thin film transistor, and a cross-sectional view of the manufacturing process is shown in FIG.

First, the semiconductor layer 4 is formed on the substrate 2 whose surface is covered with the transparent insulating film 3 by using the manufacturing apparatus described in the second or third embodiment (FIG. 9).
(A)). This semiconductor layer 4 has the configuration described in FIG. Subsequently, the semiconductor layer 4 is patterned,
The active layer 4 is formed (see FIG. 9A).

Next, APCVD (Atomospheric Chemica)
l Vapor Deposition method, PECVD (Plasma Enhance)
d Chemical Vapor Deposition) method or ECR (Elec
tronCyclotron Resonance)-using PECVD
A gate insulating film 12 having a thickness of 70 nm to 100 nm is formed on the entire surface of the substrate (see FIG. 9B). Subsequently, a conductive film made of a conductive material is formed on the gate insulating film 12,
The gate electrode 14 is formed by patterning this conductive film (see FIG. 9C). This gate electrode 1
Mo, Al, Ta, W, C
a film of any one of u, an alloy film of those metals,
A film in which these metals are stacked or a doped polycrystalline silicon film is used.

[0057] Next, the gate electrode 14 as a mask to introduce impurities into the semiconductor layer 4, to form the source part 4b ₁ and the drain part 4b ₂ (see FIG. 9 (c)). For example, when the thin film transistor is an n-channel type, phosphorus is introduced as an impurity at about 1 × 10 ²² cm ^{−3 by} an ion implantation method or an ion doping method. Note that a region of the semiconductor layer 4 immediately below the gate electrode 14 becomes a channel portion 4a.

Next, a silicon oxide film, a silicon nitride film,
Alternatively, an interlayer insulating film 15 having a structure in which they are laminated is formed on the entire surface of the substrate (see FIG. 9D). This interlayer insulating film is formed by APCVD, PECVD, or ECR.
A PECVD method is used; Then by thermal annealing of the excimer laser annealing or about 450 ° C. to 550 ° C. and to activate the impurities in the source portion 4b ₁ and the drain part 4b _2.

Next, as shown in FIG.
b₁And drain part 4b₂Upper gate insulating film 12
And the interlayer insulating film 15 is removed by etching.
b₁ And drain part 4b₂Contact Ho
Le 17₁And 17₂Open.

Next, contact hole 17₁, 17₂
A conductive film made of a conductive material is formed on the entire surface so that
After the formation, this conductive film is patterned and the source electrode 1 is formed.
8₁ And drain electrode 18₂(FIG. 9)
(F)). As the conductive film, Mo, Al,
A metal film of any of Ta, W, and Cu;
Alloy films, stacks of these metals or alloys
It is a film or a doped polycrystalline silicon film. Ma
In addition, the thickness of the above-mentioned conductive film is determined from the relation of coverage.
It is desirable that the thickness be larger than the interlayer insulating film 15.

Since the thin film transistor manufactured by the manufacturing method of this embodiment has the same structure as the thin film transistor described in the first embodiment, it has good characteristics with an excellent on / off ratio.

In the first embodiment, a coplanar thin film transistor has been described as an example. However, the present invention is not limited to this, and another thin film transistor, for example, a gate electrode is formed so as to be in contact with a substrate, and the gate electrode is formed. The present invention can be used for an inverted staggered thin film transistor in which a semiconductor layer serving as an active layer is formed over an electrode with a gate insulating film interposed therebetween, or a staggered thin film transistor.

[0063]

As described above, according to the present invention, a thin film transistor having an excellent on / off ratio and excellent characteristics can be obtained.

Further, according to the present invention, a semiconductor thin film capable of improving the characteristics of the device can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing the configuration of a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a structure of a semiconductor layer of the thin film transistor according to the first embodiment.

FIG. 3 is a flowchart illustrating a configuration according to a second embodiment of the present invention;

FIG. 4 is a schematic diagram illustrating a configuration of a manufacturing apparatus used in a manufacturing method according to a second embodiment.

FIG. 5 is a timing chart illustrating manufacturing steps of a manufacturing method according to a second embodiment.

FIG. 6 is a sectional view showing a configuration of a semiconductor thin film manufactured by the manufacturing method according to the second embodiment.

FIG. 7 is a diagram showing a relationship between processing conditions after gas switching and a film thickness of a conical crystal part formed by this processing in the second embodiment.

FIG. 8 is a schematic diagram illustrating a configuration of a manufacturing apparatus used in a method of manufacturing a semiconductor thin film according to a third embodiment of the present invention.

FIG. 9 is a cross-sectional view illustrating a manufacturing process of a method for manufacturing a thin film transistor according to a fourth embodiment of the present invention.

FIG. 10 is a cross-sectional view illustrating a structure of a conventional thin film transistor.

FIG. 11 is a cross-sectional view illustrating a structure of a semiconductor layer of a conventional thin film transistor.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Thin film transistor 2 Insulating substrate 4 Semiconductor layer 4a Channel part 4b ₁ Source part (contact part) 4b ₂ Drain part (contact part) 6 Amorphous layer 7 Mixed layer 7a Crystal part 7b Amorphous part 8 Polycrystal layer 9 Crystal Grain 10 Grain boundary 12 Gate insulating film 14 Gate electrode 15 Interlayer insulating film 18 ₁ Source electrode 18 ₂ Drain electrode

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Masato Hiramatsu 33-family Shinisogo-cho, Isogo-ku, Yokohama-shi, Kanagawa F-term in Toshiba Production Technology Center Co., Ltd. 5F045 AA08 AA10 AB03 AB04 AB32 AB33 AC01 AC02 AC17 AD08 AE21 AF07 BB16 CA15 DA51 EB08 EC05 EE12 EE17 EH14 HA16 HA18 5F110 AA06 AA17 CC02 CC06 CC08 DD02 EE02 EE03 EE04 EE06 EE09 FF29 FF30 FF31 NN02 NN13 GG13 GG35

Claims (9)

[Claims] An insulating substrate, a semiconductor layer formed on the insulating substrate, a gate insulating film formed in contact with the semiconductor layer, and a gate electrode formed in contact with the gate insulating film. A channel portion formed in a region of the semiconductor layer corresponding to the gate electrode; and a source portion and a drain portion formed in the semiconductor layer outside the channel portion. In contact with the insulating film, a polycrystalline layer having crystal grains and grain boundaries, and in contact with the polycrystalline layer, a mixed layer in which a crystalline portion and an amorphous portion are mixed, and an amorphous layer in contact with the mixed layer, A thin film transistor comprising: 2. The thin film transistor according to claim 1, wherein said crystal part has a conical shape having an apex at an interface with said amorphous layer. 3. The thin film transistor according to claim 1, wherein a width of a grain boundary of the polycrystalline layer is smaller than a width of an amorphous portion of the mixed layer. 4. An insulating substrate, a semiconductor layer formed on the insulating substrate, a gate insulating film formed in contact with the semiconductor layer, a gate electrode formed in contact with the gate insulating film, A channel portion formed in a region of the semiconductor layer corresponding to the gate electrode; and a source portion and a drain portion formed in the semiconductor layer outside the channel portion. A polycrystalline layer having crystal grains and grain boundaries in contact with the film, an amorphous layer, and an amorphous portion and a crystalline portion formed between the amorphous layer and the polycrystalline layer are reciprocal. Characterized by having a region combined with: 5. A crystal part in a region where said amorphous part and said crystal part are mutually combined has a conical shape having an apex at an interface with said amorphous layer. Item 6. A thin film transistor according to item 4. 6. A width of a grain boundary of the polycrystalline layer is smaller than a width of an amorphous portion in a region where the amorphous portion and the crystal portion are mutually combined. Claim 4 or 5
The thin film transistor as described in the above. 7. A step of covering the inside of the process chamber with a polycrystalline semiconductor film before introducing the insulating substrate into the process chamber; a step of introducing the insulating substrate into the process chamber; Introducing a source gas containing a silicon halide gas into the chamber to form an amorphous semiconductor on the insulating substrate; and forming the amorphous gas on the insulating substrate following the formation of the amorphous semiconductor. A method for continuously forming a film by switching to a gas containing: a method for producing a semiconductor thin film. 8. The method of manufacturing a semiconductor thin film according to claim 7, wherein the step of forming the amorphous semiconductor and the step of subsequently forming the film are performed by a CVD method. 9. A method for manufacturing a thin film transistor, wherein the semiconductor layer serving as a channel portion of the thin film transistor is formed using the method for manufacturing a semiconductor thin film according to claim 7.