JP2004104153A - Light emitting element and semiconductor device - Google Patents

Light emitting element and semiconductor device Download PDF

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JP2004104153A
JP2004104153A JP2003414222A JP2003414222A JP2004104153A JP 2004104153 A JP2004104153 A JP 2004104153A JP 2003414222 A JP2003414222 A JP 2003414222A JP 2003414222 A JP2003414222 A JP 2003414222A JP 2004104153 A JP2004104153 A JP 2004104153A
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wire
lead
die pad
bonded
light emitting
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JP3967314B2 (en
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Shinichi Suzuki
鈴木　慎一
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Rohm Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Led Device Packages (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light emitting element and a semiconductor device having a structure capable of preventing a wire for wire-bonding from coming into contact with a lead for bonding an LED chip even when the difference in height between the LED chip surface and the lead surface to be wire-bonded is slight by bonding the LED chip in a recess, and at the same time capable of accurately recognizing an image when wire-bonding even in a case of a semiconductor on which two or more semiconductor chips are mounted and the surface electrode of each chip is wire-bonded. <P>SOLUTION: A cutout portion 6 is formed at the end portion of a die pad 1 under the wire 5 that connects the electrode terminal of the LED chip 3 and the lead 4, that is, at the end portion of the die pad 1 next to the lead 4. When IC chips different in height from each another are bonded on the same lead frame, part of the lead frame on which IC chips having a great height are to be mounted is etched in advance in order to incorporate two or more IC chips, etc., into the same package. <P>COPYRIGHT: (C)2004,JPO

Description

　本発明は発光素子チップなどの半導体チップがボンディングされ、発光素子や半導体装置を組み立てる際に用いられるリードフレームに工夫が施された発光素子および半導体装置に関する。さらに詳しくは、発光素子チップや半導体チップとリード端子とをワイヤボンディングする場合に、チップがボンディングされるリード端子とチップの電極端子にワイヤボンディングされるワイヤとが接触しないように工夫が施された発光素子および半導体装置に関する。 The present invention relates to a light emitting element and a semiconductor device in which a semiconductor chip such as a light emitting element chip is bonded and a lead frame used when assembling the light emitting element or the semiconductor device is devised. More specifically, when the light emitting element chip or the semiconductor chip is wire-bonded to the lead terminal, a device has been devised so that the lead terminal to which the chip is bonded and the wire which is wire-bonded to the electrode terminal of the chip do not contact. The present invention relates to a light emitting element and a semiconductor device.

　たとえば発光ダイオード（以下、ＬＥＤという）のチップはそのｐｎ接合部で発光し、表面だけではなく、裏面や側面からも光が放射される。この側面から放射される光も有効に利用するため、ＬＥＤチップは通常凹面形状にされたパラボラ内にボンディングされる。これらの発光素子は最近では組立工程の容易さおよびコストダウンの点から薄い板状体から形成されたリードフレームを用いて製造される。リードフレームは通常０.２〜０.４ｍｍ程度の薄い板材からなっており、図３に斜視図およびそのＢ4−Ｂ4線断面図が示されるように、薄い板材が打ち抜かれてダイパッド１やリード４が形成される際に、同時にダイパッド１の中心部を板材ごと下側に押し下げる成形により凹部（パラボラ）２０が形成されている。そしてその凹部２０にＬＥＤチップ３がダイボンディングされ、リード４の端部とワイヤ５により電気的に接続されている。その後図示しない透明樹脂などにより被覆されて発光素子が形成される。 For example, a light emitting diode (LED) chip emits light at its pn junction and emits light not only from the front surface but also from the back surface and side surfaces. In order to make effective use of the light radiated from this side, the LED chip is usually bonded in a parabolic concave shape. These light-emitting elements are recently manufactured using a lead frame formed of a thin plate-shaped member in terms of ease of assembly process and cost reduction. Lead frame is composed of a thin plate material generally about 0.2 to 0.4 mm, as a perspective view and a B 4 -B 4 cross-sectional view taken along line 3 is shown, a thin plate member is punched Ya die pad 1 When the lead 4 is formed, a concave portion (parabola) 20 is formed by simultaneously pressing down the center of the die pad 1 together with the plate material downward. Then, the LED chip 3 is die-bonded to the recess 20 and is electrically connected to the end of the lead 4 by the wire 5. Thereafter, the light emitting element is formed by coating with a transparent resin or the like (not shown).

　従来のダイパッド１に凹部２０を形成する場合、前述のように、板材ごと押し下げる成形がなされている。そのため、板材が薄いといえども板材にストレスがかかり、凹部２０の周囲やその近傍に変形が生じやすい。その結果、ＬＥＤチップ３の電極端子とリード４とを電気的に接続するワイヤ５がダイパッド１の端部と接触しやすい（図３（ｂ）のＡ参照）という問題がある。 場合 When forming the concave portion 20 in the conventional die pad 1, as described above, the molding is performed to push down the entire plate material. For this reason, even if the plate material is thin, stress is applied to the plate material, and the periphery of the concave portion 20 and the vicinity thereof are easily deformed. As a result, there is a problem that the wire 5 for electrically connecting the electrode terminal of the LED chip 3 and the lead 4 easily comes into contact with the end of the die pad 1 (see A in FIG. 3B).

　さらに、ダイパッド１の凹部内にＬＥＤチップ３をマウントしてその表面の電極と他のリードとをワイヤボンディングすると、ＬＥＤチップ３表面と他のリード４の表面とが殆ど同一面になるため、ワイヤがＬＥＤチップ３をボンディングしたリード１の端部と接触しやすいという問題がある。また、ＬＥＤチップと他の半導体チップなど、複数の半導体チップをマウントする場合で、その高さ（厚さ）が異なると、ワイヤボンディングをする場合の画像認識のときに焦点のずれによりボンディング位置がずれるなどの不都合が発生するという問題がある。 Further, when the LED chip 3 is mounted in the recess of the die pad 1 and the electrodes on the surface are wire-bonded to the other leads, the surface of the LED chip 3 and the surface of the other leads 4 are almost flush with each other. However, there is a problem that the LED chip 3 easily contacts the end of the lead 1 to which the LED chip 3 is bonded. Also, when mounting a plurality of semiconductor chips such as an LED chip and another semiconductor chip, if the heights (thicknesses) are different, the bonding position may be shifted due to a defocus in image recognition when performing wire bonding. There is a problem that inconvenience such as deviation occurs.

　本発明はこのような問題を解決し、ＬＥＤチップを凹部内にボンディングすることによりＬＥＤチップ表面とワイヤボンディングするリード表面との差が小さくても、ワイヤボンディングがＬＥＤチップをボンディングするリードと接触しないようにすると共に、高さの異なる半導体チップを複数個マウントして、その表面の電極端子とワイヤボンディングをする半導体装置でも、ワイヤボンディングの際の画像認識を正確に行うことができる構造の発光素子および半導体装置を提供することを目的とする。 The present invention solves such a problem, and even if the difference between the LED chip surface and the wire bonding lead surface is small by bonding the LED chip into the recess, the wire bonding does not contact the LED chip bonding lead. In addition, a semiconductor device in which a plurality of semiconductor chips having different heights are mounted and wire bonding is performed with an electrode terminal on the surface of the semiconductor chip is also capable of accurately performing image recognition during wire bonding. And a semiconductor device.

　本発明の発光素子は、板状体の裏面が平らで表面側に凹部が形成されたダイパッドと、該ダイパッドの凹部にボンディングされた発光素子チップと、前記ダイパッドと隣接して設けられたリードと、前記発光素子チップの電極端子と前記リードとを電気的に接続するワイヤとからなり、前記ダイパッドの前記リード側の端部に切欠部が形成されている。 The light emitting device of the present invention includes a die pad having a flat back surface with a concave portion formed on the front surface side, a light emitting device chip bonded to the concave portion of the die pad, and a lead provided adjacent to the die pad. And a wire for electrically connecting the electrode terminal of the light emitting element chip to the lead, and a cutout is formed at an end of the die pad on the lead side.

　本発明の半導体装置は、高さの異なる半導体チップがそれぞれダイパッドにボンディングされ、１つのパッケージに包含される半導体装置であって、前記半導体チップのうちの背の高いチップがボンディングされるダイパッドに予め凹部が形成され、各半導体チップの表面の高さが実質的に同じ高さに形成されている。 The semiconductor device of the present invention is a semiconductor device in which semiconductor chips having different heights are respectively bonded to die pads and is included in one package, wherein a tall chip among the semiconductor chips is bonded to a die pad in advance. A recess is formed, and the height of the surface of each semiconductor chip is formed at substantially the same height.

　ここで、実質的に同じ高さとは、ワイヤボンディングをする場合の画像認識のときに、焦点のずれによりボンディング位置がずれるなどの不都合が生じない程度の高さにそろっていることを意味する。 Here, substantially the same height means that the height is set to such a level that does not cause inconvenience such as displacement of the bonding position due to a focus shift in image recognition in wire bonding.

　本発明の発光素子によれば、切欠部が形成されていることにより、ＬＥＤチップの電極端子とワイヤボンディングされるリードとがほぼ同じ高さの状態でワイヤボンディングされ、ワイヤ５が少々垂れ下がってもワイヤとＬＥＤチップがボンディングされるダイパッドとが接触することがない。その結果、ショート不良が発生することがなく、高品質で信頼性の高い発光素子が得られる。 According to the light emitting device of the present invention, since the cutout portion is formed, the electrode terminal of the LED chip and the lead to be wire-bonded are wire-bonded at substantially the same height, and even if the wire 5 hangs down a little. There is no contact between the wire and the die pad to which the LED chip is bonded. As a result, a high-quality and highly reliable light-emitting element can be obtained without occurrence of short-circuit failure.

　また、本発明の半導体装置によれば、半導体チップ高さの異なるものを同一パッケージに組み込む場合でも、半導体チップ表面がほぼ同一面となり、ワイヤボンディングの際の画像認識を正確に行うことができ、ワイヤボンディング不良が発生することがなく信頼性の高い半導体装置が得られる。 Further, according to the semiconductor device of the present invention, even when components having different semiconductor chip heights are incorporated in the same package, the surface of the semiconductor chip is substantially the same, and image recognition at the time of wire bonding can be performed accurately. A highly reliable semiconductor device without a wire bonding defect can be obtained.

　つぎに、図面を参照しながら本発明の発光素子および半導体装置について説明をする。 Next, the light emitting element and the semiconductor device of the present invention will be described with reference to the drawings.

　図１の（ａ）は本発明の発光素子でチップのボンディングを終わった状態の斜視説明図、（ｂ）はそのＢ2−Ｂ2線断面説明図、（ｃ）はそのリードフレームの製造工程の要部の断面説明図である。 FIG. 1A is a perspective view showing a state in which a chip has been bonded with the light emitting device of the present invention, FIG. 1B is a sectional view taken along the line B 2 -B 2, and FIG. FIG. 4 is an explanatory sectional view of a main part of FIG.

　図１において、１はダイパッドで、その中心部に凹部２が形成されており、その凹部２内にＬＥＤチップ３がダイボンディングされると共に、その一方の電極がリード４の端部とワイヤ５により接続されている。図１では発光素子の１個分だけが図示されているが、このボンディングがなされる状態では、このダイパッド１およびリード４の部分がたくさん連結されたリードフレームの状態になっており、この後、透明なエポキシ樹脂などにより被覆されてリードフレームから切り離されることにより発光素子が大量に製造される。 In FIG. 1, reference numeral 1 denotes a die pad, in which a concave portion 2 is formed at the center thereof, and an LED chip 3 is die-bonded in the concave portion 2, and one of the electrodes is connected to an end of a lead 4 and a wire 5. It is connected. Although only one light emitting element is shown in FIG. 1, in the state where this bonding is performed, the die pad 1 and the lead 4 are in a state of a lead frame in which many parts are connected. A large number of light emitting elements are manufactured by being covered with a transparent epoxy resin or the like and separated from the lead frame.

　本発明による発光素子のリードフレームは、リードフレームのダイパッド１の中心部に形成される凹部２を、まずエッチングにより板状体の一部をえぐり取ることにより貫通しないエッチング穴２ａを形成し、その後金型により整形してきれいなパラボラ形状にすることより形成されている。さらに、ＬＥＤチップ３の電極端子とリード４とを連結するワイヤ５の下のダイパッド１の端部、すなわちリード４と隣接するダイパッド１の部分の端部に切欠部６が形成されていることに特徴がある。 In the lead frame of the light emitting device according to the present invention, the recess 2 formed at the center of the die pad 1 of the lead frame is first formed by etching a part of the plate-like body by etching to form an etching hole 2a that does not penetrate, It is formed by shaping with a mold to make a beautiful parabolic shape. Furthermore, the notch 6 is formed at the end of the die pad 1 below the wire 5 connecting the electrode terminal of the LED chip 3 and the lead 4, that is, at the end of the portion of the die pad 1 adjacent to the lead 4. There are features.

　このように切欠部６が形成されていることにより、ＬＥＤチップ３の電極端子とリード４とがほぼ同じ高さの状態でワイヤ５により連結されてワイヤ５が少々垂れ下がってもワイヤ５とダイパッド１とが接触することがない。その結果、ショート不良が発生することがなく、信頼性の高い発光素子が得られる。この切欠部６の形成は発光素子に限らず、他の半導体装置についても同様の効果がある。 Since the notch 6 is formed as described above, the electrode terminal of the LED chip 3 and the lead 4 are connected by the wire 5 at substantially the same height, and even if the wire 5 hangs down a little, the wire 5 and the die pad 1 Does not come into contact with As a result, a highly reliable light-emitting element can be obtained without causing a short circuit. The formation of the notch 6 is not limited to the light emitting element, and has the same effect for other semiconductor devices.

　そして、凹部２に関しては、板状体の一部をエッチングすることにより凹部２を形成しているため、リードフレームの下側に突出することがなく、裏面は平らでダイボンディングやワイヤボンディングをする場合、リードフレームを各素子共用のボンディング用機台に載置することにより簡単にボンディングをすることができる。この場合、板材の一部をエッチングすることなく、直接金型で押し潰して裏面に突出させないで凹部を形成することもできるが、凹部の肉が周辺に移動しリードフレームが一層変形し、また歪みが残り後からも変形し、ワイヤボンディングに支障を来す。また、機械加工や放電加工により板状体の一部を削りとることにより凹部を形成すれば金型整形をしなくてもきれいな形状のパラボラを形成することができるが、これらの加工はコストアップとなるため大量生産品には採用できない。 Since the recess 2 is formed by etching a part of the plate-like body, the recess 2 does not protrude to the lower side of the lead frame, the back surface is flat, and die bonding or wire bonding is performed. In this case, the bonding can be easily performed by mounting the lead frame on a bonding machine shared by the elements. In this case, without etching a part of the plate material, it is possible to form a concave portion without directly crushing with a mold and protruding to the rear surface, but the meat of the concave portion moves to the periphery and the lead frame is further deformed, and The distortion is deformed even after the remaining, and hinders wire bonding. In addition, if a recess is formed by shaving off a part of the plate-like body by machining or electric discharge machining, a parabola with a beautiful shape can be formed without shaping the mold, but these processes increase the cost. Therefore, it cannot be adopted for mass production.

　このリードフレームを製造するには、図１（ｃ）に示されるように、まず板状体１０の状態で、ダイパッド１が形成される部分に塩化第二鉄溶液などのエッチング液によりエッチングを施し、たとえば０.２５ｍｍ程度の厚さの板材の７０％程度の厚さを除去し、エッチング穴２ａおよび切欠部６を形成する。このエッチング穴２ａおよび切欠部６は、その部分のマスクに開口部を形成しておいてエッチング液に浸漬するだけで同時にエッチングされ、切欠部６を形成するのに余計な工数を必要とするこよなく簡単に形成される。その後、板状体１０からダイパッド１やリード４を形成するためのパンチングの際に、エッチング穴２ａを金型２２により整形して底面が平らな凹部２とすることにより形成する。ここで、切欠部６の形状は余り問題にならないため、切欠部６を金型整形する必要はない。その結果、金型２２で凹部２が形成されても整形だけで板状体１０の変形は殆どなく、したがって歪みも殆ど生じない。 In order to manufacture the lead frame, as shown in FIG. 1C, first, in a state of the plate-like body 10, the portion where the die pad 1 is formed is etched with an etching solution such as a ferric chloride solution. For example, about 70% of the thickness of a plate material having a thickness of about 0.25 mm is removed to form an etching hole 2a and a cutout portion 6. The etching hole 2a and the notch 6 are simultaneously etched only by forming an opening in the mask at that portion and dipping in an etching solution, without requiring extra steps to form the notch 6. It is easily formed. Thereafter, at the time of punching for forming the die pad 1 and the lead 4 from the plate-like body 10, the etching hole 2a is formed by shaping with a mold 22 to form the recess 2 having a flat bottom surface. Here, since the shape of the notch 6 does not matter much, it is not necessary to shape the notch 6 with a die. As a result, even if the concave portion 2 is formed in the mold 22, there is almost no deformation of the plate-like body 10 only by shaping, and therefore, almost no distortion occurs.

　本発明の発光素子を製造するには、このリードフレームを用いて前述のように、ダイパッド１の凹部２内にＬＥＤチップ３をダイボンディングし、ワイヤボンディングをし、さらにＬＥＤチップ３およびリード４の端部部分を透明樹脂で被覆することにより発光素子を形成することができる。 In order to manufacture the light emitting device of the present invention, as described above, the LED chip 3 is die-bonded into the recess 2 of the die pad 1 by using this lead frame, wire bonding is performed, and the LED chip 3 and the lead 4 are formed. A light-emitting element can be formed by covering an end portion with a transparent resin.

　図２は本発明の半導体装置を製造する一工程の説明図である。図２はたとえば複数のＩＣチップ（以下、単にＩＣという）７、８などを同じパッケージ内に組み込むため、同じリードフレーム上に異なる高さのＩＣ７、８をボンディングする半導体装置の例で、リードフレームの一部を予めエッチングしておくことによりＩＣ７、８の高さを実質的に同じ高さにするものである。すなわち、ダイボンディング後にワイヤボンディングをする場合に、画像認識によりボンディング位置を特定するが、ＩＣ７、８の表面同士で高さが異なると焦点距離が異なり、ボケにより位置ずれが生じやすいという問題がある。 FIG. 2 is an explanatory view of one step of manufacturing the semiconductor device of the present invention. FIG. 2 shows an example of a semiconductor device in which ICs 7 and 8 having different heights are bonded on the same lead frame in order to incorporate a plurality of IC chips (hereinafter simply referred to as ICs) 7 and 8 in the same package. Are etched in advance to make the heights of the ICs 7 and 8 substantially the same. That is, when wire bonding is performed after die bonding, the bonding position is specified by image recognition. However, if the heights of the surfaces of the ICs 7 and 8 are different from each other, the focal length is different, and there is a problem that a positional shift is likely to occur due to blurring. .

　しかし、本発明では高さが高いＩＣ７がボンディングされるダイパッド９にあらかじめ凹部１２を形成しておくことにより、図２（ｂ）に（ａ）のＢ3−Ｂ3断面図が示されるように、ＩＣ７、８の表面を実質的に同じ高さに合わせることができ、ボンディング時の画像認識の不都合をなくしたものである。たとえばＩＣ７の高さが０.４ｍｍで、ＩＣ８の高さが０.２３ｍｍでリードフレームの板厚が０.２５ｍｍの場合、ＩＣ７、８の表面の高さはリードフレームの底面からそれぞれ０.６５ｍｍおよび０.４８ｍｍと０.１７ｍｍの高さの差がある。このＩＣ７の方のダイパッド９をエッチングにより０.１８ｍｍ程度除去して凹部１２を形成すればＩＣ７、８の表面の高さをほぼ同じ高さにすることができる。 However, by IC7 height higher in the present invention is formed in advance recess 12 to the die pad 9 which is bonded, as B 3 -B 3 cross-sectional view of (a) in FIG. 2 (b) is shown , ICs 7 and 8 can be adjusted to substantially the same height, eliminating the inconvenience of image recognition during bonding. For example, when the height of the IC 7 is 0.4 mm, the height of the IC 8 is 0.23 mm, and the thickness of the lead frame is 0.25 mm, the height of the surfaces of the ICs 7 and 8 is 0.65 mm from the bottom of the lead frame. And there is a height difference of 0.48 mm and 0.17 mm. If the die pad 9 of the IC 7 is removed by about 0.18 mm by etching to form the concave portion 12, the surface heights of the ICs 7 and 8 can be made substantially the same.

　この凹部１２の形成は、図１に示されるパラボラのための凹部２と同様に、予めエッチングをしておき、リードフレームの打抜き形成の際に金型で整形をすることにより簡単に形成することができる。なお、この例では光を反射させるパラボラにする必要がないため、図２に示されるように、ダイパッド９に打ち抜く際に凹部の側壁をなくして、ダイパッド９の端面が薄いままで終端していても構わない。また、その意味で金型による完全な整形がなされていなくてもよい。図２において、１１はＩＣ８側のダイパッド、１３はＩＣ７の電極端子と接続されるリード、１４はＩＣ７の電極端子とリード１３とを電気的に接続するワイヤである。 The recess 12 can be easily formed by etching in advance and shaping with a die at the time of punching and forming a lead frame, similarly to the recess 2 for a parabola shown in FIG. Can be. In this example, since it is not necessary to use a parabola that reflects light, as shown in FIG. 2, when punching the die pad 9, the side wall of the concave portion is eliminated, and the die pad 9 is terminated while the end face remains thin. No problem. Further, in that sense, it is not necessary that the mold is completely shaped. In FIG. 2, reference numeral 11 denotes a die pad on the IC 8 side, 13 denotes a lead connected to the electrode terminal of the IC 7, and 14 denotes a wire for electrically connecting the electrode terminal of the IC 7 and the lead 13.

本発明の発光素子およびリードフレームの製法を説明する図である。It is a figure explaining a manufacturing method of a light emitting element and a lead frame of the present invention. 本発明の他の構成例を示す図である。FIG. 9 is a diagram illustrating another configuration example of the present invention. 従来の発光素子のダイパッド部の形状を示す図である。It is a figure showing the shape of the die pad part of the conventional light emitting element.

符号の説明Explanation of reference numerals

　１　　ダイパッド
　２　　凹部
　２ａ　エッチング穴
　３　　ＬＥＤチップ
　４　　リード
　５　　ワイヤ
　６　　切欠部 DESCRIPTION OF SYMBOLS 1 Die pad 2 Depression 2a Etching hole 3 LED chip 4 Lead 5 Wire 6 Notch

Claims (2)

　板状体の裏面が平らで表面側に凹部が形成されたダイパッドと、該ダイパッドの凹部にボンディングされた発光素子チップと、前記ダイパッドと隣接して設けられたリードと、前記発光素子チップの電極端子と前記リードの端部とを電気的に接続するワイヤとからなり、前記ダイパッドの前記リード側の端部に切欠部が形成されてなる発光素子。 A die pad having a flat back surface and a concave portion formed on the front surface side; a light emitting element chip bonded to the concave portion of the die pad; a lead provided adjacent to the die pad; and an electrode of the light emitting element chip. A light emitting element comprising a wire for electrically connecting a terminal and an end of the lead, wherein a cutout is formed at an end of the die pad on the lead side. 　高さの異なる半導体チップがそれぞれダイパッドにボンディングされ、１つのパッケージに包含される半導体装置であって、前記半導体チップのうちの背の高いチップがボンディングされるダイパッドの少なくとも半導体チップがボンディングされる部分が予め薄く形成され、前記ダイパッドの裏面からの各半導体チップの表面の高さが実質的に同じ高さに形成されてなる半導体装置。 A semiconductor device in which semiconductor chips having different heights are respectively bonded to die pads and are included in one package, wherein at least a portion of the die pad to which a tall chip of the semiconductor chips is bonded is bonded. Is formed in advance to be thin, and the height of the front surface of each semiconductor chip from the back surface of the die pad is formed to be substantially the same height.
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JP2006190961A (en) * 2004-12-31 2006-07-20 Ind Technol Res Inst Light emitting diode package and manufacturing process therefor
JP2006261302A (en) * 2005-03-16 2006-09-28 Rohm Co Ltd Optical communication module
US7528469B2 (en) 2004-06-03 2009-05-05 Denso Corporation Semiconductor equipment having multiple semiconductor devices and multiple lead frames
JP2011505689A (en) * 2007-12-03 2011-02-24 ソウル セミコンダクター カンパニー リミテッド Slim LED package
CN107958948A (en) * 2017-12-28 2018-04-24 广东晶科电子股份有限公司 A kind of LED light emitting diodes and preparation method thereof

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7528469B2 (en) 2004-06-03 2009-05-05 Denso Corporation Semiconductor equipment having multiple semiconductor devices and multiple lead frames
JP2006190961A (en) * 2004-12-31 2006-07-20 Ind Technol Res Inst Light emitting diode package and manufacturing process therefor
US7589354B2 (en) 2004-12-31 2009-09-15 Industrial Technology Research Institute Light emitting diode package and process of making the same
JP2006261302A (en) * 2005-03-16 2006-09-28 Rohm Co Ltd Optical communication module
JP2011505689A (en) * 2007-12-03 2011-02-24 ソウル セミコンダクター カンパニー リミテッド Slim LED package
US8659050B2 (en) 2007-12-03 2014-02-25 Seoul Semiconductor Co., Ltd. Slim LED package
US8963196B2 (en) 2007-12-03 2015-02-24 Seoul Semiconductor Co., Ltd. Slim LED package
US9412913B2 (en) 2007-12-03 2016-08-09 Seoul Semiconductor Co., Ltd. Slim LED package
US9530942B2 (en) 2007-12-03 2016-12-27 Seoul Semiconductor Co., Ltd. Slim LED package
US9899573B2 (en) 2007-12-03 2018-02-20 Seoul Semiconductor Co., Ltd. Slim LED package
CN107958948A (en) * 2017-12-28 2018-04-24 广东晶科电子股份有限公司 A kind of LED light emitting diodes and preparation method thereof

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