JP2004088272A - Image transmission system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an efficient image transmission system capable of transmitting an image with high definition and high image quality like those of a photograph at a high speed while converting the arrangement of pixels of the image by using an imaging apparatus with the number of pixels equal to and more than that of a high image quality television (HDTV: High Definition TV) image such as the High Vision system and capable of securing the security. <P>SOLUTION: A vertical address generator 24 and a horizontal address generator 25 in an arrangement conversion unit in a camera use division signals HDO', HD1', HD2', HD3' whose number of pixels as HDTV digital parallel signals is the same as that of prior arts in order to secure the security of image signals. As shown in Figure (E), the division signal HD0' results from reading pixel data at an interval of one both in longitudinal and lateral directions. The division signals HD1', HD2', HD3' result from reading pixel data at an interval of one both in the longitudinal and lateral directions while respectively changing the read position by one each both in the longitudinal and lateral directions. Thus, the four division signals HD0' to HD3' whose number of pixels is the same as that in a standard state but whose pixel arrangement differs from that in the standard state can be obtained in this way. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image transmission system, and more particularly to array conversion of high-definition, high-quality images similar to photographs using an imaging device having a pixel number equal to or larger than that of a high-definition television (HDTV) such as a high-vision system. The present invention relates to an image transmission system that performs high-speed transmission while transmitting.
[0002]
[Prior art]
As a conventional image transmission system, a video transmission system using a digital transmission system for a flat panel monitor has been proposed (Japanese Patent Application Laid-Open No. 2001-13927). This is based on the DVI (Digital Visual Interface) standard.
[0003]
FIG. 4 shows a block diagram of an example of a conventional image transmission system based on the DVI standard and signal explanatory diagrams of respective units. In FIG. 1A, a camera 10 captures an image of a subject, and has a horizontal pixel number of 1920 pixels in the horizontal direction and 1080 pixels in the vertical direction (that is, 1920 × 1080 pixels) of the HDTV image. A high-definition image signal having 3840 pixels in the direction and 2160 pixels in the vertical direction (that is, 3840 × 2160 pixels) is converted into an SDI signal of a serial digital high-definition signal according to the standard BTAS-002B by the Broadcasting Technology Association (BTA). (1920 × 1080 pixels) are output in parallel.
[0004]
As shown in FIGS. 4 (A) and (B), the four sets of SDI signals are obtained by dividing a continuous pixel array of 3840 × 2160 pixels vertically and horizontally into two parts, thereby forming four sets of 1920 × 1080 pixels. And divided into pixel arrays HD0 to HD3, which are supplied to the SDI / DVI conversion device 11 and converted into DVI signals.
[0005]
That is, the SDI / DVI converter 11 converts the input four sets of SDI signals into parallel signals in each set by the serial / parallel converter 11a, converts the color difference signals by the color difference converter 11b, and converts After the primary accumulation in the buffer 11c, as shown in FIGS. 4A and 4C, it is divided into four in the horizontal direction and converted into a DVI signal composed of four continuous pixel arrays DV0 to DV3 of 960 × 2160 pixels. And read in parallel. These four sets of DVI signals are supplied to a TMDS (Transmission Minimized Differential Signaling) transmitter 11d, from which they are output to the display device 12 for image display.
[0006]
FIG. 5 shows a configuration diagram and a signal explanatory diagram of an example of the camera 10 used in the conventional image system. In FIG. 1, the camera 10 first forms an image of a subject on the imaging device 2 having a configuration of 3840 × 2160 pixels by the lens 1. In the imaging device 2, as shown in FIG. 3D, the imaging region is divided into eight in the horizontal direction, and the subject light image is photoelectrically converted in each of the divided imaging regions of 480 × 2160 pixels, and thus obtained. Eight sets of analog imaging signals S0 to S7 are supplied in parallel to the A / D converter 3 as shown in FIG.
[0007]
The A / D converter 3 converts the input eight sets of analog imaging signals S0 to S7 into digital imaging signals and sends them to the signal processor 4, where dark current correction, white defect correction, gain adjustment, color difference conversion, etc. Is performed. The digital signal output from the signal processing device 4 is supplied to and stored in the array conversion device 5, and then, as shown in FIG. Output.
[0008]
The quadrant signals HD0 to HD3 are HDTV digital parallel signals each having 1920 × 1080 pixels (based on BTAS-004B). The quadrant signals HD0 to HD3, which respectively show HDTV images HD0 ′ to HD3 ′ in FIG. 5B, are arranged in parallel with each other as shown in FIG. To the SDI conversion device 6, where the parallel signals of each group are converted into serial SDI signals of each group and used as camera output signals.
[0009]
[Problems to be solved by the invention]
In this way, if a high-definition image having four times the number of pixels of an HDTV image is converted into a plurality of SDI signals and transmitted, they are handled as high-definition standard signals, and transmission is easy. However, in the above-described conventional image transmission system, since the image signal to be transmitted is a Hi-Vision standard signal, copying is easy, and it is difficult to maintain confidentiality of image information. In addition, the installation of additional security equipment for confidentiality increases the cost, makes the handling specialized, and is inconvenient to handle.
[0010]
The present invention has been made in view of the above points, and uses an image pickup apparatus having a pixel number equal to or larger than a high-definition television (HDTV) image of a high-definition system or the like to produce a high-definition high-quality image comparable to a photograph. It is an object of the present invention to provide an image transmission system that performs high-speed transmission while performing array conversion, is efficient, and can maintain confidentiality.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, the present invention divides an imaging region having a larger number of pixels than an image in a high-definition television system into a plurality of regions, and obtains a subject light image by photoelectric conversion by each of the divided imaging regions. Imaging means for outputting the plurality of first imaging signals in parallel, and after simultaneously storing the plurality of first imaging signals output from the imaging means, equally divides the total number of pixels of the entire imaging area of the imaging means. A plurality of second pixels which are read out and converted so as to have the same number of pixels as the standard signal, do not overlap with each other, and have a predetermined pixel arrangement order different from the original pixel arrangement order First array conversion means for outputting imaging signals in parallel, first conversion means for converting a plurality of second imaging signals output in parallel from the first array conversion means to a plurality of serial signals, The duplicate output from the first conversion means Transmitting means for transmitting the serial signals of the plurality of serial signals simultaneously and in parallel as the standard signal, a second converting means for converting each of the plurality of serial signals transmitted by the transmitting means into a parallel signal, and a second converting means. After simultaneously storing a plurality of parallel signals output from the camera for one screen, the entire imaging area of the imaging means is composed of pixels of each divided imaging area which is divided into a plurality of parts in a predetermined direction different from the divided imaging area of the imaging means. And a second array conversion means for outputting a plurality of parallel signals read and array-converted as described above.
[0012]
According to the present invention, the number of pixels obtained by equally dividing the total number of pixels in the entire imaging area of the imaging unit is such that the pixels do not overlap each other and have a predetermined pixel arrangement order different from the original pixel arrangement order. The plurality of second imaging signals read and converted into a serial signal are converted into a serial signal and then transmitted as a plurality of standard signals in parallel, so that the transmitted standard signal is a pixel array of the original standard signal. The signals can be transmitted as signals of different pixel arrangements.
[0013]
Each of the plurality of standard signals output from the first conversion means may be an SDI signal, and each of the plurality of parallel signals output from the second array conversion means may be a DVI signal. There may be.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of an image transmission system according to an embodiment of the present invention and a signal explanatory diagram of each unit. 4, the same components as those in FIG. 4 are denoted by the same reference numerals. In FIG. 1A, a camera 15 captures an image of a subject, and has a horizontal pixel number of 1920 pixels in the horizontal direction and 1080 pixels in the vertical direction (that is, 1920 × 1080 pixels) of the HDTV image. A high-definition image signal having 3840 pixels in the direction and 2160 pixels in the vertical direction (that is, 3840 × 2160 pixels) is converted into an SDI signal of a serial digital high-definition signal according to the standard BTAS-002B by the Broadcasting Technology Association (BTA). (1920 × 1080 pixels) are output in parallel. However, the present embodiment is characterized in that the SDI signal (standard signal) has a signal arrangement different from the conventional one.
[0015]
That is, the basic configuration of the camera 15 is the same as the conventional configuration in FIG. 5, but the configuration of the array conversion device 5 therein is a configuration specific to the present embodiment. The configuration of the array conversion device in the camera 15 of the present embodiment will be described in detail with reference to FIGS.
[0016]
First, since a signal processing device (corresponding to 4 in FIG. 5) outputs digital signals in the arrays S0 to S7 shown in FIG. 5D, the digital signals are installed in the array conversion device in the camera 15. By the write address generator # 0 (vertical address generator 20 and horizontal address generator 21) shown in FIG. 2A, the arrays (S0, S1,..., S7) are directly stored in the memory in the array converter. Is written.
[0017]
Usually, there are two memories. One memory is for one vertical scanning period in which the digital signals S0 to S7 are written, and the other memory is for the digital signal S0 written in the immediately preceding vertical scanning period. Steps S7 through S7 are performed based on a read address from a read address generator described below. Writing and reading to and from these two memories are alternately switched every vertical scanning period.
[0018]
Here, in the conventional array conversion device 5, the read address generator # 1 (vertical address generator 22, horizontal address generator 23) shown in FIG. In the two-divided array (HD0, HD1, HD2, HD3), the signals are simultaneously read as four-divided HDTV digital parallel signals. As described above, the quadrant signals HD0 to HD3 are HDTV digital parallel signals each having 1920 × 1080 pixels (based on BTAS-004B). In the present embodiment, when confidentiality is not maintained, it is possible to use the same reading method as in the related art as a standard state.
[0019]
On the other hand, in this embodiment, in order to maintain confidentiality as an image signal, as shown in FIG. 2C, a read address generator # 2 (vertical address generator 24 and The horizontal address generator 25) has the same number of pixels as the HDTV digital parallel signal as the conventional SDI signal (standard signal in the standard state), but has four divided signals HD0 ', HD1', HD2 ′ and HD3 ′ are generated. These quadrant signals HD0 'to HD3' are digital parallel signals for HDTV of 1920 × 1080 pixels.
[0020]
The four-divided signals HD0 'to HD3' will be described in more detail. For example, as shown in FIG. 2D, continuous pixel data of the entire memory is converted to a vertical address Vadd and a horizontal address Hadd by Dij (where , I is a line order, and j is a horizontal pixel order from the left end of the screen). When this is read out, as shown in FIG. .., D20, D22, D24,..., Every other pixel data is read in every vertical and horizontal direction by the vertical read address V0 ′ and the horizontal read address H20 ′.
[0021]
Hereinafter, similarly, as shown in FIG. 2E, the second divided signal HD1 ′, the third divided signal HD2 ′, and the fourth divided signal HD3 ′ are vertically read addresses V1 ′, V2 ′, V3 ′. And the horizontal read address H20 'or H21', the read position is changed one by one in the vertical and horizontal directions, and the data is read out alternately in the vertical and horizontal directions. In this manner, since the quadrant signals HD0 'to HD3' having the same standard state and the same number of pixels can be obtained, the signals can be directly converted into SDI signals and output to the camera.
[0022]
Referring again to FIG. 1, the above-mentioned SDI signals HD0 ′ to HD3 ′ shown in FIG. 1B output in parallel from the camera 15 are supplied to the SDI / DVI converter 16 where they are output. The signals are converted into four sets of DVI signals and output in parallel. In other words, the SDI / DVI converter 16 converts all four sets of SDI signals HD0 ′, HD1 ′, HD2 ′, HD3 ′, which are serial signals transmitted from the camera 15, by the serial / parallel converter 16a. After converting the signals into digital parallel signals, the color difference converter 16b converts the YPbPr signal into RGB signals, which are three primary color signals, and supplies the RGB signals to the image reproduction buffer memory 16c. Normally, two sets of the buffer memory 16c for image reproduction are also provided, and when one is writing, the other performs reading, and the writing period and the reading period alternate alternately every one vertical scanning period. It is designed to switch.
[0023]
As shown in FIG. 1C, the image reproduction buffer memory 16c includes an address generator # 3 (vertical address generator 24 'and horizontal address generator 25') provided in the SDI / DVI converter 16. SDI signals HD0 ', HD1', HD2 ', HD3' that have passed through the serial / parallel converter 16a and the color difference converter 16b are converted to HD0 "based on the vertical address V0 'or V1' and the horizontal address H20" or H21 ". , HD1 ", HD2", and HD3 ".
[0024]
At this time, if the storage arrangement is the same as that of the memory read by the address generator # 2, the signals stored in the image reproduction buffer memory 16c have the same arrangement as in the standard state. That is, in the buffer memory for image reproduction 16c, the signals HD0 'and HD1' of the odd lines are arranged such that the signals of the same line are arranged on the same line and are alternately arranged so as to be shifted by one pixel from each other. 'And HD3' have the same standard state storage arrangement as the memory shown in FIG. 2C by arranging the signals of the same line on the same line and alternately so as to shift each other by one pixel. Become.
[0025]
Here, the address generator # 2 (vertical address generator 24 and horizontal address generator 25) and the address generator # 3 (vertical address generator 24 'and horizontal address generator 25') are, for example, blocks shown in FIG. The vertical address generator 24 (24 ') is composed of two series of V0 and V1 counters 31 and a control memory 32, and the horizontal address generator 25 (25') is also composed of two series. It comprises an H0 counter, an H1 counter 33 and a control memory 34, and generates a total of four sets of addresses based on, for example, a horizontal synchronization signal HD for HDTV, a vertical synchronization signal VD, and a clock. The address array is set by accumulating control data in the control memories 32 and 34 and constantly controlling the counters 31 and 33 based on the accumulated data.
[0026]
Returning to FIG. 1, the description will be continued. When one screen of pixel data is stored in the image reproduction buffer memory 16c in the same order as in the standard state as described above, it is provided in the SDI / DVI conversion device 16 as shown in FIG. According to the read vertical address V and the read horizontal addresses H0 'to H3' from the address generator # 4 (the vertical address generator 26 and the horizontal address generator 27), DV0, DV1, DV2, DV3 are read from the image reproduction buffer memory 16c. The pixel data is read out in the array of.
[0027]
In the above arrangement, DV0, DV1, DV2, and DV3 are image signals of 960 × 2160 pixels each obtained by dividing one screen into four in the horizontal direction, and TMDS is used as a DVI signal including four continuous pixel arrays DV0 to DV3. The signal is supplied in parallel to a transmitter (a signal converter for DVI transmission based on the DVI standard) 16d as shown in FIG. 1D, and is output as a DVI signal. The four sets of DVI signals output in parallel are supplied to the display device 12 and displayed as images.
[0028]
As described above, according to the present embodiment, although the signal arrangement of the four sets of SDI signals output from the camera 15 has the same number of pixels as the HDTV standard signal, the pixel arrangement is changed to the HDTV standard signal. Therefore, even if this signal is copied and subjected to the same SDI / DVI conversion as before and displayed, a correct display image cannot be obtained, and thus confidentiality can be secured. On the other hand, in this embodiment, since the SDI / DVI conversion device 16 can output the DVI signal returned to the correct arrangement, the display device 12 can display a normal image.
[0029]
Note that the present invention is not limited to the above embodiment. For example, the array conversion performed by the array conversion device in the camera 15 is performed in the vertical and horizontal directions shown in FIGS. The method is not limited to the method of shifting each pixel, and may be set arbitrarily such as a staggered arrangement, division in only the vertical direction, division in the horizontal direction, and the like. However, it is necessary to set a plurality of sets, each of which is the number of pixels obtained by equally dividing the total number of pixels, and that each pixel does not overlap.
[0030]
When the address generators # 2 and # 3 are set in the same arrangement during actual use, the arrangement of the address generators # 4 does not need to be changed. Therefore, the address generator # 0 and the address generator # 4 are fixed in arrangement, and only the arrangement of the address generators # 2 and # 3 is controlled, so that transmission can be performed without using confidentiality equipment. The signal arrangement at the time can be made highly secure.
[0031]
The address generator # 1 in the standard state is also installed in the array converter on the camera 15 side and the SDI / DVI converter 16 along with the address generators # 2 and # 3. If there is not, it can be switched and used. Further, in addition to supplying the output DVI signal of the TMDS transmitter 16d to the display device 12, the output DVI signal can be recorded on a recording medium, for example, or distributed using another transmission path.
[0032]
【The invention's effect】
As described above, according to the present invention, the number of pixels obtained by equally dividing the total number of pixels in the entire imaging area of the imaging unit does not overlap each other, and differs from the original pixel arrangement order. By converting a plurality of second imaging signals read out and arranged in a predetermined pixel arrangement order into a serial signal and then transmitting the signals in parallel, the number of pixels transmitted is the same as that of the standard signal. However, since the pixel array is transmitted as a pixel array signal other than the standard signal, even if this signal is copied and subjected to pixel conversion, it cannot be returned to a normal pixel array unless a predetermined pixel array conversion is performed. Securing confidentiality and obtaining a high-definition image signal with extremely high confidentiality can be obtained.
[0033]
Further, according to the present invention, the number of pixels of the signal to be transmitted is the same as the conventional standard signal except for the pixel arrangement, so that the array conversion memory can be used in the standard state, and the pixel arrangement is changed to a predetermined order. This eliminates the need for additional installation of confidential equipment such as an encryption device, so that an increase in system cost can be suppressed and specialized handling can be eliminated.
[Brief description of the drawings]
FIG. 1 is a block diagram of an image transmission system according to an embodiment of the present invention and a signal explanatory diagram of each unit.
FIG. 2 is a diagram illustrating an example of a pixel array of an SDI signal output from a camera in FIG. 1;
FIG. 3 is a block diagram of an embodiment of an array conversion device in a camera and an address utterance device in an SDI / DVI conversion device according to the present invention.
FIG. 4 is a block diagram of an example of a conventional image system and a signal explanatory diagram of each unit.
FIG. 5 is a block diagram of an example in a conventional camera and a signal explanatory diagram of each unit.
[Explanation of symbols]
12 Display Device 15 Camera 16 SDI / DVI Converter 16a Serial / Parallel Converter 16b Color Difference Converter 16c Image Playback Buffer Memory 16d TMDS Transmitters 20, 22, 24, 24 ', 26 Vertical Address Generators 21, 23, 25 , 25 ', 27 Horizontal address generator 31 V0 counter / V1 counter 32, 34 Control memory 33 H0 counter / H1 counter

Claims (2)

An imaging region having a larger number of pixels than an image of the high-definition television system is divided into a plurality of regions, and a plurality of first imaging signals obtained by subjecting a subject light image to photoelectric conversion by each divided imaging region are parallelized. Imaging means for outputting;
After simultaneously storing a plurality of first imaging signals output from the imaging unit, the total number of pixels of the entire imaging area of the imaging unit is equally divided to have the same number of pixels as the standard signal. A first array conversion unit that outputs a plurality of second image pickup signals that are not overlapped and are read and converted so as to have a predetermined pixel array order different from the original pixel array order, and
First conversion means for converting the plurality of second imaging signals output in parallel from the first array conversion means into a plurality of serial signals;
Transmitting means for simultaneously transmitting the plurality of serial signals output from the first converting means in parallel as the standard signal,
A second conversion unit that converts each of the plurality of serial signals transmitted by the transmission unit into a parallel signal;
After simultaneously storing the plurality of parallel signals output from the second conversion unit for one screen, the entire imaging region of the imaging unit is divided into a plurality of parts in a predetermined direction different from the divided imaging region of the imaging unit. An image transmission system, comprising: a second array conversion unit that outputs a plurality of parallel signals that are read out from each pixel of each divided imaging region and subjected to array conversion. Each of the plurality of standard signals output from the first conversion unit is an SDI signal, and each of the plurality of parallel signals output from the second array conversion unit is a DVI signal. The image transmission system according to claim 1.

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