JP2011044826A - Signal transmitter, signal transmission method, signal receiver, signal receiving method, and signal transmission system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the transmission delay of an image signal. <P>SOLUTION: Based on the write timing obtained from a synchronizing signal contained in the image data of one frame input serially, image data is written in a memory. Out of the image data of one frame, the image data of every n lines are read in order, starting from the first line, until the maximum number of lines of one frame is reached. Subsequently, the image data thus read is divided for each line to have the one-half length, and the image data divided for each line are arranged alternately while aligning the vertical line thus obtaining divided image data consisting of n divided images. The n divided images are output in parallel in order starting from the first line. An image signal obtained by serially converting the n divided image data which are read from the memory and input in parallel is output using the transmission standard of either 3G HD-SDI format or HD-SDI dual link format. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a signal transmission device, a signal transmission method, a signal reception device, a signal reception method, and a signal transmission system suitable for application to, for example, transmission of an image signal of a high-definition image.

  Development of an image receiving system and an imaging system for an ultra-high definition image signal in which one current frame exceeds an HD (High Definition) signal that is an image signal of 1920 samples × 1080 lines is progressing. In recent years, an image using an image signal, generally called a 4K image, in which one frame is composed of 4096 samples × 2160 lines is being put into practical use. Since 4K images have a large amount of data, for example, there has been a technique of dividing one frame into a predetermined number and transferring it in order to transmit from a signal transmission device used as a camera to a signal reception device used as an editor. . As this technique, for example, an image of 2048 samples × 1080 lines obtained by dividing one screen into four crosses may be transferred.

  Japanese Patent Application Laid-Open No. 2004-228561 discloses a technique for performing a multiplexing process on an n-channel first image signal, converting it to a second image signal that forms bit string data of 10 Gbps or more, and sending it.

  In Patent Document 2, when bit string data of 10 Gbps or more is formed based on a specific image signal, an n-channel second image signal for reproducing the specific image signal is obtained from the received bit string data. Technology is disclosed.

JP 2005-328494 A JP 2006-74646 A

  By the way, as described above, if one screen is divided into four parts and transmitted, a delay time of at least about 1/2 frame (540 lines) is required, so that the delay of the divided image becomes large. In addition, the memory capacity required to convert the data is also required for one frame, which is expensive. Further, even when the techniques disclosed in Patent Documents 1 and 2 are used, it is difficult to reduce the delay time.

  The present invention has been made in view of such circumstances, and an object thereof is to suppress transmission delay of an image signal.

According to the present invention, among 1-frame image data composed of serially input image signals, the first line image is composed of n first divided images from the first line until reaching the maximum number of lines per frame every n lines. 1 divided image data is written in the memory.
Next, the n pieces of first divided image data written in the memory are sequentially read, and the read n pieces of first divided image data are divided for each line so that one line is halved.
Next, second divided image data composed of n second divided images obtained by alternately arranging vertical lines of image data divided for each line is obtained for each of the n second divided images. Parallel output is performed sequentially from the first line of the second divided image.
Then, an image signal obtained by serially converting n pieces of second divided image data read out from the memory and input in parallel is transmitted in either 3G HD-SDI format or HD-SDI dual link format. Is output using.

Further, according to the present invention, n first divided image data composed of a first divided image obtained by dividing one frame image composed of serially inputted image signals into n pieces are respectively converted into parallel data. The input of this image signal is performed using a transmission standard of either 3G HD-SDI format or HD-SDI dual link format.
Next, for every n pieces of first divided image data input in parallel, the adjacent odd lines and even lines are combined as image data of one horizontal line.
Next, the combined image data is written into the memory as n second divided image data composed of n second divided images.
Next, the n second divided image data from the memory is used as one horizontal line included in the image data of one frame, and the n second second image data in order from the first second divided image data. Reads up to divided image data.
Then, one frame of image data read from the memory is output in accordance with the write timing written to the memory until the maximum number of lines is reached from the first line of the second divided image.

In this way, one frame of image data is read every n lines, one line of image data is divided, and an image signal of divided image data composed of divided images obtained by combining vertical lines is transmitted.
Also, the image signal of the divided image data is received in the reverse procedure to the transmission side, the even line and odd line image data read from the divided image data are combined, and one frame of image data is obtained as one horizontal line. It became possible to reconfigure.

  According to the present invention, one frame of image data is divided into n divided image data, and the divided image data is transmitted in parallel according to a predetermined transmission standard for each of the n divided images. There is an effect that it can be suppressed. Further, since one frame of image data is reconstructed from n pieces of divided image data received in parallel, there is an effect that image signals of one frame of image data can be sequentially transmitted with a slight delay time.

It is a block diagram which shows the structural example of the signal transmission system in the 1st Embodiment of this invention. It is a block diagram which shows the structural example of the signal transmission apparatus in the 1st Embodiment of this invention. It is explanatory drawing which shows the example which the signal transmission apparatus in the 1st Embodiment of this invention divides | segments image data. 5 is a timing chart with line accuracy when the signal transmission apparatus according to the first embodiment of the present invention reads a divided image from a memory; 6 is a timing chart with frame accuracy when the signal transmission apparatus according to the first embodiment of the present invention reads a divided image from a memory; It is a block diagram which shows the structural example of the signal receiver in the 1st Embodiment of this invention. It is explanatory drawing which shows the example which the signal receiver in the 1st Embodiment of this invention couple | bonds a divided image. 6 is a timing chart with line accuracy when the signal receiving apparatus according to the first embodiment of the present invention writes a divided image in a memory. 4 is a timing chart with frame accuracy when the signal receiving apparatus according to the first embodiment of the present invention writes a divided image in a memory. It is a block diagram which shows the structural example of the signal transmitter in the 2nd Embodiment of this invention. It is a block diagram which shows the structural example of the signal receiver in the 2nd Embodiment of this invention.

Hereinafter, the best mode for carrying out the invention (hereinafter referred to as an embodiment) will be described. The description will be given in the following order.
1. First Embodiment (Example in which a 4K image is divided and transmitted as four divided images)
2. Second Embodiment (Example in which identification information for identifying divided image data is inserted as auxiliary data)
3. Modified example

<1. First Embodiment>
[Example of dividing a 4K image and transmitting it as four divided images]

  Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. In the present embodiment, an example applied to the signal transmission system 10 that transmits an image signal included in image data of a 4K image will be described.

  The signal transmission system 10 includes a signal transmission device 1 that transmits an image signal that forms 4K image data input from a camera (not shown) and the like, and a signal reception device 2 that receives an image signal from the signal transmission device 1. . The signal transmission device 1 and the signal reception device 2 of this example use the communication line defined by the transmission standard of either four 3G HD-SDIs or four sets of HD-SDI dual links to transmit image signals. Send and receive.

The signal transmission device 1 converts the input 4K image for one frame from the four first divided images (hereinafter, may be referred to as divided images A ′ to D ′) in a predetermined order, which will be described later. Into divided images (hereinafter also referred to as divided images A to D). Then, the signal transmission device 1 transmits the image data of the divided images A to D to the signal reception device 2 using either 3G HD-SDI or HD-SDI dual link transmission standard. A series of processes performed by the signal transmission device 1 is also used as a method for transmitting an image signal.
On the other hand, the signal receiving device 2 returns the 4K image of one frame from the image data of the divided images A to D received from the signal transmitting device 1, and outputs the image data of the 4K image to the subsequent processing block. A series of processing performed by the signal receiving device 2 is also used as a method for receiving an image signal.

FIG. 2 shows an internal configuration example of the signal transmission device 1.
The signal transmission device 1 includes a memory 11 that stores serially input 4K image data, and a writing control unit 12 that controls writing of image data including an image signal output from the effective pixel area to the memory 11. . Also, a read control unit 13 that controls the reading order of image data read from the memory 11, a write timing for writing to the memory 11 of the write control unit 12, and a timing generation unit that generates a read timing for the memory 11 of the read control unit 13 14.

  The signal transmission device 1 also includes formatters 15a to 15d that adjust the format of the divided image data of the divided images A to D, which will be described later, read from the memory 11 to a format for transmission. The signal transmission device 1 also includes parallel / serial conversion units 16a to 16d that convert the divided image data input in parallel from the formatters 15a to 15d into serial data. The signal transmission device 1 also includes driver units 17a to 17d that amplify the output of the serial data image signals output from the parallel-serial conversion units 16a to 16d. The driver units 17a to 17d are connected to four 3G HD-SDIs or four sets of HD-SDI dual links, and output image signals of the divided images A to D.

Here, an operation example of each block included in the signal transmission device 1 will be described.
First, image data of one frame of 4K image serially input from an external imaging device or the like is input to the timing generation unit 14. The timing generation unit 14 generates a write control signal for instructing a write timing at which the write control unit 12 writes image data into the memory 11 based on a synchronization signal included in the input image data.

  The writing control unit 12 starts from each of the first divided images of n until reaching the maximum number of lines of one frame every n lines from the first line of the image data of one frame composed of serially input image signals. The first divided image data is written into the memory 11. In this example, n = 4. Further, the first divided image corresponds to, for example, a divided image of 4096 samples × 540 lines when the vertical lines are combined.

  The first divided image data written in the memory 11 is sequentially read by the read control unit 13 every four lines, such as the first line, the fifth line, the ninth line,. Then, the read control unit 13 divides the read first divided image data for each line so that one line is halved. For example, the read control unit 13 divides image data of 4096 samples × 540 lines into a front line and a rear line with the 2048th sample as a boundary for each line.

  Then, the read control unit 13 converts the second divided image data including the four second divided images obtained by alternately arranging the vertical lines of the image data divided for each line into the four second pieces. For each divided image, parallel output is performed in order from the first line of the second divided image. For example, the second divided image has 2048 samples × 1080 lines in which the vertical lines of the image data of the first line and the rear line of the first divided image data divided for each line are alternately arranged. Corresponds to the divided image. Then, the read control unit 13 sends the second divided image data to the subsequent formatter 15a.

  Further, the readout control unit 13 reads out image data from the memory 11 every four lines, such as the second line, the sixth line, the tenth line,..., And the first divided image of 4096 samples × 540 lines. Get the data. Then, the read control unit 13 sends the second divided image data of 2048 samples × 1080 lines obtained by dividing the horizontal line of the first image data to the subsequent formatter 15b.

  Further, the readout control unit 13 reads out image data from the memory 11 every four lines, such as the third line, the seventh line, the eleventh line,..., And the first divided image of 4096 samples × 540 lines. Get the data. Then, the reading control unit 13 sends the second divided image data of 2048 samples × 1080 lines obtained by dividing the horizontal line of the first divided image data to the subsequent formatter 15c.

  Further, the readout control unit 13 reads out image data from the memory 11 every four lines, such as the fourth line, the eighth line, the twelfth line,..., And the first divided image of 4096 samples × 540 lines. Get the data. Then, the reading control unit 13 sends the second divided image data of 2048 samples × 1080 lines obtained by dividing the horizontal line of the first divided image data to the subsequent formatter 15d.

  The second divided image data of 2048 samples × 1080 lines output from the formatters 15a to 15d is input to the subsequent parallel-serial conversion units 16a to 16d. The parallel / serial conversion units 16a to 16d read image signals obtained by serial conversion of the four second divided image data read from the memory 11 by the read control unit 13 and input in parallel via the formatters 15a to 15d. Parallel output is performed according to a predetermined transmission standard. In this example, the second divided image data of 2048 samples × 1080 lines converted into serial data is input to the driver units 17a to 17d. Then, the driver units 17a to 17d use the four 3G HD-SDIs or the four sets of HD-SDI dual links to send the image signals of the second divided image data of the divided images A to D to the signal receiving device 2. Send to. However, instead of the driver units 17a to 17d, the parallel / serial conversion units 16a to 16d may output image signals of the second divided image data.

FIG. 3 illustrates an example of image data writing / reading processing with respect to the memory 11 performed by the signal transmission device 1.
As shown in FIG. 2, one frame of 4K images of 4096 samples × 2160 lines is divided into divided images A ′ to D ′ of 4096 samples × 540 lines every four lines, and written into the memory 11. At the time of reading, the first to 2048th samples for each line are set as line 1F, and the 2049th to 4096th samples are set as line 1R. At this time, the second divided image data of the divided images A to D obtained by alternately arranging the lines 1F and 1R and aligning the vertical lines for each line of the divided images A ′ to D ′ is read for each line.

  The write frequency of the write controller 12 is, for example, 300 MHz. On the other hand, the read frequency of the read control unit 13 is, for example, 74 MHz. Therefore, the read control unit 13 can read the divided image data from the memory 11 while the write control unit 12 writes the image data to the memory 11. Then, the signal transmission device 1 transmits the image signal of the second divided image data generated in this way to the signal reception device 2. Here, the time for transmitting 4K image data of one frame and the time for transmitting the second divided image data corresponding to the divided images A to D of one frame is 1/30 seconds, for example.

  FIG. 4 shows an example of a timing chart with line accuracy when the signal transmission device 1 reads the divided images A to D from the memory 11.

  First, the writing control unit 12 writes the input 4K image data as first divided image data for each line in the memory 11. Next, the read control unit 13 reads out the first divided image data written in the memory 11 and generates the second divided image data generated by reading out one line every four lines from the first line. To supply. At this time, the read control unit 13 sets the first line with a slight delay (for example, about several tens of samples) even when the image data corresponding to the first line of the 4K image is being written to the memory 11. Read the corresponding image data. The same applies to the second and subsequent lines.

  FIG. 5 is an example of a timing chart with frame accuracy when the signal transmission device 1 reads the divided images A to D from the memory 11.

  First, the writing control unit 12 writes the input 4K image into the memory 11 for each frame. On the other hand, the read control unit 13 reads the image data from the memory 11 for each frame while the write control unit 12 writes the image data of one frame to the memory 11 for each frame. At this time, the read control unit 13 reads the image data of the 4K image written in the memory 11 as the second divided image data of the divided images A to D for each frame and supplies them to the formatters 15a to 15d. To do. Therefore, the read control unit 13 reads the image data corresponding to the first line with a slight delay even when the image data corresponding to one frame of the 4K image is being written to the memory 11. The same applies to the second and subsequent lines.

FIG. 6 shows an internal configuration example of the signal receiving device 2.
The signal receiving device 2 is connected to four 3G HD-SDIs or four sets of HD-SDI dual links, and includes equalizers 21a to 21d to which second divided image data corresponding to the divided images A to D is input. Prepare. The signal receiving device 2 includes serial / parallel converters 22a to 22d that perform parallel conversion on second divided image data including image signals serially input via the equalizers 21a to 21d, respectively. The signal receiving device 2 includes deformers 23a to 23d that detect EAV, SAV, and the like from the divided image data subjected to parallel conversion and extract image signals output from the effective pixel area. Note that the image data including the image signals extracted by the deformators 23a to 23d is also referred to as second divided image data for the sake of simplicity.

  In addition, the signal receiving device 2 includes a memory 24 that stores second divided image data of the divided images A to D output from the deformators 23a to 23d, respectively. In addition, the signal receiving device 2 includes a write control unit 25 that controls writing of the divided image data to the memory 24 and a read control unit 26 that controls the order of reading the divided image data read from the memory 24. Further, the signal receiving device 2 includes a timing generation unit 27 that generates a write timing for writing to the memory 24 of the write control unit 25 and a read timing for the memory 24 of the read control unit 26.

Here, an operation example of each block included in the signal receiving device 2 will be described.
First, the equalizers 21a to 21d configure the second divided image data of 2048 samples × 1080 lines received from the signal transmission device 1 via four 3G HD-SDIs or four sets of HD-SDI dual links. Adjust the waveform of the image signal. Next, the serial / parallel converters 22a to 22d respectively perform parallel conversion on n pieces of divided image data including divided images obtained by dividing one frame image formed of image signals serially input according to a predetermined transmission standard into n pieces. . The serial / parallel converters 22a to 22d of this example convert the divided image data of 2048 samples × 1080 lines input via the equalizers 21a to 21d into parallel.

  Next, the deformatters 23 a to 23 d output the second divided image data to the memory 24 and the timing generator 27. The timing generation unit 27 sets the write timing for writing the image data of the divided images A to D in the memory 24 to the write control unit 25 based on the second divided image data input from the deformators 23a to 23d. Send write control signal to control.

  For each of the four divided image data corresponding to the four divided images A to D inputted in parallel, the writing control unit 25 converts the odd lines and even lines of each adjacent group into one horizontal line (4086 samples). ) Image data. Next, the writing control unit 25 writes the combined image data in the memory 34 as four first divided image data composed of four first divided images. Here, the first divided image data written in the memory 34 corresponds to divided images A ′ to D ′ of 4096 samples × 540 lines.

  The read control unit 26 writes data from the first second divided image data to the fourth second divided image data in order, and until the maximum number of lines is reached from the first line of the second divided image. One frame of image data read out in accordance with the timing is output. In this example, the reading control unit 26 sequentially sets the first divided image data corresponding to the divided images A ′ to D ′ as one horizontal line included in the image data of the 4K image of one frame from the memory 24. Read and output to subsequent processing blocks.

As described above, the writing control unit 25 identifies the four pieces of second divided image data input in parallel according to the writing timing generated by the timing generation unit 27 and converts them into the first divided image data. Write to memory 24.
Here, the writing control unit 25 stores the first divided image data of the divided image A ′ in the memory 24 every four lines, such as the first line, the fifth line, the ninth line,. Write.
Further, the writing control unit 25 writes the first divided image data of the divided image B ′ to the memory 24 every four lines, such as the second line, the sixth line, the tenth line,... In the 4K image. .

Further, the writing control unit 25 writes the first divided image data of the divided image C ′ to the memory 24 every four lines, such as the third line, the seventh line, the eleventh line,. .
Further, the writing control unit 25 writes the first divided image data of the divided image D ′ into the memory 24 every four lines, such as the fourth line, the eighth line, the twelfth line,... In the 4K image. .

  Thereafter, the read control unit 26 outputs one frame of image data read from the memory 24 in accordance with the write timing of the write control unit 25 to the memory 24. In this example, image data of a 4K image is read from the memory 24 by a read control signal that controls the read timing supplied from the read control unit 26.

FIG. 7 illustrates an example of image data writing / reading processing with respect to the memory 24 performed by the signal receiving device 2.
The signal receiving device 2 performs a process opposite to the process of generating the divided images A to D from the 4K image as illustrated in FIG. 3, thereby generating an image of the 4K image from the input image data of the divided images A to D. Generate data.

  First, the signal reception device 2 receives second divided image data corresponding to the divided images A to D from the signal transmission device 1. Then, the writing control unit 25 rearranges the divided image data so that the lines 1F and 1R form one horizontal line, generates first image data of the divided images A ′ to D ′, and generates the memory 24. Write to. Next, the read control unit 26 reads the image data for each line from the first divided image data of the divided images A ′ to D ′, and outputs it as a 4K image constituting one frame.

  FIG. 8 shows an example of a timing chart with line accuracy when the signal receiving device 2 writes the divided images A to D in the memory 24.

  First, the writing control unit 25 stores in the memory 24 the first divided image data corresponding to the divided images A ′ to D ′ generated from the second divided image data corresponding to the input divided images A to D. Write for each line. Next, the read control unit 26 reads and outputs the first divided image data written in the memory 24 line by line. At this time, for example, the read control unit 26 reads the first divided image data corresponding to the first horizontal line of the divided image A ′ as image data of the horizontal line of the 4K image immediately after the first divided image data is written in the memory 24. . The same applies to the divided images B ′ to D ′. For this reason, the timing at which the image data of the 4K image of one frame is output from the memory 24 until the first divided image data of one line composed of 4096 samples of the divided images A ′ to D ′ is written in the memory 24. A slight delay time.

  FIG. 9 shows an example of a timing chart with frame accuracy when the signal receiving device 2 writes the divided images A to D in the memory 24.

  First, the writing control unit 25 stores in the memory 24 the first divided image data corresponding to the divided images A ′ to D ′ generated from the second divided image data corresponding to the input divided images A to D. Write every frame. Next, the read control unit 26 reads out from the memory 24 for each frame, and outputs it as image data of a 4K image. For this reason, even when the first divided image data obtained by converting the second divided image data for one frame is being written to the memory 24, the read control unit 26 can process the 4K image of one frame with a slight delay. Image data can be read from the memory 24. The 4K image after the second frame is also output by the same processing.

The signal transmission system 10 according to the present embodiment described above is configured to transmit 4K images by the signal transmitting device 1 and the signal receiving device 2 connected by four 3G HD-SDIs or four sets of HD-SDI dual links. Used when transmitting image data.
The signal transmission device 1 divides one frame of a 4K image into four lines every four lines, and creates first image data composed of 4096 samples × 540 lines. Then, the signal transmission device 1 divides one line of the first image data, combines the vertical lines, converts the line into second divided image data composed of 2048 samples × 1080 lines, and transmits the image signal.
The signal receiving device 2 converts the second divided image data composed of 2048 samples × 1080 lines into the first divided image data composed of 4096 samples × 540 lines from the received image signal in the reverse procedure to the transmitting side. . Then, four first divided image data are reconstructed for every four lines, and image data of a 4K image is created.

  Thereby, the delay time required for transmitting the image data of the 4K image can be suppressed to the time required for transmitting the image data for four lines of the 4K image. The capacity of the memories 11 and 34 to be secured for converting the line length for each line may be about 8 lines, 4 lines + 4 lines as shown in FIGS. For this reason, it is possible to minimize the capacity of the memories 11 and 34 used for transferring the 4K image, and to reduce the cost.

  In addition, a horizontally long first divided image of 4096 samples × 540 lines is cut out from the image data of 4K images, and then converted into second divided image data that can be transmitted by 2048 samples × 1080 lines of general HD-SDI. Can be transmitted. At this time, the signal transmission device 1 and the signal reception device 2 are connected by four sets of HD-SDI dual links or four 3G HD-SDIs that are currently generally used. For this reason, it is not necessary to construct the signal transmission system 10 using a transmission line corresponding to a new transmission standard, and there is an effect that the cost at the time of system construction can be suppressed.

<2. Second Embodiment>
[Example of inserting identification information for identifying divided image data as auxiliary data]

  Next, a second embodiment of the present invention will be described with reference to FIGS. In the present embodiment, an example will be described in which auxiliary data for identifying divided images A to D is inserted into second divided image data and applied to a signal transmitting device 30 and a signal receiving device 40 that transmit image signals. In the following description, parts corresponding to those in FIGS. 2 and 6 already described in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

FIG. 10 shows an internal configuration example of the signal transmission device 30.
The signal transmission device 30 includes a memory 11, a write control unit 12, a read control unit 13, a timing generation unit 14, and auxiliary data insertion units 31a to 31d that insert auxiliary data into the divided image data. The signal transmission device 30 includes parallel / serial conversion units 16a to 16d and driver units 17a to 17d.

  The auxiliary data insertion units 31a to 31d uniquely read the divided images A to D for each of the four second divided image data read from the memory 11 and input in parallel via the formatters 15a to 15d. Auxiliary data including identification information (ID) for identification is inserted. As the auxiliary data, fixed values (for example, “1” to “4”) respectively corresponding to the divided images A to D are used. The auxiliary data is inserted into the VSYNC field constituting the second divided image data, for example. Then, the auxiliary data insertion units 31a to 31d output the second divided image data in which the auxiliary data is inserted into the n parallel / serial conversion units.

FIG. 11 shows an internal configuration example of the signal receiving device 40.
The signal receiving device 40 includes equalizers 21a to 21d, serial / parallel conversion units 22a to 22d, and auxiliary data reading units 41a to 41d that read auxiliary data inserted into the second divided image data. Further, the signal receiving device 40 includes a memory 24, a write control unit 25, a read control unit 26, and a timing generation unit 27.

  The auxiliary data reading units 23a to 23d read auxiliary data from the four second divided image data input in parallel from the serial / parallel conversion units 22a to 22d via the equalizers 21a to 21d. The auxiliary data includes identification information for identifying the divided images A to D as described above. The auxiliary data reading units 23 a to 23 d output the read identification information to the writing control unit 25. The writing control unit 25 determines whether the second divided image data respectively input via the equalizers 21a to 21d is the divided images A to D based on the identification information input from the auxiliary data reading units 23a to 23d. To do. Then, the writing control unit 25 converts the second divided image data into the first divided image data and writes it into the memory 24.

  The signal transmission device 30 according to the second embodiment described above inserts auxiliary data including identification information for identifying the divided images A to D into the second divided image data. The signal receiving device 40 can identify which divided images A to D correspond to the received second divided image data by reading auxiliary data from the divided image data. As described above, the identification information is inserted as auxiliary data on the HD-SDI in order to identify the image data of the divided images A to D obtained by dividing the 4K image into four parts. Which of the divided images A to D can be reliably identified. Thereby, even if each line of 3G HD-SDI or HD-SDI dual link is switched, there is an effect that the writing control unit 25 can write the divided images A to D in the memory 24 in the correct line order.

<3. Modification>

  In the first and second embodiments described above, four 3G HD-SDIs or four sets of HD-SDI dual links are used as a transmission standard for connecting the signal transmitting device and the signal receiving device. However, they may be connected by transmission lines according to other transmission standards.

  Further, as an example of dividing one frame of image data into n pieces of divided image data, the case of n = 4 has been described, but the value of n may be a value other than 4.

  Further, as an example of a 4K image, an image using an image signal in which one frame is 4096 samples × 2160 lines has been described. However, an image using an image signal in which one frame is 3840 samples × 2160 lines may be used.

  DESCRIPTION OF SYMBOLS 1 ... Signal transmission apparatus, 2 ... Signal reception apparatus, 10 ... Signal transmission system, 11 ... Memory, 12 ... Write control part, 13 ... Read control part, 14 ... Timing generation part, 15a-15d ... Formatter, 16a-16d ... Parallel-serial conversion unit, 17a to 17d ... driver unit, 21a to 21d ... equalizer, 22a to 22d ... serial-parallel conversion unit, 23a to 23d ... auxiliary data reading unit, 24 ... memory, 25 ... write control unit, 26 ... read control 27, timing generation unit, 30 ... signal transmission device, 31a to 31d ... auxiliary data insertion unit, 40 ... signal reception device, 41a-41d ... auxiliary data reading unit

Claims (9)

First divisions each consisting of n first divided images from the first line until reaching the maximum number of lines of the one frame for every n lines from the first line of image data consisting of serially inputted image signals A writing control unit for writing image data to a memory;
The n pieces of first divided image data written in the memory are sequentially read, and the read n pieces of first divided image data are divided for each line with a length in which one line is halved, Second divided image data composed of n second divided images obtained by alternately arranging vertical lines of the image data divided for each line are arranged for each of the n second divided images. A read control unit for outputting in parallel from the first line of the second divided image;
An image signal obtained by serially converting the n second divided image data read from the memory and input in parallel by the read control unit is converted into a 3G HD-SDI format or HD-SDI dual link format. And n parallel-serial conversion units that output using any of the transmission standards. Further, under the control of the read control unit, the n second divided images are identified for each of the n second divided image data input in parallel from the memory. The signal transmission device according to claim 1, further comprising n auxiliary data insertion units that insert auxiliary data including identification information and output the second divided image data to the n parallel serial conversion units. The read control unit is configured such that the write control unit writes the one frame of image data to the memory as the first divided image data for each line, and then the first divided image for each line from the memory. The signal transmission device according to claim 1 or 2, wherein data is read. First divisions each consisting of n first divided images from the first line until reaching the maximum number of lines of the one frame for every n lines from the first line of image data consisting of serially inputted image signals Writing image data into memory;
The n pieces of first divided image data written in the memory are sequentially read, and the read n pieces of first divided image data are divided for each line with a length in which one line is halved, Second divided image data composed of n second divided images obtained by alternately arranging vertical lines of the image data divided for each line are arranged for each of the n second divided images. Parallel output in order from the first line of the second divided image;
An image signal obtained by serial conversion of the n second divided image data read out from the memory and input in parallel is transmitted in either 3G HD-SDI format or HD-SDI dual link format. And outputting using a signal transmission method. N number of first divided images obtained by dividing one frame image composed of image signals serially input by using either 3G HD-SDI format or HD-SDI dual link format transmission standard. N serial / parallel conversion units for parallel-converting the first divided image data,
For each of the n first divided image data input in parallel, the odd lines and the even lines for each set adjacent to each other are combined as image data of one horizontal line, and the combined image data is combined with n pieces of image data. A write control unit for writing into the memory as n second divided image data composed of the second divided image;
The n pieces of second divided image data from the memory are used as one horizontal line included in one frame of image data, and the n second pieces of second divided image data in order from the first piece of second divided image data. A read control unit that outputs the image data of one frame read in accordance with the write timing written to the memory until the maximum number of lines is reached from the first line of the second divided image up to the divided image data of the second divided image And a signal receiving device. Further, identification information for identifying which of the n first divided images to be inserted into each of the n first divided image data input in parallel from the serial-parallel conversion unit is included. Provided with an auxiliary data reading unit for reading auxiliary data,
The signal receiving apparatus according to claim 5, wherein the write control unit identifies and writes the n first divided image data input in parallel to the memory based on the identification information. The read control unit writes the second divided image data that becomes the combined horizontal line into the memory for each line after the write control unit writes the second divided image data to the memory. The signal receiving device according to claim 5 or 6, wherein image data of a frame is read out. N number of first divided images obtained by dividing one frame image composed of image signals serially input by using either 3G HD-SDI format or HD-SDI dual link format transmission standard. Converting each of the first divided image data into parallel data;
For each of the n first divided image data input in parallel, the odd lines and the even lines for each set adjacent to each other are combined as image data of one horizontal line, and the combined image data is combined with n pieces of image data. Writing to the memory as n second divided image data comprising the second divided image;
The n pieces of second divided image data from the memory are used as one horizontal line included in one frame of image data, and the n second pieces of second divided image data in order from the first piece of second divided image data. The image data of one frame read from the memory is output in accordance with the write timing written to the memory until the maximum number of lines is reached from the first line of the second divided image until the divided image data of the second divided image is reached. And a signal receiving method. First divisions each consisting of n first divided images from the first line until reaching the maximum number of lines of the one frame for every n lines from the first line of image data consisting of serially inputted image signals A first write control unit for writing image data to a memory;
The n pieces of first divided image data written in the memory are sequentially read out, and the read out n pieces of first divided image data are divided for each line in a length in which one line is halved, Second divided image data composed of n second divided images obtained by alternately arranging vertical lines of the image data divided for each line are arranged for each of the n second divided images. A first readout control unit that outputs in parallel from the first line of the second divided image;
An image signal obtained by serially converting the n second divided image data read from the memory by the first read control unit and input in parallel is converted into 3G HD-SDI format or HD-SDI dual. A signal transmission device having n parallel-serial conversion units that output using any transmission standard of the link format;
The image signal is connected to each of the n parallel serial conversion units, and includes an image signal serially input from the parallel serial conversion unit using a transmission standard of either 3G HD-SDI format or HD-SDI dual link format. n serial / parallel converters that respectively convert n second divided image data into parallel data;
For each of the n second divided image data input in parallel, adjacent sets of odd lines and even lines are combined as image data of one horizontal line, and the combined image data is the n pieces of image data. A second writing control unit for writing to the memory as the first divided image data;
The n first divided image data from the memory are used as one horizontal line included in one frame of image data, and the n first first divided image data in order from the first first divided image data. A second read control unit that outputs the one frame of image data read in accordance with the write timing until the maximum number of lines from the first line of the first divided image is reached. A signal transmission system comprising: a signal receiving device.

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