JP2004064258A

JP2004064258A - High frequency receiver

Info

Publication number: JP2004064258A
Application number: JP2002217605A
Authority: JP
Inventors: Yasuo Oba; 大場　康雄; Tsunehiro Nakamura; 中村　恒博; Ippei Jinno; 神野　一平; Akira Fujishima; 藤島　明; Hiroaki Ozeki; 尾関　浩明
Original assignee: Matsushita Electric Industrial Co Ltd
Current assignee: Panasonic Holdings Corp
Priority date: 2002-07-26
Filing date: 2002-07-26
Publication date: 2004-02-26

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency receiver ensuring stabilized reception even under a strong electric field lowering power supply voltage and reducing power consumption. <P>SOLUTION: The high frequency receiver comprises a level detector circuit 8 for detecting the strength of a receiving electric field by comparing an AGC voltage with a specified voltage, and a tuning control section 10 for shifting the frequency by controlling an antenna tuning circuit 2 in the case of a strong electric field. Since the level of a high frequency signal being inputted to an RF amplification/AGC circuit 3 is lowered by shifting the tuning frequency, the RF amplification/AGC circuit is protected against saturation thus ensuring stabilized reception even in a strong electric field. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体集積回路に内蔵され、強電界中でも安定した受信が可能な高周波受信機に関する。
【０００２】
【従来の技術】
近年、デジタル放送受信等に使用される高周波受信機の大部分が半導体集積回路に内蔵されてきており、また、携帯電話、携帯情報端末の発達により放送受信機がこれらの機器にも内蔵されるようになってきている。このような状況下において、放送受信機用の半導体集積回路に要求される特性としては、小型化に加え、電池で動作するための低電源電圧化、および低消費電力化が必須の要件になってきている。
【０００３】
放送受信機の持つべき特性として低ＮＦ，低歪が要求されるが、一般に相反する特性を持ち、低ＮＦ化を図れば弱入力時の受信感度は上がるが強入力時の歪が悪化し、相互変調妨害等が発生することになり、また、逆に低歪化を図ればＮＦが悪化し、受信感度が低下する。これらの特性は受信機に使用する半導体素子と回路のダイナミックレンジで決まり、一般に電源電圧を上げ、消費電力を上げれば向上させることはできるが、半導体素子および回路のダイナミックレンジには限界があり、対策としては一般に低ＮＦ化を図り、強入力時にはＡＧＣによるゲインコントロールによりダイナミックレンジの拡大を図るのが普通である。
【０００４】
以下、このＡＧＣによるゲインコントロールによりダイナミックレンジの拡大を図った従来の高周波受信機について図面を参照しながら説明する。
【０００５】
図７は従来の高周波受信機の構成を示すブロック図、図８は従来の高周波受信機に用いられている同調回路の回路図である。この高周波受信機はアンテナ１、同調回路１３、ＲＦ増幅／ＡＧＣ回路３、混合器４、局部発振器５、中間周波増幅部６、ベースバンド信号処理部７、レベル検出回路８とで構成されており、次のように動作する。
【０００６】
即ち、アンテナ１で受信した高周波信号は同調回路１３で希望の放送局のゲインを最大にし、ＲＦ増幅／ＡＧＣ回路３で増幅、ゲインコントロールされ、混合器４で局部発振器５からの局部発振信号と混合されて中間周波信号に変換され、中間周波増幅部６で増幅されて、所定のベースバンド信号に変換される。このベースバンド信号はベースバンド信号処理部でアナログ放送であれば映像、音声信号に復調され、デジタル放送であればデジタル信号に変換される。ＲＦ増幅／ＡＧＣ回路は本来別の機能を有する回路であるが単一回路で双方の機能を有する場合もあるためひとつのブロックとして記載してある。
【０００７】
ここで、同調回路１３について動作を説明する。図８において、１４は高周波信号出力端子、１６はＡＧＣ電圧印加端子、Ｌ１，Ｃ１は同調回路を構成するインダクタおよび容量、Ｃ３はカップリング容量で受信高周波信号に対して十分にインピーダンスが低くなるように設定されている、１７は受信機のアンテナ入力回路の減衰器として多用されているＰＩＮダイオードで電流に応じて抵抗値が変化するものである。この同調回路の同調周波数は（数１）で表される。
【０００８】
【数１】
ｆ０＝１／（２π）／（Ｌ１×Ｃ１）^−０．５
図８において、高周波信号レベルが大きくない中、弱電界時にはアンテナ１に入力された高周波信号はインダクタＬ１および容量Ｃ１で構成された共振回路で希望周波数信号に対するゲインが最大となり受信機としての受信感度が最大となる。また、高周波信号レベルが大きくなる強電界時には、図７のＡＧＣ用レベル検出回路８が動作し、ＡＧＣ電圧が上がりＲ２を通してＰＩＮダイオード１７に電流が流れ、高周波信号出力端子１４とＧＮＤ間のインピーダンスを下げ、インダクタＬ１および容量Ｃ１で構成される共振回路のＱ（共振の先鋭度）を下げて高周波信号出力端子１４からＲＦ増幅／ＡＧＣ回路３に入る高周波信号レベルを下げ、ＲＦ増幅／ＡＧＣ回路３が飽和しないように動作させることによって安定した受信が行えるようになっている。
【０００９】
【発明が解決しようとする課題】
しかしながら、このような構成では、同調回路１３における高周波信号の減衰量を十分に確保しようとすると、ＰＩＮダイオード１７に十分電流を流す必要があり、通常この電流値は１０ｍＡ以上となって低消費電力化の大きな障害となる。また、電源電圧が低い場合には十分な動作ができない場合があり、強入力下で十分安定した受信ができないという問題点があった。
【００１０】
本発明は上記従来の問題を解決するものであり、強電界受信時においても安定した受信が可能で、しかも低電源電圧、低消費電力化が可能な高周波受信機を提供することを目的とする。
【００１１】
【課題を解決するための手段】
本発明の高周波受信機は、高周波信号を選択して受信する同調回路と、受信した高周波信号を増幅し、前記高周波信号が所定のレベル以上で、出力レベルを一定にするＡＧＣ回路と、前記ＡＧＣ回路の出力に局部発振信号を混合して中間周波信号に変換する混合器と、前記混合器の出力を増幅し、ベースバンド信号に変換する中間周波信号処理部と、前記中間周波信号処理部の出力を所定のアナログ信号またはデジタル信号に変換するベースバンド処理部と、前記混合器の出力を検波して前記ＡＧＣ回路にレベル検出出力を供給するレベル検出器と、前記レベル検出器のレベル検出出力が所定の電圧になったとき制御電圧を発生する比較器と、前記比較器の出力によって前記同調回路の同調周波数を変化させ、希望周波数でのゲインを変化させる同調制御部とを備えたものである。
【００１２】
この発明によれば、強電界受信時にアンテナの同調回路を切り替え、同調周波数をシフトさせることによりＲＦ増幅／ＡＧＣ回路に入力される高周波信号のレベルを下げることができ、ＲＦ増幅／ＡＧＣ回路の飽和を防ぐことが可能で、強電界でも安定した受信が可能であるばかりでなく、動作時の消費電力も最小限に押さえることが可能であり、電源電圧も下げることができる。
【００１３】
【発明の実施の形態】
以下、本発明の一実施の形態について図面を参照しながら説明する。なお、前記従来のものと同一の部分については同一符号を用いるものとする。
【００１４】
図１は本発明の高周波受信機の一実施の形態における構成を示すブロック図、図２は本発明の高周波受信機の一実施の形態におけるＡＧＣ電圧の変化とこれに伴う電界判定の説明図、図３は本発明の高周波受信機の一実施の形態における同調周波数シフトの説明図、図４は本発明の高周波受信機の一実施の形態において用いられている同調回路の回路図、図５は図４に示す同調回路におけるバリキャップの容量変化を示すグラフ、図６は本発明の高周波受信機の一実施の形態において隣接妨害局のある場合における同調周波数シフトの説明図である。
【００１５】
図１に示す高周波受信機はアンテナ１、同調回路２、ＲＦ増幅／ＡＧＣ回路３、混合器４、局部発振器５、中間周波増幅部６、ベースバンド信号処理部７、レベル検出回路８、比較器９、同調制御部１０とで構成され、次のように動作する。
【００１６】
即ち、アンテナ１で受信した高周波信号は同調回路２で希望の放送局のゲインを最大にし、ＲＦ増幅／ＡＧＣ回路３で増幅、ゲインコントロールされ、混合器４で局部発振器５からの局部発振信号と混合されて中間周波信号に変換され、中間周波増幅部６で増幅されて、所定のベースバンド信号に変換される。このベースバンド信号はベースバンド信号処理部７でアナログ放送であれば映像、音声信号に復調され、デジタル放送であればデジタル信号に変換される。
【００１７】
ここで、混合器４の出力をレベル検出器８に入力して高周波信号レベルを検出し、そのレベル検出出力１１（ＡＧＣ電圧）をＲＦ増幅／ＡＧＣ回路３に入力すると共に、比較器９に入力することにより、比較器９では所定の電圧とレベル検出出力１１を比較し、強電界と判定すれば強電界検出出力１２を出力する。同調制御部１０は強電界検出出力１２によって同調回路２を制御し、これがＲＦ増幅／ＡＧＣ回路３が飽和するような強電界である時は同調回路２の同調周波数をずらし、希望周波数のゲインを下げ、弱電界である時は同調回路２によって同調周波数を戻し、希望信号に対するゲインが最大となるように動作する。
【００１８】
次に、比較器９について図２を参照して説明する。図２（ａ）の横軸は高周波信号入力レベル（ＶＩ）、縦軸はＡＧＣ電圧となるレベル検出出力１１（ＶＡＧＣ）の例を示し、高周波信号入力レベル（ＶＩ）に対してＡＧＣ電圧の変化は特性カーブＡのようになる。また、図２（ｂ）の横軸は高周波入力レベル（ＶＩ）、縦軸は比較器出力電圧１２（ＶＣ）の例を示している。図２（ａ）においてレベル検出器８により検出された高周波信号レベル（ＶＩ）が低い状態（ＶＩ１）から高い状態（ＶＩ２）へ上がった場合、比較器９はＶＡＧＣとＶ２（この設定については後述）とを比較して図２（ｂ）の電圧特性Ｄのように入力レベルがＶ２以上で高レベルになる強電界検出出力を出力し、入力が高い状態から低い状態へ下がった場合、比較器９はＶＡＧＣの電圧をＶ１（この設定についても後述）と比較し図２（ｂ）の電圧特性Ｃのように入力レベルがＶ１以下で低レベルになるような強電界検出出力を出力する。このように、比較器出力電圧１２（ＶＣ）は図２（ｂ）のようにヒステリシスをもった特性を有するように設定される。
【００１９】
次に、図３を参照しながら、上記レベル検出出力１１（ＶＡＧＣ）Ｖ１，Ｖ２の設定について説明する。図３は横軸が周波数、縦軸は同調回路２の出力ゲインで、希望信号の周波数ｆ１に同調している時のゲインはＡ１、特性は同調カーブＦで表される。ｆ２は同調制御回路１０によって強入力時に同調周波数をずらした場合のゲインが最大となる周波数で、この周波数ｆ２に同調している時のゲインはＡ２、その時の特性は同調カーブＥで表される。｜ｆ２−ｆ１｜が周波数変化量になり、このように周波数をずらすことによるゲイン変化量はＡ１−Ａ２である。（ゲインについては通常比で表すが、便宜上振幅レベルはｄＢ表示を仮定しておりＡ１とＡ２の差として表示している）。
【００２０】
図２（ａ）におけるＶ１とＶ２の設定であるがレベル検出出力１１（ＶＡＧＣ）が飽和特性を示す入力レベルをＶＩ３とすると（数２）を満たすように設定する。ここで、ＶＩ１，ＶＩ２，ＶＩ３はＡ１，Ａ２と同様ｄＢ表示を仮定している。
【００２１】
【数２】
ＶＩ１＜ＶＩ２＜ＶＩ３
ＶＩ２−ＶＩ１＜Ａ１−Ａ２
ここで、同調回路２について図４を参照しながら、その動作を説明する。図４において１４は高周波信号出力端子、１５はＡＧＣ電圧印加端子でインダクタＬ１および容量Ｃ１，Ｃ２と、バリキャップダイオード１８の可変容量値Ｃｖｃにより共振回路を構成する。共振周波数は（数３）で表される。
【００２２】
【数３】
ｆ１＝１／（２π）／（Ｌ１×Ｃｘ）^−０．５
ここで、Ｃｘ＝Ｃ２×Ｃｖｃ／（Ｃ２＋Ｃｖｃ）＋Ｃ１である。
【００２３】
Ｒ１はアイソレーション用抵抗で容量Ｃ２，バリキャップダイオード１８の可変容量値Ｃｖｃのインピーダンスに比べて高い抵抗値に設定し、同調制御回路１０と同調回路２を高周波信号に対して分離する。バリキャップダイオード１８の可変容量値Ｃｖｃの値は端子１５への印加電圧で決まり図５に示すようなカーブを描く。ここで、強電界時、同調制御回路１０の出力電圧が高レベルになるように設定しておくと、バリキャップダイオード１８の可変容量値Ｃｖｃが下がり、（数３）で示される共振周波数が上がるため希望周波数でのゲインが下がり、ＲＦ増幅／ＡＧＣ回路３に入力される高周波信号レベルが下がるため強入力時でもＲＦ増幅／ＡＧＣ回路３が飽和することなく安定した受信が可能となる。また、弱入力時には同調制御回路１０の出力電圧が低レベルに下がるように設定しておくと、同調回路３のピーク周波数は希望周波数になりゲインが上がるため弱入力時にはゲイン最大で受信感度は最大になる。
【００２４】
以上のように構成された高周波受信機においては、アンテナ１から入力される高周波信号のレベルが低く図２（ｂ）のＶＩ２以下の場合にはＲＦ増幅／ＡＧＣ回路３が高周波信号によって飽和しないため通常の受信動作が行われ、高周波信号のレベルがＶＩ２よりも高くなりＶＩ３以上になった場合、上記の構成でない場合にはＲＦ増幅／ＡＧＣ回路３は飽和し正常な受信動作をしなくなるが、上記のように構成することにより、高周波信号の入力レベルがＶＩ２を超えた場合には比較器９が動作し、強入力検出電圧ＶＣを図２（ｂ）に示すように出力し、これを受けて同調制御部１０が同調回路２の同調周波数をシフトさせ、希望信号のゲインを下げ、ＲＦ増幅／ＡＧＣ回路３への高周波信号入力レベルをさげて、回路が飽和するのを防ぐため安定した受信が可能となる。
【００２５】
高周波信号入力レベルがＶＩ１以下になった場合には、比較器出力電圧は図２（ｂ）の電圧特性Ｃのように低レベルになるため、前記状態は解除され、同調回路２の同調周波数は希望信号の周波数にもどり正常な受信が可能となる。なお、このとき、高周波信号レベルの低下によりＡＧＣ電圧は図２（ａ）の特性カーブＢのようにシフトするが（数３）の関係があれば同調周波数の変化によるゲイン低下によって比較器電圧が高、低を繰り返す発振状態になることはない。また、この構成では、強入力時の周波数シフトはバリキャップダイオード１８の制御によって実施されるため、この動作による消費電力の増加は、切り替わり時に過渡的に電力が消費されるだけであるため低消費電力化が可能であり、周波数シフト量も受信する全帯域、たとえばテレビジョン信号の場合には９０ＭＨｚから７７０ＭＨｚに比べて大幅に小さくてもよいため、バリキャップ制御電圧も低い電圧でよく低電源電圧化が可能である。
【００２６】
次に、受信帯域内に強電界の隣接妨害局が存在する場合について説明する。図６に示すように周波数ｆ１，ベクトルＫの希望局に隣接して周波数ｆ２ベクトルＪの妨害局が存在している場合、この隣接妨害局の電波によりＲＦ増幅／ＡＧＣ回路３が飽和して正常な受信動作ができない場合があるが、このような場合には、同調制御部１０をマイクロプロセッサで制御することにより同調回路の特性を同調カーブＧから同調カーブＨのようにシフトさせることにより隣接妨害局の影響を避けることができる。すなわち、図２（ａ）に示す強電界判定出力を受けて、マイクロプロセッサにより制御電圧を同調周波数が希望周波数の上側または下側に位置するように（同調カーブＩ，同調カーブＨ）切替え、その時のＡＧＣ電圧の低下する周波数を選択して設定する動作をさせることにより隣接妨害局によるＲＦ増幅／ＡＧＣ回路３の飽和を防ぐことができ、安定した受信動作が可能となる。
【００２７】
以上のように、本実施の形態によれば、強電界受信時にアンテナの同調回路を切り替え、同調周波数をシフトさせることによりＲＦ増幅／ＡＧＣ回路に入力される高周波信号のレベルを下げることができるので、ＲＦ増幅／ＡＧＣ回路の飽和が防止され、強電界でも安定した受信が可能となる外、強電界入力時の周波数シフトはバリキャップダイオードの制御によって実施されるため、この動作による消費電力の増加は切り替わり時に過渡的に電力が消費されるだけであるため低消費電力化が可能であり、また、周波数シフト量も受信する全帯域に比べて大幅に小さくてもよいため、バリキャップ制御電圧も低い電圧でよく、低電源電圧化が可能である。
【００２８】
【発明の効果】
以上のように、本発明によれば、強電界受信時にアンテナの同調回路を切り替え、同調周波数をシフトさせることによりＲＦ増幅／ＡＧＣ回路に入力される高周波信号のレベルを下げることができるので、ＲＦ増幅／ＡＧＣ回路の飽和を防ぐことができ、強電界でも安定した受信が可能となる外、動作時の消費電力も最小限に押さえることが可能で電源電圧も下げることができるという有利な効果が得られる。
【図面の簡単な説明】
【図１】本発明の高周波受信機の一実施の形態における構成を示すブロック図
【図２】本発明の高周波受信機の一実施の形態におけるＡＧＣ電圧の変化とこれに伴う電界判定の説明図
【図３】本発明の高周波受信機の一実施の形態における同調周波数シフトの説明図
【図４】本発明の高周波受信機の一実施の形態において用いられている同調回路の回路図
【図５】図４に示す同調回路におけるバリキャップの容量変化を示すグラフ
【図６】本発明の高周波受信機の一実施の形態において隣接妨害局のある場合における同調周波数シフトの説明図
【図７】従来の高周波受信機の構成を示すブロック図
【図８】従来の高周波受信機に用いられている同調回路の回路図
【符号の説明】
１　アンテナ
２　同調回路
３　ＲＦ増幅／ＡＧＣ回路
４　混合器
５　局部発振器
６　中間周波増幅部
７　ベースバンド信号処理部
８　レベル検出回路
９　比較器
１０　同調制御部
１１　レベル検出出力
１２　強電界検出出力[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a high-frequency receiver built in a semiconductor integrated circuit and capable of performing stable reception even in a strong electric field.
[0002]
[Prior art]
In recent years, most of high-frequency receivers used for digital broadcast reception and the like have been built in semiconductor integrated circuits, and with the development of mobile phones and portable information terminals, broadcast receivers have also been built in these devices. It is becoming. Under these circumstances, as characteristics required for a semiconductor integrated circuit for a broadcast receiver, in addition to miniaturization, low power supply voltage and low power consumption for operation with a battery are indispensable requirements. Is coming.
[0003]
Low NF and low distortion are required as characteristics to be possessed by a broadcast receiver, but generally have contradictory characteristics. If the NF is reduced, the reception sensitivity at the time of weak input increases but the distortion at the time of strong input deteriorates. Intermodulation interference or the like occurs, and conversely, if the distortion is reduced, the NF deteriorates and the receiving sensitivity decreases. These characteristics are determined by the dynamic range of the semiconductor elements and circuits used in the receiver, and can generally be improved by increasing the power supply voltage and power consumption, but the dynamic range of the semiconductor elements and circuits is limited, As a countermeasure, it is common to reduce the NF, and to expand the dynamic range by controlling the gain by AGC when the input is strong.
[0004]
Hereinafter, a conventional high-frequency receiver in which the dynamic range is expanded by gain control by the AGC will be described with reference to the drawings.
[0005]
FIG. 7 is a block diagram showing the configuration of a conventional high-frequency receiver, and FIG. 8 is a circuit diagram of a tuning circuit used in the conventional high-frequency receiver. This high-frequency receiver includes an antenna 1, a tuning circuit 13, an RF amplification / AGC circuit 3, a mixer 4, a local oscillator 5, an intermediate frequency amplification unit 6, a baseband signal processing unit 7, and a level detection circuit 8. It operates as follows.
[0006]
That is, the high-frequency signal received by the antenna 1 maximizes the gain of the desired broadcasting station by the tuning circuit 13, is amplified and gain-controlled by the RF amplification / AGC circuit 3, and is mixed with the local oscillation signal from the local oscillator 5 by the mixer 4. The mixed signal is converted into an intermediate frequency signal, amplified by the intermediate frequency amplifier 6, and converted into a predetermined baseband signal. This baseband signal is demodulated into video and audio signals in the case of analog broadcasting by a baseband signal processing unit, and is converted into digital signals in the case of digital broadcasting. The RF amplification / AGC circuit is a circuit originally having different functions, but is described as one block because a single circuit may have both functions.
[0007]
Here, the operation of the tuning circuit 13 will be described. In FIG. 8, reference numeral 14 denotes a high-frequency signal output terminal, 16 denotes an AGC voltage application terminal, L1 and C1 denote inductors and capacitors constituting a tuning circuit, and C3 denotes a coupling capacitance, which has a sufficiently low impedance with respect to a received high-frequency signal. Reference numeral 17 denotes a PIN diode which is frequently used as an attenuator for an antenna input circuit of a receiver, and whose resistance value changes according to the current. The tuning frequency of this tuning circuit is represented by (Equation 1).
[0008]
(Equation 1)
f0 = 1 / (2π) / (L1 × C1) ^−0.5
In FIG. 8, while the level of the high-frequency signal is not large, when the electric field is weak, the high-frequency signal input to the antenna 1 has the maximum gain for the desired frequency signal in the resonance circuit including the inductor L1 and the capacitor C1, and the receiving sensitivity as a receiver is obtained. Is the largest. In a strong electric field where the high-frequency signal level increases, the AGC level detection circuit 8 of FIG. 7 operates, the AGC voltage rises, a current flows through the PIN diode 17 through R2, and the impedance between the high-frequency signal output terminal 14 and GND is reduced. The level of the high frequency signal entering the RF amplification / AGC circuit 3 from the high frequency signal output terminal 14 is lowered by lowering the Q (resonance sharpness) of the resonance circuit composed of the inductor L1 and the capacitor C1, thereby reducing the level of the RF amplification / AGC circuit 3. Is operated so as not to saturate so that stable reception can be performed.
[0009]
[Problems to be solved by the invention]
However, in such a configuration, it is necessary to supply a sufficient current to the PIN diode 17 in order to ensure a sufficient amount of attenuation of the high-frequency signal in the tuning circuit 13, and this current value is usually 10 mA or more and low power consumption is required. It is a major obstacle to the development. In addition, when the power supply voltage is low, sufficient operation may not be performed, and there is a problem that sufficiently stable reception cannot be performed under a strong input.
[0010]
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a high-frequency receiver that can perform stable reception even during reception of a strong electric field and that can reduce power supply voltage and power consumption. .
[0011]
[Means for Solving the Problems]
A high-frequency receiver according to the present invention includes a tuning circuit that selects and receives a high-frequency signal, an AGC circuit that amplifies the received high-frequency signal, and that keeps the output level constant when the high-frequency signal is equal to or higher than a predetermined level. A mixer that mixes the local oscillation signal with the output of the circuit and converts it to an intermediate frequency signal, an intermediate frequency signal processing unit that amplifies the output of the mixer and converts it to a baseband signal, A baseband processing unit for converting an output into a predetermined analog signal or a digital signal, a level detector for detecting an output of the mixer and supplying a level detection output to the AGC circuit, and a level detection output of the level detector A comparator that generates a control voltage when the voltage reaches a predetermined voltage, and a tuning frequency of the tuning circuit is changed by an output of the comparator to change a gain at a desired frequency. It is obtained by a that tuning control unit.
[0012]
According to the present invention, the level of the high-frequency signal input to the RF amplification / AGC circuit can be reduced by switching the tuning circuit of the antenna during reception of the strong electric field and shifting the tuning frequency, and the saturation of the RF amplification / AGC circuit can be achieved. , It is possible not only to perform stable reception even in a strong electric field, but also to minimize power consumption during operation and to reduce the power supply voltage.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that the same reference numerals are used for the same parts as those of the conventional one.
[0014]
FIG. 1 is a block diagram showing a configuration of a high-frequency receiver according to an embodiment of the present invention. FIG. 2 is an explanatory diagram of a change in an AGC voltage and an electric field determination accompanying the change in the AGC voltage according to an embodiment of the high-frequency receiver of the present invention. FIG. 3 is an explanatory diagram of a tuning frequency shift in one embodiment of the high frequency receiver of the present invention, FIG. 4 is a circuit diagram of a tuning circuit used in one embodiment of the high frequency receiver of the present invention, and FIG. FIG. 6 is a graph showing a change in capacitance of a varicap in the tuning circuit shown in FIG. 4. FIG. 6 is an explanatory diagram of a tuning frequency shift in a case where there is an adjacent interfering station in one embodiment of the high frequency receiver of the present invention.
[0015]
The high-frequency receiver shown in FIG. 1 includes an antenna 1, a tuning circuit 2, an RF amplification / AGC circuit 3, a mixer 4, a local oscillator 5, an intermediate frequency amplification unit 6, a baseband signal processing unit 7, a level detection circuit 8, and a comparator. 9, and a tuning control unit 10, which operates as follows.
[0016]
That is, the high-frequency signal received by the antenna 1 is maximized in the desired broadcast station by the tuning circuit 2, amplified and gain-controlled by the RF amplifier / AGC circuit 3, and mixed with the local oscillation signal from the local oscillator 5 by the mixer 4. The mixed signal is converted into an intermediate frequency signal, amplified by the intermediate frequency amplifier 6, and converted into a predetermined baseband signal. The baseband signal is demodulated by the baseband signal processing section 7 into video and audio signals in the case of analog broadcasting, and is converted into digital signals in the case of digital broadcasting.
[0017]
Here, the output of the mixer 4 is input to the level detector 8 to detect the high-frequency signal level, and the level detection output 11 (AGC voltage) is input to the RF amplification / AGC circuit 3 and to the comparator 9. By doing so, the comparator 9 compares the predetermined voltage with the level detection output 11 and outputs a strong electric field detection output 12 if it is determined that the electric field is strong. The tuning control unit 10 controls the tuning circuit 2 by the strong electric field detection output 12. When this is a strong electric field that saturates the RF amplification / AGC circuit 3, the tuning frequency of the tuning circuit 2 is shifted, and the gain of the desired frequency is adjusted. When the electric field is lowered and the electric field is weak, the tuning frequency is returned by the tuning circuit 2 so that the gain for the desired signal is maximized.
[0018]
Next, the comparator 9 will be described with reference to FIG. The horizontal axis of FIG. 2A shows an example of the high-frequency signal input level (VI), and the vertical axis shows an example of the level detection output 11 (VAGC) which becomes the AGC voltage. The change of the AGC voltage with respect to the high-frequency signal input level (VI) Becomes like a characteristic curve A. The horizontal axis in FIG. 2B shows an example of the high-frequency input level (VI), and the vertical axis shows an example of the comparator output voltage 12 (VC). When the high-frequency signal level (VI) detected by the level detector 8 in FIG. 2A rises from a low state (VI1) to a high state (VI2), the comparator 9 sets VAGC and V2 (this setting will be described later). And outputs a strong electric field detection output which becomes a high level when the input level is equal to or higher than V2 as shown in a voltage characteristic D of FIG. 2B. When the input falls from a high state to a low state, the comparator Numeral 9 compares the voltage of VAGC with V1 (this setting will also be described later) and outputs a strong electric field detection output such that the input level becomes lower than V1 as shown in the voltage characteristic C of FIG. As described above, the comparator output voltage 12 (VC) is set to have a characteristic having hysteresis as shown in FIG.
[0019]
Next, the setting of the level detection outputs 11 (VAGC) V1 and V2 will be described with reference to FIG. In FIG. 3, the horizontal axis represents the frequency, and the vertical axis represents the output gain of the tuning circuit 2. The gain when tuning to the frequency f1 of the desired signal is represented by A1, and the characteristic is represented by the tuning curve F. f2 is a frequency at which the gain becomes maximum when the tuning frequency is shifted by the tuning control circuit 10 at the time of a strong input. . | F2-f1 | is the amount of frequency change, and the amount of gain change by shifting the frequency in this manner is A1-A2. (The gain is usually expressed as a ratio, but for convenience, the amplitude level is assumed to be expressed in dB and is expressed as the difference between A1 and A2).
[0020]
The setting of V1 and V2 in FIG. 2A is made such that when the input level at which the level detection output 11 (VAGC) shows the saturation characteristic is VI3, (Expression 2) is satisfied. Here, VI1, VI2, and VI3 assume the same dB display as A1 and A2.
[0021]
(Equation 2)
VI1 <VI2 <VI3
VI2-VI1 <A1-A2
Here, the operation of the tuning circuit 2 will be described with reference to FIG. In FIG. 4, reference numeral 14 denotes a high-frequency signal output terminal, 15 denotes an AGC voltage application terminal, and a resonance circuit is constituted by the inductor L1, the capacitors C1, C2, and the variable capacitance value Cvc of the varicap diode 18. The resonance frequency is represented by (Equation 3).
[0022]
[Equation 3]
f1 = 1 / (2π) / (L1 × Cx) ^−0.5
Here, Cx = C2 × Cvc / (C2 + Cvc) + C1.
[0023]
R1 is a resistance for isolation, which is set to a resistance value higher than the impedance of the capacitance C2 and the variable capacitance value Cvc of the varicap diode 18, and separates the tuning control circuit 10 and the tuning circuit 2 from high frequency signals. The value of the variable capacitance value Cvc of the varicap diode 18 is determined by the voltage applied to the terminal 15 and draws a curve as shown in FIG. Here, when the output voltage of the tuning control circuit 10 is set to a high level at the time of a strong electric field, the variable capacitance value Cvc of the varicap diode 18 decreases, and the resonance frequency represented by (Equation 3) increases. Therefore, the gain at the desired frequency decreases, and the level of the high-frequency signal input to the RF amplification / AGC circuit 3 decreases, so that the RF amplification / AGC circuit 3 can perform stable reception without being saturated even during strong input. If the output voltage of the tuning control circuit 10 is set so as to decrease to a low level at a weak input, the peak frequency of the tuning circuit 3 becomes a desired frequency and the gain increases. become.
[0024]
In the high-frequency receiver configured as described above, when the level of the high-frequency signal input from the antenna 1 is low and is equal to or lower than VI2 in FIG. 2B, the RF amplification / AGC circuit 3 is not saturated by the high-frequency signal. When a normal reception operation is performed and the level of the high-frequency signal becomes higher than VI2 and becomes higher than VI3, otherwise, the RF amplification / AGC circuit 3 is saturated and does not perform a normal reception operation. With the above configuration, when the input level of the high-frequency signal exceeds VI2, the comparator 9 operates to output the strong input detection voltage VC as shown in FIG. The tuning control unit 10 shifts the tuning frequency of the tuning circuit 2 to lower the gain of the desired signal and lowers the input level of the high-frequency signal to the RF amplification / AGC circuit 3 to prevent the circuit from being saturated. Because stable reception is possible.
[0025]
When the high-frequency signal input level becomes equal to or lower than VI1, the comparator output voltage becomes low as shown by the voltage characteristic C in FIG. 2B, so that the state is released and the tuning frequency of the tuning circuit 2 becomes Return to the frequency of the desired signal enables normal reception. At this time, the AGC voltage shifts as shown by the characteristic curve B in FIG. 2A due to the decrease in the high-frequency signal level. The oscillation state does not repeatedly change between high and low. Further, in this configuration, since the frequency shift at the time of the strong input is performed by the control of the varicap diode 18, the increase in the power consumption due to this operation is low because the power is only transiently consumed at the time of switching. Since the power can be increased and the frequency shift amount can be significantly smaller than the entire band in which the signal is received, for example, from 90 MHz to 770 MHz in the case of a television signal, the varicap control voltage can be low and the power supply voltage can be low. Is possible.
[0026]
Next, a case where an adjacent interfering station having a strong electric field exists in the reception band will be described. As shown in FIG. 6, when there is an interfering station of the frequency f2 vector J adjacent to the desired station of the frequency f1 and the vector K, the radio wave of the adjacent interfering station saturates the RF amplifying / AGC circuit 3 and normalizes. However, in such a case, the tuning control unit 10 is controlled by a microprocessor to shift the characteristic of the tuning circuit from the tuning curve G to the tuning curve H, thereby causing the adjacent interference. The influence of stations can be avoided. That is, in response to the strong electric field determination output shown in FIG. 2A, the microprocessor switches the control voltage so that the tuning frequency is located above or below the desired frequency (tuning curve I and tuning curve H). By performing the operation of selecting and setting the frequency at which the AGC voltage decreases, the saturation of the RF amplification / AGC circuit 3 by the adjacent interfering station can be prevented, and a stable reception operation can be performed.
[0027]
As described above, according to the present embodiment, the level of the high-frequency signal input to the RF amplification / AGC circuit can be reduced by switching the tuning circuit of the antenna during reception of a strong electric field and shifting the tuning frequency. In addition to preventing the RF amplification / AGC circuit from being saturated and enabling stable reception even in a strong electric field, the frequency shift at the time of inputting a strong electric field is performed by control of a varicap diode. Since power is only transiently consumed at the time of switching, it is possible to reduce power consumption.In addition, since the amount of frequency shift may be significantly smaller than the entire band to be received, the varicap control voltage is also reduced. A low voltage is sufficient, and a low power supply voltage can be achieved.
[0028]
【The invention's effect】
As described above, according to the present invention, the level of the high-frequency signal input to the RF amplification / AGC circuit can be reduced by switching the tuning circuit of the antenna during reception of a strong electric field and shifting the tuning frequency. In addition to preventing saturation of the amplification / AGC circuit, stable reception is possible even in a strong electric field, power consumption during operation can be minimized, and the power supply voltage can be reduced. can get.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of an embodiment of a high-frequency receiver according to the present invention; FIG. 2 is an explanatory diagram of a change in an AGC voltage and an electric field determination accompanying the change in an AGC voltage according to an embodiment of the high-frequency receiver of the present invention; FIG. 3 is an explanatory diagram of a tuning frequency shift in one embodiment of the high-frequency receiver of the present invention. FIG. 4 is a circuit diagram of a tuning circuit used in one embodiment of the high-frequency receiver of the present invention. FIG. 6 is a graph showing a change in capacitance of a varicap in the tuning circuit shown in FIG. 4; FIG. 6 is an explanatory diagram of a tuning frequency shift when there is an adjacent interfering station in one embodiment of the high-frequency receiver according to the present invention; FIG. 8 is a block diagram showing the configuration of a high-frequency receiver according to the present invention. FIG. 8 is a circuit diagram of a tuning circuit used in a conventional high-frequency receiver.
REFERENCE SIGNS LIST 1 antenna 2 tuning circuit 3 RF amplification / AGC circuit 4 mixer 5 local oscillator 6 intermediate frequency amplification unit 7 baseband signal processing unit 8 level detection circuit 9 comparator 10 tuning control unit 11 level detection output 12 strong electric field detection output

Claims

A tuning circuit for selecting and receiving a high-frequency signal; an AGC circuit for amplifying the received high-frequency signal so that the high-frequency signal is equal to or higher than a predetermined level and keeping an output level constant; and a local oscillation signal output to the AGC circuit. A mixer for mixing and converting to an intermediate frequency signal, an intermediate frequency signal processing unit for amplifying the output of the mixer and converting it to a baseband signal, and a predetermined analog signal or digital signal for outputting the output of the intermediate frequency signal processing unit. A baseband processing unit that converts the signal into a signal, a level detector that detects an output of the mixer and supplies a level detection output to the AGC circuit, and when the level detection output of the level detector reaches a predetermined voltage. A comparator that generates a control voltage, and a tuning control unit that changes a tuning frequency of the tuning circuit by an output of the comparator and changes a gain at a desired frequency. RF receiver, characterized and.

The high-frequency receiver according to claim 1, wherein the tuning circuit includes a varicap diode.

The said comparator has a hysteresis with respect to the said level detection output, The width | variety of the said hysteresis is set larger than the level difference of the desired signal attenuated by operation | movement of the said tuning control part. 2. The high-frequency receiver according to 1.

2. The radio frequency receiver according to claim 1, wherein the tuning control unit is configured to select whether to increase or decrease the frequency of the tuning circuit according to a receiving station by a microprocessor.