JP2004063519A - Chemical vapor deposition method of group iii nitride semiconductor layer and group iii nitride semiconductor element - Google Patents

Chemical vapor deposition method of group iii nitride semiconductor layer and group iii nitride semiconductor element Download PDF

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JP2004063519A
JP2004063519A JP2002215978A JP2002215978A JP2004063519A JP 2004063519 A JP2004063519 A JP 2004063519A JP 2002215978 A JP2002215978 A JP 2002215978A JP 2002215978 A JP2002215978 A JP 2002215978A JP 2004063519 A JP2004063519 A JP 2004063519A
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boron
layer
vapor
nitride semiconductor
iii nitride
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JP3711966B2 (en
JP2004063519A5 (en
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Takashi Udagawa
宇田川 隆
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Resonac Holdings Corp
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Showa Denko KK
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a chemical vapor deposition method of boron phosphide semiconductor layer and group III nitride semiconductor layer for easily forming the group III nitride semiconductor layer having good crystalline property in order to form, with the vapor phase growth method, the gourp III nitride semiconductor layer on the boron phosphide layer provided on a silicon single crystal substrate. <P>SOLUTION: First, an amorphous layer including boron and phosphorus which has a function to relax lattice mismatch between silicon single crystal and boron phosphide crystal layer is formed with the vapor phase growth method on the surface of a silicon (Si) single crystal substrate. Thereafter, the boron phosphide crystal layer is formed with the vapor phase deposition method by varying the the concentration of boron atoms supplied from the vapor phase deposition region and the supply concentration ratio of phosphorus source to the boron source (V/III ratio) within the unit period. Moreover, the group III nitride semiconductor layer is also formed with the vapor phase deposition method at the temperature for suppressing thermal modification property of the boron phosphide crystal layer. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、珪素(Si)単結晶基板上にリン化硼素層を下地層として成長し、その上にガリウム(Ga)やインジウム(In)等の揮発性の高い構成成分を含むIII族窒化物半導体層を、好適に気相成長させるための方法とそれにより製造されたIII族窒化物半導体素子に関する。
【0002】
【従来の技術】
窒化アルミニウム・ガリウム・インジウム(AlGaIn1−X−YN:0≦X≦1、0≦Y≦1、0≦X+Y≦1)或いは窒化リン化ガリウム(GaN1−Z:0≦Z≦1)等のIII族窒化物半導体層は、近紫外帯光或いは短波長可視光を放射する例えば、発光ダイオード(LED)にあって、活性層(発光層)または障壁(クラッド)層等として利用されている(▲1▼特公昭55−3834号公報、及び▲2▼「III族窒化物半導体」((株)培風館、1999年12月8日発行初版)、241〜255頁参照)。また、例えば、高周波帯域で動作するショットキー(Schottky)接合型電界効果トランジスタ(MESFET)の活性(channel)層、スペーサ(spacer)層または電子供給層等として利用されている(上記の「III族窒化物半導体」、285〜294頁参照)。
【0003】
例えば、LEDやレーザダイオード(LD)等の発光素子を例にして説明すれば、オーミック(Ohmic)電極を簡便に配置できる利点から、最近では、導電性の珪素(Si)単結晶を基板として構成する例が知れている(Electron.Lett.,33(23)(1997)、1986〜1987頁参照)。しかしながら、珪素単結晶(シリコン)と例えば、窒化ガリウムとの格子のミスマッチ度は約17%の多きに達する(上記のElectron.Lett.,33(1997)参照)。この格子ミスマッチの緩和を目的として、従来技術に於いては、珪素単結晶基板上に設けたリン化硼素(BP)層を介して窒化ガリウム層を気相成長させる手段が採られている(「日本結晶成長学会誌」、Vol.26,No.2(1999)、29頁参照)。閃亜鉛鉱結晶型(zincblende)の立方晶のリン化硼素単結晶の格子定数は約0.454nmであるため(寺本 巌著、「半導体デバイス概論」((株)培風館、1995年3月30日発行初版)、28頁参照)、立方晶(cubic)の窒化ガリウムの格子定数(0.451nm)とで良好な格子整合性が得られることに依る。
【0004】
一方、リン化硼素と珪素単結晶との格子ミスマッチ度もこれまた約16%と大である(上記の「日本結晶成長学会誌」、Vol.26(1997)参照)。このため、珪素単結晶基板上へリン化硼素層を気相成長させるに際し、比較的低温で成膜したリン化硼素層と、より高温で成膜したリン化硼素結晶層とを重層させて構成した緩衝層を設ける技術手段が発明されている(米国特許6,069、021号参照)。特に、非晶質(amorphous)からなる比較的低温で気相成長させたリン化硼素層には、基板の珪素単結晶とリン化硼素結晶層との格子ミスマッチを緩和して、良質のリン化硼素結晶層をもたらす効果が唱われている(上記の米国特許6,069,021号参照)。また最近では、非晶質のリン化硼素層を安定して得るべく、気相堆積反応を起こさせる領域に供給する硼素源とリン源との濃度比率、所謂、V/III比率を好適な範囲に規定することを内容とする気相成長手段も提案されている。
【0005】
【発明が解決しようとする課題】
格子ミスマッチを緩和して、ミスフィット(misfit)転位等の結晶欠陥が少ないIII族窒化物半導体層をリン化硼素層上に堆積させるためには、V/III比率を好適な範囲に収納するに加え、他の条件を精密に規定する必要に迫られていた。本発明は、珪素単結晶基板上に設けられたリン化硼素層上にIII族窒化物半導体層を気相成長させるに際し、良好な結晶性のIII族窒化物半導体層を簡便にもたらすことが可能な、リン化硼素半導体層およびIII族窒化物半導体層の気相成長方法を提供する。さらに、本発明に係わる気相成長法に依り、珪素(Si)単結晶基板上にリン化硼素層を介して形成された、結晶性の良好なIII族窒化物半導体層を備えた半導体素子を提供する。
【0006】
【課題を解決するための手段】
即ち、本発明は、
(1)珪素(Si)単結晶基板の表面に、温度T(単位:℃)(但し、250℃≦T≦1200℃)で、気相成長領域に単位時間に供給する硼素源の濃度に対するリン源の濃度の比率(以下、V/III比率という。)を0.2以上で40以下の第1の比率とし、単位時間内に硼素源より供給される硼素原子の濃度を第1の濃度として、硼素(B)とリン(P)とを含む非晶質層を気相成長させる第1の工程と、
該非晶質層上に、温度T(単位:℃)(但し、750℃≦T≦1200℃)で、V/III比率を第1の比率以上の第2の比率とし、単位時間内に硼素源より供給される硼素原子の濃度を第1の濃度以下の第2の濃度として、リン化硼素(BP)結晶層を気相成長させる第2の工程と、
該リン化硼素結晶層上に、T以下かつ250℃以上の温度T(単位:℃)(但し、250℃≦T≦T)で、III族窒化物半導体層を気相成長させる第3の工程と、
を有することを特徴とするIII族窒化物半導体層の気相成長方法。
(2)前記非晶質層の層厚が、1nm以上で50nm以下であることを特徴とする上記(1)に記載のIII族窒化物半導体層の気相成長方法。
(3)前記第2の工程において、リン化硼素結晶層を、V/III比率を1.5×10以上で1×10以下の範囲として気相成長させることを特徴とする上記(1)または(2)に記載のIII族窒化物半導体層の気相成長方法。
(4)前記第2の工程においてリン化硼素(BP)結晶層を気相成長させる温度Tを、第1の工程において非晶質層を気相成長させる温度T以下の温度とすることを特徴とする上記(1)ないし(3)に記載のIII族窒化物半導体層の気相成長方法。
(5)前記第2の工程において供給される硼素原子の濃度である第2の濃度を、前記第1の工程において供給される硼素原子の濃度である第1の濃度に対して、1/30以上で1/5以下とすることを特徴とする上記(1)ないし(4)に記載のIII族窒化物半導体層の気相成長方法。
(6)前記第1の工程において供給される硼素原子の濃度である第1の濃度を、1×10−6モル(mol)/分以上で4×10−5モル/分以下とし、前記第2の工程において供給される硼素原子の濃度である第2の濃度を、3.3×10−8モル/分以上で8×10−6モル/分以下としたことを特徴とする上記(5)に記載のIII族窒化物半導体層の気相成長方法。
(7)前記第3の工程において、III族窒化物半導体層を、V/III比率を1×10〜5×10として気相成長させることを特徴とする上記(1)ないし(6)に記載のIII族窒化物半導体層の気相成長方法。
を提供する。
【0007】
また本発明は、
(8)上記(1)ないし(7)の何れか1項に記載のIII族窒化物半導体層の気相成長方法に依り、珪素(Si)単結晶基板の表面に、硼素(B)とリン(P)を含む非晶質層と、リン化硼素結晶層と、III族窒化物半導体層を順次気相成長させて製造したIII族窒化物半導体素子。
を提供する。
【0008】
【発明の実施の形態】
本発明に於いて珪素単結晶基板の表面に順次形成される、硼素(B)とリン(P)とを含む非晶質層、リン化硼素結晶層、並びにIII族窒化物半導体層は、ハロゲン(hologen)法、ハイドライド(hydride)法、分子線エピタキシャル(MBE)法、及び有機金属化学的気相堆積(MOCVD)法等の手段に依り気相成長させる。基板とする珪素単結晶の表面の結晶面は、{100}、{110}或いは{111}、或いはそれらのオフカット(off−cut)結晶面から構成されているのが好適である。本発明では先ず、250℃以上1200℃以下の温度Tに加熱された珪素結晶基板の表面上に、上記の気相成長手段を利用して、硼素とリンとを含む非晶質層を形成する。例えば、トリエチル硼素((CB)を硼素源とし、ホスフィン(PH)をリン源とする常圧(略大気圧)或いは減圧MOCVD法を利用して形成する。250℃未満の低温では、硼素源やリン源の熱分解が充分に進行しないため、非晶質層を安定して得るに至らない。一方、1200℃を超える高温での気相成長は、B13等の多量体のリン化硼素(J.Am.Ceramic Soc.,47(1)(1964)、44〜46頁参照)から成る多結晶層が得られ易くなり、硼素とリンとから成る非晶質層を安定して得るに好ましくは無くなる。
【0009】
硼素とリンとを含む非晶質の気相成長を妨害する二酸化珪素(SiO)等の酸化膜、或いは窒化珪素(Si)等の窒化膜を珪素結晶基板の表面に形成させないために、非晶質層は酸素(O)または窒素(N)を含まない雰囲気で気相成長させるのが適する。水素(H)雰囲気、或いは水素とアルゴン(Ar)等の単原子の不活性気体との混合雰囲気も好適に利用できる。硼素とリンとを含む非晶質層の層厚は、1ナノメータ(単位:nm)以上で50nm以下とするのが望ましい。1nm未満の極薄膜では、珪素結晶基板の表面を充分に且つ一様に被覆するに至らない。膜厚が50nmを超えると表面の平坦性に優れる非晶質層を安定して得られなくなる。更に、好適である非晶質層の膜厚は概して、5nm〜20nmである。非晶質層の膜厚は、気相成長領域への硼素源の供給時間を調整して制御する。非晶質層の膜厚は、例えば、透過電子顕微鏡(TEM)に依る断面TEM技法等で実測できる。また、電子線回折技法、或いはX線回折技法を利用すれば、非晶質層を構成する結晶の形態を調査できる。
【0010】
硼素とリンとを含む非晶質層を気相成長させるに際しては、気相堆積反応を実施する気相成長領域に単位時間に供給する硼素源の濃度に対するリン源の濃度の比率、所謂V/III比率を、0.2以上で40以下の第1の比率とするのが好適である。V/III比率とは、単位時間内に気相成長領域に供給される硼素源内の硼素原子の濃度に対するリン源内のリン原子の濃度の比率である。硼素またはリン原子をそれぞれ唯一含む硼素源またはリン源にあって、V/III比率は、単位時間内に供給する硼素源の流量に対するリン源の流量の比率で表せる。例えば、硼素源のトリエチル硼素((CB)を毎分0.03ccの流量で、また、リン源の濃度100%のホスフィン(PH)を毎分230ccの流量で供給した際のV/III比率は、約7.7×10と算出される。即ち、V/III比率は、気相成長領域へ供給する硼素源とリン源の流量を制御して調整する。硼素源或いはリン源の流量は、例えば、電子式質量流量計(MFC)を使用すれば、精密に制御できる。
【0011】
V/III比率を0.2以上で40以下の第1の比率に制御して気相成長した、上記の好適な範囲の層厚の非晶質層は、珪素単結晶との格子ミスマッチを緩和する作用を有し、ミスフィット転位等の結晶欠陥密度の小さい良質のリン化硼素結晶層をもたらすに貢献できる。さらに、V/III比率を上記の好適な範囲に収納しつつ、単位時間に於ける硼素源の気相成長領域への供給量を規定することにより、格子ミスマッチを緩和する作用を備えつつ、且つ表面の平坦性に優れる非晶質層を気相成長できる。例えば、1分間に気相成長領域に供給する硼素源の濃度は、1×10−6モル(mol)/分以上で4×10−5モル(mol)/分以下とするのが好ましい。非晶質層を形成する第1の工程において気相成長領域に供給される硼素源の濃度である第1の濃度を、1×10−6モル(mol)/分以上で4×10−5モル(mol)/分以下とすることに依り、表面の凹凸の最大の高低差を約1nmとする平坦な非晶質層を得ることができる。ここで、モル濃度は、温度25℃、圧力1気圧下に於いて、1モルの気体が占有する体積を24.46リットル(単位:l)として算出してある。4×10−5モル/分を超える割合で高濃度の硼素源を供給すると、半球状の凹凸が発生し、平坦な表面の非晶質層は得られ難くなる。一方、硼素源の供給量が1×10−5モル/分未満では、充分に連続性のある非晶質層を安定して形成出来なくなる難点がある。
【0012】
硼素とリンとを含む非晶質上には、上記の気相成長手段により、リン化硼素結晶層を気相成長させる。例えば、ジボラン(B)を硼素源とし、ホスフィン(PH)をリン源とするハイドライド手段に依り気相成長させる。リン化硼素結晶層を気相成長させる温度Tは、750℃以上1200℃以下の範囲とする。750℃未満の低温では、多結晶或いは非晶質のリン化硼素層が形成され易く、このため、単結晶のリン化硼素結晶層を得るに好適な温度とは成り難い。1200℃を超える高温では、B13の様な多量体のリン化硼素が形成され易くなるため好ましくはない。さらに、非晶質層が熱的に変性するのを回避するため、リン化硼素結晶層は、上記の温度範囲に於いて、特に非晶質層の成長温度以下で成長させるのが好ましい。リン化硼素結晶層の気相成長を、非晶質層を形成したと同一の気相成長装置を利用して、引き続き形成する手段は、省力的に簡便にリン化硼素結晶層を得る得策と成り得る。非晶質層の気相成長を終了した後、非晶質からのリンの揮散、逸脱を防止する目的でリン源を気相成長領域に供給しつつ、リン化硼素結晶層の気相成長の工程に移行できるからである。
【0013】
リン化硼素結晶層は、非晶質層を気相成長させる場合とは異なり、V/III比率を1.5×10以上で1×10以下の範囲として気相成長させる。単量体のリン化硼素(BP)結晶層を得るために、V/III比率を1×10を超える高比率とはしない。また、V/III比率を1.5×10未満の低比率とすると相対的に硼素が富裕な状況となるため、半球状の成長丘が密集した表面の平坦性に欠けるリン化硼素結晶層を帰結する不都合を生ずる。球状の硼素結晶体からなる硼素膜の表面の形態は、公開刊行物(J.Solid State Chem.,133(1997)、314〜321頁参照)から見て取れる。
【0014】
V/III比率をリン化硼素結晶層を気相成長させるに好適な範囲とするに加えて、本発明では特に、リン化硼素結晶層を気相成長させる第2の工程において、単位時間内に気相成長領域に供給される硼素原子の濃度である第2の濃度を、非晶質層を気相成長する第1の工程において供給される硼素原子の濃度である第1の濃度に対して、1/30以上で1/5以下として気相成長させる。具体的には、3.3×10−8モル(mol)/分以上で8×10−6モル/分以下とする。硼素原子の単位時間あたりの供給量を非晶質層の場合より減少させた第2の濃度として、リン化硼素結晶層の成長速度を低下させ、もって空洞(void)の発生を避け、緻密で且つ間隙の無い連続な単結晶層を得るためである。単位時間に供給する硼素原子の濃度は、気相成長領域に単位時間に供給する硼素源の流量を単純に減ずれば事足りる。
【0015】
リン化硼素結晶層の気相成長時には、不純物を意識的に添加するドーピング(doping)を施すこともできる。例えば、珪素(Si)、炭素(C)、錫(Sn)等の元素周期律の第IV族に属する元素を両性(amphoteric)不純物としてドーピングできる。また、亜鉛(Zn)或いはベリリウム(Be)等の第II族元素をp形不純物としてドーピングできる。リン化硼素結晶層を、非晶質層の気相成長温度T以下の温度Tで気相成長させると、添加した不純物が他の層へ熱的拡散や浸透するのを抑制するに効果を奏する。リン化硼素結晶層を気相成長させた後、不純物のイオンを注入する手段(イオン注入法)に依っても、リン化硼素層に不純物を添加できる。イオン注入法を利用すれば、導電性を付与する不純物に限らず、キャリア(担体)を電気的に補償(compensation)できる水素イオン(H;プロトン)をも添加できる。選択イオン注入法を利用して、リン化硼素結晶層の選択された領域に限定して不純物イオンを注入すれば、特定の領域に限って、キャリア濃度や抵抗率を変化させられる。
【0016】
一方で、上記の如く好適な温度、V/III比率、並びに単位時間あたりの硼素源の供給量をもって気相成長させたリン化硼素結晶層の内部には、そもそも硼素空孔またはリン空孔の関与したドナーまたはアクセプタが多量に存在している。このため、不純物を故意に添加しなくとも、アンドープ(undope)の状態でp形或いはn形の伝導性の導電性を得られる。アンドープの導電層は、ドーピングした不純物の拡散に因る他の層の伝導形の反転或いは低純度化を懸念することが無いため、例えば、発光素子を構成する障壁(クラッド)層等として有効に利用できる。
【0017】
リン化硼素結晶層上には、窒化ガリウム(GaN)等のIII族窒化物半導体層を気相成長させる。本発明に係わる非晶質層を下地層として気相成長させているため、リン化硼素結晶層は表面の平坦な結晶性に優れるものとなっている。良質のリン化硼素結晶層は、これまた結晶性に優れるIII族窒化物半導体層をもたらす作用を有する。III族窒化物半導体層は、上記の非晶質層及びリン化硼素結晶層と同じく気相成長法に依り形成できる。特に、非晶質層及びリン化硼素結晶層の気相成長に引き続き、同一の気相成長手段、気相成長装置を利用してIII族窒化物半導体層を成長させると、簡便にIII族窒化物半導体層を得ることができる。III族窒化物半導体層を気相成長させる温度Tを、リン化硼素結晶層の気相成長温度T以下とすると、下地層であるリン化硼素結晶層の熱的変性を抑制しつつ、良質のリン化硼素結晶層を気相成長できる。しかし、トリメチルガリウム((CHGa)等のガリウム(Ga)源やアンモニア(NH)等の窒素(N)源の熱分解させて、安定して成膜させるために、気相成長温度は最低でも250℃以上とする。III族窒化物半導体層を気相成長させる際のV/III比率は、リン化硼素結晶層を気相成長させる際の比率と同等とするか更に大に設定する。大凡、1×10〜5×10とするのが好適である
【0018】
本発明に係わる結晶性に優れるIII族窒化物半導体結晶層を利用すれば、高性能のIII族窒化物半導体素子を構成できる。例えば、上記の如くの温度条件をもって気相成長させたIII族窒化物半導体層を障壁(clad)層とし、その障壁層上に単一或いは多重量子井戸構造の発光層を設けることにより量子井戸構造のIII族窒化物半導体発光素子を構成できる。本発明に係わるIII族窒化物半導体層を下地層とすることで、その上に設ける量子井戸構造をなすバリア(barrier)層と井戸(well)層との接合界面は平坦とできる。従って、各井戸層につき略一定の量子準位が発現され、単色性に優れる発光をもたらす半導体発光素子を提供できる。また、例えば、高抵抗のリン化硼素結晶層上に気相成長させた高純度でn形の窒化ガリウム・インジウム混晶(GaIn1−XN:0≦X≦1)層をチャネル(channel)層として利用すれば、ショットキー(Schottky)接合型電界効果トランジスタ(MESFET)を構成できる。
【0019】
【実施例】
以下、MOCVD気相成長手段を用いて、珪素(Si)単結晶基板上に、硼素とリンとを含む非晶質層、リン化硼素(BP)結晶層、III族窒化物半導体層を順次形成した積層構造体から発光ダイオードを構成する場合を例にして、本発明の内容を具体的に説明する。
【0020】
LED1Aを構成するための積層構造体1Bの構造を図1の断面模式図に示す。基板101には、[110]結晶方向に角度にして2°傾斜した(111)−結晶面を表面とするp形の導電性のSi単結晶を使用した。Si単結晶基板101を、MOCVD気相成長装置の高純度グラファイト製の載置台(susceptor)上に載置した後、高周波誘導加熱方式により水素雰囲気中で、基板101の温度を室温より1025℃に昇温した。その後、トリエチル硼素((CB)を硼素源とし、ホスフィン(PH)をリン源とする常圧(略大気圧)MOCVD法に依り、硼素とリンとを含む非晶質層102を気相成長させた。硼素源は、高純度の水素ガス(H)で発泡(bubble)させてトリエチル硼素((CB)の蒸気を随伴する発泡用水素ガスを、毎分16リットルの流量の水素搬送(carrier)ガスに混合させて気相成長領域に供給した。非晶質層102を気相成長させる際の硼素源の単位時間(=1分間)あたりの供給量(本発明の第1の工程において供給される硼素原子の濃度である第1の濃度)は、2.0×10−5モル/分(1モルの気体の体積を24.46リットルとして算出した)とした。また、V/III比率(=PH/(CB)は16に設定した。非晶質層102の層厚は20nmとした。
【0021】
非晶質層102を形成した後、硼素源((CB)の蒸気を随伴する発泡用水素ガスの水素キャリアガスへの添加を一旦、停止した。その後、水素とホスフィンとの混合雰囲気内でSi単結晶基板101の温度を1025℃から850℃に降温させた。次に、再び硼素源の気相成長領域への供給を開始し、前記と同様のMOCVD手段により非晶質層102上に、アンドープでp形のリン化硼素結晶層103を気相成長させた。p形リン化硼素結晶層103を成長させる際に供給した単位時間(=1分間)あたりの硼素原子の供給量(本発明の第2の工程において供給される硼素原子の濃度である第2の濃度)は、2.2×10−6モル/分に設定した。この第2の濃度は1モルの気体の体積を24.46リットルとして計算した。またリン化硼素結晶層103は、V/III比率を1008として成長させた。p形リン化硼素結晶層103の室温でのキャリア濃度は約1×1019cm−3であり、層厚は約100nmとした。
【0022】
続いて、気相成長領域への硼素源及びリン源の供給を停止して、水素キャリアガスのみを流通させた状態で単結晶基板101の温度を800℃に低下させた。次に、アンモニアガス(NH)の気相成長領域への流通を開始した。然る後、水素とアンモニアとの混合雰囲気とした気相成長領域にガリウム(Ga)源としたトリメチルガリウム((CHGa)の蒸気を添加した。同時に、インジウム(In)源としてのトリメチルインジウム((CHIn)の蒸気を添加した。これより、p形リン化硼素結晶層103上に、n形窒化ガリウム・インジウム(Ga0.90In0.10N)半導体層104を堆積させた。n形窒化ガリウム・インジウム(Ga0.90In0.10N)半導体層を積層する際のV/III比率は1×10とした。n形窒化ガリウム・インジウム層104のキャリア濃度は、約6×1018cm−3とし、層厚は約30nmとした。
【0023】
上記のガリウム源及びインジウム源の気相成長領域への供給を停止して、窒化ガリウム・インジウム半導体層104の気相成長を終了した。併せて、アンモニアガスの気相成長領域への供給も停止した。次に、Si単結晶基板101を800℃に保持したままで、再度、上記の硼素源とリン源の気相成長領域への供給を始めて、n形リン化硼素結晶層105を気相成長させた。n形リン化硼素結晶層105の気相成長時に於ける単位時間あたりの硼素源の供給量は、p形リン化硼素結晶層103を形成した際の第2の濃度と同一の2.2×10−6モル/分とし、V/III比率(=PH/(CB)も1008とした。アンドープでn形のリン化硼素結晶層105のキャリア濃度は約2×1019cm−3とし、層厚は約300nmとした。硼素源とリン源の双方の気相成長領域への供給を停止してn形リン化硼素結晶層105の成長を終了した。
【0024】
p形リン化硼素結晶層103、n形リン化硼素結晶層105は、何れも室温での禁止帯幅として約3eVを有するため、窒化ガリウム・インジウム半導体層104からなる発光層に対するクラッド(clad)層として有効に利用できた。これより、p形リン化硼素結晶層103を下部クラッド層とし、n形窒化ガリウム・インジウム半導体層104を発光層とし、n形リン化硼素結晶層105を上部クラッド層とするダブルヘテロ(DH)接合構造の発光部を備えた積層構造体1Bを形成した。p形リン化硼素結晶層103は、非晶質層102の熱変性を抑制するために非晶質層102の成長温度以下の温度で気相成長させたため、平坦性と連続性に優れる下部クラッド層とすることができた。また、n形窒化ガリウム・インジウム半導体層104を、p形リン化硼素結晶層103よりも低温で気相成長させたため、p形リン化硼素結晶層103の熱変性を抑制しつつ、表面の平坦性に優れる連続膜からなる発光層を構成できた。また、Si単結晶基板101上に非晶質層102を介して気相成長させたp形リン化硼素結晶層103及び窒化ガリウム・インジウム半導体層104に存在する、Si単結晶基板101と非晶質層102との接合界面から伝搬したミスフィット転位の密度は、およそ1×10cm−2から1×10cm−2と推定された。
【0025】
積層構造体1Bの最表層をなすn形リン化硼素結晶層105の中央部には、同層105に接触する側を金・ゲルマニウム(Au・Ge)合金とした、Au・Ge/ニッケル(Ni)/Auの3層構造のn形オーミック電極106を設けた。結線用の台座(pad)電極を兼ねるn形オーミック電極106は、直径を約120μmとする円形の電極とした。p形Si単結晶基板101の裏面の略全面には、p形オーミック電極107としてアルミニウム(Al)電極を配置した。Al蒸着膜の膜厚は約2μmとした。これより、pn接合型DH構造のLED1Aを構成した。n形オーミック電極106とp形オーミック電極107との間に順方向に20ミリアンペア(mA)の動作電流を通流したところ、LED1Aから波長を約440nmとする青紫光が発せられた。一般的な積分球を利用して測定されるチップ(chip)状態での輝度は9ミリカンデラ(mcd)となり、高発光強度のLED1Aが提供された。また、窒化ガリウム・インジウム発光層とp形およびn形のリン化硼素結晶層からなる上下クラッド層との間に平坦な接合界面が形成されているのを反映して、順方向電流を20mAとした際の順方向電圧(Vf)を約3.1Vとし、逆方向電流を10μAとした際の逆方向電圧(Vr)を5.5V以上とする良好な整流特性を有するLED1Aが提供された。
【0026】
【発明の効果】
本発明では、珪素(Si)単結晶基板の表面に、先ず、珪素単結晶とリン化硼素結晶層との格子ミスマッチを緩和する作用を有する硼素とリンとを含む非晶質層を気相成長させた後、単位時間に気相成長領域より供給される硼素原子の濃度、並びに硼素源に対するリン源の供給濃度比率(V/III比率)を相違させて、リン化硼素結晶層を気相成長させ、更に、リン化硼素結晶層の熱変性を抑制できる温度でIII族窒化物半導体層を気相成長させることとしたので、熱変性の抑制された平坦な表面のリン化硼素半導体層上に、ミスフィット転位の密度が小さい結晶品質の良好なIII族窒化物半導体半導体層を気相成長させるに効果を上げられる。
【0027】
また、本発明に依れば、上記の如く結晶欠陥密度の小さな良質のIII族窒化物半導体層を利用して、例えば、平坦な接合界面を有するpn接合構造体を形成できるため、良好な整流特性を発現できる高輝度のIII族窒化物半導体発光素子等のIII族窒化物半導体素子を提供できる。
【図面の簡単な説明】
【図1】本発明の実施例に係るLEDの断面模式図である。
【符号の説明】
1A LED
1B 積層構造体
101 Si単結晶基板
102 硼素とリンとを含む非晶質層
103 p形リン化硼素結晶層
104 n窒化ガリウム・インジウム層
105 n形リン化硼素結晶層
106 n形オーミック電極
107 p形オーミック電極
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention provides a group III nitride including a boron (phosphide) layer grown on a silicon (Si) single crystal substrate as an underlayer, and a highly volatile component such as gallium (Ga) or indium (In) formed thereon. The present invention relates to a method for suitably vapor-phase growing a semiconductor layer and a group III nitride semiconductor device manufactured by the method.
[0002]
[Prior art]
Aluminum nitride, gallium, indium (Al X Ga Y In 1-XY N: 0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X + Y ≦ 1 or gallium nitride phosphide (GaN 1-Z P Z : 0 ≦ Z ≦ 1), for example, a light emitting diode (LED) that emits near-ultraviolet light or short-wavelength visible light, such as an active layer (light emitting layer) or a barrier (cladding). (1) Japanese Patent Publication No. 55-3834, and (2) "III-nitride semiconductor" (Baifukan Co., Ltd., first edition issued on December 8, 1999), 241-255. Page). In addition, for example, it is used as an active (channel) layer, a spacer (spacer) layer, an electron supply layer, or the like of a Schottky junction field effect transistor (MESFET) that operates in a high frequency band (the above-mentioned “Group III”). Nitride semiconductor ", pp. 285-294).
[0003]
For example, when a light emitting element such as an LED or a laser diode (LD) is described as an example, recently, a conductive silicon (Si) single crystal is used as a substrate because of an advantage that an ohmic electrode can be easily arranged. (See Electron. Lett., 33 (23) (1997), 1986-1987). However, the degree of lattice mismatch between silicon single crystal (silicon) and, for example, gallium nitride reaches as high as about 17% (see Electron. Lett., 33 (1997) above). In order to alleviate the lattice mismatch, the prior art employs a means for vapor-phase growing a gallium nitride layer via a boron phosphide (BP) layer provided on a silicon single crystal substrate (" 26, No. 2 (1999), p. 29). Since the lattice constant of a cubic boron phosphide single crystal of zincblende crystal type (zincblend) is about 0.454 nm (Iwao Teramoto, "Introduction to Semiconductor Devices", Baifukan Co., Ltd., March 30, 1995) First publication), p. 28), and good lattice matching is obtained with the lattice constant (0.451 nm) of cubic gallium nitride.
[0004]
On the other hand, the degree of lattice mismatch between boron phosphide and silicon single crystal is also as large as about 16% (refer to the above-mentioned "Journal of Japan Society for Crystal Growth", Vol. 26 (1997)). For this reason, when the boron phosphide layer is grown on a silicon single crystal substrate in a vapor phase, a boron phosphide layer formed at a relatively low temperature and a boron phosphide crystal layer formed at a higher temperature are laminated. Technical means for providing a buffer layer have been invented (see US Pat. No. 6,069,021). In particular, a boron phosphide layer made of amorphous (amorphous) which has been grown at a relatively low temperature in a vapor phase can reduce the lattice mismatch between the silicon single crystal and the boron phosphide crystal layer of the substrate to provide high quality phosphide. The effect of providing a boron crystal layer has been proposed (see the above-mentioned US Pat. No. 6,069,021). In recent years, in order to obtain an amorphous boron phosphide layer stably, the concentration ratio of the boron source and the phosphorus source supplied to the region where the vapor phase deposition reaction occurs, that is, the so-called V / III ratio, is set to a suitable range. There is also proposed a vapor phase growth means having a content defined in the following.
[0005]
[Problems to be solved by the invention]
In order to relax the lattice mismatch and deposit a group III nitride semiconductor layer having few crystal defects such as misfit dislocations on the boron phosphide layer, it is necessary to keep the V / III ratio within a suitable range. In addition, other conditions had to be precisely defined. The present invention can easily provide a group III nitride semiconductor layer having good crystallinity when a group III nitride semiconductor layer is vapor-phase grown on a boron phosphide layer provided on a silicon single crystal substrate. A method for vapor-phase growth of a boron phosphide semiconductor layer and a group III nitride semiconductor layer is provided. Further, according to the vapor deposition method according to the present invention, a semiconductor element having a group III nitride semiconductor layer having good crystallinity formed on a silicon (Si) single crystal substrate via a boron phosphide layer is provided. provide.
[0006]
[Means for Solving the Problems]
That is, the present invention
(1) The temperature T is applied to the surface of a silicon (Si) single crystal substrate. 1 (Unit: ° C) (However, 250 ° C ≤ T 1 .Ltoreq.1200.degree. C.), the first ratio of the concentration of the phosphorus source to the concentration of the boron source supplied to the vapor phase growth region per unit time (hereinafter referred to as V / III ratio) of 0.2 to 40. A first step of vapor-phase growing an amorphous layer containing boron (B) and phosphorus (P) with the concentration of boron atoms supplied from a boron source in a unit time as a first concentration;
On the amorphous layer, a temperature T 2 (Unit: ° C) (However, 750 ° C ≤ T 2 ≦ 1200 ° C.), the V / III ratio is a second ratio equal to or higher than the first ratio, and the concentration of boron atoms supplied from the boron source within a unit time is a second concentration equal to or lower than the first concentration. A second step of vapor-phase growing a boron phosphide (BP) crystal layer;
On the boron phosphide crystal layer, T 2 Below and temperature T above 250 ° C 3 (Unit: ° C) (However, 250 ° C ≤ T 3 ≤T 2 ), A third step of vapor-phase growing the group III nitride semiconductor layer;
A method for vapor-phase growing a group III nitride semiconductor layer, comprising:
(2) The method of (1) above, wherein the thickness of the amorphous layer is 1 nm or more and 50 nm or less.
(3) In the second step, the boron phosphide crystal layer has a V / III ratio of 1.5 × 10 2 1 x 10 4 The vapor phase growth method for a group III nitride semiconductor layer according to the above (1) or (2), wherein the vapor phase growth is performed in the following range.
(4) Temperature T at which the boron phosphide (BP) crystal layer is vapor-phase grown in the second step. 2 At the temperature T at which the amorphous layer is vapor-phase grown in the first step. 1 The method for vapor-phase growing a group III nitride semiconductor layer according to any one of the above (1) to (3), wherein the temperature is set as follows.
(5) The second concentration, which is the concentration of boron atoms supplied in the second step, is 1/30 of the first concentration, which is the concentration of boron atoms supplied in the first step. The method for vapor-phase growing a group III nitride semiconductor layer according to any one of the above (1) to (4), wherein the thickness is set to 1/5 or less.
(6) The first concentration, which is the concentration of boron atoms supplied in the first step, is 1 × 10 -6 4 × 10 at more than mol / min -5 Mol / min or less, and the second concentration, which is the concentration of boron atoms supplied in the second step, is 3.3 × 10 3 -8 8 × 10 over mol / min -6 (5) The vapor phase growth method of a group III nitride semiconductor layer according to the above (5), wherein the molar ratio is not more than mol / min.
(7) In the third step, the group III nitride semiconductor layer is formed such that the V / III ratio is 1 × 10 4 ~ 5 × 10 4 (1) to (6), wherein the group III nitride semiconductor layer is vapor-phase grown.
I will provide a.
[0007]
Also, the present invention
(8) According to the method of vapor-phase growing a group III nitride semiconductor layer according to any one of the above (1) to (7), boron (B) and phosphorus are added to the surface of the silicon (Si) single crystal substrate. A group III nitride semiconductor device manufactured by sequentially vapor-phase growing an amorphous layer containing (P), a boron phosphide crystal layer, and a group III nitride semiconductor layer.
I will provide a.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
In the present invention, the amorphous layer containing boron (B) and phosphorus (P), the boron phosphide crystal layer, and the group III nitride semiconductor layer, which are sequentially formed on the surface of the silicon single crystal substrate, are halogen. Vapor growth is performed by means such as a (hologen) method, a hydride method, a molecular beam epitaxy (MBE) method, and a metal organic chemical vapor deposition (MOCVD) method. The crystal plane of the surface of the silicon single crystal used as the substrate is preferably composed of {100}, {110}, or {111}, or an off-cut crystal plane thereof. In the present invention, first, a temperature T of not less than 250 ° C. and not more than 1200 ° C. 1 An amorphous layer containing boron and phosphorus is formed on the surface of the silicon crystal substrate heated by using the above-described vapor phase growth means. For example, triethyl boron ((C 2 H 5 ) 3 B) as a boron source and phosphine (PH 3 ) Is formed using a normal pressure (substantially atmospheric pressure) or a reduced pressure MOCVD method using a phosphorus source. At a low temperature of less than 250 ° C., thermal decomposition of a boron source or a phosphorus source does not sufficiently proceed, so that an amorphous layer cannot be stably obtained. On the other hand, vapor phase growth at a high temperature exceeding 1200 ° C. 13 P 2 Etc. (see J. Am. Ceramic Soc., 47 (1) (1964), pp. 44-46), and it is easy to obtain a polycrystalline layer composed of boron and phosphorus. It is not preferable to obtain a stable quality layer.
[0009]
Silicon dioxide (SiO 2) that interferes with the vapor phase growth of the amorphous phase containing boron and phosphorus 2 ) Or silicon nitride (Si 3 N 4 ), The amorphous layer is made of oxygen (O 2). 2 ) Or nitrogen (N 2 It is suitable to carry out vapor phase growth in an atmosphere containing no). Hydrogen (H 2 An atmosphere or a mixed atmosphere of hydrogen and a monoatomic inert gas such as argon (Ar) can also be suitably used. It is desirable that the thickness of the amorphous layer containing boron and phosphorus is not less than 1 nanometer (unit: nm) and not more than 50 nm. An ultrathin film having a thickness of less than 1 nm does not sufficiently and uniformly cover the surface of the silicon crystal substrate. When the thickness exceeds 50 nm, it becomes impossible to stably obtain an amorphous layer having excellent surface flatness. Furthermore, the preferred thickness of the amorphous layer is generally between 5 nm and 20 nm. The thickness of the amorphous layer is controlled by adjusting the supply time of the boron source to the vapor phase growth region. The thickness of the amorphous layer can be measured, for example, by a cross-sectional TEM technique using a transmission electron microscope (TEM). Further, by using an electron beam diffraction technique or an X-ray diffraction technique, it is possible to investigate the morphology of the crystals constituting the amorphous layer.
[0010]
When the amorphous layer containing boron and phosphorus is vapor-phase grown, the ratio of the concentration of the phosphorus source to the concentration of the boron source supplied per unit time to the vapor-phase growth region where the vapor-phase deposition reaction is performed, so-called V / It is preferable that the III ratio is a first ratio of 0.2 or more and 40 or less. The V / III ratio is the ratio of the concentration of phosphorus atoms in the phosphorus source to the concentration of boron atoms in the boron source supplied to the vapor phase growth region in a unit time. In a boron source or a phosphorus source containing only a boron or phosphorus atom, respectively, the V / III ratio can be represented by a ratio of a flow rate of a phosphorus source to a flow rate of a boron source supplied in a unit time. For example, the boron source triethylboron ((C 2 H 5 ) 3 B) at a flow rate of 0.03 cc / min and a phosphine (PH 3 ) Is supplied at a flow rate of 230 cc / min, the V / III ratio is about 7.7 × 10 3 Is calculated. That is, the V / III ratio is adjusted by controlling the flow rates of the boron source and the phosphorus source supplied to the vapor phase growth region. The flow rate of the boron source or the phosphorus source can be precisely controlled by using, for example, an electronic mass flow meter (MFC).
[0011]
The amorphous layer having a layer thickness in the above-mentioned preferred range, which is formed by vapor-phase growth while controlling the V / III ratio to a first ratio of 0.2 or more and 40 or less, reduces lattice mismatch with a silicon single crystal. And can contribute to providing a high-quality boron phosphide crystal layer having a low density of crystal defects such as misfit dislocations. Furthermore, by defining the supply amount of the boron source to the vapor-phase growth region per unit time while keeping the V / III ratio within the above-mentioned preferable range, it is possible to provide an effect of alleviating lattice mismatch, and An amorphous layer having excellent surface flatness can be vapor-phase grown. For example, the concentration of the boron source supplied to the vapor deposition region in one minute is 1 × 10 -6 4 × 10 at more than mol / min -5 It is preferable that the amount be not more than mol (mol) / min. The first concentration, which is the concentration of the boron source supplied to the vapor phase growth region in the first step of forming the amorphous layer, is set to 1 × 10 -6 4 × 10 at more than mol / min -5 By setting the concentration to not more than mol (mol) / min, a flat amorphous layer having a maximum difference in height of surface irregularities of about 1 nm can be obtained. Here, the molar concentration is calculated assuming that the volume occupied by 1 mol of gas at a temperature of 25 ° C. and a pressure of 1 atm is 24.46 liters (unit: l). 4 × 10 -5 When a high concentration boron source is supplied at a rate exceeding mol / min, hemispherical irregularities are generated and it becomes difficult to obtain an amorphous layer having a flat surface. On the other hand, when the supply amount of the boron source is 1 × 10 -5 If the amount is less than mol / min, there is a problem that a sufficiently continuous amorphous layer cannot be stably formed.
[0012]
On the amorphous material containing boron and phosphorus, a boron phosphide crystal layer is vapor-phase grown by the above-mentioned vapor-phase growth means. For example, diborane (B 2 H 6 ) As a boron source and phosphine (PH 3 ) Is vapor phase grown by hydride means using a phosphorus source. Temperature T for vapor-phase growth of boron phosphide crystal layer 2 Is in the range of 750 ° C. or more and 1200 ° C. or less. At a low temperature of less than 750 ° C., a polycrystalline or amorphous boron phosphide layer is easily formed, so that it is difficult to reach a temperature suitable for obtaining a single crystal boron phosphide crystal layer. At high temperatures above 1200 ° C, B 13 P 2 This is not preferred because a multimeric boron phosphide is easily formed. Furthermore, in order to avoid the amorphous layer being thermally denatured, it is preferable that the boron phosphide crystal layer be grown within the above-mentioned temperature range, particularly at a growth temperature of the amorphous layer or lower. The means for subsequently forming the vapor phase growth of the boron phosphide crystal layer by using the same vapor phase growth apparatus as that for forming the amorphous layer is a method of obtaining the boron phosphide crystal layer simply and labor-saving. Can be made. After the vapor phase growth of the amorphous layer is completed, a phosphorus source is supplied to the vapor phase growth region for the purpose of preventing the volatilization and deviation of phosphorus from the amorphous phase, and the vapor phase growth of the boron phosphide crystal layer is performed. This is because the process can be shifted to the process.
[0013]
The boron phosphide crystal layer has a V / III ratio of 1.5 × 10 2 1 x 10 4 The vapor phase growth is performed in the following range. In order to obtain a monomeric boron phosphide (BP) crystal layer, the V / III ratio is 1 × 10 4 Do not set the ratio higher than Further, the V / III ratio is set to 1.5 × 10 2 If the ratio is lower than the above, the situation becomes relatively rich in boron, which causes a disadvantage that a hemispherical growth hill results in a boron phosphide crystal layer lacking in flatness of a dense surface. The morphology of the surface of the boron film composed of a spherical boron crystal can be seen from a published publication (see J. Solid State Chem., 133 (1997), pp. 314 to 321).
[0014]
In addition to setting the V / III ratio in a range suitable for vapor-phase growth of the boron phosphide crystal layer, in the present invention, particularly, in the second step of vapor-phase growth of the boron phosphide crystal layer, The second concentration, which is the concentration of boron atoms supplied to the vapor phase growth region, is different from the first concentration, which is the concentration of boron atoms supplied in the first step of vapor phase growing the amorphous layer. , 1/30 or more and 1/5 or less. Specifically, 3.3 × 10 -8 8 × 10 at more than mol / min -6 Mol / min or less. By setting the supply amount of boron atoms per unit time to a second concentration lower than that in the case of the amorphous layer, the growth rate of the boron phosphide crystal layer is reduced, thereby avoiding the generation of voids and achieving a dense structure. In addition, it is for obtaining a continuous single crystal layer without a gap. The concentration of boron atoms supplied per unit time is sufficient if the flow rate of the boron source supplied per unit time to the vapor phase growth region is simply reduced.
[0015]
During the vapor phase growth of the boron phosphide crystal layer, doping for intentionally adding impurities can be performed. For example, an element belonging to Group IV of the periodic rule, such as silicon (Si), carbon (C), or tin (Sn), can be doped as an amphoteric impurity. Further, a group II element such as zinc (Zn) or beryllium (Be) can be doped as a p-type impurity. The boron phosphide crystal layer is changed to the vapor phase growth temperature T of the amorphous layer. 1 The following temperature T 2 The effect of suppressing vapor diffusion and permeation of the added impurity into other layers is obtained by performing the vapor phase growth. After vapor-growing the boron phosphide crystal layer, the impurity can also be added to the boron phosphide layer by means of ion implantation of impurities (ion implantation method). If the ion implantation method is used, not only impurities imparting conductivity, but also hydrogen ions (H) capable of electrically compensating a carrier can be used. + ; Protons). If the impurity ions are implanted only in a selected region of the boron phosphide crystal layer using the selective ion implantation method, the carrier concentration and the resistivity can be changed only in a specific region.
[0016]
On the other hand, as described above, the inside of the boron phosphide crystal layer grown at a suitable temperature, V / III ratio, and supply amount of the boron source per unit time contains boron vacancies or phosphorus vacancies in the first place. There is a large amount of donor or acceptor involved. Therefore, p-type or n-type conductivity can be obtained in an undoped state without intentionally adding impurities. Since the undoped conductive layer does not have to worry about inversion or lowering of the conductivity type of another layer due to diffusion of the doped impurity, it can be effectively used as, for example, a barrier (cladding) layer or the like constituting a light emitting element. Available.
[0017]
A group III nitride semiconductor layer such as gallium nitride (GaN) is vapor-phase grown on the boron phosphide crystal layer. Since the amorphous layer according to the present invention is vapor-phase grown as an underlayer, the boron phosphide crystal layer has excellent flat surface crystallinity. The high quality boron phosphide crystal layer has an effect of providing a group III nitride semiconductor layer having excellent crystallinity. The group III nitride semiconductor layer can be formed by a vapor phase growth method similarly to the above-mentioned amorphous layer and boron phosphide crystal layer. In particular, when the group III nitride semiconductor layer is grown using the same vapor phase growth means and vapor phase growth apparatus following the vapor phase growth of the amorphous layer and the boron phosphide crystal layer, the group III nitride An object semiconductor layer can be obtained. Temperature T at which group III nitride semiconductor layer is grown in vapor phase 3 With the vapor phase growth temperature T of the boron phosphide crystal layer. 2 In this case, a high-quality boron phosphide crystal layer can be grown in a vapor phase while suppressing thermal denaturation of the boron phosphide crystal layer as the underlayer. However, trimethylgallium ((CH 3 ) 3 Gallium (Ga) source such as Ga) or ammonia (NH) 3 In order to stably form a film by thermally decomposing a nitrogen (N) source such as), the vapor phase growth temperature is at least 250 ° C. or higher. The V / III ratio when the group III nitride semiconductor layer is vapor-phase grown is set to be equal to or larger than the ratio when the boron phosphide crystal layer is vapor-phase grown. Approx. 1 × 10 4 ~ 5 × 10 4 It is preferable to
[0018]
By using the group III nitride semiconductor crystal layer having excellent crystallinity according to the present invention, a high performance group III nitride semiconductor device can be formed. For example, a group III nitride semiconductor layer grown in a vapor phase under the above temperature conditions is used as a barrier layer, and a light emitting layer having a single or multiple quantum well structure is provided on the barrier layer. Can be formed. By using the group III nitride semiconductor layer according to the present invention as a base layer, a junction interface between a barrier layer and a well layer forming a quantum well structure provided thereon can be made flat. Therefore, a substantially constant quantum level is expressed in each well layer, and a semiconductor light emitting device that emits light with excellent monochromaticity can be provided. Also, for example, a high-purity n-type gallium-indium nitride mixed crystal (Ga) grown in vapor phase on a high-resistance boron phosphide crystal layer X In 1-X If the (N: 0 ≦ X ≦ 1) layer is used as a channel layer, a Schottky junction field effect transistor (MESFET) can be formed.
[0019]
【Example】
Hereinafter, an amorphous layer containing boron and phosphorus, a boron phosphide (BP) crystal layer, and a group III nitride semiconductor layer are sequentially formed on a silicon (Si) single crystal substrate using MOCVD vapor phase epitaxy. The content of the present invention will be specifically described by taking, as an example, a case where a light emitting diode is formed from the laminated structure.
[0020]
The structure of the laminated structure 1B for constituting the LED 1A is shown in a schematic sectional view of FIG. As the substrate 101, a p-type conductive Si single crystal having a (111) -crystal plane inclined by 2 ° with respect to the [110] crystal direction was used. After placing the Si single crystal substrate 101 on a high-purity graphite susceptor of a MOCVD vapor phase epitaxy apparatus, the temperature of the substrate 101 is reduced from room temperature to 1025 ° C. in a hydrogen atmosphere by a high frequency induction heating method. The temperature rose. Then, triethyl boron ((C 2 H 5 ) 3 B) as a boron source and phosphine (PH 3 The amorphous layer 102 containing boron and phosphorus was vapor-phase grown by a normal pressure (substantially atmospheric pressure) MOCVD method using) as a phosphorus source. The boron source is high-purity hydrogen gas (H 2 ) And bubbling with triethyl boron ((C 2 H 5 ) 3 The bubbling hydrogen gas accompanying the vapor of B) was mixed with a hydrogen carrier gas at a flow rate of 16 liters per minute and supplied to the vapor phase growth region. The supply amount of the boron source per unit time (= 1 minute) (first concentration which is the concentration of boron atoms supplied in the first step of the present invention) when the amorphous layer 102 is vapor-phase grown is , 2.0 × 10 -5 Mol / min (calculated assuming that the volume of one mole of gas was 24.46 liters). Also, the V / III ratio (= PH 3 / (C 2 H 5 ) 3 B) was set to 16. The layer thickness of the amorphous layer 102 was 20 nm.
[0021]
After forming the amorphous layer 102, a boron source ((C 2 H 5 ) 3 The addition of the hydrogen gas for bubbling accompanied with the vapor of B) to the hydrogen carrier gas was temporarily stopped. After that, the temperature of the Si single crystal substrate 101 was lowered from 1025 ° C. to 850 ° C. in a mixed atmosphere of hydrogen and phosphine. Next, the supply of the boron source to the vapor phase growth region was started again, and an undoped p-type boron phosphide crystal layer 103 was vapor-phase grown on the amorphous layer 102 by the same MOCVD means as described above. . The supply amount of boron atoms per unit time (= 1 minute) supplied when growing the p-type boron phosphide crystal layer 103 (the second concentration which is the concentration of boron atoms supplied in the second step of the present invention). Concentration) is 2.2 × 10 -6 It was set to mol / min. This second concentration was calculated with a volume of one mole of gas of 24.46 liters. The boron phosphide crystal layer 103 was grown with the V / III ratio being 1008. The carrier concentration of the p-type boron phosphide crystal layer 103 at room temperature is about 1 × 10 19 cm -3 And the layer thickness was about 100 nm.
[0022]
Subsequently, the supply of the boron source and the phosphorus source to the vapor phase growth region was stopped, and the temperature of the single crystal substrate 101 was reduced to 800 ° C. while only the hydrogen carrier gas was allowed to flow. Next, ammonia gas (NH 3 ) To the vapor phase growth area. Thereafter, trimethylgallium ((CH) as a gallium (Ga) source was introduced into the vapor phase growth region in which the atmosphere was a mixture of hydrogen and ammonia. 3 ) 3 Ga) vapor was added. At the same time, trimethylindium ((CH 3 ) 3 In) vapor was added. Thus, the n-type gallium indium nitride (Ga) is formed on the p-type boron phosphide crystal layer 103. 0.90 In 0.10 N) A semiconductor layer 104 was deposited. n-type gallium indium nitride (Ga 0.90 In 0.10 N) The V / III ratio when laminating semiconductor layers is 1 × 10 4 And The carrier concentration of the n-type gallium indium nitride layer 104 is about 6 × 10 18 cm -3 And the layer thickness was about 30 nm.
[0023]
The supply of the gallium source and the indium source to the vapor growth region was stopped, and the vapor growth of the gallium indium nitride semiconductor layer 104 was completed. At the same time, the supply of ammonia gas to the vapor phase growth region was also stopped. Next, while the Si single crystal substrate 101 is kept at 800 ° C., the supply of the above-mentioned boron source and phosphorus source to the vapor-phase growth region is started again, and the n-type boron phosphide crystal layer 105 is vapor-phase-grown. Was. The supply amount of the boron source per unit time during the vapor phase growth of the n-type boron phosphide crystal layer 105 is the same as the second concentration when the p-type boron phosphide crystal layer 103 was formed, that is, 2.2 ×. 10 -6 Mol / min and the V / III ratio (= PH 3 / (C 2 H 5 ) 3 B) was also set to 1008. The carrier concentration of the undoped n-type boron phosphide crystal layer 105 is about 2 × 10 19 cm -3 And the layer thickness was about 300 nm. The supply of both the boron source and the phosphorus source to the vapor phase growth region was stopped to terminate the growth of the n-type boron phosphide crystal layer 105.
[0024]
Since both the p-type boron phosphide crystal layer 103 and the n-type boron phosphide crystal layer 105 have a band gap of about 3 eV at room temperature, a clad for the light emitting layer composed of the gallium-indium nitride semiconductor layer 104 is formed. It could be used effectively as a layer. Thus, a double hetero (DH) having the p-type boron phosphide crystal layer 103 as a lower cladding layer, the n-type gallium indium nitride semiconductor layer 104 as a light emitting layer, and the n-type boron phosphide crystal layer 105 as an upper cladding layer. A laminated structure 1B provided with a light emitting portion having a joint structure was formed. Since the p-type boron phosphide crystal layer 103 was vapor-phase grown at a temperature equal to or lower than the growth temperature of the amorphous layer 102 in order to suppress thermal denaturation of the amorphous layer 102, the lower cladding having excellent flatness and continuity was obtained. Could be a layer. Further, since the n-type gallium-indium nitride semiconductor layer 104 is vapor-phase grown at a lower temperature than the p-type boron phosphide crystal layer 103, the surface of the p-type boron phosphide crystal layer 103 is flattened while suppressing thermal denaturation. Thus, a light emitting layer composed of a continuous film having excellent properties was formed. Further, the amorphous silicon layer 103 and the p-type boron phosphide crystal layer 103 and the gallium / indium nitride semiconductor layer 104 which are grown on the silicon single crystal substrate 101 via the amorphous layer 102 are amorphous. The density of misfit dislocations propagated from the bonding interface with the porous layer 102 is about 1 × 10 3 cm -2 From 1 × 10 4 cm -2 It was estimated.
[0025]
In the center of the n-type boron phosphide crystal layer 105, which is the outermost layer of the laminated structure 1B, Au.Ge/nickel (Ni) in which the side in contact with the layer 105 is made of a gold-germanium (Au.Ge) alloy ) / Au n-type ohmic electrode 106 having a three-layer structure was provided. The n-type ohmic electrode 106 also serving as a pedestal (pad) electrode for connection was a circular electrode having a diameter of about 120 μm. An aluminum (Al) electrode was disposed as a p-type ohmic electrode 107 on substantially the entire back surface of the p-type Si single crystal substrate 101. The thickness of the deposited Al film was about 2 μm. Thus, an LED 1A having a pn junction type DH structure was formed. When an operating current of 20 milliamperes (mA) was passed between the n-type ohmic electrode 106 and the p-type ohmic electrode 107 in the forward direction, the LED 1A emitted blue-violet light having a wavelength of about 440 nm. The luminance in a chip state measured using a general integrating sphere was 9 millicandela (mcd), and the LED 1A with high light emission intensity was provided. The forward current was set to 20 mA, reflecting that a flat junction interface was formed between the gallium indium nitride light emitting layer and the upper and lower clad layers composed of p-type and n-type boron phosphide crystal layers. The LED 1A having good rectification characteristics in which the forward voltage (Vf) at this time is about 3.1 V and the reverse voltage (Vr) at 5.5 μV or more when the reverse current is 10 μA is provided.
[0026]
【The invention's effect】
In the present invention, first, an amorphous layer containing boron and phosphorus having an action of relaxing lattice mismatch between a silicon single crystal and a boron phosphide crystal layer is vapor-phase grown on the surface of a silicon (Si) single crystal substrate. After that, the concentration of boron atoms supplied from the vapor phase growth region per unit time and the ratio of the supply concentration of the phosphorus source to the boron source (V / III ratio) are varied to vapor-grow the boron phosphide crystal layer. Further, since the group III nitride semiconductor layer is vapor-phase grown at a temperature at which the thermal denaturation of the boron phosphide crystal layer can be suppressed, a flat surface of the boron phosphide semiconductor layer with the thermal denaturation suppressed is formed on the boron phosphide semiconductor layer. In addition, the effect of growing a group III nitride semiconductor semiconductor layer having a low misfit dislocation density and a good crystal quality can be enhanced.
[0027]
Further, according to the present invention, for example, a pn junction structure having a flat junction interface can be formed by using a good quality group III nitride semiconductor layer having a small crystal defect density as described above, so that good rectification can be achieved. It is possible to provide a group III nitride semiconductor device such as a group III nitride semiconductor light emitting device with high luminance that can exhibit characteristics.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view of an LED according to an embodiment of the present invention.
[Explanation of symbols]
1A LED
1B laminated structure
101 Si single crystal substrate
102 Amorphous layer containing boron and phosphorus
103 p-type boron phosphide crystal layer
104n gallium indium nitride layer
105 n-type boron phosphide crystal layer
106 n-type ohmic electrode
107 p-type ohmic electrode

Claims (8)

珪素(Si)単結晶基板の表面に、温度T(単位:℃)(但し、250℃≦T≦1200℃)で、気相成長領域に単位時間に供給する硼素源の濃度に対するリン源の濃度の比率(以下、V/III比率という。)を0.2以上で40以下の第1の比率とし、単位時間内に硼素源より供給される硼素原子の濃度を第1の濃度として、硼素(B)とリン(P)とを含む非晶質層を気相成長させる第1の工程と、
該非晶質層上に、温度T(単位:℃)(但し、750℃≦T≦1200℃)で、V/III比率を第1の比率以上の第2の比率とし、単位時間内に硼素源より供給される硼素原子の濃度を第1の濃度以下の第2の濃度として、リン化硼素(BP)結晶層を気相成長させる第2の工程と、
該リン化硼素結晶層上に、T以下かつ250℃以上の温度T(単位:℃)(但し、250℃≦T≦T)で、III族窒化物半導体層を気相成長させる第3の工程と、
を有することを特徴とするIII族窒化物半導体層の気相成長方法。
A phosphorus source with respect to a concentration of a boron source supplied per unit time to a vapor phase growth region at a temperature T 1 (unit: ° C.) (250 ° C. ≦ T 1 ≦ 1200 ° C.) on the surface of a silicon (Si) single crystal substrate. Is defined as a first ratio of not less than 0.2 and not more than 40, and the concentration of boron atoms supplied from a boron source within a unit time is defined as a first concentration. A first step of vapor-phase growing an amorphous layer containing boron (B) and phosphorus (P);
On the amorphous layer, at a temperature T 2 (unit: ° C.) (provided that 750 ° C. ≦ T 2 ≦ 1200 ° C.), the V / III ratio is set to a second ratio equal to or more than the first ratio, and within a unit time. A second step in which the concentration of boron atoms supplied from the boron source is set to a second concentration equal to or lower than the first concentration, and a boron phosphide (BP) crystal layer is vapor-phase grown;
A group III nitride semiconductor layer is vapor-phase grown on the boron phosphide crystal layer at a temperature T 3 (unit: ° C.) of T 2 or less and 250 ° C. or more (250 ° C. ≦ T 3 ≦ T 2 ). A third step;
A method for vapor-phase growing a group III nitride semiconductor layer, comprising:
前記非晶質層の層厚が、1nm以上で50nm以下であることを特徴とする請求項1に記載のIII族窒化物半導体層の気相成長方法。2. The method according to claim 1, wherein the thickness of the amorphous layer is 1 nm or more and 50 nm or less. 前記第2の工程において、リン化硼素結晶層を、V/III比率を1.5×10以上で1×10以下の範囲として気相成長させることを特徴とする請求項1または2に記載のIII族窒化物半導体層の気相成長方法。3. The method according to claim 1, wherein, in the second step, the boron phosphide crystal layer is vapor-phase grown with a V / III ratio in a range from 1.5 × 10 2 to 1 × 10 4. The method for vapor-phase growth of a group III nitride semiconductor layer according to the above. 前記第2の工程においてリン化硼素(BP)結晶層を気相成長させる温度Tを、第1の工程において非晶質層を気相成長させる温度T以下の温度とすることを特徴とする請求項1ないし3に記載のIII族窒化物半導体層の気相成長方法。And wherein the boron phosphide (BP) crystal layer temperature T 2 which is grown in vapor phase in a second step, the amorphous layer and the temperature T 1 of a temperature below the vapor phase growth in the first step The method for vapor-phase growing a group III nitride semiconductor layer according to claim 1. 前記第2の工程において供給される硼素原子の濃度である第2の濃度を、前記第1の工程において供給される硼素原子の濃度である第1の濃度に対して、1/30以上で1/5以下とすることを特徴とする請求項1ないし4に記載のIII族窒化物半導体層の気相成長方法。The second concentration, which is the concentration of boron atoms supplied in the second step, is 1/30 or more of the first concentration, which is the concentration of boron atoms supplied in the first step. 5. The method for vapor-phase growth of a group III nitride semiconductor layer according to claim 1, wherein the thickness is not more than / 5. 前記第1の工程において供給される硼素原子の濃度である第1の濃度を、1×10−6モル(mol)/分以上で4×10−5モル/分以下とし、前記第2の工程において供給される硼素原子の濃度である第2の濃度を、3.3×10−8モル/分以上で8×10−6モル/分以下としたことを特徴とする請求項5に記載のIII族窒化物半導体層の気相成長方法。The first concentration, which is the concentration of boron atoms supplied in the first step, is set to 1 × 10 −6 mol (mol) / min or more and 4 × 10 −5 mol / min or less; 6. The method according to claim 5, wherein the second concentration, which is the concentration of the boron atom supplied in the step (a), is not less than 3.3 × 10 −8 mol / min and not more than 8 × 10 −6 mol / min. A vapor phase growth method for a group III nitride semiconductor layer. 前記第3の工程において、III族窒化物半導体層を、V/III比率を1×10〜5×10として気相成長させることを特徴とする請求項1ないし6に記載のIII族窒化物半導体層の気相成長方法。7. The group III nitride according to claim 1, wherein, in the third step, the group III nitride semiconductor layer is vapor-phase grown with a V / III ratio of 1 × 10 4 to 5 × 10 4. For growing a semiconductor layer. 請求項1ないし7の何れか1項に記載のIII族窒化物半導体層の気相成長方法に依り、珪素(Si)単結晶基板の表面に、硼素(B)とリン(P)を含む非晶質層と、リン化硼素結晶層と、III族窒化物半導体層を順次気相成長させて製造したIII族窒化物半導体素子。The method for vapor-phase growing a group III nitride semiconductor layer according to any one of claims 1 to 7, wherein the surface of the silicon (Si) single crystal substrate contains boron (B) and phosphorus (P). A group III nitride semiconductor device manufactured by sequentially vapor-phase growing a crystalline layer, a boron phosphide crystal layer, and a group III nitride semiconductor layer.
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JP2005354047A (en) * 2004-05-12 2005-12-22 Showa Denko Kk Chemical compound semiconductor laminate structure, method of forming the same and light-emitting device using the same
JP2006303418A (en) * 2005-03-25 2006-11-02 Doshisha Laminated structure, its formation method, and semiconductor element
JP2014049461A (en) * 2012-08-29 2014-03-17 Nitto Koki Kk METHOD OF MANUFACTURING GaN-BASED CRYSTAL AND SEMICONDUCTOR ELEMENT

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005354047A (en) * 2004-05-12 2005-12-22 Showa Denko Kk Chemical compound semiconductor laminate structure, method of forming the same and light-emitting device using the same
JP2006303418A (en) * 2005-03-25 2006-11-02 Doshisha Laminated structure, its formation method, and semiconductor element
JP2014049461A (en) * 2012-08-29 2014-03-17 Nitto Koki Kk METHOD OF MANUFACTURING GaN-BASED CRYSTAL AND SEMICONDUCTOR ELEMENT
US9595632B2 (en) 2012-08-29 2017-03-14 Nitto Optical Co., Ltd. Method for producing GaN-based crystal and semiconductor device

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