JP2004059716A - High-dielectric-constant composite material composition, dielectric transfer sheet, multilayer circuit board having built-in passive element and method for producing the multilayer circuit board - Google Patents

High-dielectric-constant composite material composition, dielectric transfer sheet, multilayer circuit board having built-in passive element and method for producing the multilayer circuit board Download PDF

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JP2004059716A
JP2004059716A JP2002219241A JP2002219241A JP2004059716A JP 2004059716 A JP2004059716 A JP 2004059716A JP 2002219241 A JP2002219241 A JP 2002219241A JP 2002219241 A JP2002219241 A JP 2002219241A JP 2004059716 A JP2004059716 A JP 2004059716A
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dielectric
circuit board
pattern
composite material
multilayer circuit
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JP4010202B2 (en
Inventor
Masahisa Tonegawa
利根川 雅久
Kenji Kawamoto
河本 憲治
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Toppan Inc
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Toppan Printing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To obtain a high-dielectric-constant composite material composition for obtaining a capacitor element having high volume precision and reduced dispersion, a dielectric transfer sheet, a multilayer circuit board having a built-in passive element and to provide a method for producing the multilayer circuit board. <P>SOLUTION: The multilayer circuit board 100 having the built-in capacitor element is obtained by forming a dielectric pattern 51p by a pattern transfer using a dielectric transfer sheet on a lower electrode 41c for a capacitor of a circuit board 20 equipped with first wiring patterns 21a, first wiring patterns 21b, insulating layers 31, second wiring patterns 41a, second wiring patterns 41b and the lower electrode 41c for the capacitor on both sides of an insulating substrate 11, and forming an upper electrode 61a for the capacitor on the dielectric pattern 51p. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は高誘電率複合材料組成物、誘電体転写シート、多層回路板及びその製造方法に関し、さらに詳しくは高誘電率複合材料組成物からなる誘電体転写シートを作製し、誘電体転写シートを回路基板上にパターン転写して誘電体パターンを形成し、キャパシタ素子内蔵の多層回路板及びその製造方法に関する。
【0002】
【従来の技術】
電子機器の小型化、高密度化、高性能化が進んでいる中で、そこに用いられる多層回路板も小型化、高密度化、高速化の要求が高まっており、それらの要求を満たした多層回路板が求められている。
多層回路板は、回路基板(内層基板)とプリプレグシートを積層して、配線パターン、ビアホールを形成して多層回路板を形成していく方式から、回路基板(内層基板)上に絶縁層、配線回路パターンを交互に積み上げていくビルドアップ方式の多層回路板へと移行しつつある。
【0003】
近年、電子機器の高性能化に伴い、信号伝達速度の高速化が進められているが、これによって電気的雑音が増大することが問題になっている。この課題を解決するために、回路板上にデカップリング用のキャパシタを設ける等の措置がとられている。
また、電子機器の高密度化、高性能化を図るために、回路部品であるキャパシタ、インダクタ、抵抗等の受動素子を内蔵した多層回路板の開発が行われている。
【0004】
従来のキャパシタ素子を内蔵した多層回路板の一例を図6に示す。
キャパシタ素子内蔵の多層回路板の作製法は、絶縁基材11の両面に第1配線パターン21a及び第1配線パターン21bが形成された回路基板(内層基板)に絶縁層31を介してキャパシタ用下部電極41c、第2配線パターン41a及び第2配線パターン41bが形成された多層回路板20を作製し、キャパシタ用下部電極41c及び絶縁層31上に誘電材を混入した樹脂溶液をコーティングする方法、またはBステージ状誘電体シートをラミネートする方法等で誘電体層52を形成し、表面を研磨し、キャパシタ用上部電極62を形成してキャパシタ素子を形成し、キャパシタ素子内蔵の多層回路板を作製するというものであった。
ここで、上記Bステージ状とは、加熱、加圧することにより、他の層との接着、硬化が行える半硬化状態を言う。
【0005】
キャパシタ素子の容量は、面積に比例し、電極間距離に反比例するので、小面積で高容量のキャパシタ素子を得るためには、薄くて、均一な膜を有する高誘電率の誘電体層を如何に形成するかにある。
上記誘電材を混入した樹脂溶液をコーティングする方法、またはBステージ状誘電体シートをラミネートする方法等では膜厚の均一性、もしくは高誘電率で下部電極、絶縁基材との接着性を兼ね備えた誘電体層を得るのが難しいという問題を有する。
また、全面にわたって誘電体層を設けた場合、誘電体層に配線パターンを設けると誘電率が高いため、信号の減速や電気損失が生じるために配線パターン設計に対する自由度が低くなるという問題を有する。
【0006】
【発明が解決しようとする課題】
本発明は、上記問題点に鑑み考案されたもので、容量精度が高く、且つバラツキの少ないキャパシタ素子を得るための高誘電率複合材料組成物及び誘電体転写シート並びに受動素子内蔵多層回路板及びその製造方法を提供することを目的とする。
【0007】
【課題を解決するための手段】
本発明は上記課題を達成するために、まず請求項1においては、少なくとも多官能エポキシ樹脂と、熱可塑性樹脂と、誘電体フィラーとからなる高誘電率複合材料組成物であって、前記熱可塑性樹脂の軟化点が150℃以下であることを特徴とする高誘電率複合材料組成物としたものである。
【0008】
また、請求項2においては、前記多官能エポキシ樹脂のエポキシ当量が150〜300、分子量が200〜1000であることを特徴とする請求項1記載の高誘電率複合材料組成物としたものである。
【0009】
また、請求項3においては、前記熱可塑性樹脂が前記多官能エポキシ樹脂と前記熱可塑性樹脂との総固形分に対して10〜50重量%配合されていることを特徴とする請求項1または2に記載の高誘電率複合材料組成物としたものである。
【0010】
また、請求項4においては、前記誘電体フィラーが前記多官能エポキシ樹脂と前記熱可塑性樹脂と前記誘電体フィラーとの総固形分に対して30〜90重量%配合されていることを特徴とする請求項1乃至請求項3のいずれか一項に記載の高誘電率複合材料組成物としたものである。
【0011】
また、請求項5においては、請求項1乃至請求項4のいずれか一項に記載の高誘電率複合材料組成物を用いて誘電体溶液を作製し、転写フィルム上に5〜50μm厚の誘電体層を形成したことを特徴とする誘電体転写シートとしたものである。
【0012】
また、請求項6においては、請求項5記載の誘電体転写シートを用いて回路基板上に熱転写法にて誘電体パターンを形成し、該誘電体パターンを誘電体としたキャパシタ素子が形成されていることを特徴とする受動素子内蔵の多層回路板としたものである。
【0013】
さらにまた、請求項7においては、少なくとも以下の工程を備えることを特徴とする請求項6記載の多層回路板の製造方法としたものである。
(a)絶縁基材11の両面に配線パターンを形成した及びキャパシタ用下部電極を形成した回路基板を作製する工程。
(b)請求項1乃至4のいずれか一項に記載の高誘電率複合材料組成物を用いて誘電体溶液を作製し、この誘電体溶液を支持フィルム上に塗布し、加熱、乾燥して所定厚の誘電体層を形成して、誘電体転写シートを作製する工程。
(c)積層回路基板のキャパシタ用下部電極上に前記誘電体転写シートを用いてパターン転写し、加熱・硬化して所定厚の誘電体パターンを形成する工程。
(d)誘電体パターン上にキャパシタ用上部電極を形成してキャパシタ素子を形成し、受動素子内蔵の多層回路板を作製する工程。
【0014】
【発明の実施の形態】
以下本発明の実施の形態につき説明する。
請求項1に係る本発明の高誘電率複合材料組成物は、多官能エポキシ樹脂と、熱可塑性樹脂と、誘電体フィラーとからなり、前記熱可塑性樹脂の軟化点が150℃以下であることを特徴とする。
前記熱可塑性樹脂の溶融温度を150℃以下にすることにより、高誘電率複合材料組成物を用いて作成した誘電体転写シートのパターン転写温度を150℃以下にでき、パターン転写したときの誘電体層のパターン切れを良くすることができる。また、誘電体溶液を転写フィルム上に塗布する際の塗膜の流動性を持たせることができ、転写フィルム上に平滑な誘電体層を形成できる。
【0015】
高誘電率複合材料組成物を構成している多官能エポキシ樹脂としては、例えば、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ビスフェノールS型エポキシ樹脂、ビフェニル型エポキシ樹脂、ビフェニルノボラック型エポキシ樹脂、トリスヒドロキシフェニルメタン型エポキシ樹脂、テトラフェニルエタン型エポキシ樹脂、ジシクロペンタジエンフェノール型エポキシ樹脂等の芳香族環を含むエポキシ類化合物の水素添加化合物、脂環式エポキシ樹脂やシクロヘキセンオキシドの各種誘導体、テトラブロモビスフェノールA型エポキシ樹脂等の含ハロゲンエポキシ樹脂などがあげられ、これらを単独もしくは混合して用いることができる。
【0016】
高誘電率複合材料組成物を構成している熱可塑性樹脂としては、ポリアミド樹脂、ポリイミド樹脂、ポリエーテルエーテルケトン、ポリエーテルスルフォン、ポリフェニレンエーテル樹脂、フェノキシ樹脂、ポリスルホン、ポリフェニレンサルファイド、ポリオレフィン樹脂等及びゴム成分等公知のものを使用できる。ゴム成分としてはポリブタジエンゴムや、ウレタン変性、エポキシ変性等の各種変性ポリブタジエンゴムを上げることができる。
【0017】
高誘電率複合材料組成物を構成している誘電体フィラーとしては、公知のものを用いることができるが、比誘電率が50以上のものが好ましい。例えば、二酸化チタン系セラミックス、チタン酸バリウム系セラミックス、チタン酸カルシウム系セラミックス、チタン酸ストロンチウム系セラミックス、ジルコン酸鉛系セラミックス等をあげることができ、これらを単独もしくは混合して用いること
ができるが、特にこれらに限定されるものではない。
また、誘電体フィラーの平均粒径は0.1〜30μmであることが好ましい。この理由としては、30μmを越えると、誘電体転写シートを作製する際、誘電体層の塗布適性が悪くなること、及び30μm以下の誘電体層を形成できないことから、高精度及び高容量のキャパシタ素子を得ることが難しくなる。
また、0.1μm未満だと、誘電性フィラーの誘電体溶液への分散性が悪くなるからである。
【0018】
請求項2に係る本発明の高誘電率複合材料組成物は、多官能エポキシ樹脂のエポキシ当量が150〜300、分子量が200〜1000であることを特徴とする。
この理由として、多官能エポキシ樹脂のエポキシ当量については、150以下では、誘電体層の耐熱性が低下し、また、300以上では、誘電体層がもろくなり、誘電体層被膜にクラック、亀裂が発生し易くなるからである。
多官能エポキシ樹脂の分子量については、200以下では、誘電体層の耐熱性が低下し、1000以上では、パターン転写時の流動性低下によってパターン切れが悪くなるからである。
【0019】
請求項3に係る本発明の高誘電率複合材料組成物は、前記熱可塑性樹脂が前記多官能エポキシ樹脂と前記熱可塑性樹脂との総固形分に対して10〜50重量%配合されていることを特徴とする。
この理由として、熱可塑性樹脂の配合比が多官能エポキシ樹脂と熱可塑性樹脂との総固形分に対して10重量%以下では、誘電体層被膜がもろくなり、誘電体層にクラック、亀裂が発生し易くなる。また、50重量%以上では、誘電体層をパターン転写した際の基材との接着性が悪くなるからである。
【0020】
請求項4に係る本発明の高誘電率複合材料組成物は、前記誘電体フィラーが前記多官能エポキシ樹脂と前記熱可塑性樹脂と前記誘電体フィラーとの総固形分に対して30〜90重量%配合されていることを特徴とする。
この理由としては、誘電体フィラーの配合比が、30重量%以下では、充分な高誘電特性が得られず、また、90重量%以上では、高誘電特性は得られるが、誘電体層の膜特性が脆くなり、基材との接着性を含めた充分な被膜特性が得られなくなるからである。
【0021】
請求項5に係る本発明の誘電体転写シート70は、上記高誘電率複合材料組成物と溶剤を用いて誘電体溶液を作製し、この誘電体溶液を支持フィルム12上にグラビア印刷、もしくはロールコーター等により塗布し、誘電体塗膜を形成し、加熱、乾燥して5〜50μm厚の誘電体層51を形成したものである(図4参照)。
誘電体層の乾燥後膜厚について、5μm以下では膜厚を均一にすることが難しく、50μm以上では誘電体層内部の温度が均一になり難いので、パターン転写時のパターン切れが悪くなる。
【0022】
上記溶剤は、多官能エポキシ樹脂と熱可塑性樹脂双方が溶解し、硬化後の樹脂中に残留しないものを使用しなければならない。熱可塑性樹脂としてフェノキシ樹脂を用いる場合はトルエン、シクロヘキサノン、ジメチルホルムアミド、メチルエチルケトン、キシレン、ジオキサン、テトラヒドロフラン、アセトン、ブタノール等を上げることができる。
さらに、上記誘電体溶液中には、必要に応じて、熱重合禁止剤、可塑剤、レベリング剤、消泡剤、紫外線吸収剤、難燃化剤等の添加剤や着色用顔料等を添加することができる。
【0023】
上記支持フィルム12は、ポリエチレンテレフタレート(PET)等の公知のものを使用できるが、特に、加熱温度が高い場合内にはポリイミド、ポリテトラフルオロエチレン(PTFE)等の高耐熱性のフィルムが好適である。
さらに、支持フィルム12上には、誘電体層のパターン転写性を良くするために、剥離層を設けても良い。剥離層としてはシリコーン処理等が上げられる。
【0024】
請求項6に係る本発明の受動素子内蔵多層回路板100は、予め絶縁基材11の両面に第1配線パターン21a及び第1配線パターン21bが形成されたコア基板(内層基板)に第2配線パターン41a、第2配線パターン41b及びキャパシタ用下部電極41cを形成して回路基板20を作製しておき、上記誘電体転写シート70を用いて、押し型80にて加圧、加熱して、誘電体層51をパターン転写して、回路基板20上のキャパシタ用下部電極41c上に誘電体パターン51pを形成し(図5(a)及び(b)参照)、さらに、絶縁層33及びキャパシタ用上部電極61aを形成して、キャパシタ素子50を形成したものである(図1参照)。
ここでは、4層の回路基板の最上層にキャパシタ素子を形成した事例について説明したが、キャパシタ素子は回路基板の任意の配線パターン層に形成でき、回路基板の配線パターン層数は特に限定されるものではない。
また、内蔵する受動素子についても、キャパシタ素子だけでなく、インダクタ素子、抵抗素子を必要に応じて設けることができる。
【0025】
以下本発明の受動素子内蔵多層回路板の製造方法について説明する。
図2(a)〜(e)、図3(f)〜(i)は、請求項7に係る多層回路板の製造方法の一実施例を工程順に示す模式構成部分断面図である。
まず、絶縁基材11の両面に第1配線パターン21a及び第1配線パターン21bが形成されたコア基板10を作製する(図2(a)参照)。
次に、コア基板10の両面に絶縁層31を形成し(図2(b)参照)、絶縁層31の所定位置にレーザー加工、あるいはフォトエッチングプロセス等によりビア用孔32を形成する(図2(c)参照)。
【0026】
次に、絶縁層31上及びビア用孔32内に無電解銅めっき等にて薄膜導体層(特に図示せず)を形成し、薄膜導体層をカソードにして電解銅めっきを行い、所定厚の導体層41及びフィルドビア42を形成する(図2(d)参照)。
次に、導体層41をパターニング処理して、第2配線パターン41a、第2配線パターン41b及びキャパシタ用下部電極41cを形成し、回路基板20を作製する(図2(e)参照)。
【0027】
次に、キャパシタ用下部電極41cが形成された回路基板20上に、上記誘電体転写シート70及び押し型80をセットし(図5(a)参照)、押し型80とキャパシタ用下部電極41cとを位置合わせして、所定温度に加熱された押し型80で所定時間加圧して、キャパシタ用下部電極41c上に誘電体パターン51pを形成し、誘電体パターン51pが形成された回路基板30を作製する(図5(b)及び図3(f)参照)。
ここで、押し型80の加圧面はキャパシタ用下部電極41cと同一サイズ、もしくはキャパシタ用下部電極41cより小さく加工されている。
【0028】
押し型80の加熱温度は、80〜150℃が好ましい。80℃以下だと誘電体層が流動性に乏しくなるため、回路基板20のキャパシタ用下部電極41c上に誘電体パターン51pが形状良く転写されない。150℃以上だと流動性が高すぎるために、転写された誘電体パターン51pの膜厚を一定にすることができない。または、熱が転写周辺部に伝わり転写パターン51pにバリが生じる。
【0029】
次に、回路基板30の誘電体パターン51pが形成された面にプリプレーグフィルム等をラミネートする等の方法で樹脂膜を形成し、所定温度で加熱、硬化した後誘電体パターン51p表面と同一面になるまで機械的に研磨して所定厚の絶縁層33を形成する(図3(g)参照)。
次に、絶縁層33及び誘電体パターン51p上に無電解めっき等にて薄膜導体層を形成し(特に図示せず)、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層33及び誘電体パターン51p上に所定厚の導体層61を形成する(図3(h)参照)。
【0030】
次に、導体層61上にドライフィルムをラミネートする等の方法で感光層を形成し、パターン露光、現像等の一連のパターニング処理を行ってレジストパターンを形成し、レジストパターンをエッチングマスクにして導体層61をエッチングし、誘電体パターン51p上にキャパシタ用上部電極61aを形成してキャパシタ素子50を形成し、キャパシタ素子50が形成された受動素子内蔵多層回路板100を得る(図3(i)参照)。
【0031】
本発明の高誘電率複合材料組成物からなる誘電体転写シートを用いて作製した受動素子内蔵多層回路板は、高誘電率で、容量精度に優れ、且つバラツキの少ないキャパシタ素子を内蔵することが可能となり、高密度、高信頼性の多層回路板を得ることができる。
【0032】
【実施例】
以下、実施例により本発明を詳細に説明する。
まず、不織布ガラスにエポキシ樹脂を含浸させた絶縁基材11の両面に18μmの銅箔を貼り合わせた銅張り積層板を用い、パターニング処理して第1配線層21a及び第1配線層21bが形成されたコア基板10を作製した。さらに、コア基板10の両面にBステージ(半硬化性)状のエポキシ系熱硬化性絶縁樹脂フィルムを貼り合わせて40μm厚の絶縁層31を形成し、絶縁層31の所定位置にレーザー加工にてビア用孔32を形成した(図2(a)〜(c)参照)。
【0033】
次に、絶縁層31上及びビア用孔32内に無電解銅めっき等にて薄膜導体層を形成し、薄膜導体層をカソードにして電解銅めっきを行い、10μm厚の導体層41及びフィルドビア42を形成し、導体層41をパターニング処理して、第2配線層41a、第2配線層41b及びキャパシタ用下部電極41cを形成した4層の回路基板20を作製した(図2(d)〜(e)参照)。
【0034】
次に、多官能エポキシ樹脂としてエポキシ当量190g/eqのエポキシ樹脂(エピコート828:油化シェルエポキシ社製)を99.8重量部と、熱可塑性樹脂としてフェノキシ樹脂(フェノートYP−50:東都化成社製)を100重量部と、誘電体フィラーとしてチタン酸バリウム(BT−05:堺化学工業社製)を800重量部と、硬化触媒(2−エチル−4−メチルイミダゾール)を0.2重量部とを練り込みロールで分散、混練した後、撹拌及び脱泡処理を行い、高誘電率複合材料組成物からなる誘電体溶液Aを得た。
【0035】
同様にして、多官能エポキシ樹脂としてエポキシ当量190g/eqのエポキシ樹脂(エピコート828:油化シェルエポキシ社製)を54.2重量部及びエポキシ当量160g/eqのエポキシ樹脂(830LVP:大日本インキ化学工業社製)を45.6重量部と、熱可塑性樹脂としてフェノキシ樹脂(フェノートYP−50:東都化成社製)を100重量部と、誘電体フィラーとしてチタン酸バリウム(BT−05:堺化学工業社製)を800重量部と、硬化触媒(2−エチル−4−メチルイミダゾール)を0.2重量部とを練り込みロールで分散、混練した後、撹拌及び脱泡処理を行い、高誘電率複合材料組成物からなる誘電体溶液Bを得た。
【0036】
同様にして、多官能エポキシ樹脂としてエポキシ当量190g/eqのエポキシ樹脂(エピコート828:油化シェルエポキシ社製)を54.2重量部及びエポキシ当量160g/eqのエポキシ樹脂(830LVP:大日本インキ化学工業社製)を45.6重量部と、熱可塑性樹脂としてエポキシ化ポリブタジェンゴム(ナデレックスR−45EPT:ナガセケムテックス社製)を100重量部と、誘電体フィラーとしてチタン酸バリウム(BT−05:堺化学工業社製)を800重量部と、硬化触媒(2−エチル−4−メチルイミダゾール)を0.2重量部とを練り込みロールで分散、混練した後、撹拌及び脱泡処理を行い、高誘電率複合材料組成物からなる誘電体溶液Cを得た。
【0037】
<実施例1>
まず、上記実施例で得られた誘電体溶液Aを50μm厚のポリエチレンテレフタレートフィルムからなる支持フィルム12上にロールコーターにて塗布し、加熱、乾燥して20μm厚の誘電体層51aを形成し、誘電体転写シート70aを作製した(図4参照)。
【0038】
次に、上記誘電体転写シート70aと、回路基板20とを重ね合わせ、150℃に加熱された押し型80を回路基板20のキャパシタ用下部電極41aと位置合わせして(図5(a)参照)、5kg/cmの圧力で10秒間加圧し、回路基板20のキャパシタ用下部電極41a上に誘電体パターン51apを形成した回路基板30aを作製した(図5(b)及び図3(f)参照)。
【0039】
次に、回路基板30aの誘電体パターン51pが形成された面にBステージフィルムからなるドライフィルム(ABF−45H:味の素ファインテクノ(株)製)を真空加圧式ラミネーターを用いて、温度:110℃、圧力:3kg/cm、真空度:0.4Torrの条件でラミネートし、170℃で1時間加熱、硬化した後誘電体パターン51ap表面と同一面になるまで機械的に研磨して絶縁層33を形成した(図3(g)参照)。
【0040】
次に、絶縁層33及び誘電体パターン51ap上に無電解銅めっきにて1μm厚の薄膜導体層を形成し(特に図示せず)、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層33及び誘電体パターン51ap上に10μm厚の導体層61を形成した(図3(h)参照)。
【0041】
次に、導体層61上にドライフィルムをラミネートして感光層を形成し、パターン露光、現像等の一連のパターニング処理を行って、レジストパターンを形成し、レジストパターンをエッチングマスクにして導体層61をエッチングして、誘電体パターン51ap上にキャパシタ用上部電極61aを形成し、キャパシタ素子50が形成された多層回路板100aを得た(図3(i)参照)。
【0042】
<実施例2>
まず、実施例1と同様の工程で、上記誘電体溶液Bを50μm厚のポリエチレンテレフタレートフィルムからなる支持フィルム12上にロールコーターにて塗布し、加熱、乾燥して20μm厚の誘電体層51bを形成し、誘電体転写シート70bを作製した(図4参照)。
【0043】
次に、上記誘電体転写シート70bと、回路基板20とを重ね合わせ、150℃に加熱された押し型80を回路基板20のキャパシタ用下部電極41aと位置合わせして(図5(a)参照)、5kg/cmの圧力で10秒間加圧し、回路基板20のキャパシタ用下部電極41a上に誘電体パターン51bpを形成し、回路基板30bを作製した(図5(b)及び図3(f)参照)。
【0044】
次に、回路基板30bの誘電体パターン51bpが形成された面にBステージフィルムからなるドライフィルム(ABF−45H:味の素ファインテクノ(株)製)を真空加圧式ラミネーターを用いて、温度:110℃、圧力:3kg/cm、真空度:0.4Torrの条件でラミネートし、170℃で1時間加熱、硬化した後誘電体パターン51bp表面と同一面になるまで機械的に研磨して絶縁層33を形成した(図3(g)参照)。
【0045】
次に、絶縁層33及び誘電体パターン51bp上に無電解銅めっきにて1μm厚の薄膜導体層を形成し(特に図示せず)、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層33及び誘電体パターン51bp上に10μm厚の導体層61を形成した(図3(h)参照)。
【0046】
次に、導体層61上にドライフィルムをラミネートして感光層を形成し、パターン露光、現像等の一連のパターニング処理を行って、レジストパターンを形成し、レジストパターンをエッチングマスクにして導体層61をエッチングして、誘電体パターン51bp上にキャパシタ用上部電極61aを形成し、キャパシタ素子50が形成された多層回路板100bを得た(図3(i)参照)。
【0047】
<実施例3>
まず、実施例1と同様の工程で、上記、誘電体溶液Cを50μm厚のポリエチレンテレフタレートフィルムからなる支持フィルム12上にロールコーターにて塗布し、加熱、乾燥して20μm厚の誘電体層51cを形成し、誘電体転写シート70cを作製した(図4参照)。
【0048】
次に、上記誘電体転写シート70cと、回路基板20とを重ね合わせ、150℃に加熱された押し型80を回路基板20のキャパシタ用下部電極41aと位置合わせして(図5(a)参照)、5kg/cmの圧力で10秒間加圧し、回路基板20のキャパシタ用下部電極41a上に誘電体パターン51cpを形成し、回路基板30cを作製した(図5(b)及び図3(f)参照)。
【0049】
次に、回路基板30cの誘電体パターン51cpが形成された面にBステージフィルムからなるドライフィルム(ABF−45H:味の素ファインテクノ(株)製)を真空加圧式ラミネーターを用いて、温度:110℃、圧力:3kg/cm、真空度:0.4Torrの条件でラミネートし、170℃で1時間加熱、硬化した後誘電体パターン51cp表面と同一面になるまで機械的に研磨して絶縁層33を形成した(図3(g)参照)。
【0050】
次に、絶縁層33及び誘電体パターン51cp上に無電解銅めっきにて1μm厚の薄膜導体層を形成し(特に図示せず)、薄膜導体層をカソードにして電解銅めっきを行い、絶縁層33及び誘電体パターン51cp上に10μm厚の導体層61を形成した(図3(h)参照)。
【0051】
次に、導体層61上にドライフィルムをラミネートして感光層を形成し、パターン露光、現像等の一連のパターニング処理を行って、レジストパターンを形成し、レジストパターンをエッチングマスクにして導体層61をエッチングして、誘電体パターン51cp上にキャパシタ用上部電極61aを形成し、キャパシタ素子50が形成された多層回路板100cを得た(図3(i)参照)。
【0052】
実施例1〜3の誘電体転写シートを用いたパターン転写では、いずれもパターン切れの良い、パターン精度に優れた誘電体パターンが得られ、バラツキの少ないキャパシタ素子が得られた。
【0053】
【発明の効果】
本発明の高誘電率複合材料組成物、誘電体転写シートを用いて作製したキャパシタ素子は、高誘電率で、容量精度に優れており、且つバラツキの少ないキャパシタ素子が得られ、高密度、高信頼性のキャパシタ素子内蔵の多層回路板を得ることができる。
【図面の簡単な説明】
【図1】請求項6に係る本発明の多層回路板の一実施例を示す模式部分構成断面図である。
【図2】(a)〜(e)は、請求項7に係る本発明の多層回路板の製造方法における工程の一部を示す模式部分構成断面図である。
【図3】(f)〜(i)は、請求項7に係る本発明の多層回路板の製造方法における工程の一部を示す模式部分構成断面図である。
【図4】請求項5に係る誘電体転写シートの一実施例を示す模式部分構成断面図である。
【図5】(a)は、誘電体パターンを形成するために、回路基板、転写シート及び押し型をセットした状態を示す説明図である。(b)は、誘電体パターンが形成された回路基板の一例を示す模式部分構成断面図である。
【図6】従来のキャパシタ素子内蔵の多層回路板の一例を示す模式部分構成断面図である。
【符号の説明】
10……コア基板
11……絶縁基材
12……支持フィルム
21a、21b……第1配線層
20、30、30a、30b、30c……回路基板
31……絶縁層
32……ビア用孔
33a……レジストパターン
33b……レジスト
34……開口部
41、61……導体層
41a、41b……第2配線層
41c……キャパシタ用下部電極
42……フィルドビア
50……キャパシタ素子
51、51a、51b、51c、52……誘電体層
51p、51ap、51bp、51cp……誘電体パターン
61a、62……キャパシタ用上部電極
70、70a、70b、70c……誘電体転写シート
80……押し型
100、100a、100b、100c……多層回路板
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a high dielectric constant composite material composition, a dielectric transfer sheet, a multilayer circuit board and a method for producing the same, and more specifically, to prepare a dielectric transfer sheet composed of a high dielectric constant composite material composition, The present invention relates to a multilayer circuit board having a capacitor element built therein by transferring a pattern on a circuit board to form a dielectric pattern and a method of manufacturing the same.
[0002]
[Prior art]
As the miniaturization, high density, and high performance of electronic devices are progressing, the demands for miniaturization, high density, and high speed of the multilayer circuit boards used therein are also increasing. There is a need for multilayer circuit boards.
The multilayer circuit board is formed by laminating a circuit board (inner board) and a prepreg sheet to form a wiring pattern and a via hole to form a multilayer circuit board. It is shifting to a build-up type multilayer circuit board in which circuit patterns are stacked alternately.
[0003]
In recent years, as the performance of electronic devices has become higher, the signal transmission speed has been increased. However, this has caused a problem that electrical noise increases. In order to solve this problem, measures such as providing a decoupling capacitor on a circuit board have been taken.
Further, in order to increase the density and performance of electronic devices, multilayer circuit boards incorporating passive elements such as capacitors, inductors, and resistors, which are circuit components, are being developed.
[0004]
FIG. 6 shows an example of a conventional multilayer circuit board having a built-in capacitor element.
A method of manufacturing a multilayer circuit board with a built-in capacitor element is as follows. A circuit board (inner layer board) in which a first wiring pattern 21a and a first wiring pattern 21b are formed on both surfaces of an insulating base material 11 is provided with an insulating layer 31 interposed therebetween. A method of manufacturing the multilayer circuit board 20 on which the electrode 41c, the second wiring pattern 41a, and the second wiring pattern 41b are formed, and coating the lower electrode 41c for the capacitor and the insulating layer 31 with a resin solution mixed with a dielectric material, or A dielectric layer 52 is formed by a method such as laminating a B-stage dielectric sheet, the surface is polished, a capacitor upper electrode 62 is formed, a capacitor element is formed, and a multilayer circuit board with a built-in capacitor element is produced. It was that.
Here, the B-stage state means a semi-cured state in which adhesion and curing with another layer can be performed by heating and pressing.
[0005]
Since the capacitance of the capacitor element is proportional to the area and inversely proportional to the distance between the electrodes, in order to obtain a capacitor element having a small area and a high capacitance, it is necessary to use a thin and uniform dielectric layer having a high dielectric constant. To form.
In the method of coating the resin solution mixed with the dielectric material, or the method of laminating the B-stage dielectric sheet, the film has uniformity of the film thickness, or has a high dielectric constant and also has the adhesiveness to the lower electrode and the insulating base material. There is a problem that it is difficult to obtain a dielectric layer.
In addition, when a dielectric layer is provided over the entire surface, providing a wiring pattern on the dielectric layer has a high dielectric constant, so that there is a problem that the degree of freedom in designing the wiring pattern is reduced due to signal deceleration and electrical loss. .
[0006]
[Problems to be solved by the invention]
The present invention has been conceived in view of the above problems, and has a high capacitance accuracy, and a high dielectric constant composite material composition and a dielectric transfer sheet for obtaining a capacitor element with less variation, a multilayer circuit board with a built-in passive element, and It is an object of the present invention to provide a manufacturing method thereof.
[0007]
[Means for Solving the Problems]
To achieve the above object, the present invention first provides a high dielectric constant composite material composition comprising at least a polyfunctional epoxy resin, a thermoplastic resin, and a dielectric filler according to claim 1; A high dielectric constant composite material composition characterized in that the softening point of the resin is 150 ° C. or lower.
[0008]
According to a second aspect of the present invention, there is provided the high dielectric constant composite material composition according to the first aspect, wherein the polyfunctional epoxy resin has an epoxy equivalent of 150 to 300 and a molecular weight of 200 to 1000. .
[0009]
According to a third aspect of the present invention, the thermoplastic resin is blended in an amount of 10 to 50% by weight based on a total solid content of the polyfunctional epoxy resin and the thermoplastic resin. And a high dielectric constant composite material composition described in (1).
[0010]
According to a fourth aspect of the present invention, the dielectric filler is blended in an amount of 30 to 90% by weight based on a total solid content of the polyfunctional epoxy resin, the thermoplastic resin, and the dielectric filler. A high dielectric constant composite material composition according to any one of claims 1 to 3.
[0011]
In a fifth aspect, a dielectric solution is prepared using the high dielectric constant composite material composition according to any one of the first to fourth aspects, and a dielectric solution having a thickness of 5 to 50 μm is formed on the transfer film. A dielectric transfer sheet having a body layer formed thereon.
[0012]
In a sixth aspect, a dielectric pattern is formed on a circuit board by a thermal transfer method using the dielectric transfer sheet according to the fifth aspect, and a capacitor element using the dielectric pattern as a dielectric is formed. And a multilayer circuit board with a built-in passive element.
[0013]
Still further, according to a seventh aspect, there is provided a method of manufacturing a multilayer circuit board according to the sixth aspect, comprising at least the following steps.
(A) A step of manufacturing a circuit board on which a wiring pattern is formed on both surfaces of an insulating base material 11 and a lower electrode for a capacitor is formed.
(B) A dielectric solution is prepared using the high dielectric constant composite material composition according to any one of claims 1 to 4, and the dielectric solution is applied on a support film, heated and dried. Forming a dielectric layer having a predetermined thickness to produce a dielectric transfer sheet;
(C) a step of transferring a pattern on the capacitor lower electrode of the laminated circuit board using the dielectric transfer sheet, heating and curing to form a dielectric pattern having a predetermined thickness.
(D) forming a capacitor element by forming an upper electrode for the capacitor on the dielectric pattern, and fabricating a multilayer circuit board with a built-in passive element;
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described.
The high dielectric constant composite material composition of the present invention according to claim 1 comprises a polyfunctional epoxy resin, a thermoplastic resin, and a dielectric filler, and the softening point of the thermoplastic resin is 150 ° C. or less. Features.
By setting the melting temperature of the thermoplastic resin to 150 ° C. or lower, the pattern transfer temperature of the dielectric transfer sheet created using the high dielectric constant composite material composition can be set to 150 ° C. or lower, and the dielectric when the pattern is transferred is reduced. It is possible to improve the pattern cut of the layer. In addition, the fluidity of the coating film when the dielectric solution is applied on the transfer film can be given, and a smooth dielectric layer can be formed on the transfer film.
[0015]
Examples of the polyfunctional epoxy resin constituting the high dielectric constant composite material composition include phenol novolak type epoxy resin, cresol novolak type epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin Hydrogenated compounds of epoxy compounds containing an aromatic ring such as biphenyl epoxy resin, biphenyl novolak epoxy resin, trishydroxyphenylmethane epoxy resin, tetraphenylethane epoxy resin, dicyclopentadiene phenol epoxy resin, and fats Examples thereof include cyclic epoxy resins, various derivatives of cyclohexene oxide, halogen-containing epoxy resins such as tetrabromobisphenol A type epoxy resin, and the like, and these can be used alone or in combination.
[0016]
As the thermoplastic resin constituting the high dielectric constant composite material composition, polyamide resin, polyimide resin, polyether ether ketone, polyether sulfone, polyphenylene ether resin, phenoxy resin, polysulfone, polyphenylene sulfide, polyolefin resin and the like and rubber Known components such as components can be used. Examples of the rubber component include polybutadiene rubber and various modified polybutadiene rubbers such as urethane-modified and epoxy-modified.
[0017]
As the dielectric filler constituting the high dielectric constant composite material composition, known dielectric fillers can be used, but those having a relative dielectric constant of 50 or more are preferable. For example, titanium dioxide-based ceramics, barium titanate-based ceramics, calcium titanate-based ceramics, strontium titanate-based ceramics, lead zirconate-based ceramics and the like can be used. These may be used alone or in combination.
However, the present invention is not particularly limited to these.
The average particle diameter of the dielectric filler is preferably 0.1 to 30 μm. The reason for this is that if the thickness exceeds 30 μm, the applicability of the dielectric layer becomes poor when a dielectric transfer sheet is produced, and the dielectric layer having a thickness of 30 μm or less cannot be formed. It becomes difficult to obtain an element.
If the thickness is less than 0.1 μm, the dispersibility of the dielectric filler in the dielectric solution will be poor.
[0018]
The high dielectric constant composite material composition of the present invention according to claim 2 is characterized in that the polyfunctional epoxy resin has an epoxy equivalent of 150 to 300 and a molecular weight of 200 to 1000.
The reason for this is that when the epoxy equivalent of the polyfunctional epoxy resin is 150 or less, the heat resistance of the dielectric layer decreases, and when it is 300 or more, the dielectric layer becomes brittle, and cracks and cracks are formed in the dielectric layer coating. This is because it easily occurs.
If the molecular weight of the polyfunctional epoxy resin is 200 or less, the heat resistance of the dielectric layer decreases, and if the molecular weight is 1000 or more, the pattern cutting becomes poor due to the decrease in fluidity during pattern transfer.
[0019]
In the high dielectric constant composite material composition of the present invention according to claim 3, the thermoplastic resin is blended in an amount of 10 to 50% by weight based on the total solid content of the polyfunctional epoxy resin and the thermoplastic resin. It is characterized by.
The reason for this is that if the blending ratio of the thermoplastic resin is 10% by weight or less based on the total solid content of the polyfunctional epoxy resin and the thermoplastic resin, the dielectric layer coating becomes brittle, and cracks and cracks occur in the dielectric layer. Easier to do. On the other hand, if it is 50% by weight or more, the adhesiveness to the base material when the pattern of the dielectric layer is transferred becomes poor.
[0020]
The high dielectric constant composite material composition of the present invention according to claim 4, wherein the dielectric filler is 30 to 90% by weight based on the total solid content of the polyfunctional epoxy resin, the thermoplastic resin, and the dielectric filler. It is characterized by being blended.
The reason is that if the compounding ratio of the dielectric filler is 30% by weight or less, sufficient high dielectric properties cannot be obtained, and if it is 90% by weight or more, high dielectric properties cannot be obtained. This is because the properties become brittle and sufficient film properties including adhesiveness to the base material cannot be obtained.
[0021]
The dielectric transfer sheet 70 of the present invention according to claim 5 is a method in which a dielectric solution is prepared using the high dielectric constant composite material composition and a solvent, and the dielectric solution is gravure-printed or rolled on the support film 12. It is formed by coating with a coater or the like, forming a dielectric coating film, heating and drying to form a dielectric layer 51 having a thickness of 5 to 50 μm (see FIG. 4).
If the thickness of the dielectric layer after drying is 5 μm or less, it is difficult to make the thickness uniform, and if it is 50 μm or more, the temperature inside the dielectric layer is unlikely to be uniform, resulting in poor pattern cutting during pattern transfer.
[0022]
As the solvent, a solvent in which both the polyfunctional epoxy resin and the thermoplastic resin are dissolved and which does not remain in the cured resin must be used. When a phenoxy resin is used as the thermoplastic resin, toluene, cyclohexanone, dimethylformamide, methyl ethyl ketone, xylene, dioxane, tetrahydrofuran, acetone, butanol and the like can be used.
Further, in the dielectric solution, if necessary, additives such as a thermal polymerization inhibitor, a plasticizer, a leveling agent, an antifoaming agent, an ultraviolet absorber, a flame retardant, a coloring pigment, and the like are added. be able to.
[0023]
As the support film 12, a known film such as polyethylene terephthalate (PET) can be used. In particular, when the heating temperature is high, a film having high heat resistance such as polyimide or polytetrafluoroethylene (PTFE) is preferable. is there.
Further, a release layer may be provided on the support film 12 in order to improve the pattern transferability of the dielectric layer. Silicone treatment or the like can be used as the release layer.
[0024]
The multilayer circuit board 100 with a built-in passive element of the present invention according to claim 6 is configured such that the second wiring is formed on a core substrate (inner layer substrate) in which the first wiring patterns 21a and the first wiring patterns 21b are formed on both surfaces of the insulating base material 11 in advance. The circuit board 20 is prepared by forming the pattern 41a, the second wiring pattern 41b, and the lower electrode 41c for the capacitor, and is pressed and heated by the pressing die 80 using the dielectric transfer sheet 70 to obtain a dielectric material. The body layer 51 is pattern-transferred to form a dielectric pattern 51p on the capacitor lower electrode 41c on the circuit board 20 (see FIGS. 5A and 5B). The capacitor 61 is formed by forming the electrode 61a (see FIG. 1).
Here, the case where the capacitor element is formed on the uppermost layer of the four-layer circuit board has been described, but the capacitor element can be formed on any wiring pattern layer of the circuit board, and the number of wiring pattern layers of the circuit board is particularly limited. Not something.
As for the built-in passive element, not only a capacitor element but also an inductor element and a resistance element can be provided as necessary.
[0025]
Hereinafter, a method of manufacturing a multilayer circuit board with a built-in passive element according to the present invention will be described.
2 (a) to 2 (e) and 3 (f) to 3 (i) are schematic partial cross-sectional views showing one embodiment of a method for manufacturing a multilayer circuit board according to claim 7 in the order of steps.
First, the core substrate 10 in which the first wiring patterns 21a and the first wiring patterns 21b are formed on both surfaces of the insulating base material 11 is manufactured (see FIG. 2A).
Next, an insulating layer 31 is formed on both surfaces of the core substrate 10 (see FIG. 2B), and a via hole 32 is formed at a predetermined position of the insulating layer 31 by laser processing or a photoetching process (FIG. 2). (C)).
[0026]
Next, a thin-film conductor layer (not particularly shown) is formed on the insulating layer 31 and in the via hole 32 by electroless copper plating or the like, electrolytic copper plating is performed using the thin-film conductor layer as a cathode, and a predetermined thickness is formed. The conductor layer 41 and the filled via 42 are formed (see FIG. 2D).
Next, the conductor layer 41 is patterned to form the second wiring pattern 41a, the second wiring pattern 41b, and the capacitor lower electrode 41c, thereby manufacturing the circuit board 20 (see FIG. 2E).
[0027]
Next, the dielectric transfer sheet 70 and the pressing die 80 are set on the circuit board 20 on which the capacitor lower electrode 41c is formed (see FIG. 5A), and the pressing die 80 and the capacitor lower electrode 41c are set. Are aligned and pressurized for a predetermined time by a press die 80 heated to a predetermined temperature to form a dielectric pattern 51p on the capacitor lower electrode 41c, thereby producing the circuit board 30 on which the dielectric pattern 51p is formed. (See FIGS. 5B and 3F).
Here, the pressing surface of the press die 80 is formed to have the same size as the capacitor lower electrode 41c or smaller than the capacitor lower electrode 41c.
[0028]
The heating temperature of the pressing die 80 is preferably from 80 to 150 ° C. If the temperature is lower than 80 ° C., the dielectric layer becomes poor in fluidity, so that the dielectric pattern 51p is not transferred with good shape onto the capacitor lower electrode 41c of the circuit board 20. If the temperature is higher than 150 ° C., the fluidity is too high, so that the thickness of the transferred dielectric pattern 51p cannot be made constant. Alternatively, heat is transmitted to the transfer peripheral portion, and burrs are generated in the transfer pattern 51p.
[0029]
Next, a resin film is formed by a method such as laminating a prepreg film or the like on the surface of the circuit board 30 on which the dielectric pattern 51p is formed, heated and cured at a predetermined temperature, and then flush with the surface of the dielectric pattern 51p. The insulating layer 33 having a predetermined thickness is formed by mechanical polishing until the thickness becomes (see FIG. 3G).
Next, a thin-film conductor layer is formed on the insulating layer 33 and the dielectric pattern 51p by electroless plating or the like (not shown in particular), and electrolytic copper plating is performed using the thin-film conductor layer as a cathode. A conductor layer 61 having a predetermined thickness is formed on the body pattern 51p (see FIG. 3H).
[0030]
Next, a photosensitive layer is formed by a method such as laminating a dry film on the conductor layer 61, and a series of patterning processes such as pattern exposure and development are performed to form a resist pattern. The layer 61 is etched, the capacitor upper electrode 61a is formed on the dielectric pattern 51p to form the capacitor element 50, and the passive element built-in multilayer circuit board 100 on which the capacitor element 50 is formed is obtained (FIG. 3 (i)). reference).
[0031]
The multilayer board with a built-in passive element manufactured using the dielectric transfer sheet made of the high dielectric constant composite material composition of the present invention can incorporate a capacitor element having a high dielectric constant, excellent capacitance accuracy, and little variation. This makes it possible to obtain a high-density, high-reliability multilayer circuit board.
[0032]
【Example】
Hereinafter, the present invention will be described in detail with reference to examples.
First, a first wiring layer 21a and a first wiring layer 21b are formed by patterning using a copper-clad laminate in which 18 μm copper foil is bonded to both surfaces of an insulating base material 11 in which non-woven glass is impregnated with an epoxy resin. The manufactured core substrate 10 was manufactured. Further, a B-stage (semi-curable) epoxy-based thermosetting insulating resin film is attached to both surfaces of the core substrate 10 to form an insulating layer 31 having a thickness of 40 μm, and a predetermined position of the insulating layer 31 is laser-processed. Via holes 32 were formed (see FIGS. 2A to 2C).
[0033]
Next, a thin-film conductor layer is formed on the insulating layer 31 and in the via hole 32 by electroless copper plating or the like, electrolytic copper plating is performed using the thin-film conductor layer as a cathode, and a 10 μm-thick conductor layer 41 and a filled via 42 are formed. And the conductor layer 41 is patterned to produce a four-layer circuit board 20 in which the second wiring layer 41a, the second wiring layer 41b, and the capacitor lower electrode 41c are formed (FIGS. 2D to 2D). e)).
[0034]
Next, 99.8 parts by weight of an epoxy resin having an epoxy equivalent of 190 g / eq (Epicoat 828: manufactured by Yuka Shell Epoxy) as a polyfunctional epoxy resin, and a phenoxy resin (Fenote YP-50: Toto Kasei Co., Ltd.) as a thermoplastic resin. 100 parts by weight), 800 parts by weight of barium titanate (BT-05: manufactured by Sakai Chemical Industry Co., Ltd.) as a dielectric filler, and 0.2 parts by weight of a curing catalyst (2-ethyl-4-methylimidazole). Was dispersed and kneaded with a kneading roll, followed by stirring and defoaming treatment to obtain a dielectric solution A comprising a high dielectric constant composite material composition.
[0035]
Similarly, as a polyfunctional epoxy resin, 54.2 parts by weight of an epoxy resin having an epoxy equivalent of 190 g / eq (Epicoat 828: manufactured by Yuka Shell Epoxy Co.) and an epoxy resin having an epoxy equivalent of 160 g / eq (830 LVP: Dainippon Ink and Chemicals, Inc.) 45.6 parts by weight), 100 parts by weight of a phenoxy resin (Fenote YP-50: manufactured by Toto Kasei) as a thermoplastic resin, and barium titanate (BT-05: Sakai Chemical Industry) as a dielectric filler Of the curing catalyst (2-ethyl-4-methylimidazole) was dispersed and kneaded with a kneading roll, followed by stirring and defoaming to obtain a high dielectric constant. A dielectric solution B comprising the composite material composition was obtained.
[0036]
Similarly, as a polyfunctional epoxy resin, 54.2 parts by weight of an epoxy resin having an epoxy equivalent of 190 g / eq (Epicoat 828: manufactured by Yuka Shell Epoxy) and an epoxy resin having an epoxy equivalent of 160 g / eq (830 LVP: Dainippon Ink and Chemicals, Inc.) 45.6 parts by weight), 100 parts by weight of epoxidized polybutadiene rubber (Nadex R-45EPT: manufactured by Nagase ChemteX Corporation) as a thermoplastic resin, and barium titanate (BT-) as a dielectric filler. 05: Sakai Chemical Industry Co., Ltd.) (800 parts by weight) and a curing catalyst (2-ethyl-4-methylimidazole) (0.2 parts by weight) were kneaded and dispersed and kneaded with a roll, followed by stirring and defoaming. As a result, a dielectric solution C composed of the high dielectric constant composite material composition was obtained.
[0037]
<Example 1>
First, the dielectric solution A obtained in the above example is coated on a support film 12 made of a polyethylene terephthalate film having a thickness of 50 μm by a roll coater, heated and dried to form a dielectric layer 51a having a thickness of 20 μm. A dielectric transfer sheet 70a was produced (see FIG. 4).
[0038]
Next, the dielectric transfer sheet 70a and the circuit board 20 are overlapped, and the pressing die 80 heated to 150 ° C. is aligned with the capacitor lower electrode 41a of the circuit board 20 (see FIG. 5A). ) 5kg / cm 2 The circuit board 30a in which the dielectric pattern 51ap was formed on the capacitor lower electrode 41a of the circuit board 20 was produced for 10 seconds (see FIGS. 5B and 3F).
[0039]
Next, a dry film (ABF-45H: manufactured by Ajinomoto Fine Techno Co., Ltd.) composed of a B-stage film is formed on the surface of the circuit board 30a on which the dielectric pattern 51p is formed, using a vacuum pressurized laminator at a temperature of 110 ° C. , Pressure: 3kg / cm 2 After laminating under a condition of vacuum degree: 0.4 Torr, heating and curing at 170 ° C. for 1 hour, and mechanically polishing until the same surface as the surface of the dielectric pattern 51ap to form an insulating layer 33 (FIG. 3 ( g)).
[0040]
Next, a 1 μm thick thin-film conductor layer is formed on the insulating layer 33 and the dielectric pattern 51ap by electroless copper plating (not shown in particular), and electrolytic copper plating is performed using the thin-film conductor layer as a cathode. A conductor layer 61 having a thickness of 10 μm was formed on the dielectric pattern 33 and the dielectric pattern 51ap (see FIG. 3H).
[0041]
Next, a dry film is laminated on the conductor layer 61 to form a photosensitive layer, and a series of patterning processes such as pattern exposure and development are performed to form a resist pattern, and the conductor layer 61 is formed using the resist pattern as an etching mask. Was etched to form a capacitor upper electrode 61a on the dielectric pattern 51ap, thereby obtaining a multilayer circuit board 100a on which the capacitor element 50 was formed (see FIG. 3 (i)).
[0042]
<Example 2>
First, in the same process as in Example 1, the dielectric solution B was applied on a support film 12 made of a 50 μm-thick polyethylene terephthalate film by a roll coater, heated and dried to form a 20 μm-thick dielectric layer 51b. The dielectric transfer sheet 70b was formed (see FIG. 4).
[0043]
Next, the dielectric transfer sheet 70b and the circuit board 20 are overlapped, and the pressing die 80 heated to 150 ° C. is aligned with the capacitor lower electrode 41a of the circuit board 20 (see FIG. 5A). ) 5kg / cm 2 , And a dielectric pattern 51 bp was formed on the capacitor lower electrode 41 a of the circuit board 20 to fabricate the circuit board 30 b (see FIGS. 5B and 3F).
[0044]
Next, a dry film (ABF-45H: manufactured by Ajinomoto Fine Techno Co., Ltd.) made of a B-stage film is formed on the surface of the circuit board 30b on which the dielectric pattern 51bp is formed, using a vacuum pressurizing laminator at a temperature of 110 ° C. , Pressure: 3kg / cm 2 After laminating under the condition of vacuum degree: 0.4 Torr, heating and curing at 170 ° C. for 1 hour, and mechanically polishing until the same surface as the surface of the dielectric pattern 51 bp to form the insulating layer 33 (FIG. 3 ( g)).
[0045]
Next, a 1 μm thick thin film conductor layer is formed on the insulating layer 33 and the dielectric pattern 51 bp by electroless copper plating (not shown in particular), and electrolytic copper plating is performed using the thin film conductor layer as a cathode. A conductor layer 61 having a thickness of 10 μm was formed on the dielectric layer 33 and the dielectric pattern 51 bp (see FIG. 3H).
[0046]
Next, a dry film is laminated on the conductor layer 61 to form a photosensitive layer, and a series of patterning processes such as pattern exposure and development are performed to form a resist pattern, and the conductor layer 61 is formed using the resist pattern as an etching mask. Was etched to form a capacitor upper electrode 61a on the dielectric pattern 51bp, thereby obtaining a multilayer circuit board 100b on which the capacitor element 50 was formed (see FIG. 3 (i)).
[0047]
<Example 3>
First, in the same process as in Example 1, the dielectric solution C was applied on a support film 12 made of a polyethylene terephthalate film having a thickness of 50 μm by a roll coater, heated and dried to obtain a dielectric layer 51 c having a thickness of 20 μm. Was formed to produce a dielectric transfer sheet 70c (see FIG. 4).
[0048]
Next, the dielectric transfer sheet 70c and the circuit board 20 are overlapped, and the pressing die 80 heated to 150 ° C. is aligned with the capacitor lower electrode 41a of the circuit board 20 (see FIG. 5A). ) 5kg / cm 2 , And a dielectric pattern 51cp was formed on the capacitor lower electrode 41a of the circuit board 20 to fabricate the circuit board 30c (see FIGS. 5B and 3F).
[0049]
Next, a dry film (ABF-45H: manufactured by Ajinomoto Fine Techno Co., Ltd.) made of a B-stage film is formed on the surface of the circuit board 30c where the dielectric pattern 51cp is formed, using a vacuum pressurizing laminator at a temperature of 110 ° C. , Pressure: 3kg / cm 2 After laminating under a condition of vacuum degree: 0.4 Torr, heating and curing at 170 ° C. for 1 hour, and mechanically polishing until the surface becomes the same as the surface of the dielectric pattern 51 cp to form an insulating layer 33 (FIG. g)).
[0050]
Next, a thin film conductor layer having a thickness of 1 μm is formed on the insulating layer 33 and the dielectric pattern 51cp by electroless copper plating (not shown in particular), and electrolytic copper plating is performed using the thin film conductor layer as a cathode. A conductor layer 61 having a thickness of 10 μm was formed on the dielectric layer 33 and the dielectric pattern 51cp (see FIG. 3H).
[0051]
Next, a dry film is laminated on the conductor layer 61 to form a photosensitive layer, and a series of patterning processes such as pattern exposure and development are performed to form a resist pattern, and the conductor layer 61 is formed using the resist pattern as an etching mask. Was etched to form a capacitor upper electrode 61a on the dielectric pattern 51cp to obtain a multilayer circuit board 100c on which the capacitor element 50 was formed (see FIG. 3 (i)).
[0052]
In the pattern transfer using the dielectric transfer sheets of Examples 1 to 3, a dielectric pattern with good pattern cutting and excellent pattern accuracy was obtained, and a capacitor element with little variation was obtained.
[0053]
【The invention's effect】
The capacitor element manufactured by using the high dielectric constant composite material composition and the dielectric transfer sheet of the present invention has a high dielectric constant, excellent capacitance accuracy, and a capacitor element with little variation. A multilayer circuit board with a built-in reliable capacitor element can be obtained.
[Brief description of the drawings]
FIG. 1 is a schematic partial sectional view showing one embodiment of a multilayer circuit board according to the present invention according to claim 6;
2 (a) to 2 (e) are schematic partial sectional views showing a part of steps in a method for manufacturing a multilayer circuit board according to the present invention.
3 (f) to 3 (i) are schematic partial sectional views showing a part of the steps in the method for manufacturing a multilayer circuit board according to the present invention.
FIG. 4 is a schematic partial sectional view showing one embodiment of the dielectric transfer sheet according to claim 5;
FIG. 5A is an explanatory diagram showing a state in which a circuit board, a transfer sheet, and a press die are set in order to form a dielectric pattern. (B) is a schematic partial configuration sectional view showing an example of a circuit board on which a dielectric pattern is formed.
FIG. 6 is a schematic partial sectional view showing an example of a conventional multilayer circuit board with a built-in capacitor element.
[Explanation of symbols]
10 core substrate
11 ... insulating base material
12 Support film
21a, 21b... First wiring layer
20, 30, 30a, 30b, 30c ... circuit board
31 ... Insulating layer
32: Via hole
33a ... resist pattern
33b resist
34 ... opening
41, 61 ... conductor layer
41a, 41b... Second wiring layer
41c: Lower electrode for capacitor
42 ... Fildovia
50 ... Capacitor element
51, 51a, 51b, 51c, 52 ... dielectric layer
51p, 51ap, 51bp, 51cp: dielectric pattern
61a, 62: Upper electrode for capacitor
70, 70a, 70b, 70c ... dielectric transfer sheet
80 ... Press type
100, 100a, 100b, 100c ... multilayer circuit board

Claims (7)

少なくとも多官能エポキシ樹脂と、熱可塑性樹脂と、誘電体フィラーとからなる高誘電率複合材料組成物であって、前記熱可塑性樹脂の軟化点が150℃以下であることを特徴とする高誘電率複合材料組成物。A high dielectric constant composite material composition comprising at least a polyfunctional epoxy resin, a thermoplastic resin, and a dielectric filler, wherein the thermoplastic resin has a softening point of 150 ° C. or less. Composite material composition. 前記多官能エポキシ樹脂のエポキシ当量が150〜300、分子量が200〜1000であることを特徴とする請求項1記載の高誘電率複合材料組成物。The high dielectric constant composite material composition according to claim 1, wherein the polyfunctional epoxy resin has an epoxy equivalent of 150 to 300 and a molecular weight of 200 to 1000. 前記熱可塑性樹脂が前記多官能エポキシ樹脂と前記熱可塑性樹脂との総固形分に対して10〜50重量%配合されていることを特徴とする請求項1または2に記載の高誘電率複合材料組成物。The high dielectric constant composite material according to claim 1 or 2, wherein the thermoplastic resin is blended in an amount of 10 to 50% by weight based on a total solid content of the polyfunctional epoxy resin and the thermoplastic resin. Composition. 前記誘電体フィラーが前記多官能エポキシ樹脂と前記熱可塑性樹脂と前記誘電体フィラーとの総固形分に対して30〜90重量%配合されていることを特徴とする請求項1乃至請求項3のいずれか一項に記載の高誘電率複合材料組成物。4. The dielectric filler according to claim 1, wherein said dielectric filler is contained in an amount of 30 to 90% by weight based on a total solid content of said polyfunctional epoxy resin, said thermoplastic resin and said dielectric filler. A high dielectric constant composite material composition according to any one of the preceding claims. 請求項1乃至請求項4のいずれか一項に記載の高誘電率複合材料組成物を用いて誘電体溶液を作製し、転写フィルム上に5〜50μm厚の誘電体層を形成したことを特徴とする誘電体転写シート。A dielectric solution is prepared using the high dielectric constant composite material composition according to any one of claims 1 to 4, and a dielectric layer having a thickness of 5 to 50 μm is formed on the transfer film. Dielectric transfer sheet. 請求項5記載の誘電体転写シートを用いて回路基板上に熱転写法にて誘電体パターンを形成し、該誘電体パターンを誘電体としたキャパシタ素子が形成されていることを特徴とする受動素子内蔵の多層回路板。A passive element, wherein a dielectric pattern is formed on a circuit board by a thermal transfer method using the dielectric transfer sheet according to claim 5, and a capacitor element using the dielectric pattern as a dielectric is formed. Built-in multilayer circuit board. 少なくとも以下の工程を備えることを特徴とする請求項6記載の多層回路板の製造方法。
(a)絶縁基材11の両面に配線パターン及びキャパシタ用下部電極を形成した回路基板を作製する工程。
(b)請求項1乃至4のいずれか一項に記載の高誘電率複合材料組成物を用いて誘電体溶液を作製し、この誘電体溶液を支持フィルム上に塗布し、加熱、乾燥して所定厚の誘電体層を形成して、誘電体転写シートを作製する工程。
(c)回路基板のキャパシタ用下部電極上に前記誘電体転写シートを用いてパターン転写し、加熱・硬化して所定厚の誘電体パターンを形成する工程。
(d)誘電体パターン上にキャパシタ用上部電極を形成してキャパシタ素子を形成し、受動素子内蔵の多層回路板を作製する工程。
The method for manufacturing a multilayer circuit board according to claim 6, comprising at least the following steps.
(A) A step of manufacturing a circuit board in which a wiring pattern and a lower electrode for a capacitor are formed on both surfaces of an insulating base material 11.
(B) A dielectric solution is prepared using the high dielectric constant composite material composition according to any one of claims 1 to 4, and the dielectric solution is applied on a support film, heated and dried. Forming a dielectric layer having a predetermined thickness to produce a dielectric transfer sheet;
(C) a step of transferring a pattern on the capacitor lower electrode of the circuit board using the dielectric transfer sheet, and heating and curing to form a dielectric pattern having a predetermined thickness.
(D) forming a capacitor element by forming an upper electrode for the capacitor on the dielectric pattern, and fabricating a multilayer circuit board with a built-in passive element;
JP2002219241A 2002-07-29 2002-07-29 Multilayer circuit board manufacturing method Expired - Fee Related JP4010202B2 (en)

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US7531112B2 (en) 2004-05-04 2009-05-12 Samsung Electro-Mechanics Co., Ltd. Composition for forming dielectric, capacitor produced using composition, and printed circuit board provided with capacitor
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US7531112B2 (en) 2004-05-04 2009-05-12 Samsung Electro-Mechanics Co., Ltd. Composition for forming dielectric, capacitor produced using composition, and printed circuit board provided with capacitor
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