JP2004048037A5 - - Google Patents

Description

Electronic component assembly

The present invention relates to an electronic component mounting body .

  The demand for higher information processing speed has not stopped, and the frequency of semiconductor chips has been increasing year by year. In order to increase the speed of semiconductor operation, it is necessary not only to increase the density and performance of integrated chips but also to improve the characteristics of peripheral circuits. In particular, ensuring the stability of the transmission line and power supply line is one of the essential requirements for high-speed stable operation, and it is no exaggeration to say that peripheral component devices are involved in the life and death of the semiconductor chip body.

  Capacitors are one of the important devices that ensure the stability of transmission lines and power lines. In addition to the high frequency performance of the capacitor itself, the capacitor that achieves high-speed operation is required to have low impedance in the wiring leading to the capacitor.

  In order to operate the semiconductor chip at a high frequency, it is necessary to dispose a capacitor or the like in the vicinity of the semiconductor chip in order to reduce wiring loss. In the prior art, there is only a limited method such as forming a minute capacitor or the like inside a semiconductor, and the effect is becoming insufficient to make further high-frequency operation stable. Further, when a capacitor or the like is arranged around the semiconductor chip, there is a problem that the mounting board area becomes large.

The present invention has been made to solve these problems, and an object of the present invention is to provide an electronic component mounting body in which a capacitor or the like can be arranged in the vicinity of a semiconductor chip while reducing an increase in mounting area.

  In order to achieve the above object, the present invention has the following configuration.

That is, an electronic component mounting body according to the present invention is an electronic component mounting body in which a first electronic component and a second electronic component are mounted in this order on a wiring board, and the first electronic component includes a dielectric. and oppositely disposed electrode layers sandwiching the extraction electrode or outer electrode connected to the electrode layer, through the first electronic component without being electrically connected to the electrode layer, are arranged in lattice points The through electrode is electrically connected to the wiring board and the second electronic component, and the dielectric and the electrode layer disposed opposite to each other as a capacitor serve as a capacitor. It is characterized by functioning . Since the first electronic component of the present invention has through electrodes arranged in a lattice point, for example, the first electronic component of the present invention is mounted on a wiring board, and another second electronic component (for example, The second electronic component can be connected to the wiring substrate via the through electrode. The first electronic component of the present invention, have a dielectric and electrode layers sandwiching the, they function as a capacitor. As a result, the capacitor can be disposed in the vicinity of the semiconductor chip while reducing the increase in mounting area, and both high-frequency driving of the semiconductor chip and suppression of the increase in mounting area can be achieved.

In addition, it is preferable that the said penetration electrode has penetrated in the direction substantially parallel to the lamination direction of an electrode layer and a dielectric material. The first electronic component having such a configuration is easy to manufacture.

In the electronic component mounting body according to the present invention, the electrode layer includes a first electrode layer and a second electrode layer disposed between the through electrodes, and the first electrode layer and the second electrode layer. The electrode layers may be arranged so as to cross in a lattice shape with the dielectric interposed therebetween. Or the said electrode layer can also be set as the structure which consists of a 1st electrode layer and 2nd electrode layer which are arrange | positioned on both sides of the said dielectric material so that it may have an opposing part of predetermined magnitude | size. According to such a configuration, a capacitor having a desired capacity can be easily formed in the first electronic component.

In the electronic component mounting body according to the present invention, the extraction electrode can be formed on the same surface as the through electrode. That is, the extraction electrode and the through electrode can be formed so as to be exposed on the same surface of the first electronic component. According to such a configuration, the connection with the wiring substrate for supplying voltage to the electrode layer in the first electronic component is the same in the same plane as the through electrode (for example, the lower surface or the upper surface of the first electronic component). Can be done. As a result, the mounting area can be further reduced. In addition, the second electronic component installed on the first electronic component of the present invention can be easily connected to the extraction electrode.

In the electronic component mounting body according to the present invention, the external electrode can be formed on a different surface from the through electrode. For example, the through electrode is formed so as to be exposed on the outer surface of the upper and lower first electronic component, to form external electrodes on the peripheral surface of the first electronic component. According to such a configuration, when the first electronic component of the present invention is mounted on a wiring board or the like, it is possible to easily solder the external electrode to the wiring board or the like.

In the electronic component mounting body according to the present invention, it is preferable that a plurality of capacitance forming regions are formed between the first electrode layer and the second electrode layer. Thereby, a capacitor can be formed in the first electronic component.

At this time, it is preferable that the extraction electrode or the external electrode connected to the first electrode layer and the second electrode layer forming each capacitance forming region are insulated from each other. With this configuration, a plurality of independent capacitors can be formed in the first electronic component.

Furthermore, when the capacitance forming regions having different capacitances are formed, a plurality of capacitors having different capacitances can be formed in the first electronic component.

As described above, according to the electronic component mounting body of the present invention, the electrostatic capacity can be formed in the vicinity of the semiconductor chip, so that the semiconductor chip can be driven at a high frequency and an increase in mounting area can be suppressed at the same time.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a schematic plan view showing an example of a first electronic component 10 according to Embodiment 1 of the present invention. FIG. 2 is a perspective view showing an internal structure of a part of the first electronic component shown in FIG.

  A first electrode layer 1 formed in a plurality of stripe shapes (stripes) on substantially the same plane, and a second electrode layer 2 formed in a plurality of stripe shapes (stripes) on substantially the same plane. Are stacked with the dielectric layer 3 interposed therebetween. By crossing the stripe directions of the electrode layers 1 and 2, a capacitance forming region 9 is formed at each crossing portion and functions as a capacitor.

A first extraction electrode 4 is connected to the first electrode layer 1, and a second extraction electrode 5 is connected to the second electrode layer 2. These can be used as connection terminals when the capacitor function is exhibited. The extraction electrodes 4 and 5 may be formed so as to penetrate in the stacking direction of the first electronic component 10 as shown in FIGS. 1 and 2, or may appear only on the surface of one side of the first electronic component. Or a combination thereof.

In the first electronic component 10, a through electrode 6 is formed in addition to the extraction electrodes 4 and 5. The electrical connection between the second electronic components different from the first electronic components of the present invention disposed above and below the first electronic component 10 of the present invention by using the through electrode 6 is as if the first electronic of the present invention . The parts are secured as they are without any parts.

  As a material for forming the electrode layers 1 and 2, metals such as aluminum, copper, and gold, and metal compounds can be used. In addition, as a material for forming the dielectric layer 3, resin materials such as acrylic resin, epoxy resin, vinyl resin, ceramic materials such as barium titanium oxide ceramics and strontium titanium oxide ceramics, or titanium oxide In addition, metal oxides and metalloid oxides such as aluminum oxide and silicon oxide can be used. Further, as the extraction electrodes 4 and 5 and the through electrode 6, in addition to metals such as gold, silver, aluminum, copper, and solder material, conductive paste or conductive polymer can be used.

  The electrode layers 1 and 2 can be formed by vacuum deposition, sputtering, plating, or the like. As a means for forming the electrode layers 1 and 2 in a stripe shape, a method using a patterned solid mask, a method using an evaporating mask such as oil, a method of performing laser etching, or the like can be used as appropriate. As the oil masking material, various oils such as hydrocarbon oils, mineral oils, and fluorine oils can be used.

  The dielectric layer 3 is formed by a method in which the resin layer material is vaporized by heating with a heater or is atomized by ultrasonic waves or spray, and a ceramic material or a metal material is formed by sputtering or vapor deposition. The method can be used.

  In order to form a hole-like opening in the dielectric layer 3 in order to form the extraction electrodes 4 and 5 and the through electrode 6, a method of removing the dielectric at a predetermined position by laser etching after forming the dielectric layer, A method of forming a dielectric layer after applying an evaporating mask such as oil can be used. In order to provide a dot-like evaporable mask, a method of applying by an ink jet method in which fine droplets of a masking material are ejected from a fine hole is particularly effective.

  When an oil mask is applied, examples of oils that can be used include hydrocarbon oils, mineral oils, and fluorine oils.

  In the case of using an evaporative mask, if an excessive masking material remains after each layer is formed, it can be removed using a far-infrared heater, electron beam, ultraviolet lamp irradiation, plasma irradiation, or the like as necessary.

FIG. 3 is a schematic perspective view of an apparatus for explaining a part of an example of a manufacturing process for manufacturing the first electronic component shown in FIGS. 1 and 2.

  The support is carried in from a support carry-in chamber 11 provided on the right side of the apparatus, and taken out from a support take-out port 22 provided on the left side through a predetermined process. The gate valve 12a and the gate valve 12b are formed of a plurality of rooms divided for each process, and these are formed in a vacuum chamber maintained at a predetermined degree of vacuum. The support is moved in each room in order by a transfer system 21 provided in the approximate center of the apparatus, and is subjected to predetermined processing. As the support, for example, a sheet-like or plate-like base material made of resin, ceramics, metal, or the like can be used, and a dielectric thin film and a metal thin film are laminated thereon.

  The support carried into the support carrying-in chamber 11 is carried into the vacuum chamber with the gate valve 12a being opened. First, a lower insulator film is formed on the surface of the support by the lower insulator film source 13. At this time, an opening (hole) may be formed by applying a patterning mask to a position where the through electrode and the extraction electrode are formed or by laser beam irradiation. Subsequently, a first patterned metal thin film (first electrode layer) is formed by a combination of the metal thin film deposition source 14 and the patterning mask. Next, a first dielectric thin film (dielectric layer) is formed by the dielectric thin film source 15. After the formation of the first dielectric thin film, the dielectric thin film at the position where the extraction electrode and the through electrode are formed is removed by the laser processing machine 16. Subsequently, a second patterning metal thin film (second electrode layer) is formed by a combination of the metal thin film deposition source 17 and the patterning mask. Next, a dielectric thin film source 18 forms a second dielectric thin film (dielectric layer). Even after the formation of the second dielectric thin film, the dielectric thin film at the position where the extraction electrode and the through electrode are formed is removed by the laser processing machine 19. Thereafter, the metal thin film forming source 14, the dielectric thin film forming source 15, the laser processing machine 16, the metal thin film forming source 17, the dielectric thin film forming source 18, and the laser processing machine 19 are sequentially sent to the predetermined number of times. Only these operations are repeated. After the film is formed a predetermined number of times, the upper insulator film forming source 20 forms the upper insulator film. At this time, an opening (hole) may be formed by applying a patterning mask to a position where the through electrode and the extraction electrode are formed or by laser beam irradiation. Thereafter, the gate valve 12b is opened and taken out from the support takeout port 22.

  The through electrode is formed by applying a conductive paste to a through hole formed at the position of the through electrode and then hardening the paste.

  Similarly, a conductive paste is applied to the opening so that the extraction electrode is connected to the metal thin film exposed at the opening formed at the position of the extraction electrode of the upper insulating film and / or the lower insulating film. It may be the same plane as or a slight protrusion.

  Thereafter, the laminate is cut into a predetermined size as required at an appropriate process step.

The formed first electronic component 10 of the present invention is used by being disposed between a carrier 28 on which a semiconductor chip 27 is mounted and a wiring board 30, for example, as schematically shown in FIG. The signal terminal 29a on the lower surface of the carrier 28 is connected to a wiring pattern 31 formed on the wiring substrate 30 through the through electrode 6 of the first electronic component 10 of the present invention as necessary. The power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring substrate 30 through the through electrode 6 and further connected to the first extraction electrode 4. Further, another power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring substrate 30 through the through electrode 6 and further connected to the second extraction electrode 5. The connection between the through electrode 6 and the lead-out electrodes 4 and 5 may be a method using the wiring pattern 31 on the surface of the wiring board 30 as shown in FIG. 4 or other methods such as a connection inside the wiring board 30. May be.

  Since the first electrode layer 1 connected to the first extraction electrode 4 and the second electrode layer 2 connected to the second extraction electrode 5 are insulated with the dielectric layer in between, for example, If the power supply terminal connected to one extraction electrode 4 is the Vcc terminal and the power supply terminal connected to the second extraction electrode 5 is the GND terminal, the first extraction electrode 4 and the second extraction electrode 5 are The formed capacitor functions as a pass capacitor for a power supply at a position close to the semiconductor chip without increasing the mounting area, and is preferable in terms of high-frequency driving and mounting area reduction.

[Example 1]
Aluminum as the metal thin film material, aluminum oxide as the dielectric material, silver paste as the conductive paste, fluorine oil as the oil masking material to be applied by the ink jet method, with a lattice point of 0.8 mm pitch within an area of 17 mm square 484 through-electrodes having a diameter of 0.25 mm were formed, and 462 extraction electrodes 4 and 5 of the electrode layer 1 and the electrode layer 2 were formed at lattice points with a pitch of 0.8 mm between the through-electrodes each having a diameter of 0.25 mm. . Electrode layer 1 and electrode layer 2 are both multi-stripes with a width of 0.65 mm, electrode layers are 30 nm thick, dielectric layers are 0.5 microns thick, and dielectric layers are 80 layers. went. Insulating layers of 4 microns each were formed on the top and bottom of the laminate for the purpose of improving the strength of the laminate. For simplicity, the upper and lower insulator layers are made of the same material as the dielectric layer. The lower insulator layer was drilled with masking to form a through electrode and a lead electrode. In order to form a through electrode also in the upper insulator layer, a hole was formed by masking. A conductive paste was applied and hardened in the recesses (openings) generated at the positions of the through-electrodes subjected to the hole processing and the positions of the extraction electrodes.

  As a result, it was confirmed with an LCR meter that a capacitor having a total capacity of 1 μF and tan δ 1.2% was formed inside the laminate having a thickness of about 50 microns. Similar results were obtained when a thin wire of solder material was used instead of the conductive paste.

(Embodiment 2)
FIG. 5 is a schematic plan view showing another example of the first electronic component 10 according to Embodiment 2 of the present invention. FIG. 6 is a perspective view showing an internal structure of a part of the first electronic component shown in FIG.

  A first electrode layer 1 formed in a plurality of stripes on substantially the same plane and a second electrode layer 2 formed in a plurality of stripes on substantially the same plane form a dielectric layer 3. They are sandwiched and stacked. By crossing the stripe directions of the electrode layers 1 and 2, a capacitance forming region 9 is formed at each crossing portion and functions as a capacitor.

External electrodes 7 and 8 are formed on the outer peripheral surface of the first electronic component 10. The first external electrode 7 is electrically connected to the first electrode layer 1, and the second external electrode 8 is electrically connected to the second electrode layer 2, respectively, which are connected when the capacitor function is performed. It can be used as a terminal. The external electrodes 7 and 8 may be formed on opposite side surfaces of the first electronic component as shown in FIG. 5, or may be formed only on one side of the opposite side surfaces, or a combination thereof. May be. Further, the external electrodes 7 and 8 may be formed so as to reach both surfaces (upper surface and lower surface) in the stacking direction of the first electronic component 10 as shown in FIG. 6, or only on one side of the first electronic component. It may be formed so as to appear, or a combination thereof. A plurality of strip electrode layers 1 (or 2) may be connected to one external electrode 7 (or 8). Thereby, the capacity | capacitance of the capacitor | condenser formed can be changed.

In addition to the external electrodes 7 and 8, a through electrode 6 is formed in the first electronic component 10. The electrical connection between the second electronic components different from the first electronic components of the present invention disposed above and below the first electronic component 10 of the present invention by using the through electrode 6 is as if the first electronic of the present invention . The parts are secured as they are without any parts.

  As a material for forming the electrode layers 1 and 2, metals such as aluminum, copper, and gold, and metal compounds can be used. In addition, as a material for forming the dielectric layer 3, resin materials such as acrylic resin, epoxy resin, vinyl resin, ceramic materials such as barium titanium oxide ceramics and strontium titanium oxide ceramics, or titanium oxide Metal oxides such as aluminum oxide and silicon oxide, and metalloid oxides can be used. In addition, as the external electrodes 7 and 8 and the through electrode 6, a conductive paste or a conductive polymer can be used in addition to a metal such as gold, silver, aluminum, copper, or a solder material.

  The electrode layers 1 and 2 can be formed by vacuum deposition, sputtering, plating, or the like. As a means for forming the electrode layers 1 and 2 in a stripe shape, a method using a patterned solid mask, a method using an evaporating mask such as oil, a method of performing laser etching, or the like can be used as appropriate. As the oil masking material, various oils such as hydrocarbon oils, mineral oils, and fluorine oils can be used.

  The dielectric layer 3 is formed by a method in which the resin layer material is vaporized by heating with a heater or is atomized by ultrasonic waves or spray, and a ceramic material or a metal material is formed by sputtering or vapor deposition. The method can be used.

  In order to form the external electrodes 7 and 8, methods such as thermal spraying, plating, and application of a conductive paste can be used.

  In order to form a hole-like opening in the dielectric layer 3 in order to form the through electrode 6, a method of removing the dielectric at a predetermined position by laser etching after forming the dielectric layer, or an evaporating mask such as oil in advance For example, a method of forming a dielectric layer after applying the above can be used. In order to provide a dot-like evaporative mask, it is particularly effective to apply the masking material by an ink jet method in which fine droplets of the masking material are ejected from the fine holes.

  When an oil mask is applied, examples of oils that can be used include hydrocarbon oils, mineral oils, and fluorine oils.

  In the case of using an evaporative mask, if an excessive masking material remains after each layer is formed, it can be removed using a far-infrared heater, electron beam, ultraviolet lamp irradiation, plasma irradiation, or the like as necessary.

FIG. 7 is a schematic cross-sectional view showing a part of an example of a manufacturing apparatus for manufacturing the first electronic component shown in FIGS. 5 and 6.

  The inside of the vacuum chamber 24 is composed of a plurality of rooms divided for each process, and an exhaust system 25 including a vacuum pump is connected to the chambers of the metal thin film deposition sources 14 and 17. Each room in the vacuum chamber is maintained at a predetermined degree of vacuum. A support body (can 23 in FIG. 7) that rotates and moves in the direction of the arrow is disposed as a transport system at a substantially central portion of the vacuum chamber 24.

  First, a lower insulator film is formed on the can 23 by an insulator film source (dielectric thin film film source 15 or 18 in FIG. 7). After film formation, the insulator film at the position of the through electrode may be removed by the laser processing machine 16 or 19 to form an opening (hole). At this time, the shutters 26 of the metal thin film deposition sources 14 and 17 are closed. Subsequently, the shutter 26 is opened, and a first patterning metal thin film (first electrode layer) is formed by a combination of the metal thin film deposition source 14 and the patterning mask. Next, a first dielectric thin film (dielectric layer) is formed by the dielectric thin film source 15. After the formation of the first dielectric thin film, the laser thin film machine 16 removes the dielectric thin film at the position of the through electrode. Subsequently, a second patterned metal thin film (second electrode layer) is formed by a combination of the metal thin film deposition source 17 and the patterning mask. Next, a dielectric thin film source 18 forms a second dielectric thin film (dielectric layer). Even after the formation of the second dielectric thin film, the dielectric thin film at the position of the through electrode is removed by the laser processing machine 19. Thereafter, the metal thin film forming source 14, the dielectric thin film forming source 15, the laser processing machine 16, the metal thin film forming source 17, the dielectric thin film forming source 18, and the laser processing machine 19 are sequentially sent to the predetermined number of times. Only these operations are repeated. After a predetermined number of film formations, the shutter 26 is closed, and an upper insulator film is formed by an insulator film source (dielectric thin film film source 15 or 18 in FIG. 7). After film formation, the insulator film at the position of the through electrode may be removed by the laser processing machine 16 or 19 to form an opening (hole).

  The through electrode is formed by applying a conductive paste to a through hole formed at the position of the through electrode and then hardening the paste.

  Thereafter, the laminate is cut into a predetermined size as required at an appropriate process step.

  External electrodes are formed on the end face of the laminate cut to a predetermined size by a method such as thermal spraying or paste application.

  When forming the external electrodes, the number of stripe electrodes to be dividedly connected to the external electrodes can be adjusted using a mask, a resist, or the like.

The formed first electronic component 10 of the present invention is used by being disposed between a carrier 28 on which a semiconductor chip 27 is mounted and a wiring board 30 as schematically shown in FIG. 8, for example. The signal terminal 29a on the lower surface of the carrier 28 is connected to a wiring pattern 31 formed on the wiring substrate 30 through the through electrode 6 of the first electronic component 10 of the present invention as necessary. The power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring board 30 through the through electrode 6 and further connected to the first external electrode 7. Further, another power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring substrate 30 through the through electrode 6 and further connected to the second external electrode 8. The connection between the through electrode 6 and the external electrodes 7 and 8 may be a method using the wiring pattern 31 on the surface of the wiring board 30 as shown in FIG. 8, or the connection inside the wiring board 30 or the first electron of the present invention . Other methods such as connection on the upper surface of the component may be used. The connection between the external electrodes 7 and 8 and the wiring board 30 can be performed by soldering 32 or other methods.

  The first electrode layer 1 connected to the first external electrode 7 and the second electrode layer 2 connected to the second external electrode 8 are insulated with the dielectric layer interposed therebetween. If the power supply terminal connected to the first external electrode 7 is the Vcc terminal and the power supply terminal connected to the second external electrode 8 is the GND terminal, the first external electrode 7 is interposed between the second external electrode 8 and the second external electrode 8. The formed capacitor functions as a pass capacitor for the power supply at a position close to the semiconductor chip with almost no increase in the mounting area, and is preferable in terms of high frequency driving and a reduction in mounting area.

[Example 2]
Aluminum is used as the metal thin film material, acrylate is used as the dielectric material, silver paste is used as the conductive paste, and a carbon dioxide gas laser having an output of 10 W is used as the laser. 484 through electrodes were formed. The electrode layer 1 and the electrode layer 2 are both 0.8 mm wide multi-stripes, and the electrode layer is 30 nm thick, the dielectric layer is 0.25 microns thick, and the dielectric layer is 140 layers repeatedly. went. Insulating layers of 5 microns each were formed on the top and bottom of the laminate for the purpose of improving the strength of the laminate. For simplicity, the upper and lower insulator layers are made of the same material as the dielectric layer. The upper insulator layer and the lower insulator layer were subjected to laser processing for forming a through electrode. Thereafter, the laminate was cut and a brass layer was formed to a thickness of 20 μm on the cut surface by thermal spraying. Subsequently, a solder plating layer was formed to 60 μm to form an external electrode. A conductive paste was applied and hardened in the recesses (openings) generated at the positions of the through electrodes subjected to hole machining.

  As a result, it was confirmed by an LCR meter that a capacitor having a total capacity of 1 μF and tan δ 0.8% was formed inside the laminate having a thickness of about 50 microns.

(Embodiment 3)
FIG. 9 is a schematic plan view showing an example of the first electronic component 10 according to Embodiment 3 of the present invention. FIG. 10 is a perspective view showing an internal structure of a part of the first electronic component shown in FIG.

A plurality of first electrode layers 1 formed in a predetermined pattern on substantially the same plane, and a plurality of second electrode layers 2 formed in a predetermined pattern on substantially the same plane include a dielectric layer 3. They are sandwiched and stacked. By forming each first electrode layer 1 and each second electrode layer 2 so as to at least partially overlap (opposite each other), a capacitance forming region 9 is formed in each overlapping portion (opposing portion). Formed and functions as a capacitor. The capacitance can be changed by changing the size of each overlapping portion (capacitance formation region 9).

A first extraction electrode 4 is connected to the first electrode layer 1, and a second extraction electrode 5 is connected to the second electrode layer 2. These can be used as connection terminals when the capacitor function is exhibited. The extraction electrodes 4 and 5 may be formed so as to penetrate in the stacking direction of the first electronic component 10 as shown in FIGS. 9 and 10, or may appear only on the surface of one side of the first electronic component. Or a combination thereof.

In the first electronic component 10, a through electrode 6 is formed in addition to the extraction electrodes 4 and 5. The electrical connection between the second electronic components different from the first electronic components of the present invention disposed above and below the first electronic component 10 of the present invention by using the through electrode 6 is as if the first electronic of the present invention . The parts are secured as they are without any parts.

  As a material for forming the electrode layers 1 and 2, metals such as aluminum, copper, and gold, and metal compounds can be used. In addition, as a material for forming the dielectric layer 3, resin materials such as acrylic resin, epoxy resin, vinyl resin, ceramic materials such as barium titanium oxide ceramics and strontium titanium oxide ceramics, or titanium oxide In addition, metal oxides and metalloid oxides such as aluminum oxide and silicon oxide can be used. Further, as the extraction electrodes 4 and 5 and the through electrode 6, in addition to metals such as gold, silver, aluminum, copper, and solder material, conductive paste or conductive polymer can be used.

  The electrode layers 1 and 2 can be formed by vacuum deposition, sputtering, plating, or the like. Further, as means for forming the electrode layers 1 and 2 into a predetermined pattern (shape) such as a polygonal shape, a method using a patterned solid mask, a method using an evaporating mask such as oil, a method of performing laser etching, etc. Can be used as appropriate. As the oil masking material, various oils such as hydrocarbon oils, mineral oils, and fluorine oils can be used.

  The dielectric layer 3 is formed by a method in which the resin layer material is vaporized by heating with a heater or is atomized by ultrasonic waves or spray, and a ceramic material or a metal material is formed by sputtering or vapor deposition. The method can be used.

  In order to form a hole-like opening in the dielectric layer 3 in order to form the extraction electrodes 4 and 5 and the through electrode 6, a method of removing the dielectric at a predetermined position by laser etching after forming the dielectric layer, A method of forming a dielectric layer after applying an evaporating mask such as oil can be used. In order to provide a dot-like or linear evaporative mask, it is also effective to apply an ink-jet method in which fine droplets of a masking material are ejected from a fine hole.

  When an oil mask is applied, examples of oils that can be used include hydrocarbon oils, mineral oils, and fluorine oils.

  In the case of using an evaporative mask, if an excessive masking material remains after each layer is formed, it can be removed using a far-infrared heater, electron beam, ultraviolet lamp irradiation, plasma irradiation, or the like as necessary.

The specific method for manufacturing the first electronic component of the present embodiment can be manufactured in the same manner using the apparatus shown in the first or second embodiment, for example.

The formed first electronic component 10 of the present invention is used by being disposed between a carrier 28 on which a semiconductor chip 27 is mounted and a wiring board 30, for example, as schematically shown in FIG. The signal terminal 29a on the lower surface of the carrier 28 is connected to a wiring pattern 31 formed on the wiring substrate 30 through the through electrode 6 of the first electronic component 10 of the present invention as necessary. The power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring substrate 30 through the through electrode 6 and further connected to the first extraction electrode 4. Further, another power supply terminal 29 b on the lower surface of the carrier 28 is connected to the wiring substrate 30 through the through electrode 6 and further connected to the second extraction electrode 5. The connection between the through electrode 6 and the extraction electrodes 4 and 5 may be a method using the wiring pattern 31 on the surface of the wiring board 30 as shown in FIG. 11, or may be other methods such as a connection inside the wiring board 30. May be. Alternatively, the power terminal 29 b on the lower surface of the carrier 28 may be connected to the extraction electrodes 4 and 5 on the lower surface of the carrier, and the first electronic component 10 of the present invention and the wiring substrate 30 may be connected on the surface of the wiring substrate 30. In the figure, reference numeral 9 denotes a capacitance forming region formed by the overlapping portion of the first metal thin film and the second metal thin film.

  Since the first electrode layer 1 connected to the first extraction electrode 4 and the second electrode layer 2 connected to the second extraction electrode 5 are insulated with the dielectric layer in between, for example, If one power supply terminal connected to one extraction electrode 4 is a Vcc terminal and another power supply terminal connected to the second extraction electrode 5 is a GND terminal, the first extraction electrode 4 and the second extraction electrode 5 Capacitors formed between these layers are preferable in terms of high-frequency driving and reduction in mounting area because they function as a pass capacitor for power supply at a position close to the semiconductor chip without increasing the mounting area.

[Example 3]
Aluminum was used as the metal thin film material, aluminum oxide as the dielectric material, and silver-based paste as the conductive paste. When forming an electrode layer, a solid mask with a hole in the shape of a window is used, and when forming a dielectric layer, fluorine-based oil is used as an oil masking material provided by an ink jet method, and within an area of 15 mm square. A total of 200 penetrating electrodes with a diameter of 0.7 mm and a diameter of 0.3 mm are formed in a row of 20 × 10 rows, and various rectangular electrode layers 1 and 2 having a width of 1 to 2 mm are provided between the penetrating electrode rows. The capacitor is formed so that the area of the overlapping portion of both electrode layers is different. Two extraction electrodes were formed in each capacitor by filling a 0.25 mm × 1 mm hole-shaped portion with a conductive paste. Lamination was repeated such that the electrode layer had a thickness of 30 nm, the dielectric layer had a thickness of 0.3 microns, and the dielectric layer had 130 layers. Insulating layers of 8 microns each were formed on the top and bottom of the laminate for the purpose of improving the strength of the laminate. For simplicity, the upper and lower insulator layers are made of the same material as the dielectric layer. The lower insulator layer was drilled with masking to form a through electrode and a lead electrode. In order to form a through electrode also in the upper insulator layer, a hole was formed by masking. A conductive paste was applied and hardened in the recesses (openings) generated at the positions of the through-electrodes subjected to the hole processing and the positions of the extraction electrodes.

  As a result, a total of nine capacitors with capacities of 0.047 μF × 4, 0.068 μF × 2, 0.1 μF × 2, 0.47 μF × 1 were tan δ 1.2% and a thickness of about 60 microns. It was confirmed with an LCR meter that it was formed inside the laminate.

  The material for forming the electrode layer of the present invention is not limited to Embodiments 1 to 3 and Examples 1 to 3, and metals such as aluminum, copper, and gold, and metal compounds can be used. In addition, as a material for forming the dielectric layer, resin materials such as acrylic resin, epoxy resin, vinyl resin, ceramic materials such as barium titanium oxide ceramics and strontium titanium oxide ceramics, titanium oxide, Metal oxides and metalloid oxides such as aluminum oxide and silicon oxide can be used. As the through electrode, a conductive paste, a metal such as gold, silver, aluminum, copper, or a solder material, or a conductive polymer can be used. In addition to the conductive paste, the lead-out electrode and the external electrode can be made of a metal such as brass, zinc, solder material, gold, silver, copper, or a conductive polymer alone or after forming a brass layer, for example. They can be used in appropriate combinations by forming a paste layer.

  In the explanatory diagrams of the first to third embodiments, the arrangement of the electrode layers for forming the capacitance forming region is such that the electrode layers are orthogonal to each other when viewed from above in the stacking direction. Although the capacitance forming region is configured to be formed, the capacitance forming region is not necessarily rectangular. For example, the shape of the capacitance forming region formed at the intersecting portion can be changed to another shape such as a parallelogram by, for example, crossing stripe electrode layers obliquely.

  Further, the shapes of the extraction electrode and the through electrode are not limited to the shapes schematically shown in the drawings, and can be changed to other shapes.

The structures shown in the first to third embodiments may be mixed in the same first electronic component. For example, the striped electrode layer shown in the first and second embodiments is formed, the extraction electrode shown in the first embodiment is connected to a part of the electrode layers, and the second embodiment is connected to the other electrode layers. The external electrodes shown in (1) may be connected. Alternatively, the striped electrode layer shown in the first and second embodiments and the electrode layer having the predetermined pattern shown in the third embodiment are formed, and some of the electrode layers are shown in the first or third embodiment. The extraction electrode may be connected, and the external electrode shown in Embodiment Mode 2 may be connected to the other electrode layer.

  In addition, the opening (hole) in the dielectric layer for forming the through electrode and the extraction electrode is formed by applying laser etching or evaporating oil each time the dielectric layer is laminated. Instead of adopting such a method, the opening (hole) may be formed by irradiating a predetermined portion with laser light after lamination. In other words, a through electrode can be formed by forming a through hole in the stacking direction so as not to contact any electrode layer and filling the through hole with a conductive material. Also, a hole (or a through hole) with a predetermined depth is formed so as to contact only the desired electrode layer, and the conductive layer is in contact with the electrode layer exposed on the inner peripheral wall (and the bottom of the hole) of the hole. By filling the material, a take-out electrode in which a desired electrode layer is electrically connected can be formed.

In addition, the first electronic component of the present invention has been described as an example having a capacitor function, but other functions (for example, a coil, a noise filter, a laminated circuit board, etc.) in addition to the capacitor function or together with the capacitor function. It may have.

It is a schematic plan view which shows an example of the 1st electronic component which concerns on Embodiment 1 of this invention. It is a perspective view which shows the internal structure of a part of 1st electronic component shown in FIG. It is a schematic perspective view of the apparatus for demonstrating a part of manufacturing process for manufacturing the 1st electronic component shown in FIG. It is the schematic diagram which showed the usage example of the 1st electronic component shown in FIG. It is a schematic plan view which shows an example of the 1st electronic component which concerns on Embodiment 2 of this invention. FIG. 6 is a perspective view showing an internal structure of a part of the first electronic component shown in FIG. 5. It is the schematic sectional drawing which showed the manufacturing apparatus for manufacturing the 1st electronic component shown in FIG. It is the schematic diagram which showed the usage example of the 1st electronic component shown in FIG. It is a schematic plan view which shows an example of the 1st electronic component which concerns on Embodiment 3 of this invention. FIG. 10 is a perspective view showing an internal structure of a part of the first electronic component shown in FIG. 9. It is the schematic diagram which showed the usage example of the 1st electronic component shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st electrode layer 2 2nd electrode layer 3 Dielectric layer 4 1st extraction electrode 5 2nd extraction electrode 6 Through electrode 7 1st external electrode 8 2nd external electrode 9 Capacitance formation area 10 1st electronic component 11 Support body carrying-in chamber 12a, 12b Gate valve 13 Lower insulator film forming source 14 Metal thin film film forming source 15 Dielectric thin film film forming source 16 Laser beam machine 17 Metal thin film film forming source 18 Dielectric thin film film forming Source 19 Laser processing machine 20 Upper insulator film forming source 21 Transport system 22 Support body outlet 23 Can 24 Vacuum tank 25 Exhaust system 26 Shutter 27 Semiconductor chip 28 Carrier 29a Signal terminal 29b Power supply terminal 30 Wiring board 31 Wiring pattern 32 Solder

Claims (10)

An electronic component mounting body in which the first electronic component and the second electronic component are mounted in this order on the wiring board,
Wherein the first electronic component includes an electrode layer disposed opposite each other across the dielectric, and the extraction electrode or outer electrode connected to the electrode layer, wherein the first electronic component without being electrically connected to said electrode layer And penetrating electrodes arranged in lattice points ,
The through electrode electrically connects the wiring board and the second electronic component,
An electronic component mounting body, wherein the dielectric and the electrode layer disposed to face each other function as a capacitor . The electronic component mounting body according to claim 1 , wherein the extraction electrode appears only on one surface of the first electronic component. The electrode layer includes a first electrode layer and a second electrode layer disposed between the through electrodes, and the first electrode layer and the second electrode layer sandwich the dielectric. The electronic component mounting body according to claim 1, wherein the electronic component mounting body is disposed so as to intersect in a lattice pattern. 2. The electronic component mounting body according to claim 1, wherein the electrode layer includes a first electrode layer and a second electrode layer that are disposed with the dielectric therebetween so as to have a facing portion having a predetermined size. The electronic component mounting body according to claim 1, wherein the extraction electrode is formed on the same plane as one end of the through electrode. The electronic component mounting body according to claim 1, wherein the external electrode is formed on a different surface from the through electrode. The electronic component mounting body according to claim 3, wherein a plurality of capacitance forming regions are formed between the first electrode layer and the second electrode layer. The electronic component mounting body according to claim 7, wherein the extraction electrode or the external electrode connected to the first electrode layer and the second electrode layer forming each capacitance forming region is insulated from each other. The electronic component mounting body according to claim 7 or 8, wherein electrostatic capacity forming regions having different electrostatic capacities are formed. The electronic component mounting body according to claim 1, wherein the second electronic component includes a semiconductor chip.