JP2003339161A - Synchronous rectifying switching power supply - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a synchronous rectifying switching power supply, capable of improving the efficiency of the power supply by making the back electromotive force induced to a coke coil flow back extending over the entire off-time of switching using a simple configuration. <P>SOLUTION: The synchronous rectifying switching power supply comprises a hold circuit 3, that holds a voltage between the gate G and source S of a MOSFET-Q2 at a holding voltage VH that is higher than the on-voltage VON of the MOSFET-Q2 at the off-time of a MOSFET-Q, and feeds a flow-back current IB via an on-resistor of low resistance, while holding the MOSFET-Q2 in on-state. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generates a high frequency pulse by performing on / off switching on a direct current generated by rectifying and smoothing an alternating current, and again rectifying and smoothing the high frequency pulse passed through a pulse transformer. The present invention relates to a synchronous rectification type switching power supply, and more particularly, to a synchronous rectification type switching power supply for maintaining a freewheeling FET in an ON state when a switching is off and flowing a freewheeling current to improve efficiency of the power supply.

[0002]

2. Description of the Related Art FIG. 7 shows a basic configuration of a conventional switching power supply. In FIG. 7, the switching power supply 50 is
The full-wave rectifier 52, the smoothing capacitor C1, the switching element 53, the pulse transformer T1, the reset circuit 54, the rectifying diode D1, the freewheeling diode D2, the choke coil L, and the smoothing capacitor C2.

The switching power supply 50 rectifies an input AC power supply (for example, commercial power supply) 51 by a full-wave rectifier 52, smoothes it with a smoothing capacitor C1 and converts it into a DC power supply VS, and switches the converted DC power supply VS. An element 53 (for example, FET: field effect transistor) is used to perform on / off driving at a predetermined duty ratio, a high frequency pulse (for example, frequency 50 kHz) is converted, and the pulse transformer T1 is converted.
By applying to the primary side of the pulse transformer T1, a high frequency pulse output is obtained from the secondary side of the pulse transformer T1.

When the switching element 53 is on, the high frequency pulse obtained from the secondary side of the pulse transformer T1 is half-wave rectified by the rectifier diode D1 and smoothed by the choke coil L and the smoothing capacitor C2 to generate the DC power source VO1. To do.

On the other hand, when the switching element 53 is off, a counter electromotive force (flyback voltage) is generated on the primary side of the pulse transformer T1, and the counter electromotive force (flyback voltage) is applied to the resistor R and the capacitor C. A negative voltage is generated on the secondary side of the pulse transformer T1 by the reset current IR flowing when absorbed by the reset circuit 54 composed of the diode D. The negative voltage generated on the secondary side of the pulse transformer T1 does not form a closed circuit because the rectifying diode D1 is in the off state, and does not flow any current.

When the switching element 53 is off, the current flowing through the choke coil L via the rectifier diode D1 is stopped, so that the smoothing capacitor C2 side of the choke coil L has a + (plus) polarity and the rectifier diode D.
A flyback voltage of negative polarity is generated on the cathode side of 1, and the flyback voltage causes a return current IB to flow in the path of the smoothing capacitor C2 → the freewheeling diode D2 → the choke coil L to charge the smoothing capacitor C2. Therefore, it acts to increase the efficiency of the DC power source generated in the smoothing capacitor C2.

The power capacity of the DC power source generated in the smoothing capacitor C2 can be adjusted by changing the ON / OFF duty of the drive signal of the switching element 53.

[0008]

In the conventional switching power supply 50 shown in FIG. 7, a large current is required for a load in recent years, and a rectifying diode D1 and a free wheeling diode D are required.
When the current flowing through 2 is large, the rectifying diode D1
Also, there is a problem that the voltage drop of the free wheeling diode D2 becomes large, causing a power loss of the switching power supply 50 and reducing the power supply efficiency.

For example, even if a Schottky diode is used as the rectifier diode D1, if the flowing current is 10 A (ampere), the voltage drop between the anode and the cathode is 0.5 V.
(Volts) and power loss of 5 W (Watt). On the other hand, the free wheeling diode D2 is similar to the rectifying diode D1 and causes power loss.

In order to solve such a problem, the power loss of the rectifying diode D1 and the free wheeling diode D2 has been improved. FIG. 8 shows a block diagram of a conventional synchronous rectification type switching power supply. It should be noted that the portion of the pulse transformer T2 shown in FIG. 8 preceding the primary side has the same configuration as that shown in FIG.

In FIG. 8, a pulse transformer T2 is provided with an additional winding H1 and an additional winding H2 in addition to the secondary winding M2 on the secondary side, and a MOSFET (Metal) having a low on-resistance is provided in parallel with the rectifying diode D1. Oxide Semiconductor Field Ef
fect Transistor: MOS field effect transistor) -Q1
(Rectification FET) is connected, and MOSFET-Q2 (recirculation FET) with low on-resistance is connected in parallel with the circulation diode D2.
Connect. MOSFET-Q1 and MOSFET-
Q2 is a metal-oxide-se between the gate G and the source S due to the structure.
The gate capacitance of the miconductor is configured.

Secondary winding M2, additional winding H1, additional winding H
2 means the same winding direction as the P1 terminal of the secondary winding M2.
When there is + (plus) between the P2 terminals (the + side is +),
The additional winding H1 is set such that the P3 terminal-terminal P1 is + (plus) and the additional winding H2 terminal P2-terminal P4 is + (plus) (both are marked +). On the contrary, when the P1 terminal-P2 terminal of the secondary winding M2 is-(minus) (the side marked with-is-), the P3 terminal-terminal P1 of the additional winding H1 is- (minus), Winding H2
-(Minus) is between the P2 terminal and P4 terminal (in both cases, the-mark side is-).

P3 terminal and gate G of MOSFET-Q1
A resistor R1 is connected between the sources S of MOSFET-Q1.
Is connected to the anode side of the rectifying diode D1, and the MOSFE
The drain of T-Q1 is connected to the cathode side of the rectifying diode D1.

On the other hand, a resistor R2 is connected between the P4 terminal and the gate G of the MOSFET-Q2, the source S of the MOSFET-Q2 is connected to the anode side of the free wheeling diode D2, and MO
The drain of SFET-Q2 is connected to the cathode side of the free wheeling diode D2.

FIG. 9 shows a voltage waveform diagram generated on the secondary side of the pulse transformer. (A) shows P1-P of the secondary winding M2
2 shows a voltage waveform between two windings, (b) shows a voltage waveform between P3 and P1 of the additional winding H1, and (c) shows a voltage waveform between P4 and P2 of the additional winding H2. The voltage waveforms in FIGS. 7A and 7B are shown in FIG.
The switching element 53 shown in (1) generates a + (plus) rectangular wave in the ON period TON, and the switching element 53 generates a- (minus) waveform in the OFF period TOFF. On the other hand, in the voltage waveform of FIG. 7C, the switching element 53 shown in FIG. 7 generates a − (minus) rectangular wave in the ON period TON, and the switching element 53 in the OFF period TOFF, +
Generates a (plus) waveform. In addition, in the figures (b) and (c), VON is MOSFET-Q, respectively.
1 and the voltage at which the MOSFET-Q2 is turned on (voltage between the gate G and the source S).

Next, referring to FIGS. 8 and 9, MOSF
The operation of ET-Q1 will be described. When the switching element 53 shown in FIG. 7 is turned on, the rectangular wave (voltage between P3 and P1) shown in FIG. 9B is MOS-connected through the resistor R1.
It is applied between the gate G and the source S of the FET-Q1, and when the rectangular wave (voltage between P3 and P1) is VON (Q1 ON voltage) or more, the MOSFET-Q1 is turned on and the rectifier diode D1 is turned on with low resistance (ON). It shunts with a resistance and supplies a rectified current to the choke coil L. In addition, MOSFET
The ON state of -Q1 always continues for the ON period TON of the switching element 53.

As described above, the rectifier diode D1 has a MOS
Since the FET-Q1 is connected in parallel and the MOSFET-Q1 is turned on so that the rectification current flows through the on-resistance of the MOSFET-Q1, the power loss due to the rectification diode D1 is greatly reduced when the rectification current is a large current. Therefore, the efficiency of the power supply can be improved.

Next, referring to FIG. 8 and FIG.
The operation of the FET-Q2 will be described. When the switching element 53 shown in FIG. 7 is off, the + (plus) waveform (voltage between P4 and P2) shown in FIG. 9C is between the gate G and the source S of the MOSFET-Q2 via the resistor R2. Is applied to V + and the + (plus) waveform (voltage between P4 and P2) is VON
The MOSFET-Q2 is turned on at a voltage higher than (Q2 ON voltage), the freewheeling diode D2 is shunted with a low resistance (ON resistance), and the freewheeling current IB is smoothed by the smoothing capacitor C2.
-> ON resistance of MOSFET-Q2-> Flow through the path of choke coil L.

As described above, the freewheeling diode D2 has a MOS
Since the FET-Q2 is connected in parallel and the MOSFET-Q2 is turned on so that the return current IB flows through the on-resistance of the MOSFET-Q2, the power loss due to the return diode D2 is significantly reduced when the return current is large. Power supply efficiency can be improved.

However, the on-state of the MOSFET-Q2 is the switching element 5 as shown in FIG. 9 (c).
Since it is a part of the off period TOFF of No. 3, when the + (plus) waveform (voltage between P4 and P2) falls below VON (Q2 on voltage), the MOSFET-Q2 is turned off and the MOSF is turned off.
The return current IB flowing through ET-Q2 stops, and the return current IB
Flows into the freewheeling diode D2, so the freewheeling diode D
There is a problem that efficiency improvement of the power source cannot be achieved sufficiently due to the power loss of 2.

The present invention has been made in order to solve such a problem, and its object is a simple structure in which a counter electromotive force induced in a choke coil is circulated throughout a switching OFF time. It is to provide a synchronous rectification type switching power supply that improves the efficiency of the above.

[0022]

In order to solve the above problems, a synchronous rectification type switching power supply according to the present invention circulates a counter electromotive force generated in an additional winding on the secondary side of a pulse transformer when a switching element is turned off. It is characterized by comprising a hold circuit for applying the voltage to the gate of the power-supply FET and holding the free-wheeling FET on.

In the synchronous rectification type switching power supply according to the present invention, the counter electromotive force generated in the additional winding on the secondary side of the pulse transformer is applied to the gate of the freewheeling FET when the switching element is turned off, and the freewheeling FET is turned on. Since it has a hold circuit that keeps it on, the freewheeling FET can be kept on and a freewheeling current can flow to charge the smoothing capacitor during the off period of the switching element. It is possible to improve efficiency.

Further, the hold circuit according to the present invention is characterized by being constituted by a gate capacitance between the gate and the source of the freewheeling FET and a Zener diode.

The hold circuit according to the present invention is a return F
Since it is composed of the gate capacitance between the gate and source of ET and the Zener diode, during the OFF period of the switching element, the gate capacitance is generated through the reverse direction characteristic of the Zener diode (diode forward bias: about 0.6 V). Is charged and the gate of the free-wheeling FET is maintained at a Zener voltage or higher, so that the free-wheeling FET can be turned on to flow a free-wheeling current.

Further, the hold circuit according to the present invention is
It is characterized in that it is composed of a gate capacitance between the gate and source of the freewheeling FET and a capacitor connected in parallel with the Zener diode.

The hold circuit according to the present invention is a return F
Since it was composed of the gate capacitance between the gate and source of ET and the capacitor connected in parallel with the Zener diode, when the switching element changed from OFF to ON, the gate capacitance was charged until the Zener diode was discharged. The charge can be extracted via the capacitor, and the turn-off time of the freewheeling FET can be shortened.

Further, the hold circuit according to the present invention is characterized by being constituted by a gate capacitance between the gate and the source of the freewheeling FET and a Schottky diode connected in parallel with the Zener diode.

The hold circuit according to the present invention includes a free-wheeling F
Since it is composed of the gate capacitance between the gate and source of ET and the Schottky diode connected in parallel with the Zener diode, the gate capacitance can be charged at high speed via the Schottky diode when the switching element is off, and it can be used for freewheeling. It is possible to speed up the time when the FET is turned on.

Further, the hold circuit according to the present invention is
It is characterized by being constituted by a gate capacitance between the gate and source of the freewheeling FET, a capacitor connected in parallel with the Zener diode, and a Schottky diode.

The hold circuit according to the present invention is a return F
Since it is composed of a gate capacitance between the gate and source of ET, a capacitor connected in parallel with a Zener diode, and a Schottky diode, fast charge and discharge of the gate capacitance when the switching element is on and off. Therefore, it is possible to shorten the on-time and off-time of the freewheeling FET.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a basic configuration diagram of an embodiment of a synchronous rectification type switching power supply according to the present invention. In FIG. 1, the synchronous rectification type switching power supply 1 is
Full-wave rectifier DB consisting of diode bridge, smoothing capacitor C1, reset circuit 2 consisting of diode D, capacitor C, and resistor R, M forming a switching element
OSFET-Q, primary winding M1, secondary winding M2, secondary side additional winding H1, pulse transformer T provided with additional winding H2, rectifier diode D1, MOSFET-Q1 connected in parallel with rectifier diode D1, Freewheeling diode D2, MOSFET-Q2 connected in parallel with freewheeling diode D2, hold circuit 3, choke coil L, smoothing capacitor C2
Equipped with.

The synchronous rectification type switching power supply 1 is an AC power supply VAC (for example, commercial power supply) input to an AC input terminal.
Is full-wave rectified by the full-wave rectifier DB. Smoothing capacitor C1
Is a full-wave rectified waveform (signal) including a ripple component and is converted into a DC power supply VS, and MOSFET-Q is
The converted DC power supply VS is driven on / off at a predetermined duty ratio, and a high frequency pulse (for example, frequency 50 kHz)
By applying to the primary winding M1 of the pulse transformer T after the conversion, the high frequency pulse output is obtained from the secondary winding M2 (between the P1 terminal and the P2 terminal) of the pulse transformer T.

An additional winding H1 and an additional winding H2 are provided on the secondary side of the pulse transformer T, and the additional winding H1 (P
An output (electromotive force) in the same phase as the secondary winding M2 is obtained from the 3 terminal-P1 terminal), and an output (electromotive force) in the opposite phase to the secondary winding M2 from the additional winding H2 (P4 terminal-P2 terminal) ( Electromotive force) is obtained.

MOS connected in parallel with rectifier diode D1
FET (Metal Oxide Semiconductor Field Effect Tra
nsistor: MOS field effect transistor) -Q1 (rectification FET) is configured with a low on-resistance, and the gate G is connected to the P3 terminal of the additional winding H1 via the resistor R1.
The source S is connected to the anode side (P1 terminal side) of the rectifier diode D1, and the drain is connected to the cathode side of the rectifier diode D1.

On the other hand, the MOSFET-Q2 (reflux FET) connected in parallel with the free wheeling diode D2 has a low on-resistance, and the gate G is connected via the hold circuit 3 to the P4 terminal of the additional winding H2. , The source S is connected to the anode side (P2 terminal side) of the free wheeling diode D2, and the drain is connected to the cathode side of the free wheeling diode D2.

MOSFET with MOSFET-Q turned on
The operation of T-Q1 (FET for rectification) will be described. M
When the OSFET-Q is on, the square wave (voltage between P3 and P1) of the additional winding H1 of + (plus) polarity is supplied to the gate G of the MOSFET-Q1 (rectification FET) via the resistor R1.
-Square wave applied between sources S (voltage between P3 and P1)
Is MOSFET-Q at a voltage higher than VON (Q1 ON voltage)
1, the rectifier diode D1 is shunted with a low resistance (ON resistance) to supply a rectified current to the choke coil L. The on-state of the MOSFET-Q1 is M
It always continues as long as OSFET-Q is on.

On-resistance (low resistance) of MOSFET-Q1
The + (plus) polarity rectangular wave (voltage between P3 and P1) that has passed through is smoothed by the choke coil L and the smoothing capacitor C2, and the DC power supply VO3 is supplied from both ends of the smoothing capacitor C2.
Occurs.

As described above, the rectifier diode D1 has a MOS
Since the FET-Q1 is connected in parallel and the MOSFET-Q1 is turned on so that the rectification current flows through the on-resistance of the MOSFET-Q1, the power loss due to the rectification diode D1 is greatly reduced when the rectification current is a large current. Therefore, the efficiency of the power supply can be improved. In addition, MOSFET-Q
The action and effect of 1 are the same as those shown in FIG.

Next, the MO-FET in which the MOSFET-Q is in the off state.
The operation of SFET-Q2 (return FET) will be described. Prior to description of the operation of the MOSFET-Q2 (reflux FET), the waveform applied to the MOSFET-Q2 (reflux FET) will be described.

FIG. 2 is a waveform diagram applied to the freewheeling FET according to the present invention. (A) is an ON / OFF waveform diagram of MOSFET-Q, and (b) is an additional winding H2 (P4 terminal-
Waveform diagram of voltage generated between terminals (P2), (c) is MOS
Hold voltage V between gate G and source S of FET-Q2
It is a H waveform diagram.

When the MOSFET-Q shown in (a) is off, a voltage waveform of + (plus) polarity shown in (b) is generated in the additional winding H2 (between P4 terminal and P2 terminal). This voltage waveform rises at time t0 and at time t1 MOSFET
It is assumed that the on-voltage VON of -Q2 is reached, the voltage continues to increase and becomes the peak voltage VP, and then gradually decreases and then becomes the on-voltage VON again at the time t2 and becomes 0 at the time t4.

When the MOSFET-Q is off and a voltage waveform of + (plus) polarity in the diagram (b) is generated in the additional winding H2 (between the P4 terminal and the P2 terminal), this voltage is passed through the hold circuit 3. Gate-source S of MOSFET-Q2
Applied between.

The hold circuit 3 is composed of a voltage holding circuit, and when the MOSFET-Q is off, the MOSFET-Q is
The voltage between the gate G and the source S of 2 (reflux FET) is M
Holding voltage V higher than ON voltage VON of OSFET-Q2
It is configured to hold H, keep the MOSFET-Q2 in the ON state, and allow the return current IB to flow through the low resistance ON resistance.

In FIG. 2C, the hold circuit 3
Holding voltage VH (hatched display) is
After reaching the ON voltage VON of the FET-Q2,
It is sufficient that the value is larger than the ON voltage VON (VH ≧ VON) until the time t4 when the OFF of -Q is completed.

As described above, the synchronous rectification type switching power supply 1 according to the present invention includes a switching element (MOSFET).
-Q) is turned off, the counter electromotive force generated in the additional winding H2 on the secondary side of the pulse transformer T is supplied to the freewheeling FET (MOSFE).
Since the holding circuit 3 for applying the voltage to the gate G of T-Q2) and holding the freewheeling FET on is provided, the freewheeling FET is provided during the off period of the switching element (MOSFET-Q).
The (MOSFET-Q2) can be held in the ON state to flow the return current IB to charge the smoothing capacitor C2, and the efficiency of the power supply can be improved with a simple configuration.

Note that MOSFET-Q1 and MOSF
When there is a demand for lowering the on resistance of ET-Q2, MOSFET-Q1 and MOSFET-Q2
By connecting two or more of each in parallel, it is possible to sufficiently meet the demand.

FIG. 3 is a circuit diagram of an embodiment of the hold circuit according to the present invention. The hold circuit diagram in (a),
A hold voltage characteristic diagram is shown in FIG. In the figure (a), the hold circuit 4 is a MOSFET (Metal Oxide Se
(gate field effect transistor: MOS field effect transistor) -a gate capacitance CG of a metal-oxide-semiconductor structure formed between a gate G and a source S of Q2
And a Zener diode ZD inserted between the P4 terminal of the additional winding H2 and the gate G of the MOSFET-Q2.

In the Zener diode ZD, the characteristic between the P4 terminal and the gate G has the anode-cathode characteristic of the silicon diode, and the characteristic between the gate G and the P4 terminal has the Zener characteristic (Zener voltage VZ).

In the diagram (b), the voltage VD between the P4 terminal and the P2 terminal of the additional winding H2 rises at time t0, passes the ON voltage VON of the MOSFET-Q2 and the Zener voltage VZ at time t2, and passes through time ta. Reaches the peak voltage VP at
After that, at time tb, the minimum voltage is reached at time tc via the Zener voltage VZ and the ON voltage VON.

As for the hold voltage VH, a voltage lower than the voltage VD between the P4 terminal and the P2 terminal by the forward voltage VF (approximately 0.6 V) of the diode is charged in the gate capacitance CG, and the peak voltage Vp (actually, VP -VF).

Next, even if the voltage VD between the P4 terminal and the P2 terminal decreases, the zener diode ZD remains off until the voltage VD becomes VP-VZ.
H holds the peak voltage VP (actually, VP-VF).

Then, the hold voltage VH decreases as the voltage VD decreases and the zener diode ZD is turned on, and when VH = VZ, the zener voltage VZ is reduced.
Since then, the Zener diode ZD is kept in the OFF state until VD = 0, and therefore the Zener voltage VZ is maintained.

Therefore, by setting the Zener voltage VZ higher than the ON voltage VON (VZ> VON),
When the switching element (MOSFET-Q) is off, M
OSFET-Q2 (reflux FET) can be held in the ON state.

As described above, the hold circuit 3 according to the present invention has the gate G of the freewheeling FET (MOSFET-Q2).
Since it is composed of the gate capacitance CG between the source S and the Zener diode ZD, the switching element (MOSFE
During the off period of TQ, the reverse direction of the Zener diode ZD (forward bias VF of the diode: about 0.6).
V) Charging the gate capacitance CG via the characteristics, and returning FE
The gate G of T (MOSFET-Q2) is set to the Zener voltage V
Since it is held at Z or higher, the freewheeling FET can be turned on to flow a freewheeling current.

FIG. 4 is a circuit diagram of another embodiment of the hold circuit according to the present invention. In FIG. 4, the hold circuit 4
Is the gate capacitance CG formed between the gate G and the source S of the MOSFET-Q2, and the P4 terminal and M of the additional winding H2.
It is composed of a Zener diode ZD inserted between the gates G of the OSFET and Q2, and a discharging capacitor CD connected in parallel to the Zener diode ZD.

The hold circuit 4 includes a switching element (M
OSFET-Q) is off and additional winding H2 (P4 terminal-
MOS when voltage VD between P2 terminals is + (plus) period
The operation of holding the FET-Q2 on is the same as that of the hold circuit 3.

The hold circuit 4 includes a discharge capacitor C.
By connecting D in parallel with the Zener diode ZD, the switching element (MOSFET-Q) is turned on, and the voltage VD of the additional winding H2 (P4 terminal-P2 terminal)
Since the electric charge charged in the gate capacitance CG can be extracted through the capacitor CD for a short time from the moment when − turns to negative (minus) until the discharge current flows in the Zener diode ZD, the MOSFET-Q2 is turned on. The time to turn off can be increased.

As described above, the hold circuit 4 according to the present invention has the gate G of the freewheeling FET (MOSFET-Q2).
Since it is composed of the gate capacitance CG between the source S and the capacitor CD connected in parallel with the Zener diode ZD,
When the switching element (MOSFET-Q) changes from off to on, the charge charged in the gate capacitance CG can be extracted via the capacitor CD until the Zener diode ZD is discharged, and the freewheeling FET (MO
It is possible to speed up the time when the SFET-Q2) is turned off.

FIG. 5 is a circuit diagram of another embodiment of the hold circuit according to the present invention. In FIG. 5, the hold circuit 5
Is the gate capacitance CG formed between the gate G and the source S of the MOSFET-Q2, and the P4 terminal and M of the additional winding H2.
It is composed of a Zener diode ZD inserted between the gate G of the OSFET-Q2 and a Schottky diode DC connected in parallel to the Zener diode ZD.

In the hold circuit 5, the switching element (MOSFET-Q) is off and the voltage VD of the additional winding H2 (between the P4 terminal and the P2 terminal) is connected by connecting the Schottky diode DC in parallel with the zener diode ZD.
When the voltage rises to + (plus), the charge to the gate capacitance CG can be accelerated, and the time when the MOSFET-Q2 is turned on can be accelerated.

As described above, the hold circuit 5 according to the present invention has the gate G of the freewheeling FET (MOSFET-Q2).
Since it is composed of the gate capacitance CG between the source S and the Schottky diode DC connected in parallel with the Zener diode ZD, the gate capacitance CG can be quickly transferred to the gate capacitance CG via the Schottky diode DC when the switching element (MOSFET-Q) is off. It can be charged and the turn-on time of the return FET can be shortened.

FIG. 6 is a circuit diagram of another embodiment of the hold circuit according to the present invention. In FIG. 6, the hold circuit 6
Is the gate capacitance CG formed between the gate G and the source S of the MOSFET-Q2, and the P4 terminal and M of the additional winding H2.
Zener diode ZD inserted between the gate G of OSFET-Q2, discharge capacitor CD connected in parallel to Zener diode ZD, and Zener diode ZD
, And a Schottky diode DC connected in parallel with.

In the hold circuit 6, the switching element (MOSFET-Q) is turned on by the capacitor CD, and the voltage VD of the additional winding H2 (P4 terminal-P2 terminal) is supplied.
Since the electric charge charged in the gate capacitance CG can be extracted through the capacitor CD for a short time from the moment when − turns to negative (minus) until the discharge current flows in the Zener diode ZD, the MOSFET-Q2 is turned on. The time to turn off can be increased.

Further, the hold circuit 6 includes a switching element (MOSFET) by a Schottky diode DC.
When -Q) is off and the voltage VD of the additional winding H2 (P4 terminal-P2 terminal) rises to + (plus), the charging of the gate capacitance CG is accelerated, and MOSFET-Q2
Can turn on faster.

As described above, the hold circuit 6 according to the present invention has the gate G of the freewheeling FET (MOSFET-Q2).
Since it is composed of the gate capacitance CG between the source S, the capacitor CD and the Schottky diode DC connected in parallel with the Zener diode ZD, the gate capacitance CG is charged at high speed when the switching element (MOSFET-Q) is turned on and off. Further, it is possible to discharge at high speed from the gate capacitance CG, and it is possible to shorten the on time and off time of the freewheeling FET.

[0067]

As described above, in the synchronous rectification type switching power supply according to the present invention, when the switching element is turned off, the counter electromotive force generated in the additional winding on the secondary side of the pulse transformer is applied to the gate of the freewheeling FET. FET for reflux
Since it has a hold circuit that keeps on, the freewheeling FET can be kept on and the freewheeling current can flow to charge the smoothing capacitor during the off period of the switching element. The efficiency of can be improved.

Further, since the hold circuit according to the present invention is composed of the gate capacitance between the gate and source of the freewheeling FET and the Zener diode, the reverse direction of the Zener diode (diode of the diode) is maintained during the OFF period of the switching element. Forward bias: about 0.6 V) The gate capacitance is charged through the characteristics and the gate of the freewheeling FET is maintained at the Zener voltage or higher, so that the freewheeling FET can be turned on to flow the freewheeling current.

Further, the hold circuit according to the present invention is
Since it consists of the gate capacitance between the gate and source of the freewheeling FET and the capacitor connected in parallel with the Zener diode, when the switching element changes from OFF to ON, the gate capacitance is charged until the Zener diode is discharged. The generated charge can be extracted via the capacitor, and the turn-off time of the freewheeling FET can be shortened.

Further, since the hold circuit according to the present invention is constituted by the gate capacitance between the gate and the source of the freewheeling FET and the Schottky diode connected in parallel with the Zener diode, the Schottky diode is connected when the switching element is turned off. Through this, the gate capacitance can be charged at high speed and the turn-on time of the freewheeling FET can be shortened.

Further, the hold circuit according to the present invention is
Since it is composed of the gate capacitance between the gate and source of the freewheeling FET, the capacitor connected in parallel with the Zener diode, and the Schottky diode, the gate capacitance is charged at high speed and discharged at high speed when the switching element is turned on and off. Can be FE for reflux
It is possible to speed up the on time and the off time of T.

[Brief description of drawings]

FIG. 1 is a basic configuration diagram of an embodiment of a synchronous rectification type switching power supply according to the present invention.

FIG. 2 is a waveform diagram applied to a freewheeling FET according to the present invention.

FIG. 3 is a circuit diagram of an embodiment of a hold circuit according to the present invention.

FIG. 4 is a circuit diagram of another embodiment of the hold circuit according to the present invention.

FIG. 5 is a circuit diagram of another embodiment of the hold circuit according to the present invention.

FIG. 6 is a circuit diagram of another embodiment of the hold circuit according to the present invention.

FIG. 7 is a basic configuration diagram of a conventional switching power supply.

FIG. 8 is a configuration diagram of a conventional synchronous rectification type switching power supply.

FIG. 9 is a voltage waveform diagram generated on the secondary side of the pulse transformer.

[Explanation of symbols]

1 Synchronous rectification type switching power supply 2 reset circuit 3, 4, 5, 6 hold circuit Q, Q1, Q2 MOSFET C1, C2 smoothing capacitors T pulse transformer M1 primary winding M2 secondary winding H1, H2 additional winding D1 rectifier diode D2 freewheeling diode L choke coil CG gate capacity ZD Zener diode CD diode DC Schottky diode

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5H006 CA02 CA07 CA12 CB01 CB07                       CC02 CC08 DB01                 5H730 AA14 BB23 BB57 CC01 DD04                       DD32 DD41 EE02 EE08 EE10                       EE13 EE65 EE72 FD24

Claims (5)

[Claims] 1. A rectifying and smoothing alternating current is turned on / off by a switching element to be converted into a high frequency pulse,
In a synchronous rectification type switching power supply which applies a converted high frequency pulse to the primary side of a pulse transformer and again rectifies and smoothes the high frequency pulse obtained from the secondary side of the pulse transformer to generate a direct current, wherein the switching element is turned off. At times, the counter electromotive force generated in the additional winding on the secondary side of the pulse transformer is applied to the freewheeling FET.
A synchronous rectification type switching power supply, which is provided with a hold circuit for applying a voltage to the gate of the FET and holding the return FET on. 2. The holding circuit is the freewheeling FET.
2. The synchronous rectification type switching power supply according to claim 1, comprising a gate capacitance between the gate and the source of 1. and a Zener diode. 3. The return circuit is configured such that the hold circuit includes the freewheeling FET.
2. The synchronous rectification type switching power supply according to claim 1, wherein the gate-source gate capacitance and the capacitor connected in parallel with the Zener diode are included. 4. The hold circuit includes the freewheeling FET.
3. The synchronous rectification type switching power supply according to claim 1, wherein the gate capacitance between the gate and the source is a Schottky diode connected in parallel with a Zener diode. 5. The return circuit includes the hold FET.
2. The synchronous rectification type switching power supply according to claim 1, wherein the gate capacitance between the gate and the source of the above, and a capacitor and a Schottky diode connected in parallel with the Zener diode.