JP2003332503A - Circuit board having heat sink and its manufacturing method - Google Patents
Circuit board having heat sink and its manufacturing methodInfo
- Publication number
- JP2003332503A JP2003332503A JP2002136586A JP2002136586A JP2003332503A JP 2003332503 A JP2003332503 A JP 2003332503A JP 2002136586 A JP2002136586 A JP 2002136586A JP 2002136586 A JP2002136586 A JP 2002136586A JP 2003332503 A JP2003332503 A JP 2003332503A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- mask layer
- base material
- insulating base
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はＩＣチップなどの電
子部品のための放熱板を有する回路基板及びその製造法
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having a heat sink for an electronic component such as an IC chip and a method for manufacturing the same.
【０００２】[0002]
【従来の技術とその問題点】近年、電子機器の小型化と
高機能化は益々促進されてきており、そのために回路基
板に対する高密度化の要求が高まってきている。高機能
化に伴う信号の高速化、消費電力の増加により回路基板
の発熱量は増加する。2. Description of the Related Art In recent years, miniaturization and high functionality of electronic devices have been increasingly promoted, and for this reason, there is an increasing demand for higher density of circuit boards. The heat generation of the circuit board increases due to the speeding up of signals and the increase in power consumption accompanying the higher functionality.
【０００３】しかしながら、従来の回路基板は実装密度
が向上するに従い回路基板の放熱性は低下するという問
題があった。これに対して回路基板に放熱板を設ける対
策が考えられるが、回路基板の高密度化の妨げになるば
かりか、実装部品点数が増加すると、実装コストも増大
し、実装時の歩留まりを下げる要因になる。However, the conventional circuit board has a problem that the heat dissipation of the circuit board deteriorates as the packaging density increases. On the other hand, a countermeasure to provide a heat sink on the circuit board may be considered, but this not only hinders the high density of the circuit board, but also increases the mounting cost as the number of mounted parts increases, which is a factor that reduces the yield at the time of mounting become.
【０００４】[0004]
【課題を解決するための手段】本発明は、上記従来例の
問題を好適に解決するための方法を提供するものであっ
て、回路基板の製造の際に、片面あるいは両面銅張り板
を用い、その絶縁べース材の所定の面にマスク層を形成
し、このマスク層を用いて前記絶縁ベース材にレーザー
加工、プラズマエッチング加工又はウエットエッチング
加工により溝又は孔加工を施し、この溝又は孔にめっき
を施した後、前記絶縁べース材の両端に再度マスク層を
設け、このマスク層を用いて前記めっきの周囲の前記絶
縁ベース材をレーザー加工、プラズマエッチング加工又
はウエットエッチング加工により除去することを特徴と
する放熱板を有する回路基板の製造法が採用される。DISCLOSURE OF THE INVENTION The present invention provides a method for suitably solving the above-mentioned problems of the conventional example, in which a single-sided or double-sided copper-clad plate is used in the production of a circuit board. , A mask layer is formed on a predetermined surface of the insulating base material, and the insulating base material is subjected to groove processing or laser etching processing, plasma etching processing or wet etching processing using the mask layer, and the groove or hole processing is performed. After plating the holes, mask layers are again provided at both ends of the insulating base material, and the insulating base material around the plating is laser-processed, plasma-etched or wet-etched using this mask layer. A method of manufacturing a circuit board having a heat sink characterized by being removed is adopted.
【０００５】また、本発明の他の方法では、回路基板の
製造の際に、片面あるいは両面銅張り板を用い、その絶
縁べース材の両端部にマスク層を形成し、このマスク層
を用いて前記絶縁ベース材にレーザー加工、プラズマエ
ッチング加工又はウエットエッチング加工により大きな
孔加工を施し、この孔の所定の部位に再度マスク層を形
成し、このマスク層を用いて前記孔にめっきを施し、次
いで前記マスク層を除去することを特徴とする放熱板を
有する回路基板の製造法も採用される。According to another method of the present invention, when a circuit board is manufactured, a single-sided or double-sided copper-clad board is used and mask layers are formed at both ends of the insulating base material. Large hole processing is performed on the insulating base material by laser processing, plasma etching processing or wet etching processing, a mask layer is formed again at a predetermined portion of the hole, and the hole is plated using the mask layer. Then, a method of manufacturing a circuit board having a heat sink characterized by removing the mask layer is also adopted.
【０００６】更に、本発明の方法では、回路基板の製造
の際に、両面銅張り板を用い、その第一の導体層の所定
の面にマスク層を形成し、このマスク層を用いて前記第
一の導体層にエッチングにより溝又は孔加工を施した
後、第二の導体層を用いて所定のマスク層を形成し、こ
のマスク層を用いて絶縁べース材にレーザー加工、プラ
ズマエッチング加工又はウエットエッチング加工により
孔加工を施すことを特徴とする放熱板を有する回路基板
の製造法が採用される。Further, in the method of the present invention, a double-sided copper-clad plate is used in the manufacture of a circuit board, a mask layer is formed on a predetermined surface of the first conductor layer, and the mask layer is used to form the mask layer. After making a groove or hole in the first conductor layer by etching, a predetermined mask layer is formed using the second conductor layer, and the insulating base material is laser-processed and plasma-etched using this mask layer. A method of manufacturing a circuit board having a heat dissipation plate, which is characterized in that holes are formed by working or wet etching.
【０００７】上記の如き回路基板の製造法によれば、電
子部品が実装される導体層上にフィン状又は柱状にめっ
きして放熱部を構成するか、又は電子部品が実装される
導体層に溝又は孔を設けて放熱部を構成した放熱板を有
する回路基板が提供される。According to the method of manufacturing a circuit board as described above, the heat dissipation portion is formed by fin-shaped or columnar plating on the conductor layer on which the electronic component is mounted, or the conductor layer on which the electronic component is mounted is formed. Provided is a circuit board having a heat dissipation plate having a groove or a hole to form a heat dissipation part.
【０００８】[0008]
【発明の実施の形態】以下、図示の実施例を参照しなが
ら本発明をさらに説明する。図１は、本発明の一実施例
による放熱板を有する回路基板の製造工程図を示す。回
路基板を製造する際に、同図（１）に示すように絶縁ベ
ース材１、導体層２を有する片面銅張り板等を用い、そ
して絶縁ベース材１をレーザー加工、プラズマエッチン
グ加工又はウエットエッチング加工により溝又は孔加工
を施すための所要のマスク層３を絶縁べース材１の上面
に形成する。マスク層３は両面銅張り板等を用いて形成
することも出来る。BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be further described below with reference to the illustrated embodiments. FIG. 1 is a process drawing of a circuit board having a heat sink according to an embodiment of the present invention. When a circuit board is manufactured, an insulating base material 1, a single-sided copper-clad plate having a conductor layer 2 or the like is used as shown in FIG. 1A, and the insulating base material 1 is subjected to laser processing, plasma etching processing, or wet etching. A required mask layer 3 for forming a groove or a hole by processing is formed on the upper surface of the insulating base material 1. The mask layer 3 can also be formed by using a double-sided copper clad plate or the like.
【０００９】そこで、同図（２）に示すようにマスク層
３を用いて絶縁ベース材１をレーザー加工、プラズマエ
ッチング加工又はウエットエッチング加工により溝又は
孔４の加工を施す。次に、同図（３）に示すようにめっ
きを行い、溝又は孔４をめっき５で充填し、マスク層３
を除去する。Therefore, as shown in FIG. 2B, the insulating base material 1 is processed by the laser processing, the plasma etching processing, or the wet etching processing using the mask layer 3 to process the groove or hole 4. Next, as shown in FIG. 3C, plating is performed to fill the groove or hole 4 with plating 5, and the mask layer 3 is formed.
To remove.
【００１０】次に、同図（４）に示すように第一の面に
レーザー加工、プラズマエッチング加工又はウエットエ
ッチング加工によりめっき５の周囲の絶縁ベース材１を
除去するために絶縁べース材１の両端の上面にマスク層
６を形成する。Next, as shown in FIG. 4 (4), an insulating base material for removing the insulating base material 1 around the plating 5 is formed on the first surface by laser processing, plasma etching processing or wet etching processing. Mask layers 6 are formed on the upper surfaces of both ends of 1.
【００１１】その後、同図（５）に示すようにマスク層
６を用いて、レーザー加工、プラズマエッチング加工又
はウエットエッチング加工によりめっき５の周囲の絶縁
ベース材１を除去した後、マスク層６を除去する。これ
により、導体層２上にはフィン状又は柱状のめっき５が
形成されて放熱板となる。Thereafter, as shown in FIG. 5 (5), the mask layer 6 is used to remove the insulating base material 1 around the plating 5 by laser processing, plasma etching processing or wet etching processing, and then the mask layer 6 is removed. Remove. As a result, fin-shaped or columnar-shaped plating 5 is formed on the conductor layer 2 to form a heat sink.
【００１２】このような放熱板を有する回路基板は図２
に示す方法も適用することが可能である。先ず、同図
（１）のように絶縁べース材１、導体層２からなる片面
銅張り板等を用い、その絶縁べース材１の上面両端に所
要のマスク層３を形成する。A circuit board having such a heat sink is shown in FIG.
The method shown in can also be applied. First, as shown in FIG. 1A, a required mask layer 3 is formed on both ends of the upper surface of the insulating base material 1 by using a single-sided copper-clad plate composed of the insulating base material 1 and the conductor layer 2.
【００１３】次いで、同図（２）の如く絶縁べース材１
にレーザー加工、プラズマエッチング加工又はウエット
エッチング加工を施してそこに大きな孔６を形成した段
階で、マスク層３を除去する。そこで、同図（３）のよ
うに孔６の部位に再度所要のマスク層７を形成する。Next, as shown in FIG. 2B, the insulating base material 1
The mask layer 3 is removed at the stage where the large holes 6 are formed by laser processing, plasma etching processing or wet etching processing on the. Therefore, the required mask layer 7 is formed again at the site of the hole 6 as shown in FIG.
【００１４】次に、同図（４）のようにマスク層７の間
にフィン状又は柱状のめっき５を施した後、マスク層７
を除去すると、同図（５）のように上記実施例と同様な
放熱板有する回路基板を構成することができる。Next, as shown in FIG. 4 (4), fin-like or columnar plating 5 is applied between the mask layers 7, and then the mask layers 7 are formed.
By removing the above, a circuit board having a heat radiating plate similar to that of the above embodiment can be constructed as shown in FIG.
【００１５】図3は上記実施例に示した放熱板を有する
回路基板にICチップなどの電子部品８を実装した例を示
し、電子部品８は導体層２Ａの側に実装され、回路基板
の端子部２Ｂと接続される。FIG. 3 shows an example in which an electronic component 8 such as an IC chip is mounted on the circuit board having the heat dissipation plate shown in the above embodiment. The electronic component 8 is mounted on the side of the conductor layer 2A and the terminals of the circuit board are mounted. It is connected to the section 2B.
【００１６】図４は、本発明の他の実施例による放熱板
を有する回路基板の製造工程図である。回路基板を製造
する際に、同図（１）に示すように第一の導体層１１、
絶縁ベース材１０、導体層１２を有する両面面銅張り板
を用いる。この場合、第一の導体層１１が第二の導体層
１２よりも厚いことが望ましい。そして、第一の導体層
１１をウエットエッチング加工により溝又は孔加工を施
すためのマスク層１３を第一の導体層１１の面に形成す
る。FIG. 4 is a manufacturing process diagram of a circuit board having a heat sink according to another embodiment of the present invention. When manufacturing a circuit board, as shown in (1) of FIG.
A double-sided copper clad plate having an insulating base material 10 and a conductor layer 12 is used. In this case, it is desirable that the first conductor layer 11 be thicker than the second conductor layer 12. Then, a mask layer 13 for forming grooves or holes in the first conductor layer 11 by wet etching is formed on the surface of the first conductor layer 11.
【００１７】そこで、同図（２）に示すようにマスク層
１３を用いて第一の導体層１１をウエットエッチング加
工により溝又は孔１４の加工を施す。次に、同図（３）
に示すようにマスク層１３を除去し、第二の導体層１２
を用いてマスク層１５を設ける。Therefore, as shown in FIG. 2B, the first conductor layer 11 is processed by the wet etching process using the mask layer 13 to form the groove or hole 14. Next, the same figure (3)
The mask layer 13 is removed as shown in FIG.
Is used to provide the mask layer 15.
【００１８】その後、同図（４）に示すようにマスク層
１５を用いて絶縁ベース材１０をレーザー加工、プラズ
マエッチング加工又はウエットエッチング加工により除
去して第一の導体層１１の底面を露出させる大きな孔１
６を形成することにより、第一の導体層１１にフィン状
又は柱状の放熱部を形成した回路基板を構成できる。After that, as shown in FIG. 4D, the insulating base material 10 is removed by laser processing, plasma etching processing or wet etching processing using the mask layer 15 to expose the bottom surface of the first conductor layer 11. Big hole 1
By forming 6, the circuit board in which the fin-shaped or columnar heat dissipation portion is formed on the first conductor layer 11 can be formed.
【００１９】図５は上記実施例に示した放熱板を有する
回路基板にICチップなどの電子部品８を実装した例を示
し、電子部品８は第一の導体層１１の底面に実装され、
第二の導体層１２により形成された端子部１５Ａと接続
される。FIG. 5 shows an example in which an electronic component 8 such as an IC chip is mounted on the circuit board having the heat dissipation plate shown in the above embodiment. The electronic component 8 is mounted on the bottom surface of the first conductor layer 11.
It is connected to the terminal portion 15A formed by the second conductor layer 12.
【００２０】[0020]
【発明の効果】本発明による回路基板は、電子部品を実
装する部分に放熱板を有しているから、従来の回路基板
では困難であった、実装部品点数を増加させたり回路基
板の高密度化を妨げることなく、放熱性を向上できる。Since the circuit board according to the present invention has the heat sink in the portion where the electronic parts are mounted, it is difficult to increase the number of mounted parts and the high density of the circuit board, which was difficult with the conventional circuit board. The heat dissipation can be improved without hindering heat transfer.
【００２１】また、本発明の他の方法によれば、電子部
品を実装する部分の絶縁ベース材を除去しているので、
従来の回路基板では困難であった実装後の回路基板の厚
さを低減することが可能になり、従来の製造方法では困
難であった放熱性および実装性を有する回路基板を安価
に安定的に提供できる。Further, according to another method of the present invention, the insulating base material in the portion where the electronic component is mounted is removed,
It is possible to reduce the thickness of the circuit board after mounting, which was difficult with conventional circuit boards, and it is possible to stably and inexpensively manufacture circuit boards with heat dissipation and mountability that were difficult with conventional manufacturing methods. Can be provided.
【図１】本発明の一実施例による放熱板を有する回路基
板の製造工程図。FIG. 1 is a manufacturing process diagram of a circuit board having a heat sink according to an embodiment of the present invention.
【図２】本発明の他の実施例による放熱板を有する回路
基板の製造工程図。FIG. 2 is a manufacturing process diagram of a circuit board having a heat sink according to another embodiment of the present invention.
【図３】本発明の放熱板を有する回路基板に電子部品を
実装した説明図。FIG. 3 is an explanatory diagram in which electronic components are mounted on a circuit board having a heat sink of the present invention.
【図４】本発明の他の実施例による放熱板を有する回路
基板の製造工程図。FIG. 4 is a manufacturing process diagram of a circuit board having a heat sink according to another embodiment of the present invention.
【図５】図４の放熱板を有する回路基板に電子部品を実
装した説明図。5 is an explanatory diagram in which electronic components are mounted on a circuit board having the heat dissipation plate of FIG.
１ 絶縁べース材 ２ 導体層 ３ マスク層 ４ 溝又は孔 ５ フィン状又は柱状のめっき ６ マスク層 1 Insulating base material 2 conductor layers 3 Mask layer 4 grooves or holes 5 Fin-shaped or columnar plating 6 Mask layer
Claims (5)
銅張り板を用い、その絶縁べース材の所定の面にマスク
層を形成し、このマスク層を用いて前記絶縁ベース材に
レーザー加工、プラズマエッチング加工又はウエットエ
ッチング加工により溝又は孔加工を施し、この溝又は孔
にめっきを施した後、前記絶縁べース材の両端に再度マ
スク層を設け、このマスク層を用いて前記めっきの周囲
の前記絶縁ベース材をレーザー加工、プラズマエッチン
グ加工又はウエットエッチング加工により除去すること
を特徴とする放熱板を有する回路基板の製造法。1. A method for producing a circuit board, wherein a copper clad sheet having one or both sides is used, a mask layer is formed on a predetermined surface of an insulating base material, and the insulating base material is used as the insulating base material. Groove or hole processing is performed by laser processing, plasma etching processing or wet etching processing, plating is applied to the groove or hole, and then mask layers are again provided at both ends of the insulating base material, and this mask layer is used. A method for manufacturing a circuit board having a heat dissipation plate, characterized in that the insulating base material around the plating is removed by laser processing, plasma etching processing, or wet etching processing.
銅張り板を用い、その絶縁べース材の両端部にマスク層
を形成し、このマスク層を用いて前記絶縁ベース材にレ
ーザー加工、プラズマエッチング加工又はウエットエッ
チング加工により大きな孔加工を施し、この孔の所定の
部位に再度マスク層を形成し、このマスク層を用いて前
記孔にめっきを施し、次いで前記マスク層を除去するこ
とを特徴とする放熱板を有する回路基板の製造法。2. When manufacturing a circuit board, a single-sided or double-sided copper-clad board is used, mask layers are formed at both ends of the insulating base material, and a laser is applied to the insulating base material using the mask layers. A large hole is formed by processing, plasma etching or wet etching, a mask layer is formed again at a predetermined portion of this hole, the hole is plated using this mask layer, and then the mask layer is removed. A method of manufacturing a circuit board having a heat sink, comprising:
い、その第一の導体層の所定の面にマスク層を形成し、
このマスク層を用いて前記第一の導体層にエッチングに
より溝又は孔加工を施した後、第二の導体層を用いて所
定のマスク層を形成し、このマスク層を用いて絶縁べー
ス材にレーザー加工、プラズマエッチング加工又はウエ
ットエッチング加工により孔加工を施すことを特徴とす
る放熱板を有する回路基板の製造法。3. When manufacturing a circuit board, a double-sided copper-clad board is used, and a mask layer is formed on a predetermined surface of the first conductor layer,
Grooves or holes are formed in the first conductor layer by etching using this mask layer, and then a predetermined mask layer is formed using the second conductor layer, and the insulating base is formed using this mask layer. A method for manufacturing a circuit board having a heat sink, characterized in that a hole is formed in a material by laser processing, plasma etching processing, or wet etching processing.
又は柱状にめっきして放熱部を構成することを特徴とす
る放熱板を有する回路基板。4. A circuit board having a heat radiating plate, characterized in that a heat radiating portion is formed by plating fin-shaped or columnar on a conductor layer on which electronic components are mounted.
設けて放熱部を構成することを特徴とする放熱板を有す
る回路基板。5. A circuit board having a heat radiating plate, characterized in that a groove or a hole is provided in a conductor layer on which an electronic component is mounted to form a heat radiating portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002136586A JP3914458B2 (en) | 2002-05-13 | 2002-05-13 | Method for manufacturing circuit board having heat sink |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002136586A JP3914458B2 (en) | 2002-05-13 | 2002-05-13 | Method for manufacturing circuit board having heat sink |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003332503A true JP2003332503A (en) | 2003-11-21 |
| JP3914458B2 JP3914458B2 (en) | 2007-05-16 |
Family
ID=29698562
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002136586A Expired - Fee Related JP3914458B2 (en) | 2002-05-13 | 2002-05-13 | Method for manufacturing circuit board having heat sink |
Country Status (1)
| Country | Link |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007165896A (en) * | 2005-12-09 | 2007-06-28 | General Electric Co <Ge> | Method for manufacturing electronic device cooling system |
| KR100771291B1 (en) * | 2006-05-24 | 2007-10-29 | 삼성전기주식회사 | Heat-radiating substrate and manufacturing method thereof |
| JP2012074539A (en) * | 2010-09-29 | 2012-04-12 | Sumitomo Electric Printed Circuit Inc | Flexible printed wiring board, electronic apparatus, method for manufacturing the flexible printed wiring board |
| JP2012151431A (en) * | 2011-01-19 | 2012-08-09 | Kyokutoku Kagi Kofun Yugenkoshi | Package carrier and method of manufacturing the same |
| JP2013214738A (en) * | 2012-03-30 | 2013-10-17 | Semikron Elektronik Gmbh & Co Kg | Substrate, and method of manufacturing substrate for at least one power semiconductor component |
| WO2018087612A1 (en) * | 2016-11-14 | 2018-05-17 | King Abdullah University Of Science And Technology | Microfabrication techniques and devices for thermal management of electronic devices |
-
2002
- 2002-05-13 JP JP2002136586A patent/JP3914458B2/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007165896A (en) * | 2005-12-09 | 2007-06-28 | General Electric Co <Ge> | Method for manufacturing electronic device cooling system |
| KR100771291B1 (en) * | 2006-05-24 | 2007-10-29 | 삼성전기주식회사 | Heat-radiating substrate and manufacturing method thereof |
| JP2012074539A (en) * | 2010-09-29 | 2012-04-12 | Sumitomo Electric Printed Circuit Inc | Flexible printed wiring board, electronic apparatus, method for manufacturing the flexible printed wiring board |
| JP2012151431A (en) * | 2011-01-19 | 2012-08-09 | Kyokutoku Kagi Kofun Yugenkoshi | Package carrier and method of manufacturing the same |
| US8746308B2 (en) | 2011-01-19 | 2014-06-10 | Subtron Technology Co., Ltd. | Manufacturing method of package carrier |
| JP2013214738A (en) * | 2012-03-30 | 2013-10-17 | Semikron Elektronik Gmbh & Co Kg | Substrate, and method of manufacturing substrate for at least one power semiconductor component |
| WO2018087612A1 (en) * | 2016-11-14 | 2018-05-17 | King Abdullah University Of Science And Technology | Microfabrication techniques and devices for thermal management of electronic devices |
| US11295963B2 (en) | 2016-11-14 | 2022-04-05 | King Abdullah University Of Science And Technology | Microfabrication techniques and devices for thermal management of electronic devices |
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| Publication number | Publication date |
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| JP3914458B2 (en) | 2007-05-16 |
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