JP2003298207A - Manufacturing method of double-side circuit board - Google Patents

Manufacturing method of double-side circuit board

Info

Publication number
JP2003298207A
JP2003298207A JP2002094345A JP2002094345A JP2003298207A JP 2003298207 A JP2003298207 A JP 2003298207A JP 2002094345 A JP2002094345 A JP 2002094345A JP 2002094345 A JP2002094345 A JP 2002094345A JP 2003298207 A JP2003298207 A JP 2003298207A
Authority
JP
Japan
Prior art keywords
circuit board
conductor layer
double
conductive
wiring patterns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002094345A
Other languages
Japanese (ja)
Inventor
Fumihiko Matsuda
文彦 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Priority to JP2002094345A priority Critical patent/JP2003298207A/en
Publication of JP2003298207A publication Critical patent/JP2003298207A/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a double-side circuit board, by which a thin circuit board and high density mounting thereon can be preferably realized. <P>SOLUTION: Preparing an insulation base 2 having conductive layers 1, 3 on its both surfaces, through-holes 5 penetrating from its one conductor layer 1 to another conductor layer 3 are arranged in the insulation base 2. The through-holes 5 are filled with a conductive paste or a conductive ink to form conductor sections 6, and after grooves 7 needed for forming required wiring patterns are formed in the conductor layer 1, grooves 8 are formed utilizing the grooves 7 in the insulation base 2 by laser beam machining, plasma etching or wet etching. Wiring patterns 9 are formed by filling in the grooves 8 with the conductive paste or the conductive ink, and the remaining conductor layer 1 is removed. In the conductor layer 3, required wiring patterns are formed by a conventional method, or the required wiring patterns are filled and formed by applying above method. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は両面回路基板の製造
法に関し、特には、回路基板の薄型化と高密度実装が達
成できる両面回路基板の製造法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a double-sided circuit board, and more particularly to a method for manufacturing a double-sided circuit board that can achieve a thin circuit board and high-density mounting.

【0002】[0002]

【従来の技術とその問題点】近年、電子機器の小型・軽
量化と高機能化は益々促進されてきており、そのために
回路基板にも、高密度実装に対応するため、回路基板の
薄型化および平坦化の要求が高まってきている。
2. Description of the Related Art In recent years, miniaturization, weight reduction, and higher functionality of electronic equipment have been increasingly promoted. For this reason, the circuit board can be made thinner to support high-density mounting on the circuit board. And the demand for flattening is increasing.

【0003】これまで両面回路基板の製造工程において
は、NCドリル、或いは金型等を用いる手法が広く採用さ
れていた。しかしながら、近年の回路基板の高密度化及
び微細化に対して、これらの従来手法では達成できない
微細なビアホールが求められてきている。
Up to now, in the manufacturing process of the double-sided circuit board, a method using an NC drill or a mold has been widely adopted. However, with the recent trend toward higher density and finer circuit boards, fine via holes that cannot be achieved by these conventional methods have been demanded.

【0004】これらの微細なスルーホール形成の為に、
近年、炭酸ガスレーザー、YAGレーザー、或いはエキシ
マレーザー等を用いるレーザー手法が採用されるように
なってきたが、レーザー加工による穴あけは基本的に単
穴加工であるため単位面積内の穴数が増加するにしたが
って生産性が悪化するという欠点があった。
In order to form these minute through holes,
In recent years, a laser method using a carbon dioxide gas laser, a YAG laser, an excimer laser, or the like has been adopted, but the number of holes in a unit area increases because laser drilling is basically a single hole. However, there is a drawback that the productivity is deteriorated as a result.

【0005】また、両面銅張り板の絶縁材に導通用孔を
形成し、第一の導体層と第二の導体層を電気的に導通す
る為の方法としては、第一の面の位置する銅箔を用い
て、所要の位置に開口を有するマスク層を形成した後、
絶縁層に対するプラズマエッチング手法あるいはウエッ
トエッチング手法により絶縁層に導通用孔を形成し、導
電化処理およびヴィアホールメッキを行なってヴィアホ
ールを形成する方法が採用されていた。
Further, as a method for electrically connecting the first conductor layer and the second conductor layer by forming a conduction hole in the insulating material of the double-sided copper-clad plate, the first surface is positioned. After using a copper foil to form a mask layer having openings at required positions,
A method of forming a via hole by forming a conduction hole in the insulating layer by a plasma etching method or a wet etching method for the insulating layer and performing a conductive treatment and via hole plating has been adopted.

【0006】このようなレーザー加工、プラズマエッチ
ング手法、ウエットエッチング手法を用いることにより
直径60μm程度の微細な穴加工は安定的に行えるもの
の、ヴィアホールメッキを行うことによる導体厚みの増
加等により、回路基板の薄型化および平坦化は従来の両
面回路基板の製造方法では困難であった。
Although fine holes having a diameter of about 60 μm can be stably formed by using the laser processing, the plasma etching method, and the wet etching method, the circuit thickness is increased due to the increase in the conductor thickness due to the via hole plating. It has been difficult to thin and flatten the board by the conventional method for manufacturing a double-sided circuit board.

【0007】[0007]

【課題を解決するための手段】本発明は、上記従来例の
問題を好適に解決するための方法を提供するものであっ
て、絶縁べース材の両面に導体層を有する材料を用意
し、前記両導体層に於ける相互の導通を取るべき位置に
一方の前記導体層側から導通部を形成し、次いで前記一
方の導体層に配線パターンを形成するために必要な溝を
形成し、この溝を用いてレーザー加工、プラズマエッチ
ング手法、ウエットエッチング手法により前記絶縁べー
ス材に溝を形成した後、該溝に導電ペースト又は導電イ
ンキを充填して配線パターンを形成し、残った前記一方
の導体層を除去することを特徴とする両面回路基板の製
造法が採用される。
DISCLOSURE OF THE INVENTION The present invention provides a method for suitably solving the above-mentioned problems of the conventional example, in which a material having conductor layers on both sides of an insulating base material is prepared. A conductive portion is formed from one conductor layer side at a position where mutual conduction is to be established in both conductor layers, and then a groove necessary for forming a wiring pattern is formed in the one conductor layer, After forming a groove in the insulating base material by laser processing, a plasma etching method, a wet etching method using this groove, a conductive paste or conductive ink is filled into the groove to form a wiring pattern, and the remaining A method for manufacturing a double-sided circuit board, which is characterized by removing one conductor layer, is adopted.

【0008】[0008]

【発明の実施の形態】以下、図示の実施例を参照しなが
ら本発明をさらに説明する。図1は本発明の一実施例に
よる両面可撓性回路基板の製造工程図である。先ず、同
図(1)の如く両面銅張り板等の絶縁べース材2の両面
に導体層1,3を有する材料を用意する。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be further described below with reference to the illustrated embodiments. FIG. 1 is a manufacturing process diagram of a double-sided flexible circuit board according to an embodiment of the present invention. First, as shown in FIG. 1A, a material having conductor layers 1 and 3 on both surfaces of an insulating base material 2 such as a double-sided copper-clad plate is prepared.

【0009】そこで、同図(2)に示すように一方の導
体層1をエッチングにより加工し、絶縁ベース材2の一
部を露出させる孔4を形成する。この孔4は導体層1と
他の導体層3とを導通させる位置に形成される。
Therefore, as shown in FIG. 2B, one conductor layer 1 is processed by etching to form a hole 4 for exposing a part of the insulating base material 2. The hole 4 is formed at a position where the conductor layer 1 and the other conductor layer 3 are electrically connected.

【0010】次に、同図(3)に示すように孔4を形成
した導体層1をマスク層として用いて絶縁ベース材2に
レーザー加工、プラズマエッチング手法、ウエットエッ
チング手法で穴加工を行い、導通用孔5を形成する。
Next, as shown in FIG. 3C, using the conductor layer 1 having the holes 4 formed therein as a mask layer, the insulating base member 2 is subjected to laser processing, plasma etching method, and wet etching method to make holes. The conduction hole 5 is formed.

【0011】その後、同図(4)に示すように形成され
た導通用孔5に導電ペースト又は導電インキを充填して
双方の導体層1,3を導通させる導通部6を形成する。
次に、同図(5)に示すように導体層1の側から再度エ
ッチング加工により、所要の配線パターンに必要な溝7
を形成する。
Thereafter, as shown in FIG. 4 (4), the conductive hole 5 formed is filled with a conductive paste or conductive ink to form a conductive portion 6 for conducting both the conductive layers 1 and 3.
Next, as shown in FIG. 5 (5), etching is performed again from the conductor layer 1 side to form the groove 7 necessary for a desired wiring pattern.
To form.

【0012】そこで、同図(6)に示すように溝7を形
成した導体層1をマスク層として用いて絶縁ベース材2
にレーザー加工、プラズマエッチング手法、ウエットエ
ッチング手法で溝加工を行い、溝8を形成する。
Therefore, the insulating base material 2 is formed by using the conductor layer 1 having the groove 7 as a mask layer as shown in FIG.
Then, groove processing is performed by laser processing, a plasma etching method, and a wet etching method to form the groove 8.

【0013】その後、同図(7)に示すように形成され
た溝8に導電ペースト又は導電インキを充填して配線パ
ターン9を形成し、次いで残る導体層1をエッチングあ
るいは研磨等で除去した後、さらにその面を研磨して上
端を研磨除去した導通部10を形成する。
After that, a conductive pattern or conductive ink is filled in the groove 8 formed as shown in FIG. 7 (7) to form a wiring pattern 9, and then the remaining conductive layer 1 is removed by etching or polishing. Then, the conductive portion 10 is formed by polishing the surface and polishing and removing the upper end.

【0014】さらに、同図(8)に示すように他の導体
層3に配線加工を行うことにより、所要の配線パターン
11,12を形成して両面可撓性回路基板を得る。
Further, by wiring the other conductor layer 3 as shown in FIG. 8 (8), the required wiring patterns 11 and 12 are formed to obtain a double-sided flexible circuit board.

【0015】また、図2に示すように上記手法を両面の
導体層に適用することにより、導通部10により一部が
導通する配線パターン9,13,14を形成して回路基
板の両面が平坦な両面可撓性回路基板を得ることも出来
る。
Further, as shown in FIG. 2, by applying the above method to the conductor layers on both sides, the conductive portions 10 form wiring patterns 9, 13 and 14 which are partially conductive, so that both sides of the circuit board are flat. It is also possible to obtain a flexible double-sided circuit board.

【0016】[0016]

【発明の効果】本発明による両面回路基板は、回路基板
の少なくとも片側の面に対し、孔加工および溝加工が施
された絶縁ベース材に導電ペースト等を充填して配線パ
ターンを形成し、さらに表面を平坦化した構造を有して
いるから従来の両面回路基板の製造方法では困難であっ
た回路基板の薄型化と高密度実装が好適に達成できる。
In the double-sided circuit board according to the present invention, a wiring pattern is formed by filling a conductive paste or the like into an insulating base material having holes and grooves formed on at least one surface of the circuit board. Since the surface of the circuit board is flattened, it is possible to suitably achieve thinning of the circuit board and high-density mounting, which were difficult with the conventional method for manufacturing a double-sided circuit board.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例による両面可撓性回路基板の
製造工程図。
FIG. 1 is a manufacturing process diagram of a double-sided flexible circuit board according to an embodiment of the present invention.

【図2】本発明により両面に配線パターンを充填した例
の両面可撓性回路
FIG. 2 is a double-sided flexible circuit of an example in which wiring patterns are filled on both sides according to the present invention.

【符号の説明】 1 導体層 2 絶縁べース材 3 導体層 4 孔 5 導通用孔 6 導通部 7 溝 8 溝 9 配線パターン 10 導通部 11 配線パターン 12 配線パターン[Explanation of symbols] 1 conductor layer 2 Insulating base material 3 conductor layers 4 holes 5 Conduction hole 6 Conducting part 7 groove 8 grooves 9 wiring patterns 10 Conducting part 11 wiring pattern 12 wiring patterns

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】絶縁べース材の両面に導体層を有する材料
を用意し、前記両導体層に於ける相互の導通を取るべき
位置に一方の前記導体層側から導通部を形成し、次いで
前記一方の導体層に配線パターンを形成するために必要
な溝を形成し、この溝を用いてレーザー加工、プラズマ
エッチング手法、ウエットエッチング手法により前記絶
縁べース材に溝を形成した後、該溝に導電ペースト又は
導電インキを充填して配線パターンを形成し、残った前
記一方の導体層を除去することを特徴とする両面回路基
板の製造法。
1. A material having conductor layers on both sides of an insulating base material is prepared, and a conducting portion is formed from one conductor layer side at a position where mutual conduction is to be established in both conductor layers, Then, a groove necessary to form a wiring pattern on the one conductor layer is formed, laser processing using this groove, a plasma etching method, after forming a groove in the insulating base material by a wet etching method, A method for producing a double-sided circuit board, characterized in that the groove is filled with a conductive paste or a conductive ink to form a wiring pattern, and the remaining one conductor layer is removed.
【請求項2】前記回路基板の他の側にも前記と同様な手
法を用いて導電ペースト又は導電インキを充填して配線
パターンを形成した請求項1の両面回路基板の製造法。
2. The method for manufacturing a double-sided circuit board according to claim 1, wherein the other side of the circuit board is filled with a conductive paste or conductive ink by the same method as described above to form a wiring pattern.
JP2002094345A 2002-03-29 2002-03-29 Manufacturing method of double-side circuit board Pending JP2003298207A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002094345A JP2003298207A (en) 2002-03-29 2002-03-29 Manufacturing method of double-side circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002094345A JP2003298207A (en) 2002-03-29 2002-03-29 Manufacturing method of double-side circuit board

Publications (1)

Publication Number Publication Date
JP2003298207A true JP2003298207A (en) 2003-10-17

Family

ID=29386953

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002094345A Pending JP2003298207A (en) 2002-03-29 2002-03-29 Manufacturing method of double-side circuit board

Country Status (1)

Country Link
JP (1) JP2003298207A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100792529B1 (en) 2006-08-21 2008-01-09 삼성전기주식회사 Printed circuit board and manufacturing method thereof
JP2008544511A (en) * 2005-06-16 2008-12-04 イムベラ エレクトロニクス オサケユキチュア Circuit board manufacturing method and circuit board structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008544511A (en) * 2005-06-16 2008-12-04 イムベラ エレクトロニクス オサケユキチュア Circuit board manufacturing method and circuit board structure
KR100792529B1 (en) 2006-08-21 2008-01-09 삼성전기주식회사 Printed circuit board and manufacturing method thereof

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