JP2003324855A - Charging apparatus for electric double-layer capacitor - Google Patents
Charging apparatus for electric double-layer capacitorInfo
- Publication number
- JP2003324855A JP2003324855A JP2002124223A JP2002124223A JP2003324855A JP 2003324855 A JP2003324855 A JP 2003324855A JP 2002124223 A JP2002124223 A JP 2002124223A JP 2002124223 A JP2002124223 A JP 2002124223A JP 2003324855 A JP2003324855 A JP 2003324855A
- Authority
- JP
- Japan
- Prior art keywords
- electric double
- double layer
- charging
- voltage
- layer capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、繰り返し使用可能
な蓄電装置として用いられる電気二重層キャパシタの充
電装置、特に直列または直並列に接続された複数の電気
二重層キャパシタを充電する装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charging device for an electric double layer capacitor used as a rechargeable power storage device, and more particularly to a device for charging a plurality of electric double layer capacitors connected in series or series / parallel.
【０００２】[0002]
【従来の技術】電気二重層キャパシタは、繰り返し使用
される蓄電装置として用いられている。電気二重層キャ
パシタは、大電流による急速充放電が可能で、長寿命と
いう特徴を有している反面、１個あたりの定格電圧が低
いため、通常は複数のキャパシタを直列に接続して使用
することが多い。そして、電気二重層キャパシタは、定
格電圧いっぱいまで充電することにより効率よく使用で
きるが、定格電圧を超えて充電してしまうと急速に劣化
してしまう特徴を有している。そこで、直列に接続され
た複数の電気二重層キャパシタを同時に充電する場合
は、各々のキャパシタを定格電圧いっぱいまで均等に充
電したいが、実際は各々のキャパシタの容量のばらつき
により、定格電圧まで充電するのに必要な時間が各々の
キャパシタで異なってくる。そこで、定格電圧を超えな
いように各々のキャパシタの充電電圧を監視しながら充
電を行う必要がある。2. Description of the Related Art Electric double layer capacitors have been used as electric storage devices that are repeatedly used. The electric double layer capacitor is capable of rapid charging / discharging with a large current and has a feature of long life. On the other hand, since the rated voltage per unit is low, usually multiple capacitors are connected in series and used. Often. The electric double layer capacitor can be efficiently used by charging it to the full rated voltage, but it has a characteristic that it is rapidly deteriorated if it is charged more than the rated voltage. Therefore, when charging multiple electric double layer capacitors connected in series at the same time, we want to charge each capacitor evenly to the full rated voltage, but in reality, due to the variation in the capacity of each capacitor The time required for each capacitor is different. Therefore, it is necessary to perform charging while monitoring the charging voltage of each capacitor so as not to exceed the rated voltage.
【０００３】従来における直列に接続された複数の電気
二重層キャパシタを充電する装置の一例としては、１つ
の充電用電源を用いて直列に接続された複数のキャパシ
タを同時に充電する。その場合に各々のキャパシタの充
電電圧を監視し、キャパシタの充電電圧が定格電圧を超
えないように充電用電源からキャパシタに流れる電流を
制御している。さらに、各々のキャパシタと並列にバラ
ンス抵抗を設け、このバランス抵抗に電流を流すこと
で、各々のキャパシタの容量のばらつきに起因する充電
電圧のばらつきを抑えている。As an example of a conventional apparatus for charging a plurality of electric double layer capacitors connected in series, a plurality of capacitors connected in series are simultaneously charged using one charging power source. In that case, the charging voltage of each capacitor is monitored, and the current flowing from the charging power supply to the capacitor is controlled so that the charging voltage of the capacitor does not exceed the rated voltage. Further, a balance resistor is provided in parallel with each capacitor, and a current is caused to flow through the balance resistor to suppress variations in charging voltage due to variations in capacitance of each capacitor.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、各々の
キャパシタと並列にバランス抵抗が設けられている従来
の装置においては、充電用電源からの電力は、キャパシ
タの電気エネルギーとして蓄えられる他に、バランス抵
抗で消費されてしまう。特に、電気二重層キャパシタに
おいては、大電流を扱うために、バランス抵抗で消費さ
れる電力が大きくなるので、充電効率が悪化してしま
い、また、放電時はバランス抵抗を切り離さないと自己
放電してしまうため、充電が不便であるという課題があ
った。However, in the conventional device in which the balance resistance is provided in parallel with each capacitor, the electric power from the charging power source is stored as the electric energy of the capacitor, and the balance resistance is also stored. Will be consumed in. In particular, in an electric double layer capacitor, since a large current is handled, the power consumed by the balance resistor increases, so the charging efficiency deteriorates, and during discharging, the balance resistor must be disconnected to self-discharge. Therefore, there is a problem that charging is inconvenient.
【０００５】本発明は上記課題に鑑みてなされたもので
あり、直列または直並列に接続された複数の電気二重層
キャパシタを充電する際に、バランス抵抗なしで均等電
圧充電を行うことのできる電気二重層キャパシタの充電
装置を提供することを目的とする。The present invention has been made in view of the above problems, and when charging a plurality of electric double layer capacitors connected in series or series-parallel, it is possible to perform uniform voltage charging without a balance resistor. An object is to provide a charging device for a double layer capacitor.
【０００６】[0006]
【課題を解決するための手段】このような目的を達成す
るために、第１の本発明に係る電気二重層キャパシタの
充電装置は、直列または直並列に接続された複数の電気
二重層キャパシタを充電する装置であって、パルス信号
を出力するパルス電源と、各電気二重層キャパシタごと
に設けられた複数の直流再生回路と、を備え、前記直流
再生回路の各々は、前記パルス電源からの共通のパルス
信号が入力され、該パルス信号を直流再生して直流電流
を電気二重層キャパシタの各々へ流すことで電気二重層
キャパシタの各々を充電することを特徴とする。In order to achieve such an object, a charging device for an electric double layer capacitor according to a first aspect of the present invention comprises a plurality of electric double layer capacitors connected in series or in series and parallel. A device for charging, comprising: a pulse power source for outputting a pulse signal; and a plurality of direct current regeneration circuits provided for each electric double layer capacitor, each of the direct current regeneration circuits being common from the pulse power source. Of the electric pulse signal is input, and the pulse signal is DC-reproduced to flow a DC current to each electric double layer capacitor to charge each electric double layer capacitor.
【０００７】このように、直流再生回路の各々は、パル
ス電源からの共通のパルス信号を直流再生して直流電流
を電気二重層キャパシタの各々へ流すことにより、複数
の電気二重層キャパシタの充電電圧が均等になるように
収束させることができ、電気二重層キャパシタの容量の
ばらつきに起因する充電電圧のばらつきを抑えることが
できる。したがって、直列に接続された複数の電気二重
層キャパシタを充電する際に、バランス抵抗なしで電気
二重層キャパシタの各々の電圧が均等になるように充電
することができ、充電効率を改善できる。As described above, each of the DC regenerating circuits DC regenerates a common pulse signal from the pulse power source and causes a DC current to flow to each of the electric double layer capacitors, thereby charging voltages of the plurality of electric double layer capacitors. Can be converged so as to be even, and variation in charging voltage due to variation in capacitance of the electric double layer capacitor can be suppressed. Therefore, when a plurality of electric double layer capacitors connected in series are charged, the electric double layer capacitors can be charged so that the respective voltages of the electric double layer capacitors are equalized without a balance resistor, and the charging efficiency can be improved.
【０００８】第２の本発明に係る電気二重層キャパシタ
の充電装置は、第１の本発明に記載の装置であって、電
気二重層キャパシタ全体の充電を行うための直流電源を
さらに備えることを特徴とする。A charging device for an electric double layer capacitor according to a second aspect of the present invention is the device according to the first aspect of the present invention, further comprising a DC power supply for charging the entire electric double layer capacitor. Characterize.
【０００９】このように、電気二重層キャパシタ全体を
充電するための直流電源をさらに備えることにより、パ
ルス電源は小容量のものとすることができる。さらに、
電気二重層キャパシタを定格電圧まで均等充電するのに
要する時間を短縮することができる。As described above, the pulse power supply can have a small capacity by further including the DC power supply for charging the entire electric double layer capacitor. further,
The time required to evenly charge the electric double layer capacitor to the rated voltage can be shortened.
【００１０】第３の本発明に係る電気二重層キャパシタ
の充電装置は、第２の本発明に記載の装置であって、前
記パルス電源は、入出力間にスイッチ素子を有してお
り、前記直流電源からの直流信号が入力され、該直流信
号に対して信号レベル調整及び該スイッチ素子のスイッ
チング動作を行ってパルス信号に変換して出力すること
を特徴とする。A charging device for an electric double layer capacitor according to a third aspect of the present invention is the device according to the second aspect of the present invention, wherein the pulse power source has a switch element between the input and the output. A direct current signal from a direct current power source is input, the signal level is adjusted with respect to the direct current signal, and the switching operation of the switching element is performed, and the pulse signal is converted and output.
【００１１】[0011]
【発明の実施の形態】以下、本発明の実施の形態（以下
実施形態という）を、図面に従って説明する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention (hereinafter referred to as embodiments) will be described below with reference to the drawings.
【００１２】図１は、本発明の実施形態に係る電気二重
層キャパシタの充電装置の構成を示すブロック図であ
る。本実施形態の充電装置は大きく分けて直流電源２
６、パルス電源１２及び各電気二重層キャパシタ１０−
１〜１０−ｎ（ｎは自然数）ごとに設けられた複数の直
流再生回路１４−１〜１４−ｎによって構成されてい
る。なお、図示はしていないが、電気二重層キャパシタ
１０−１〜１０−ｎの両端には、負荷が接続される。FIG. 1 is a block diagram showing the configuration of a charging device for an electric double layer capacitor according to an embodiment of the present invention. The charging device of this embodiment is roughly divided into a DC power supply 2
6, pulse power supply 12 and each electric double layer capacitor 10-
It is configured by a plurality of DC regeneration circuits 14-1 to 14-n provided for each of 1 to 10-n (n is a natural number). Although not shown, loads are connected to both ends of the electric double layer capacitors 10-1 to 10-n.
【００１３】直列に接続された複数の電気二重層キャパ
シタ１０−１〜１０−ｎの両端に直流電源２６の出力が
接続されている。直流電源２６は例えばＤＣ−ＤＣコン
バータが用いられ、直流電圧が入力されている。電気二
重層キャパシタ１０−１〜１０−ｎの各々の正側端子５
０−１〜５０−ｎには、それに対応した直流再生回路１
４−１〜１４−ｎの各々の出力端子４６−１〜４６−ｎ
がそれぞれ接続されている。直流再生回路１４−１〜１
４−ｎの入力端子４２−１〜４２−ｎにはいずれもパル
ス電源１２の出力端子３８が共通して接続されている。
電気二重層キャパシタ１０−１〜１０−ｎの各々の両端
には電気二重層キャパシタ１０−１〜１０−ｎの各々の
充電電圧を検出する電圧検出手段８０−１〜８０−ｎが
それぞれ設けられており、電気二重層キャパシタ１０−
１〜１０−ｎの両端には電気二重層キャパシタ１０−１
〜１０−ｎ全体の充電電圧を検出する全体電圧検出手段
１６がさらに設けられている。直流電源２６と電気二重
層キャパシタ１０−１との間の線路には電流検出用抵抗
２０が設けられており、その両端子が電流制御回路２２
に入力される。電流制御回路２２は、全体電圧検出手段
１６の電圧検出値が所定値より小さく、かつ電圧検出手
段８０−１〜８０−ｎのすべての電圧検出値が設定値よ
り小さい場合は、電流検出用抵抗２０による電流検出値
に基づいて直流電源２６から電気二重層キャパシタ１０
−１〜１０−ｎへ流れる電流が一定値になるように制御
する。一方、全体電圧検出手段１６の電圧検出値が所定
値に達した場合、あるいは電圧検出手段８０−１〜８０
−ｎの電圧検出値のいずれかが設定値に達した場合は、
直流電源２６内のスイッチ７０を非導通にして直流電源
２６から電気二重層キャパシタ１０−１〜１０−ｎへの
電力の供給を停止する。ここで、電圧検出手段８０−１
〜８０−ｎの電圧検出値のいずれかが設定値に達する
と、ＯＲ回路９０へ電圧を出力することでスイッチ７０
が非導通となる。また、所定値は例えば（定格電圧×キ
ャパシタの数）以下の近傍値に設定され、近傍値につい
ては電気二重層キャパシタ１０−１〜１０−ｎの容量の
ばらつきを考慮して設定される。そして、設定値は電気
二重層キャパシタ１０−１〜１０−ｎの特性によって決
められる最高印加電圧である。The output of the DC power supply 26 is connected to both ends of a plurality of electric double layer capacitors 10-1 to 10-n connected in series. As the DC power supply 26, for example, a DC-DC converter is used, and a DC voltage is input. Positive side terminal 5 of each of electric double layer capacitors 10-1 to 10-n
0-1 to 50-n includes a DC regeneration circuit 1 corresponding to it.
Output terminals 46-1 to 46-n of 4-1 to 14-n
Are connected respectively. DC regeneration circuit 14-1 to 1
The output terminal 38 of the pulse power supply 12 is commonly connected to the 4-n input terminals 42-1 to 42-n.
Voltage detection means 80-1 to 80-n for detecting the charging voltage of each of the electric double layer capacitors 10-1 to 10-n are provided at both ends of each of the electric double layer capacitors 10-1 to 10-n. The electric double layer capacitor 10-
The electric double layer capacitor 10-1 is provided at both ends of 1 to 10-n.
An overall voltage detecting means 16 for detecting the charging voltage of the entire 10 to 10-n is further provided. A current detecting resistor 20 is provided on the line between the DC power supply 26 and the electric double layer capacitor 10-1, and both terminals thereof are connected to the current control circuit 22.
Entered in. The current control circuit 22 detects the resistance for current detection when the voltage detection value of the overall voltage detection means 16 is smaller than a predetermined value and all the voltage detection values of the voltage detection means 80-1 to 80-n are smaller than the set value. From the DC power supply 26 to the electric double layer capacitor 10 based on the current detection value of 20.
The currents flowing from -1 to 10-n are controlled to have a constant value. On the other hand, when the voltage detection value of the overall voltage detection means 16 reaches a predetermined value, or the voltage detection means 80-1 to 80
If any of the -n voltage detection values reaches the set value,
The switch 70 in the DC power supply 26 is made non-conductive to stop the supply of power from the DC power supply 26 to the electric double layer capacitors 10-1 to 10-n. Here, the voltage detection means 80-1
When any of the voltage detection values of 80 to 80-n reaches the set value, the voltage is output to the OR circuit 90, and the switch 70
Becomes non-conducting. In addition, the predetermined value is set to, for example, a neighborhood value of (rated voltage × number of capacitors) or less, and the neighborhood value is set in consideration of variation in capacitance of the electric double layer capacitors 10-1 to 10-n. The set value is the maximum applied voltage determined by the characteristics of the electric double layer capacitors 10-1 to 10-n.
【００１４】次に、図１におけるパルス電源１２の構成
の一例について説明する。パルス電源１２は、補助直流
電源３６、スイッチ素子２８，３０及びスイッチ制御回
路２４を備えている。補助直流電源３６は例えばＤＣ−
ＤＣコンバータが用いられ、直流電源２６からの直流電
圧が入力されている。スイッチ素子２８は、補助直流電
源３６の出力とパルス電源１２の出力端子３８との間の
線路に設けられ、その間の導通／非導通を切り換える。
スイッチ素子３０は、パルス電源１２の出力端子３８，
４０の両端子間を接続する線路に設けられ、その間の導
通／非導通を切り換える。スイッチ素子２８及びスイッ
チ素子３０としては、例えばｐＭＯＳＦＥＴ及びｎＭＯ
ＳＦＥＴがそれぞれ用いられ、スイッチ制御回路２４か
らの制御電圧がそのゲート端子に入力され、スイッチ素
子２８が導通の時はスイッチ素子３０は非導通となり、
スイッチ素子２８が非導通の時はスイッチ素子３０は導
通となる。また、パルス電源１２の出力端子４０は電気
二重層キャパシタ１０−ｎの負側端子５２−ｎと接続さ
れている。Next, an example of the configuration of the pulse power supply 12 in FIG. 1 will be described. The pulse power supply 12 includes an auxiliary DC power supply 36, switch elements 28 and 30, and a switch control circuit 24. The auxiliary DC power supply 36 is, for example, DC-
A DC converter is used, and the DC voltage from the DC power supply 26 is input. The switch element 28 is provided on the line between the output of the auxiliary DC power supply 36 and the output terminal 38 of the pulse power supply 12, and switches conduction / non-conduction between them.
The switch element 30 includes an output terminal 38 of the pulse power source 12,
It is provided on a line connecting both terminals of 40 and switches conduction / non-conduction between them. The switch element 28 and the switch element 30 are, for example, pMOSFET and nMO.
Each SFET is used, the control voltage from the switch control circuit 24 is input to its gate terminal, and when the switch element 28 is conductive, the switch element 30 is non-conductive,
When the switch element 28 is non-conductive, the switch element 30 is conductive. The output terminal 40 of the pulse power supply 12 is connected to the negative side terminal 52-n of the electric double layer capacitor 10-n.
【００１５】次に、図１における直流再生回路１４−ｍ
（ｍは１〜ｎのいずれか）の構成の一例について説明す
る。入力端子４２−ｍと出力端子４６−ｍとの間の線路
にコンデンサ５４−ｍが設けられている。そして、コン
デンサ５４−ｍと出力端子４６−ｍとの間の線路にダイ
オード５６−ｍが設けられ、そのアノード側がコンデン
サ５４−ｍと接続され、そのカソード側が出力端子４６
−ｍと接続されている。コンデンサ５４−ｍ〜ダイオー
ド５６−ｍ間の線路と、電気二重層キャパシタ１０−ｍ
の負側端子５２−ｍとを接続する線路にダイオード６０
−ｍが設けられ、そのアノード側が負側端子５２−ｍと
接続され、そのカソード側がコンデンサ５４−ｍ〜ダイ
オード５６−ｍ間の線路と接続されている。Next, the DC regeneration circuit 14-m in FIG.
An example of the configuration (m is one of 1 to n) will be described. A capacitor 54-m is provided on the line between the input terminal 42-m and the output terminal 46-m. A diode 56-m is provided on the line between the capacitor 54-m and the output terminal 46-m, the anode side is connected to the capacitor 54-m, and the cathode side is the output terminal 46.
-M. The line between the capacitor 54-m and the diode 56-m, and the electric double layer capacitor 10-m
The diode 60 is connected to the line connecting the negative terminal 52-m of
-M is provided, the anode side is connected to the negative side terminal 52-m, and the cathode side is connected to the line between the capacitor 54-m and the diode 56-m.
【００１６】次に、本実施形態における充電動作につい
て説明する。直流電源２６から電気二重層キャパシタ１
０−１〜１０−ｎへ電流が流れ充電が行われる。電流制
御回路２２は、直流電源２６から電気二重層キャパシタ
１０−１〜１０−ｎへ流す電流を制御する。Next, the charging operation in this embodiment will be described. DC power supply 26 to electric double layer capacitor 1
Current flows to 0-1 to 10-n and charging is performed. The current control circuit 22 controls the current flowing from the DC power supply 26 to the electric double layer capacitors 10-1 to 10-n.
【００１７】一方、パルス電源１２においては、補助直
流電源３６の設定出力電圧が電気二重層キャパシタ１０
−１〜１０−ｎの定格電圧値に設定される。そして、ス
イッチ制御回路２４はスイッチ素子２８，３０への制御
電圧の入力のオンオフを繰り返すことでスイッチ素子２
８，３０の導通／非導通を交互に切り換える。具体的に
は、正値の制御電圧がスイッチ素子２８，３０へ供給さ
れている場合はスイッチ素子２８は非導通かつスイッチ
素子３０は導通となり、制御電圧がスイッチ素子２８，
３０へ供給されていない０Ｖに近い場合はスイッチ素子
２８は導通かつスイッチ素子３０は非導通となる。以上
の動作により、パルス電源１２からは両振幅が定格電圧
となる矩形波（パルス信号）が出力される。この矩形波
の出力は、直流電源２６による充電と並行して行われ、
出力された矩形波は直流再生回路１４−１〜１４−ｎに
入力される。On the other hand, in the pulse power source 12, the set output voltage of the auxiliary DC power source 36 is the electric double layer capacitor 10.
It is set to a rated voltage value of -1 to 10-n. Then, the switch control circuit 24 repeats turning on and off the input of the control voltage to the switch elements 28 and 30 so that the switch element 2
The conduction / non-conduction of 8 and 30 are alternately switched. Specifically, when a positive control voltage is supplied to the switch elements 28 and 30, the switch element 28 is non-conductive and the switch element 30 is conductive, and the control voltage is the switch elements 28 and 30.
When the voltage is not supplied to 30 and is close to 0 V, the switch element 28 is conductive and the switch element 30 is non-conductive. With the above operation, the pulse power supply 12 outputs a rectangular wave (pulse signal) whose both amplitudes are the rated voltage. The output of this rectangular wave is performed in parallel with the charging by the DC power supply 26,
The output rectangular wave is input to the DC reproduction circuits 14-1 to 14-n.
【００１８】直流再生回路１４−ｍにおいては、パルス
電源１２からの矩形波が入力端子４２−ｍに入力され
る。この矩形波はコンデンサ５４−ｍを通過してダイオ
ード６０−ｍによって直流再生が行われる。このとき、
電気二重層キャパシタ１０−ｍの正側端子５０−ｍの電
位がダイオード６０−ｍのカソード電位より矩形波の両
振幅電圧分だけ高い電位となるように、ダイオード５６
−ｍを通って電気二重層キャパシタ１０−ｍへ電流が流
れることで充電が行われる。ダイオード６０−ｍのアノ
ード側は電気二重層キャパシタ１０−ｍの負側端子５２
−ｍと接続されているので、電気二重層キャパシタ１０
−ｍの充電電圧は矩形波の両振幅電圧すなわち定格電圧
に収束するように作用する。この作用はすべての電気二
重層キャパシタ１０−１〜１０−ｎについて並行して働
く。In the DC regenerating circuit 14-m, the rectangular wave from the pulse power source 12 is input to the input terminal 42-m. This rectangular wave passes through the capacitor 54-m and is subjected to DC regeneration by the diode 60-m. At this time,
The diode 56 is arranged so that the potential of the positive side terminal 50-m of the electric double layer capacitor 10-m becomes higher than the cathode potential of the diode 60-m by the amplitude voltage of both rectangular waves.
Charging is performed by passing a current through the -m to the electric double layer capacitor 10-m. The anode side of the diode 60-m is the negative side terminal 52 of the electric double layer capacitor 10-m.
-M, the electric double layer capacitor 10
The charging voltage of -m acts so as to converge to both amplitude voltages of the rectangular wave, that is, the rated voltage. This action works in parallel for all electric double layer capacitors 10-1 to 10-n.
【００１９】上記のようにして直流電源２６及び直流再
生回路１４−１〜１４−ｎにより電気二重層キャパシタ
１０−１〜１０−ｎの充電を行うが、全体電圧検出手段
１６の検出値が（定格電圧×キャパシタの数）以下の近
傍値に達した場合、あるいは電圧検出手段８０−１〜８
０−ｎの電圧検出値のいずれかが設定値に達した場合
は、直流電源２６内のスイッチ７０を非導通にして直流
電源２６による充電を中止して直流再生回路１４−１〜
１４−ｎのみによる充電に切り換える。そして、すべて
の電気二重層キャパシタ１０−１〜１０−ｎの充電電圧
が定格電圧に達するまで定電圧充電を行う。As described above, the electric double layer capacitors 10-1 to 10-n are charged by the DC power supply 26 and the DC regenerating circuits 14-1 to 14-n, and the detection value of the total voltage detecting means 16 is ( When a neighborhood value less than or equal to (rated voltage × number of capacitors) is reached, or the voltage detection means 80-1 to 80-8
When any of the voltage detection values of 0-n reaches the set value, the switch 70 in the DC power supply 26 is made non-conductive to stop the charging by the DC power supply 26 and the DC regeneration circuits 14-1 to 14-1.
Switch to charging by 14-n only. Then, constant voltage charging is performed until the charging voltage of all electric double layer capacitors 10-1 to 10-n reaches the rated voltage.
【００２０】本実施形態においては、パルス電源１２か
らの共通の矩形波を直流再生回路１４−１〜１４−ｎに
入力し、この矩形波を直流再生回路１４−１〜１４−ｎ
によって直流再生して電気二重層キャパシタ１０−１〜
１０−ｎの充電をそれぞれ行っている。ここで、電気二
重層キャパシタ１０−１〜１０−ｎは容量にばらつきを
持つため、直流電源２６だけで充電を行うと充電電圧に
ばらつきが発生してしまう。しかし本実施形態では、直
流再生回路１４−ｍが電気二重層キャパシタ１０−ｍの
充電電圧を矩形波の両振幅電圧に収束させるように作用
し、この矩形波は直流再生回路１４−１〜１４−ｎへ共
通して入力されるため、すべての電気二重層キャパシタ
１０−１〜１０−ｎの充電電圧を均一の矩形波の両振幅
電圧に収束させようと作用する。そして、矩形波の両振
幅電圧を定格電圧とすることにより、すべての電気二重
層キャパシタ１０−１〜１０−ｎの充電電圧を定格電圧
に収束させることができる。したがって、バランス抵抗
なしで電気二重層キャパシタ１０−１〜１０−ｎの容量
のばらつきに起因する充電電圧のばらつきを抑えて均等
に充電することができる。また、直流電源２６から電気
二重層キャパシタ１０−１〜１０−ｎへ流す電流値を大
きくすることで、補助直流電源３６は小容量のものを用
いることができ、かつ定格電圧まで均等充電するのに要
する時間を短縮することができる。In this embodiment, a common rectangular wave from the pulse power source 12 is input to the DC regenerating circuits 14-1 to 14-n, and this rectangular wave is regenerated to the DC regenerating circuits 14-1 to 14-n.
DC regeneration by electric double layer capacitors 10-1 to
10-n are charged respectively. Here, since the electric double layer capacitors 10-1 to 10-n have variations in capacitance, if charging is performed only by the DC power supply 26, variations in charging voltage will occur. However, in the present embodiment, the DC regeneration circuit 14-m acts so as to converge the charging voltage of the electric double layer capacitor 10-m to both amplitude voltages of the rectangular wave, and this rectangular wave is the DC regeneration circuits 14-1 to 14-14. Since it is commonly input to -n, it acts to converge the charging voltage of all electric double layer capacitors 10-1 to 10-n to both amplitude voltages of a uniform rectangular wave. Then, the charging voltage of all the electric double layer capacitors 10-1 to 10-n can be converged to the rated voltage by setting both amplitude voltages of the rectangular wave to the rated voltage. Therefore, it is possible to uniformly charge the electric double layer capacitors 10-1 to 10-n by suppressing variations in the charging voltage due to variations in the capacities of the electric double layer capacitors 10-1 to 10-n without using a balancing resistor. Further, by increasing the value of the current flowing from the DC power supply 26 to the electric double layer capacitors 10-1 to 10-n, it is possible to use the auxiliary DC power supply 36 having a small capacity and to charge the auxiliary voltage evenly to the rated voltage. The time required for can be shortened.
【００２１】図２に本実施形態の充電装置による充電動
作のシミュレーション結果を示す。ただし、本シミュレ
ーションにおいては、直列に接続された電気二重層キャ
パシタの数を６としており、電気二重層キャパシタの定
格電圧を２．３Ｖとしている。図２は、負側端子５２−
ｎ（本シミュレーションではｎ＝６）の電位を基準とし
た電気二重層キャパシタ１０−ｍの正側端子５０−ｍの
電位の時間変化を示している。図２に示すように、隣り
合う電気二重層キャパシタの正側端子の電位差が２．３
Ｖに収束している。すなわち、すべての電気二重層キャ
パシタの充電電圧が定格電圧に収束している。このよう
に本実施形態の充電装置においては、すべての電気二重
層キャパシタを均等に定格電圧まで充電することができ
る。FIG. 2 shows a simulation result of the charging operation by the charging device of this embodiment. However, in this simulation, the number of electric double layer capacitors connected in series is 6, and the rated voltage of the electric double layer capacitors is 2.3V. FIG. 2 shows the negative terminal 52-
The time change of the potential of the positive-side terminal 50-m of the electric double layer capacitor 10-m based on the potential of n (n = 6 in this simulation) is shown. As shown in FIG. 2, the potential difference between the positive side terminals of the adjacent electric double layer capacitors is 2.3.
It converges on V. That is, the charging voltage of all electric double layer capacitors has converged to the rated voltage. As described above, in the charging device of the present embodiment, all electric double layer capacitors can be uniformly charged to the rated voltage.
【００２２】なお、本実施形態においては、上記の記載
の内容に限定されるものではなく、本発明の技術思想が
反映される範囲内で様々な変形が可能である。例えば、
充電開始時から直流電源２６及び直流再生回路１４−１
〜１４−ｎの両方を用いて充電を行わなくてもよく、初
めは直流電源２６だけで充電を行い充電途中から直流再
生回路１４−１〜１４−ｎによる充電を開始してもよ
い。そして、矩形波の両振幅電圧値は定格電圧値一定で
なくてもよく、全体電圧検出手段１６の検出値に応じて
振幅を変化させ最終的に定格電圧に設定して充電を行っ
てもよい。また、直流電源２６及び補助直流電源３６の
構成としてはＤＣ−ＤＣコンバータに限るものではな
く、直流電圧を出力できれば何でもよい。そして、直流
電源２６による充電方法は定電流充電に限るものではな
い。さらに、直流電源２６なしで直流再生回路１４−１
〜１４−ｎのみを用いて充電を行ってもよい。また、本
発明は、直列に接続された電気二重層キャパシタを充電
する場合だけでなく、直並列に接続された電気二重層キ
ャパシタを充電する場合でも適用可能である。The present embodiment is not limited to the above description, and various modifications can be made within the scope of reflecting the technical idea of the present invention. For example,
DC power supply 26 and DC regeneration circuit 14-1 from the start of charging
14-n may not be used for charging, and only the DC power supply 26 may be initially charged and charging by the DC regeneration circuits 14-1 to 14-n may be started during charging. Both amplitude voltage values of the rectangular wave do not have to be constant rated voltage values, and the amplitude may be changed according to the detection value of the overall voltage detection means 16 and finally set to the rated voltage for charging. . Further, the configurations of the DC power supply 26 and the auxiliary DC power supply 36 are not limited to the DC-DC converter, and may be anything as long as the DC voltage can be output. The charging method by the DC power supply 26 is not limited to the constant current charging. Further, the DC regenerating circuit 14-1 is provided without the DC power source 26.
Charging may be performed using only ~ 14-n. Further, the present invention is applicable not only when charging the electric double layer capacitors connected in series but also when charging the electric double layer capacitors connected in series and parallel.
【００２３】[0023]
【発明の効果】以上説明したように、本発明において
は、直流再生回路の各々は、パルス電源からの共通のパ
ルス信号が入力され、パルス信号を直流再生して直流電
流を電気二重層キャパシタの各々へ流すことにより、直
列または直並列に接続された複数の電気二重層キャパシ
タを充電する際に、バランス抵抗なしで電気二重層キャ
パシタの容量のばらつきに起因する充電電圧のばらつき
を抑え均等に充電することができる。したがって、充電
効率を改善でき、かつ電気二重層キャパシタの劣化を招
くことなく正確に充電できる。As described above, in the present invention, each of the direct current regeneration circuits receives the common pulse signal from the pulse power source, regenerates the direct current of the pulse signal and outputs the direct current to the electric double layer capacitor. By flowing to each, when charging multiple electric double layer capacitors connected in series or series / parallel, without charging the balance resistance, variation in the charging voltage due to variation in the capacitance of the electric double layer capacitors is suppressed, and charging is performed evenly. can do. Therefore, the charging efficiency can be improved, and the electric double layer capacitor can be accurately charged without deterioration.
【図１】 本発明の実施形態に係る電気二重層キャパシ
タの充電装置の構成を示すブロック図である。FIG. 1 is a block diagram showing a configuration of a charging device for an electric double layer capacitor according to an embodiment of the present invention.
【図２】 本発明の実施形態における充電動作のシミュ
レーション結果を示す図である。FIG. 2 is a diagram showing a simulation result of a charging operation in the embodiment of the present invention.
１０−１〜１０−ｎ 電気二重層キャパシタ、１２ パ
ルス電源、１４−１〜１４−ｎ 直流再生回路、１６
全体電圧検出手段、２０ 電流検出用抵抗、２２ 電流
制御回路、２６ 直流電源、８０−１〜８０−ｎ 電圧
検出手段。10-1 to 10-n Electric Double Layer Capacitor, 12 Pulse Power Supply, 14-1 to 14-n DC Regeneration Circuit, 16
Overall voltage detection means, 20 current detection resistors, 22 current control circuit, 26 DC power supply, 80-1 to 80-n voltage detection means.
フロントページの続き (72)発明者 早川 成美 長野県上田市踏入２丁目10番19号 上田日 本無線株式会社内 (72)発明者 関本 節雄 長野県上田市踏入２丁目10番19号 上田日 本無線株式会社内 Ｆターム(参考） 5G003 AA01 BA03 CA12 CA14 CC08Continued front page (72) Inventor Narumi Hayakawa 2-10-19 Tairiri, Ueda, Nagano Prefecture Ueda Sun Inside the radio company (72) Inventor Setsumoto Setsuo 2-10-19 Tairiri, Ueda, Nagano Prefecture Ueda Sun Inside the radio company F-term (reference) 5G003 AA01 BA03 CA12 CA14 CC08
Claims (3)
気二重層キャパシタを充電する装置であって、 パルス信号を出力するパルス電源と、 各電気二重層キャパシタごとに設けられた複数の直流再
生回路と、 を備え、 前記直流再生回路の各々は、前記パルス電源からの共通
のパルス信号が入力され、該パルス信号を直流再生して
直流電流を電気二重層キャパシタの各々へ流すことで電
気二重層キャパシタの各々を充電することを特徴とする
電気二重層キャパシタの充電装置。1. A device for charging a plurality of electric double layer capacitors connected in series or series-parallel, comprising: a pulse power source for outputting a pulse signal; and a plurality of DC regenerators provided for each electric double layer capacitor. A common pulse signal from the pulse power source is input to each of the DC regenerator circuits, and the DC signal is regenerated by causing a DC current to flow to each of the electric double layer capacitors. An electric double layer capacitor charging device, characterized in that each of the multilayer capacitors is charged.
の充電装置であって、 電気二重層キャパシタ全体の充電を行うための直流電源
をさらに備えることを特徴とする電気二重層キャパシタ
の充電装置。2. The charging device for an electric double layer capacitor according to claim 1, further comprising a DC power supply for charging the entire electric double layer capacitor. .
の充電装置であって、 前記パルス電源は、入出力間にスイッチ素子を有してお
り、前記直流電源からの直流信号が入力され、該直流信
号に対して信号レベル調整及び該スイッチ素子のスイッ
チング動作を行ってパルス信号に変換して出力すること
を特徴とする電気二重層キャパシタの充電装置。3. The electric double layer capacitor charging device according to claim 2, wherein the pulsed power supply has a switch element between input and output, and a DC signal from the DC power supply is input to the pulsed power supply. A charging device for an electric double layer capacitor, characterized in that a signal level is adjusted for the DC signal and a switching operation of the switch element is performed to convert into a pulse signal for output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002124223A JP3892752B2 (en) | 2002-04-25 | 2002-04-25 | Electric double layer capacitor charger |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002124223A JP3892752B2 (en) | 2002-04-25 | 2002-04-25 | Electric double layer capacitor charger |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003324855A true JP2003324855A (en) | 2003-11-14 |
| JP3892752B2 JP3892752B2 (en) | 2007-03-14 |
Family
ID=29539300
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002124223A Expired - Fee Related JP3892752B2 (en) | 2002-04-25 | 2002-04-25 | Electric double layer capacitor charger |
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| Country | Link |
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| JP (1) | JP3892752B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008061469A (en) * | 2006-09-04 | 2008-03-13 | Toshiba Mitsubishi-Electric Industrial System Corp | Energy storage device using electric double-layer capacitor |
| JP2015201925A (en) * | 2014-04-04 | 2015-11-12 | ソニー株式会社 | Charger, charge control method, power storage device, power storage facility, power system and electric vehicle |
| JP2016138923A (en) * | 2015-01-26 | 2016-08-04 | 株式会社ジャパンディスプレイ | Display device and driving method therefor |
-
2002
- 2002-04-25 JP JP2002124223A patent/JP3892752B2/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008061469A (en) * | 2006-09-04 | 2008-03-13 | Toshiba Mitsubishi-Electric Industrial System Corp | Energy storage device using electric double-layer capacitor |
| JP2015201925A (en) * | 2014-04-04 | 2015-11-12 | ソニー株式会社 | Charger, charge control method, power storage device, power storage facility, power system and electric vehicle |
| JP2016138923A (en) * | 2015-01-26 | 2016-08-04 | 株式会社ジャパンディスプレイ | Display device and driving method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3892752B2 (en) | 2007-03-14 |
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