JP2003318212A - Resist pattern used for bump formation by deposition lift-off and formation method thereof, bump and formation method thereof and elastic surface wave element and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a resist pattern which enables formation of a bump of high adhesion by deposition lift-off. <P>SOLUTION: A peeling layer 12 which is in contact with an element substrate 2 and can be readily peeled off to the element substrate 2, and a main resist layer 13 which is formed on the peeling layer 12 and has stress resistance higher than the peeling layer 12, are comprised. The peeling layer 12 is constituted of thermoplastic resin such as polydimethylgluterimide, which hardly accelerates polymerization even if it is heated and subjected to light irradiation and has relatively weak resin bonding strength. The main resist layer 13 is constituted of a resin such as acrylic acid ester resin whose polymerization is high and resin bonding strength is high when compared to the thermoplastic resin consisting the peeling layer 12. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for enabling favorable bump formation by vapor deposition lift-off, and more particularly, a resist pattern and a method for forming the same that enable favorable bump formation by vapor deposition lift-off. The present invention relates to a bump formed by using this resist pattern, a method for forming the bump, a surface acoustic wave device including the bump, and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 4 is a plan view showing a surface acoustic wave filter 1 as a surface acoustic wave element of interest to the present invention.

The surface acoustic wave filter 1 includes a piezoelectric substrate 2. An interdigital transducer (IDT) 3 is provided on the piezoelectric substrate 2. IDT
3 includes a pair of comb-teeth-shaped electrodes 4, and each comb-teeth-shaped electrode 4 is
It is provided with a plurality of electrode fingers 5 and a bus bar 6 that connects these electrode fingers 5 in common.

A reflector 7 is provided at each end of the IDT 3 in the propagation direction of the surface acoustic wave, and is configured to reflect the surface acoustic wave. The reflector 7 includes a plurality of electrode fingers 8 and a bus bar 9 that connects the electrode fingers 8 in common.

In order to reduce the size, height, and cost of electronic equipment in which the surface acoustic wave filter 1 is used, the surface acoustic wave filter 1 is mounted on a substrate (not shown).
Flip chip bonding is applied for mounting on top. Therefore, the bump pad electrode 10 electrically connected to the bus bar 6 of the comb-teeth electrode 4 is formed on the piezoelectric substrate 2, and the bump 11 is provided on the bump pad electrode 10.

In forming the bump 11 described above,
The stud bump method is mainly applied. However, the stud bump method has the following problems to be solved.

According to the stud bump method, since bumps at a plurality of locations are not formed at once, variations in bump height at a plurality of locations are likely to occur. Therefore, in general, in order to correct this height variation, it is necessary to perform a flattening process to make the heights of the bumps uniform.
In addition, if the number of locations where the bumps are to be formed is large, the productivity is low and the cost is accordingly increased. Further, since there is a limit to improving the accuracy of the size and position of the bump, it is not possible to sufficiently meet the demand for further miniaturization.

On the other hand, there are a screen printing method, a plating method and a vapor deposition method as a method capable of collectively forming a plurality of bumps.

However, in the screen printing method, it is easy to encounter the problem of the bending of the mask (screen), the problem of the bleeding of the print pattern, etc. Therefore, not only can the position accuracy of the bumps not be expected to be so high, There is a problem in that there is a limit in reducing the size of. In addition, when the bumps are composed of solder, it is necessary to use a printing ink in which the solder is in a paste form. Therefore, an additive other than solder is added to the printing ink. It acts as an impurity and may adversely affect the characteristics and reliability of electronic components such as surface acoustic wave filters provided with bumps.

Applying a plating method to at least a part of bump formation is disclosed in, for example, Japanese Patent Laid-Open No. 5-315.
882, JP-A-10-79638 and JP-A-10-135215.

As described above, even when the plating method is applied to form the bumps, there are substantially the same problems as in the case of the screen printing method described above, that is, the plating solution used in the plating method and the plating method. Since the additives and the like contained in the liquid are taken into the bumps, there is a problem that the characteristics and reliability of the electronic component on which the bumps are formed are adversely affected.

Further, in the case of the plating method, in order to control the composition of the bump, it is necessary to strictly control the plating solution. Therefore, when the plating solution is used more than a certain number of times, it is necessary to replace the plating solution, which is not preferable in terms of productivity and environment.

The surface acoustic wave filter 1 shown in FIG.
When the plating method is applied to form the bumps 11 in, the piezoelectric substrate 2 needs to be immersed in the plating solution after the IDT 3 and the like are formed on the piezoelectric substrate 2.
In this case, the IDT 3 may be corroded by the plating solution depending on the material forming the IDT 3. In order to avoid such a problem, the IDT 3 may be covered with a resist,
Even if such measures are taken, if there is a portion where the contact state between the resist and the piezoelectric substrate 2 is insufficient, the plating solution may intrude from this portion, which may cause the IDT 3 to corrode.

Further, the bump may have a structure having at least two layers such as an under bump metal layer made of nickel and a main bump metal layer made of solder formed thereon, for example. In such a case, when the plating method is applied, the under bump metal layer and the main bump metal layer cannot be formed in the same apparatus and the same plating bath. Therefore, there remains a problem regarding productivity.

This problem is not limited to the case where both the under bump metal layer and the main bump metal layer are formed by the plating method. For example, the under bump metal layer is formed by the vapor deposition method and the main bump metal layer is plated. Also encountered when forming by method.

Next, formation of bumps by a vapor deposition method is described in, for example, Japanese Patent Application Laid-Open No. 1-57814 and Japanese Patent Publication No. 2-23034. When the vapor deposition method is used, patterning is performed by, for example, any one of an etching method, a metal mask method and a lift-off method in order to give a necessary pattern as a bump.

The above-mentioned Japanese Patent Publication No. 2-23034 describes the patterning by the etching method. However, the patterning for obtaining the bumps 11 in the surface acoustic wave filter 1 shown in FIG. 4 is performed by the etching method. If this is done, the IDT 3 and the like will be formed after forming the bumps 11 on the piezoelectric substrate 2. However, in recent years, the line space of the IDT 3 has been miniaturized to a level of 1 μm or less, and it is difficult or practically impossible to form a fine pattern for the IDT 3 after forming the bump 11. Is. Furthermore, if a metal film for the IDT 3 is formed after forming the bumps 11, there is a concern that a defect such as disconnection may occur.

The above-mentioned Japanese Patent Laid-Open Publication No. 1-57814 describes the patterning by the metal mask method. However, according to the metal mask method, since a gap is unavoidably formed between the mask and the substrate, the problem of the wraparound of vapor deposition particles cannot be avoided, and therefore there is a limit to the miniaturization of bumps. There is. Further, when the metal mask method is applied to the formation of the bumps 11 in the surface acoustic wave filter 1 shown in FIG. 4 and the electrodes such as the IDT 3 are formed in advance, the mask looks like this. In this case, there is a problem in that the electrodes such as the IDT 3 may be damaged.

When the lift-off method is applied to these, with respect to patterning, while solving the problems encountered in the above-mentioned etching method and metal mask method,
Regarding the formation of bumps, the problems encountered in the stud bump method, screen printing method or plating method described above can also be solved.

That is, according to the lift-off method, a bump having a small size can be formed in an arbitrary shape with high positional accuracy. Further, the bumps at a plurality of locations can be collectively formed, and the productivity is high, so that the cost for forming the bumps can be reduced. Further, when applied to the formation of the bumps 11 in the surface acoustic wave filter 1 shown in FIG. 4, unlike the case of the plating method, it causes a problem such as corrosion on the piezoelectric substrate 2 or the IDT 3. There is no.

[0021]

However, when the bumps are formed by the vapor deposition lift-off method, it may be difficult to increase the adhesion of the bumps to the element substrate. This problem is related to the problem of heat resistance of the material forming the resist pattern used in the vapor deposition lift-off method.

That is, when the temperature at the time of film formation by vapor deposition of the bumps is increased in order to improve the adhesion of the bumps to the element substrate, the polymerization of the resin material forming the resist pattern proceeds and the resin-to-resin bonding strength increases, In the lift-off process, the resist pattern may not be separated from the element substrate, or the shape of the resist pattern may be broken depending on the resin material. Therefore, the temperature during film formation cannot be simply increased, and as a result, it becomes difficult to improve the adhesion of the bumps.

A method of forming a resist pattern which can solve the above problems is described in Japanese Patent Application Laid-Open No. 8-31733. The resist pattern described in this publication has a two-layer structure including a lower layer and an upper layer. An alkali-soluble polymer material is used for the lower layer, and a heat-resistant material is used for the upper layer.

According to the above-mentioned conventional technique, the resist pattern can be easily removed with an alkaline stripping solution, and a heat-resistant material is used for the upper layer. The temperature at the time of film formation can be raised, and it is relatively easy to improve the adhesion of the bump to the element substrate.

However, the conventional technique described above is not shown in FIG.
When applied to the resist pattern for forming the bumps 11 in the surface acoustic wave filter 1 shown in FIG.

The comb-teeth-shaped electrode 4 constituting the IDT 3 of the surface acoustic wave filter 1 is generally made of aluminum or aluminum alloy. However, aluminum dissolves in an alkaline liquid, so that the resist pattern is removed, and therefore an alkaline stripping solution cannot be used. If an alkaline stripping solution is used, the material forming the comb-teeth-shaped electrode 4 is limited to a material other than aluminum that can withstand an alkaline solution.

In forming bumps by the vapor deposition lift-off method, the following problems must be solved.

The bump usually has a structure of at least two layers including an under bump metal layer located on the element substrate side and a main bump metal layer located on the under bump metal layer. Here, the under bump metal layer functions as an adhesion layer for increasing the adhesion of the bump to the element substrate, and a diffusion layer for preventing diffusion of the metal forming the main bump metal layer to the element substrate side. Some of them function as a preventive layer. In particular, when the metal forming the main bump metal layer is, for example, a tin-based alloy such as solder, so-called solder erosion is likely to occur, and the solder bump erosion prevention effect is high in the under bump metal layer. Metal is used. Nickel is particularly preferably used as the metal having a high solder erosion preventing effect.

However, since the vapor deposition film of nickel has a large stress, it is necessary that the resist pattern used in the vapor deposition lift-off has high stress resistance. It should be noted that the stress of the deposited film is smaller than nickel, for example, a metal such as chromium or tungsten may be used in the under bump metal layer, but in this case, since the solder erosion preventing effect of these metals is smaller than nickel, The under bump metal layer has to be formed thicker, resulting in a large stress.

On the other hand, as described above, the resist pattern needs to be easily peeled off from the element substrate after the vapor deposition step. However, such a resin material that is easy to peel and has high stress resistance has not yet been realized. Therefore, since the stress of the vapor deposition film of the under bump metal layer is made smaller, the under bump metal layer cannot be formed thick, and as a result, the main bump metal layer made of a tin-based alloy can also be formed thick. First, there is a limit to increase the thickness of the entire bump.

For this reason, when flip chip bonding is performed on a mounting substrate using bumps, the bonding portion is relatively weak against thermal shock. In addition, when the mounting surface is inferior in flatness, for example, when the mounting substrate is a multi-layer ceramic substrate, it is necessary to set a proper contact state and a proper contact state with respect to each conductive land on the mounting substrate for all bumps at a plurality of locations. It may be difficult to obtain a proper bonding state.

From the above, the resist pattern used for bump formation by vapor deposition lift-off is required to have heat resistance, be easily peeled from the element substrate, and have high stress resistance. It

Further, it is required that the problem of outgas does not occur even at the temperature applied in the vapor deposition process. This is because when the problem of outgas occurs, impurities may be mixed in the deposited film.

Incidentally, Japanese Patent Laid-Open No. 10-13184 describes that bumps having a three-layer structure of NiCr / Ni / Ag are formed by vapor deposition lift-off. However, this publication does not show a specific example of the material forming the resist pattern, and does not suggest the above-mentioned demand for the resist pattern.

Therefore, an object of the present invention is to provide a resist pattern and a method for forming the resist pattern which can satisfy the above-mentioned demands in order to enable favorable bump formation by vapor deposition lift-off.

Another object of the present invention is to provide a bump formed by using the above resist pattern and a method for forming the bump.

Still another object of the present invention is to provide a surface acoustic wave device including the above bump and a method for manufacturing the same.

[0038]

The present invention is used for forming bumps on a device substrate by vapor deposition lift-off, and provided with an opening for exposing a portion of the device substrate where the bump is to be formed. The present invention is directed to a resist pattern, and is characterized by having the following configuration in order to solve the above-mentioned technical problem.

That is, the resist pattern according to the present invention is the lowermost layer in contact with the element substrate, and is formed on the release layer having the property of being easily peelable from the element substrate. The release layer has a structure having at least two layers having a higher stress resistance than the release layer and including a main resist layer. The release layer is less likely to undergo polymerization even when heated or irradiated with light and has a relatively high resin-bonding force. The main resist layer is composed of a weak thermoplastic resin, and the main resist layer is composed of a resin having a higher degree of polymerization and a stronger resin-bonding force than the thermoplastic resin forming the release layer.

As described above, the resist pattern according to the present invention intends to satisfy the above-mentioned demands for heat resistance, easy peeling and stress resistance while sharing the peeling layer and the main resist layer. is there.

As the thermoplastic resin forming the above-mentioned release layer, a resin containing polydimethylglutarimide (PMGI) is preferably used.

Further, the main resist layer preferably has a stress resistance of 0.6 GPa or more.

The resin constituting the main resist layer is 3
It is preferable to mainly use those having a molecular weight of 0000 or more.

As the resin constituting the main resist layer, for example, a resin containing at least one selected from acrylic ester resin, polyimide resin, benzocyclobutene, acrylic resin and olefin resin is preferably used. To be

The present invention is also directed to a method of forming a resist pattern as described above.

The resist pattern forming method according to the present invention comprises a step of forming a peeling layer on an element substrate, a step of forming a main resist layer on the peeling layer, and a main resist layer via a photomask. And then removing a part of the main resist layer with a developing solution, and removing the peeling layer in the part exposed to the removed part of the main resist layer by dry etching, thereby,
And a step of forming an opening for exposing a portion of the element substrate where the bump is to be formed.

The present invention is also directed to a method of forming bumps on an element substrate using the resist pattern as described above.

The method of forming bumps according to the present invention comprises the steps of preparing the element substrate on which the above-mentioned resist pattern is formed, and using the resist pattern as a mask, on the element substrate in the openings of the resist pattern and on the resist pattern. A step of forming an under bump metal layer functioning as a diffusion prevention layer on each of them by vapor deposition, and then a main bump metal layer for enabling flip chip bonding to a mounting substrate on the under bump metal layer. And a step of lifting off the resist pattern so as to remove the resist pattern together with the under bump metal layer and the main bump metal layer formed on the resist pattern.

One metal selected from nickel, chromium, and tungsten is preferably used as the metal forming the under bump metal layer, while a tin-based alloy or a metal alloy forming the main bump metal layer is used. A gold alloy is preferably used.

The step of forming the under bump metal layer is preferably carried out until the under bump metal layer has a thickness of 500 nm or more.

Further, it is preferable that the step of forming the under bump metal layer and the step of forming the main bump metal layer are successively performed in the same vacuum device while maintaining a vacuum state.

Further, the resist pattern used in the bump forming method according to the present invention has a plurality of openings, and a step of forming an under bump metal layer and a main bump metal layer are formed in association with each opening. It is preferred that each of the steps and the steps be performed simultaneously.

The present invention is also directed to bumps. The bump according to the present invention has a structure including at least two layers including an under bump metal layer located on the element substrate side and a main bump metal layer located on the under bump metal layer, and is formed by the above-described forming method. It is characterized by being

The present invention is also directed to a surface acoustic wave element and a method for manufacturing the same.

A surface acoustic wave device according to the present invention is characterized in that a piezoelectric substrate is provided as the above-mentioned device substrate, and the above-mentioned bumps are formed on this piezoelectric substrate, and the mounting substrate is provided via the bumps. Flip chip bonding is possible.

In the surface acoustic wave element according to the present invention,
The bump includes an under bump metal layer made of nickel and a main bump metal layer made of a tin-based alloy, and the thickness of the under bump metal layer is 500 to 5000.
It is preferably in the range of nm.

A method of manufacturing a surface acoustic wave device according to the present invention comprises the steps of preparing a piezoelectric substrate having an interdigital transducer and bump pad electrodes electrically connected to the interdigital transducer,
A step of forming the above-mentioned resist pattern on the piezoelectric substrate with the opening aligned with the bump pad electrode, and forming bumps on the bump pad electrode on the piezoelectric substrate by the forming method described above. And a process.

The bump pad electrodes described above may be provided by the bus bar itself provided in the interdigital transducer.

[0059]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1 to 3 are for explaining one embodiment of the present invention. Here, FIG. 1 and FIG. 2 sequentially show some typical steps included in a method for forming a resist pattern, and FIG. 3 illustrates some typical steps included in a method for forming a bump performed using this resist pattern. The steps are shown in sequence. The structures shown in FIGS. 1 to 3 are shown in cross-sectional views, but in these cross-sectional views, the dimension in the thickness direction is exaggerated.

The method of forming the bumps shown in FIG. 3 is the same as the bumps 11 in the surface acoustic wave filter 1 shown in FIG.
The following description will be given as applied to the formation of
Therefore, in FIGS. 1 to 3, elements corresponding to the elements shown in FIG. 4 are designated by the same reference numerals, and duplicated description will be omitted.

First, a piezoelectric substrate 2 as an element substrate as shown in FIGS. 1A and 4 is prepared. The piezoelectric substrate 2 is made of, for example, quartz, LiTaO ₃ , LiNb.
It is composed of O ₃ , Li ₂ B ₄ O _{7, and the} like.

Next, as shown in FIG. 4, the IDT 3, the reflector 7 and the bump pad electrode 1 are formed on the piezoelectric substrate 2.
Although not shown, the following steps are performed to form 0.

That is, the IDT 3, the reflector 7 and the bump pad electrode 1 are formed by using the photolithography technique.
A lift-off resist pattern having an opening is formed in a portion where 0 is to be formed. Then, a metal containing Al as a main component is deposited by a vapor deposition method or a sputtering method. As the metal to be formed, in addition to Al, Au, C
A material containing u, Mg, Ni, Ta or W as a main component may be used, or a multilayer film of these may be formed.

Next, a lift-off process is performed, whereby the IDT 3, the reflector 7 and the bump pad electrode 10 are formed on the piezoelectric substrate 2.

In order to form the IDT 3, the reflector 7 and the bump pad electrode 10, an etching process including the steps of film formation, resist formation, resist patterning, etching and resist stripping may be used.

FIG. 1A shows a state in which the bump pad electrode 10 formed as described above is formed on the piezoelectric substrate 2.

Next, as shown in FIG. 1B, the peeling layer 12 is formed on the piezoelectric substrate 2. The release layer 12 is made of a thermoplastic resin, and as the thermoplastic resin, a resin containing polydimethylglutarimide (PMGI) is advantageously used. In order to form the release layer 12, for example, a resin containing PMGI is spin coated by a spin coater.
Coat to a film thickness of 00 nm, then 130 ° C
It is baked for 60 seconds on a hot plate heated to the temperature of.

As the thermoplastic resin forming the peeling layer 12, other than PMGI, for example, a novolac resin, a resin generally used as an antireflection film (BARC), or the like, a main resist layer 13 to be described later. Even if heat is applied in the vapor deposition step for forming the bumps 11 and light irradiation for forming the resin, the polymerization is difficult to proceed and the inter-resin bonding force is relatively weak, that is, peeling that does not cause a problem in the lift-off step. Any resin may be used as long as it can ensure the property.

However, according to the experiment conducted by the inventor of the present invention, when PMGI is used as the material of the release layer 12, undesired mixing with the main resist layer 13 is almost caused by baking at a relatively low temperature of 130 ° C. Moreover, it is confirmed that even after the film forming step while heating to a relatively high temperature such as 150 ° C., excellent peelability is exhibited. From these points, the peeling layer 1
It has been found that PMGI is particularly suitable as the material forming the 2.

Next, as shown in FIG. 1 (3), the release layer 1
A main resist layer 13 having a thickness of, for example, 52 μm is formed on the second layer 2 by a method similar to that of the peeling layer 12. The main resist layer 13 is for imparting stress resistance to the resist pattern, and is composed of a resin having a higher degree of polymerization and a stronger inter-resin bonding force than the thermoplastic resin forming the release layer 12. To be done. Preferably, the main resist layer 13 is designed to have a stress resistance of 0.6 GPa or more, and is mainly composed of one having a molecular weight of 30,000 or more.

More specifically, the main resist layer 13 can be formed by applying a negative photoresist material containing an acrylic ester resin.
In addition to the acrylic ester resin, a negative photoresist material containing, for example, any one of polyimide resin, benzocyclobutene, acrylic resin and olefin resin may be used as the material of the main resist layer 13 It was confirmed by an experiment conducted by the present inventor that high stress resistance such that resist peeling does not occur can be realized even if nickel, chromium, or tungsten is formed on the layer 13 by vapor deposition to have a film thickness of 500 nm or more. Has been done.

However, it has been confirmed that the acrylic ester-based negative photoresist material exhibits the highest stress resistance among the photosensitive resin materials examined by the present inventors. In addition, the acrylic ester-based negative photoresist material can easily cope with thicker resist patterns, can easily form an inverse taper shape suitable for lift-off, and has a large exposure margin. Have advantages. In addition, an acrylic acid ester-based negative photoresist material is used for the main resist layer 1.
If 3 is formed, the temperature will be 180 even in the vapor deposition process.
Even when the temperature rises to 0 ° C., the resist pattern does not have a problem such as shape collapse or outgassing, and mixing with PMGI forming the peeling layer 12 is unlikely to occur.

Next, as shown in FIG. 2A, a photomask 14 is disposed on the main resist layer 13, and a light ray 15 is irradiated through the photomask 14 as shown by an arrow. The main resist layer 13 is exposed. The photomask 14 has a light shielding portion 16 in a portion where the bump 11 described later is to be formed.

Next, as shown in FIG. 2B, the unexposed portion of the main resist layer 13 is removed (developed) by an organic alkaline developing solution. As a result, the main resist layer 13 is formed with the recess 17 exposing a part of the peeling layer 12. The photolithography conditions are preferably selected so that the main resist layer 13 has an inverted taper shape in the portion where the recess 17 is formed.

Next, as shown in FIG. 2C, the peeling layer 12 in the removed portion of the main resist layer 13, that is, the portion exposed in the recess 17 is removed by dry etching. For this dry etching, for example,
Oxygen plasma 18 as indicated by the arrow is used. At this time, comparing the etching rates of the acrylic acid ester resin and PMGI by the oxygen plasma 18, PMG
Since I has an etching rate 10 times or more higher than that of the acrylic ester-based resin, the release layer 12 made of PMGI is satisfactorily removed with sufficient selectivity.

In this way, the portion of the piezoelectric substrate 2 where the bump 11 is to be formed, that is, the bump pad electrode 1 is formed.
A resist pattern 20 having an opening 19 for exposing 0 is formed.

Next, a method of forming the bumps 11, which is carried out by using the resist pattern 20 described above, will be described.

First, the piezoelectric substrate 2 on which the resist pattern 20 is formed is put into a vacuum device, and the piezoelectric substrate 2
Is heated to a temperature of 120 ° C., for example.

Next, while maintaining the above state, FIG.
As shown in (1), in order to form the adhesion layer 21, for example, a vapor deposition step is performed so that Ti is formed to have a thickness of 10 nm, and then the under bump metal layer 22 as a diffusion prevention layer is formed. In order to form, for example, a vapor deposition process is performed so that Ni is formed into a film with a thickness of 2000 nm, and subsequently, as shown in FIG.
In order to form the main bump metal layer 23,
For example, the vapor deposition step is performed so that the Sn-based alloy is formed into a film with a thickness of 50,000 nm. It is preferable that the vapor deposition process for forming the adhesion layer 21, the under bump metal layer 22, and the main bump metal layer 23 is continuously performed in the same vacuum device while maintaining a vacuum state.

As described above, since the main resist layer 13 of the resist pattern 20 has high stress resistance, Ni
The under-bump metal layer 22 composed of can be formed with a thickness of 500 nm or more, such as 2000 nm described above. When considering the diffusion prevention of the Sn-based alloy forming the main bump metal layer 23, if the thickness of the main bump metal layer 23 is 10000 nm, it is sufficient that the under bump metal layer 22 has a thickness of 500 nm. In addition, the main bump metal layer 23
Even if the thickness of the under bump metal layer 22 is 40,000 nm or more, it is sufficient if the under bump metal layer 22 has a thickness of 2000 nm. Therefore, when the under bump metal layer 22 is formed to a thickness of 500 to 5000 nm,
Main bump metal layer 23 having a thickness of 000 to 50,000 nm
Can correspond to.

As the material for the adhesion layer 21, NiCr may be used in addition to Ti. Further, as the material for forming the under bump metal layer 22, Cr or W is used in addition to Ni, and further, any material having a diffusion preventing function of Sn alloy such as Au, Pt or Cu can be used. Such materials may be used. Further, as the material forming the main bump metal layer 23, any material other than Sn-based alloy, such as Au-based alloy, can be used as long as it is a material that enables flip-chip bonding to a mounting substrate. Good.

Next, the structure shown in FIG. 3B is immersed in a stripping solution, whereby the resist pattern 2 is formed.
A lift-off process for removing 0 together with the adhesion layer 21, the under bump metal layer 22, and the main bump metal layer 23 formed thereon is performed. At this time, since the peeling layer 12 made of, for example, PMGI is formed as the lowermost layer of the resist pattern 20, good peeling property is obtained even though a high temperature of 120 ° C. is applied in the above-described vapor deposition step. Indicates that no problem such as residue occurs.

In the above-mentioned stripping solution, the stripping layer 12 is P
When composed of MGI, for example, a monoethanolamine type can be used. Further, other alcohols, acetone, pegmia, benzocyclobutene, etc. may be used. Since these stripping liquids do not dissolve aluminum, they do not adversely affect the IDT 3 and the like already formed on the piezoelectric substrate 2.

Next, a water washing step is carried out.

Thus, as shown in FIG. 3C, the bump 11 composed of the adhesion layer 21, the under bump metal layer 22 and the main bump metal layer 23 is formed on the bump pad electrode 10, and the bump 11 shown in FIG. The surface acoustic wave filter 1 as shown in is completed.

When the above-described steps are performed on the piezoelectric substrate 2 in the mother state, the dicing step is performed next to obtain the individual surface acoustic wave filters 1.

The surface acoustic wave filter 1 thus obtained is flip-chip bonded to the mounting substrate by the bumps 11, and then the surface acoustic wave filter 1 is covered with resin, if necessary.

FIG. 5 is a plan view corresponding to FIG. 4, showing another example of a surface acoustic wave filter as a surface acoustic wave element obtained by applying the present invention. In FIG. 5, FIG.
The elements corresponding to the elements shown in are denoted by the same reference numerals, and the duplicate description will be omitted.

In the surface acoustic wave filter 1a shown in FIG. 5, the bump pad electrode 10 shown in FIG. 4 is not separately provided, but instead, the bump pad electrode is provided by the bus bar 6 itself included in the IDT 3. Then, the bump 11 is formed on the bus bar 6. Bump 11
Has, for example, an elongated planar shape extending along the longitudinal direction of bus bar 10.

As described above, according to the bump forming method of the present invention, the bumps are small and have high positional accuracy.
As bumps of any shape can be formed,
As shown in, even in the area of the bus bar 10 having a limited area, the elongated bump 11 can be formed with high positional accuracy without any problem.

By adopting the configuration shown in FIG. 5,
Further downsizing of the surface acoustic wave filter can be achieved.

As a modification of the configuration shown in FIG. 5,
The bump 11 may be formed so as to extend from the bus bar 10 to the piezoelectric substrate 2.

Although the present invention has been described in connection with the formation of the bumps 11 on the surface acoustic wave element 1 or 1a, the present invention can be applied to the formation of bumps on other electronic components.

[0094]

As described above, the resist pattern according to the present invention includes the peeling layer for ensuring easy peeling and the main resist layer for ensuring heat resistance. When forming bumps with
It is possible to raise the temperature in the vapor deposition step to increase the adhesion strength of the bumps to the element substrate, and even if the temperature in the vapor deposition step is raised in this way, in the lift-off step,
The resist pattern can be easily peeled off.

In the above resist pattern,
The main resist layer also acts to enhance the stress resistance of the resist pattern. Therefore, when the bumps are formed by the vapor deposition lift-off method, it is possible to use, as the metal forming the bumps, a metal that increases the stress of the vapor deposition film, and to make the film thickness sufficiently thick. become.

That is, when the bump is formed with a structure having at least two layers, an under bump metal layer functioning as a diffusion preventing layer and a main bump metal layer for enabling flip chip bonding to a mounting substrate, In the under bump metal layer, it becomes possible to use nickel, which has a large stress of the vapor deposition film but has a high diffusion preventing effect, without any problem, and to form the under bump metal layer made of nickel in a thickness of 500 nm or more. Will be able to. As a result, also in the main bump metal layer, it is possible to form a thicker thickness while using a tin-based alloy such as solder that easily causes diffusion. Therefore, when flip chip bonding is performed on a mounting substrate using such bumps, the strength of the bonding portion against thermal shock can be increased, and even if the mounting surface of the mounting substrate is poor in flatness, With respect to the bumps at a plurality of positions, it is possible to easily obtain a proper contact state and a proper bonding state with respect to each conductive land on the mounting substrate.

As described above, the main resist layer which imparts the stress resistance preferably has a stress resistance of 0.6 GPa or more, and the resin constituting the main resist layer is 30
It is preferable to mainly use those having a molecular weight of 000 or more.

The demand for the main resist layer as described above is such that at least the resin forming the main resist layer is selected from acrylic ester resin, polyimide resin, benzocyclobutene, acrylic resin and olefin resin. It can be achieved more reliably by using one containing one kind. On the other hand, when a thermoplastic resin containing polydimethylglutarimide is used as the thermoplastic resin forming the release layer, the function of the release layer as described above can be exhibited with higher reliability.

In particular, when polyacrylic acid ester resin is used in the main resist layer while using polydimethylglutarimide in the release layer, first, the release layer is formed on the element substrate and then baked at a temperature of about 130 ° C. In the subsequent heating step, it is possible to prevent undesired mixing with the acrylic ester resin of the main resist layer. Therefore, particularly when a piezoelectric substrate is used as the element substrate, if the heating temperature is high, problems such as substrate cracking and pyroelectric breakdown of electrodes may occur, but mixing at a temperature of about 130 ° C. described above may occur. Since it can be prevented, such a problem can be advantageously avoided. Further, in forming bumps using this resist pattern, if a temperature of about 120 ° C. is applied, the adhesion required for the bumps can be obtained.
By heating at about 20 ° C., the thermosetting of polydimethylglutarimide hardly progresses, so that good peelability can be secured. Also, the problem of outgas does not occur.

Further, when the bumps including the under bump metal layer and the main bump metal layer are formed by vapor deposition using the resist pattern according to the present invention, these vapor deposition steps can be continuously carried out, so that the production You can improve your sex.

As described above, according to the present invention,
Since bumps can be formed without problems by vapor deposition lift-off, it is possible to form bumps of any shape with small size and high positional accuracy, which contributes to miniaturization of electronic components such as surface acoustic wave elements on which bumps are provided. Can be made. Therefore, for example, the bumps can be formed on the bus bar itself included in the IDT. With this structure, the surface acoustic wave element can be further downsized.

Further, the bumps can be formed at a plurality of locations at once, the productivity can be improved, and the cost of the electronic component can be reduced. In addition, it is possible to avoid the problem that the device substrate and the electrodes already provided on the device substrate are adversely affected as in the plating method.

[Brief description of drawings]

FIG. 1 is a cross-sectional view sequentially showing some typical steps included in a method for forming a resist pattern, which is performed by applying an embodiment of the present invention.

2A to 2C are cross-sectional views sequentially showing some typical steps included in a method of forming a resist pattern, which is performed subsequent to the step shown in FIG.

FIG. 3 is a cross-sectional view sequentially showing some typical steps included in a method for forming bumps 11 which is carried out by using a resist pattern 20 obtained through the steps shown in FIGS. 1 and 2.

FIG. 4 is a plan view showing a surface acoustic wave filter 1 which is of interest to the present invention.

FIG. 5 is a plan view showing another example of the surface acoustic wave filter obtained by applying the bump forming method according to the present invention.

[Explanation of symbols]

1,1a Surface acoustic wave filter 2 Piezoelectric substrate 10 Bump pad electrode 11 bumps 12 Release layer 13 Main resist layer 14 Photomask 17 recess 18 oxygen plasma 19 opening 20 resist pattern 21 Adhesion layer 22 Under bump metal layer 23 Main bump metal layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 21/92 603D 604C (72) Inventor Keiji Iwata 26-10 Tenjin, Nagaokakyo, Kyoto Prefecture Murata Co., Ltd. F term in the factory (reference) 5J097 AA29 BB02 BB11 DD24 DD29 FF03 FF05 FF08 HA02 HA03 JJ09 KK10

Claims (16)

[Claims] 1. A resist pattern, which is used to form bumps on a device substrate by vapor deposition lift-off, and is provided with an opening for exposing a portion of the device substrate where the bumps are to be formed. The bottom layer in contact with the element substrate, having a property of easily peelable to the element substrate, a peeling layer,
A structure formed of at least two layers, which is formed on the peeling layer and has a stress resistance higher than that of the peeling layer and including a main resist layer, wherein the peeling layer is polymerized even when heated or irradiated with light. Is difficult to proceed and the resin-bonding force is relatively weak, and is composed of a thermoplastic resin, the main resist layer has a higher degree of polymerization and a resin-bonding force higher than that of the thermoplastic resin forming the release layer. A resist pattern comprising a strong resin. 2. The resist pattern according to claim 1, wherein the release layer contains polydimethylglutarimide. 3. The resist pattern according to claim 1, wherein the main resist layer has a stress resistance of 0.6 GPa or more. 4. The resist pattern according to claim 1, wherein the resin forming the main resist layer is mainly composed of a resin having a molecular weight of 30,000 or more. 5. The main resist layer according to claim 1, wherein the main resist layer contains at least one selected from acrylic ester resins, polyimide resins, benzocyclobutene, acrylic resins and olefin resins. Resist pattern. 6. The method for forming a resist pattern according to claim 1, wherein the peeling layer is formed on the element substrate, and the main resist is formed on the peeling layer. A step of forming a layer, a step of exposing the main resist layer through a photomask, a step of removing a part of the main resist layer with a developing solution, and a step of removing the main resist layer on the removed part. Forming a resist pattern, which comprises removing the release layer in the exposed portion by dry etching, thereby forming the opening for exposing the portion of the element substrate where the bump is to be formed. Method. 7. A method of forming bumps on the element substrate by using the resist pattern according to claim 1, wherein the element substrate is provided with the resist pattern. A step of forming an under bump metal layer functioning as a diffusion preventing layer by vapor deposition on the element substrate in the opening of the resist pattern and on the resist pattern, respectively, using the resist pattern as a mask; Forming a main bump metal layer on the under bump metal layer by vapor deposition to enable flip chip bonding to a mounting substrate; and forming the resist pattern on the under bump metal layer. Riff to remove along with metal layer and main bump metal layer And a step of turning off, the method of forming the bumps. 8. The metal forming the under bump metal layer includes one kind selected from nickel, chromium and tungsten, and the metal forming the main bump metal layer is a tin-based alloy or a gold-based alloy. The method for forming a bump according to claim 7. 9. The bump forming method according to claim 7, wherein the step of forming the under-bump metal layer is performed until the under-bump metal layer has a thickness of 500 nm or more. 10. The method of forming the under-bump metal layer and the step of forming the main bump metal layer are successively performed in the same vacuum device while maintaining a vacuum state. The method for forming a bump according to any one of 1. 11. The resist pattern has a plurality of openings, and the step of forming the under bump metal layer is simultaneously performed in association with the plurality of openings to form the main bump metal layer. 11. The bump forming method according to claim 7, wherein the steps are simultaneously performed. 12. A bump formed by the forming method according to claim 7, wherein the bump is located on the side of the element substrate, and the bump is located on the under bump metal layer. A bump having a structure composed of at least two layers including the main bump metal layer. 13. The element substrate is a piezoelectric substrate, and the bump according to claim 12 is formed on the piezoelectric substrate, and flip chip bonding is possible with respect to a mounting substrate via the bump. , Surface acoustic wave devices. 14. The bump comprises the under bump metal layer made of nickel and the main bump metal layer made of a tin-based alloy, and the thickness of the under bump metal layer is in a range of 500 to 5000 nm. is there,
The surface acoustic wave device according to claim 13. 15. A step of preparing a piezoelectric substrate on which an interdigital transducer and a bump pad electrode electrically connected to the interdigital transducer are formed, and any one of claims 1 to 5 on the piezoelectric substrate. 12. The step of forming the resist pattern according to claim 7 in a state where the opening is aligned with the bump pad electrode, and the bump on the piezoelectric substrate by the method according to claim 7. And a step of forming the bump on the pad electrode. 16. The method of manufacturing a surface acoustic wave device according to claim 15, wherein the bump pad electrode is provided by a bus bar itself included in the interdigital transducer.