JP2003316749A - 分散型のリンク・モジュール - Google Patents

分散型のリンク・モジュール

Info

Publication number
JP2003316749A
JP2003316749A JP2003079913A JP2003079913A JP2003316749A JP 2003316749 A JP2003316749 A JP 2003316749A JP 2003079913 A JP2003079913 A JP 2003079913A JP 2003079913 A JP2003079913 A JP 2003079913A JP 2003316749 A JP2003316749 A JP 2003316749A
Authority
JP
Japan
Prior art keywords
central processing
link
link module
processing unit
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2003079913A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003316749A5 (enExample
Inventor
Derek L Knee
デリック・エル・ニー
Thomas N Indermaur
トーマス・エヌ・インダーモール
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JP2003316749A publication Critical patent/JP2003316749A/ja
Publication of JP2003316749A5 publication Critical patent/JP2003316749A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7828—Architectures of general purpose stored program computers comprising a single central processing unit without memory
    • G06F15/7832—Architectures of general purpose stored program computers comprising a single central processing unit without memory on one IC chip (single chip microprocessors)
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Bus Control (AREA)
  • Microcomputers (AREA)
  • Information Transfer Systems (AREA)
JP2003079913A 2002-03-28 2003-03-24 分散型のリンク・モジュール Withdrawn JP2003316749A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/109,480 2002-03-28
US10/109,480 US7194651B2 (en) 2002-03-28 2002-03-28 Distributed link module architecture

Publications (2)

Publication Number Publication Date
JP2003316749A true JP2003316749A (ja) 2003-11-07
JP2003316749A5 JP2003316749A5 (enExample) 2006-04-06

Family

ID=28789764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003079913A Withdrawn JP2003316749A (ja) 2002-03-28 2003-03-24 分散型のリンク・モジュール

Country Status (2)

Country Link
US (1) US7194651B2 (enExample)
JP (1) JP2003316749A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7599489B1 (en) * 2004-02-09 2009-10-06 Sun Microsystems Inc. Accelerating cryptographic hash computations
US7512204B1 (en) * 2005-03-18 2009-03-31 Altera Corporation Multi-phase-locked loop (PLL) solution for multi-link multi-rate line card applications
US8250500B1 (en) * 2005-10-17 2012-08-21 Altera Corporation Method and apparatus for deriving signal activities for power analysis and optimization
JP4846486B2 (ja) * 2006-08-18 2011-12-28 富士通株式会社 情報処理装置およびその制御方法
US20080270653A1 (en) * 2007-04-26 2008-10-30 Balle Susanne M Intelligent resource management in multiprocessor computer systems

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4849751A (en) * 1987-06-08 1989-07-18 American Telephone And Telegraph Company, At&T Bell Laboratories CMOS Integrated circuit digital crossbar switching arrangement
EP1016233A4 (en) * 1997-09-19 2000-12-06 Fujitsu Network Communications CROSS RAIL CONTROL WITH A CONSTANT PHASE
US6636932B1 (en) * 1998-05-27 2003-10-21 Micron Technology, Inc. Crossbar switch and control for data networks switching
DK1284587T3 (da) * 2001-08-15 2011-10-31 Sound Design Technologies Ltd Rekonfigurerbar lavenergi-høreindretning

Also Published As

Publication number Publication date
US20030194032A1 (en) 2003-10-16
US7194651B2 (en) 2007-03-20

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