JP2003284390A - Stepping motor drive unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a stepping motor drive unit which is capable of accommodating various kinds of stepping motors and various kinds of loads driven by a stepping motor by one and the same kind of drive unit, and outputting a stepping motor driving waveform which minimizes the current consumption thereof. <P>SOLUTION: The stepping motor drive unit comprises a quartz oscillation circuit; a frequency dividing circuit which divides the frequency of a reference oscillation signal that is the output of the quartz oscillation circuit; and a waveform synthesizing circuit which receives a timing signal that is the output of the frequency dividing circuit, and synthesizes a driving signal for a stepping motor. The waveform synthesizing circuit comprises a first logic circuit which outputs the synthesized timing signal based on the timing signal, a selection circuit which selects either of the synthesized timing signal or the timing signal and outputs an intermediate waveform signal, and a second logic circuit which outputs either of the intermediate waveform signal or the signal obtained by synthesizing the intermediate waveform signal. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stepping motor driving device for driving a stepping motor.

[0002]

2. Description of the Related Art Conventionally, a stepping motor driving device has been designed to reduce power consumption when driving a stepping motor.
The drive waveform of the stepping motor is synthesized in various forms.

Regarding the drive waveform of the above stepping motor, it has been proposed to synthesize the drive waveform into a chopping pulse type. The chopping pulse is applied intermittently to the stepping motor, so that the peak current is lower than that of the rectangular pulse, and the stepping motor can be driven with lower power consumption.

It has also been proposed to drive the stepping motor with low power consumption by changing the duty and the number of chopping pulses to shorten the current application time to the stepping motor as much as possible.

Further, the rotation / non-rotation of the stepping motor is detected, if the rotation continues, the duty of the chopping pulse is reduced, and in the case of non-rotation, the rotatable large current pulse is applied again and the next driving is performed. Proposals have been made to increase the duty of the chopping pulse.

[0006]

However, when the type of the stepping motor or the load driven by the stepping motor is changed as described above, the power consumption of the stepping motor is minimized so that the power consumption when driving the stepping motor becomes the lowest. The drive waveform will be changed. That is,
In response to the demand that the drive waveforms of the stepping motor have to be synthesized in various forms, in the conventional stepping motor drive device, a situation occurs in which the circuit itself for synthesizing the drive waveforms is changed. It was necessary to manufacture a stepping motor drive.

Therefore, the conventional stepping motor driving device lacks versatility, and there is a problem that various kinds of stepping motor driving devices must be prepared according to the specifications of the stepping motor.

[0008]

In order to solve the above problems, the stepping motor drive device according to the present invention has the following configuration. A crystal oscillating circuit, a frequency dividing circuit for dividing a reference oscillating signal output from the crystal oscillating circuit, and a waveform synthesis for synthesizing a stepping motor drive signal by receiving a timing signal output from the frequency dividing circuit. A stepping motor drive device including a circuit, wherein the waveform synthesizing circuit outputs either a first logic circuit for outputting a synthetic timing signal based on the timing signal, or the synthetic timing signal or the timing signal. And a second logic circuit for outputting either the intermediate waveform signal or a signal obtained by synthesizing the intermediate waveform signal, and a second logic circuit for outputting the intermediate waveform signal. A stepping motor drive device is provided.

Further, the selection circuit is composed of an externally rewritable memory element, so that the drive waveform of the stepping motor can be easily changed by rewriting the content of the memory element. That is, by rewriting the contents of the memory element, the power consumption during driving of the external stepping motor is minimized in the timing signal output from the frequency dividing circuit or the combined timing signal output from the first logic circuit. Select a timing signal that allows synthesis of a stepping motor drive waveform to form an intermediate waveform signal, synthesize the intermediate waveform signal in the second logic circuit, or output the intermediate waveform signal as it is, and output the drive waveform with the lowest current consumption to the outside. It becomes possible to drive a certain stepping motor.

According to the stepping motor driving device of the present invention configured as described above, the type of the stepping motor and the load driven by the stepping motor are changed,
Even when the stepping motor drive waveform is changed so that the power consumption at the time of driving the stepping motor becomes the lowest, by rewriting the contents of the memory element of the selection circuit configured by the memory element rewritable from the outside, It is possible to output the drive waveform of the stepping motor that corresponds to the externally connected stepping motor and the load driven by the stepping motor and has the lowest power consumption.

[0011]

According to the present invention, a crystal oscillating circuit, a frequency dividing circuit for dividing a reference oscillating signal output from the crystal oscillating circuit, and a timing signal output from the frequency dividing circuit are received. Is a stepping motor driving device having a waveform synthesizing circuit for synthesizing a drive signal of a stepping motor, wherein the waveform synthesizing circuit outputs a synthetic timing signal based on the timing signal. A circuit, a selection circuit for selecting either the composite timing signal or the timing signal and outputting an intermediate waveform signal, and for outputting either the intermediate waveform signal or a signal obtained by combining the intermediate waveform signals And a second logic circuit of the stepping motor driving device. Furthermore, by configuring the selection circuit with an externally rewritable memory element,
It is characterized in that the drive waveform of the stepping motor can be easily changed by rewriting the contents of the memory element.

(First Embodiment) A functional block diagram showing a typical configuration of the first embodiment of the present invention will be described below with reference to FIG. In FIG. 1, a crystal oscillating circuit 101 and a reference oscillating signal 102 that is an output of the crystal oscillating circuit 101 are input to a frequency dividing circuit 103 and a frequency dividing circuit that divides the reference oscillating signal that is an output of the crystal oscillating circuit. 103 outputs the timing signal 104. A waveform synthesizing circuit 105 for synthesizing a drive signal of a stepping motor in response to a timing signal output from the frequency dividing circuit is provided with a timing signal 104.
Is input to output the stepping motor drive signal 111 to drive the stepping motor 112.

The waveform synthesizing circuit 105 receives the timing signal 104 and the first logic circuit 106 which outputs the synthesizing timing signal 107, and the timing signal 104 or the synthesizing timing signal to synthesize the synthesizing timing signal or A selection circuit 108 for selecting any one of the timing signals and outputting the intermediate waveform signal 109 for outputting the intermediate waveform signal composed of an externally rewritable memory element (hereinafter referred to as the selection circuit 108)
And a second logic circuit 110 for inputting the intermediate waveform signal 109 and outputting either the intermediate waveform signal or a signal obtained by synthesizing the intermediate waveform signal as a stepping motor drive signal 111.

FIG. 4 is a table showing an example of a combined timing signal combined by the first logic circuit 106.

32 KHz, 16 kHz, 8 k in FIG.
Waveforms of Hz, 4 kHz, 2 kHz, and 1 kHz are timing signals output from the frequency dividing circuit, respectively, and based on this signal, a composite timing signal in the form of a waveform, a waveform, a waveform, or a chopping pulse with a different duty such as a waveform. Alternatively, the one-shot shape combining timing signals such as the waveform A, the waveform B, and the waveform C are combined.

To the selection circuit 108, one of the timing signal 104 or the composite timing signal 107 that may be output as the intermediate waveform signal 109 is connected in advance as an input.

After the stepping motor drive device is manufactured, the stepping motor 112 and the stepping motor 112 are manufactured.
The contents of the memory element are written from the outside so as to select the intermediate waveform signal 109 that corresponds to the load driven by the memory and has the lowest current consumption. The second logic circuit 110 synthesizes the intermediate waveform signal 109 selected by the selection circuit 108 or outputs the intermediate waveform signal 109 as it is as a stepping motor drive waveform 111 to drive an external stepping motor.

FIG. 5 is a table showing an example of stepping motor drive waveforms synthesized by the second logic circuit 108.

Waveforms 1 and 2 in FIG. 5 are intermediate waveform signals selected by the selection circuit 110, and a stepping motor drive waveform such as waveform 3 is synthesized based on these signals.

As a result, the stepping motor drive device of the present invention can output the stepping motor drive waveform 111 that provides the lowest current consumption even after manufacturing.

FIG. 2 is a diagram showing the configuration of the selection circuit in the first embodiment of the present invention.

Reference numerals 201, 202, 203 and 204 in FIG. 2 each constitute a memory block composed of a memory element and a selection element.

This memory block outputs the potential of the input signal when the memory element is written in the conductive state and the control signal of the selection element is in the active state, and does not output the signal in other states, and the output terminal Is in a high impedance state.

Here, the memory block 201 uses the first input signal 205 as a control signal, and connects the source power supply 213 to the input terminal and the first node 209 to the output terminal.

The memory block 202 uses the inverted signal 206 of the first input signal as a control signal, and connects the source power supply 213 to the input terminal and the third node 210 to the output terminal.

The memory block 203 receives the second input signal 2
07 is input as a control signal, the source power supply 213 is connected to the input terminal, and the first node 209 is connected to the output terminal.

The memory block 204 uses the inverted signal 208 of the first input signal as a control signal, and connects the source power supply 213 to the input terminal and the third node 210 to the output terminal.

The first node 209 is connected to the input of the first sense amplifier element 211, and the second node 210 is connected to the input of the second sense amplifier element 212. The input of this sense amplifier is the source. When the potential is the same as that of the power source 213, the source power source 213 and an inverted signal are output.

The first sense amplifier element 211 and the second sense amplifier element 212 connect the input and output to each other to form a latch circuit, and the first node 209 is the source power supply 2
13 has the same potential as the source power supply 213, the second node 210 has an inverted signal from the source power supply 213. When the second node 210 has the same potential as the source power supply 213, the first node 209 has an inverted signal from the source power supply 213. Becomes

In this selection circuit, when the first input signal is to be selected, the memory blocks 201 and 202 are selected.
Of the memory elements of the memory block 20
The memory elements 3 and 204 are written in a non-conductive state.

When the first input signal 205 is active, the selection element of the memory block 201 is in the selected state,
The potential of the source power supply 213 is output to the first node 209 and the second node 210 becomes an inverted signal of the source power supply 213.

At this time, the inverted signal 206 of the first input signal
Is inactive, and memory blocks 203, 2
04 is in a non-conducting state regardless of the control signal.

When the first input signal 205 is inactive, the inverted signal 206 of the first input signal becomes active, the potential of the source power supply 213 is output from the memory block 202 to the second node 210, and the first node 209 is an inverted signal of the source power supply 213.

Here, when the source power supply 213 has the same potential as the active signal of the control signal of the memory block, the first node 209 serves as an output terminal, and the source power supply 213 has the same potential as the inactive state of the control signal of the memory block. In this case, if the second node 210 is used as an output terminal, this selection circuit selects and outputs the first input signal.

Similarly, when selecting the second input signal,
The memory elements of the memory blocks 203 and 204 may be written in a conductive state, and the memory elements of the memory blocks 201 and 202 may be written in a non-conductive state.

In the selection circuit in the first embodiment of FIG.
Although the memory block is composed of two elements, that is, the memory element and the selection element, it is also possible to compose the memory block with one memory element as long as the operation is similar to that described.

If a non-volatile memory is used for the memory element, it is not necessary to rewrite the content of the memory element each time the power is turned on.

(Second Embodiment) FIG. 1 is a functional block diagram showing a typical configuration of the second embodiment of the invention.

In FIG. 1, the reference oscillation signal 102, which is the output of the crystal oscillation circuit 101, is input to the frequency dividing circuit 103, and the frequency dividing circuit 103 outputs the timing signal 104. The waveform synthesis circuit 105 inputs the timing signal 104, outputs the stepping motor drive signal 111, and drives the stepping motor 112.

Here, the waveform synthesizing circuit 105 inputs the timing signal 104 and the first logic circuit 106 which outputs the synthesizing timing signal 107, and the timing signal 104 or the synthesizing timing signal to input the intermediate waveform signal 1
A second logic that inputs a selection circuit 108 (hereinafter, referred to as a selection circuit 108) including an externally rewritable memory element that outputs 09 and an intermediate waveform signal 109 and outputs a stepping motor drive signal 111. Circuit 110
It consists of and.

To the selection circuit 108, one of the timing signal 104 or the composite timing signal 107 that may be output as the intermediate waveform signal 109 is connected in advance as an input.

After the stepping motor driving device is manufactured, the stepping motor 112 and the stepping motor 112 are manufactured.
The contents of the memory element are written from the outside so as to select the intermediate waveform signal 109 that corresponds to the load driven by the memory and has the lowest current consumption.

The second logic circuit 110 synthesizes the intermediate waveform signal 109 selected by the selection circuit 108 or outputs it as it is as a stepping motor drive waveform 111 to drive an external stepping motor.

As a result, the present stepping motor drive device can output the stepping motor drive waveform 111 that provides the lowest current consumption even after manufacturing.

FIG. 3 is a diagram showing the configuration of the selection circuit in the second embodiment of the present invention.

A memory element 301 receives the first input signal 303 as an input and outputs the third node 305 as an output.
Reference numeral 02 denotes a memory element which receives the second input signal 304 as an input and outputs the third node 305 as an output.

The third node 305 is connected to the input of the third sense amplifier element 306, and the third sense amplifier element 3 is connected.
The output of 06 is connected to the output terminal 307.

In this selection circuit, when the first input signal is to be selected, the memory element 301 is written in the conductive state and the memory element 302 is written in the non-conductive state.

Since the memory element 301 is conductive, the input signal 303 passes through the memory element 301 as it is and is input to the third sense amplifier 306.

The third sense amplifier 306 is configured so as to amplify the weak input signal passing through the memory element to a normal signal level, so that the same signal as the first input signal is output from the output terminal. To be done.

Similarly, when selecting the second input signal,
The memory element 302 and the memory element 301 may be written in a conductive state and a non-conductive state, respectively.

If a non-volatile memory is used as the memory element, there is no need to rewrite the contents of the memory element each time the power is turned on.

[0053]

As described above, according to the present invention, the type of the stepping motor and the load driven by the stepping motor are changed, and the stepping motor drive in which the power consumption when driving the stepping motor is the lowest Even if the waveform is changed, by rewriting the contents of the memory element of the selection circuit that is configured by a memory element that can be rewritten from the outside, it is possible to support the external stepping motor and the load driven by the stepping motor, and consume the least power. It becomes possible to output a stepping motor drive waveform that becomes electric power.

Therefore, wasteful stocks when manufacturing a wide variety of stepping motor drive devices become unnecessary, and effective use of resources can be achieved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a stepping motor drive device of the present invention.

FIG. 2 is a diagram showing a configuration of a selection circuit including an externally rewritable memory element in the waveform synthesizing circuit according to the first exemplary embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of a selection circuit formed of an externally rewritable memory element in a waveform synthesis circuit according to a second embodiment of the present invention.

FIG. 4 is a table showing a synthesis example of a synthesis timing signal in the first and second embodiments of the present invention.

FIG. 5 is a table showing a synthesis example of stepping motor drive waveforms in the first and second embodiments of the present invention.

[Explanation of symbols]

101 Crystal Oscillation Circuit 102 Reference Oscillation Signal 103 Dividing Circuit 104 Timing Signal 105 Waveform Synthesis Circuit 106 First Logic Circuit 107 Synthetic Timing Signal 108 Selection Circuit 109 Comprising Rewritable Memory Element Intermediate Waveform Signal 110 Second Logic circuit 111 Stepping motor drive signal 112 Stepping motor 201, 202, 203, 204 Memory block 205 First input signal 206 Inverted signal of first input signal 207 Second input signal 208 Inverted signal of second input signal 209 first node 210 second node 211 first sense amplifier element 212 second sense amplifier element 213 source power supply 301, 302 memory element 303 first input signal 304 second input signal 305 third node 306 Third sense amplifier element 3 7 output terminal

Claims (2)

[Claims] 1. A crystal oscillating circuit, a frequency dividing circuit for dividing a reference oscillating signal which is an output of the crystal oscillating circuit, and a timing signal which is an output of the frequency dividing circuit to synthesize a drive signal of a stepping motor. A stepping motor drive device having a waveform synthesizing circuit for performing the above, wherein the waveform synthesizing circuit outputs a synthetic timing signal based on the timing signal; A selection circuit for selecting one of the timing signals and outputting an intermediate waveform signal; and a second logic circuit for outputting either the intermediate waveform signal or a signal obtained by combining the intermediate waveform signals. A stepping motor drive device having a structure. 2. The selection circuit comprises a memory element which can be rewritten from the outside.
The stepping motor drive device described in 1.