JPH02223999A - Sound generation driving circuit - Google Patents

Sound generation driving circuit

Info

Publication number
JPH02223999A
JPH02223999A JP4488589A JP4488589A JPH02223999A JP H02223999 A JPH02223999 A JP H02223999A JP 4488589 A JP4488589 A JP 4488589A JP 4488589 A JP4488589 A JP 4488589A JP H02223999 A JPH02223999 A JP H02223999A
Authority
JP
Japan
Prior art keywords
driving signal
circuit
voltage
sound generation
drive signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4488589A
Other languages
Japanese (ja)
Other versions
JPH0571960B2 (en
Inventor
Koji Machida
町田 幸二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seikosha KK
Original Assignee
Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seikosha KK filed Critical Seikosha KK
Priority to JP4488589A priority Critical patent/JPH02223999A/en
Publication of JPH02223999A publication Critical patent/JPH02223999A/en
Publication of JPH0571960B2 publication Critical patent/JPH0571960B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE:To select and output the best driving signal to a sound generation body by detecting a voltage produced at the sound generation body owing to the driving signal which is generated by a driving signal generating circuit and specifying the best driving signal corresponding to the detected voltage value. CONSTITUTION:This circuit has transistors (TR) 1a-1d which turn on when '0' is inputted, a TR 2 which turns on when '1' is inputted, and an inverter circuit 3, and the driving signal generating circuit 4 is composed of them. Further, the circuit is provided with a voltage detecting means 7 which detects the voltage generated by the sound generation body 5 with the driving signal generated by the driving signal generating means 4 and a driving signal control circuit 14 which specifies the optimum driving signal among respective driving signals in accordance with the detected voltage value and generates it by the driving signal generating circuit 4. Consequently, the optimum driving signal is selected in accordance with the voltage value to generate invariably constant sound pressure and sound volume.

Description

【発明の詳細な説明】 [産業上の利用分野1 本発明は発音駆動回路に関するものである。[Detailed description of the invention] [Industrial application field 1 The present invention relates to a sound generation drive circuit.

[従来の技術] 従来、例えば、時計のアラーム音を発生する発音駆動回
路は予め固定された駆動出力を発生するように設計され
ている。
[Prior Art] Conventionally, for example, a sound drive circuit that generates an alarm sound for a clock is designed to generate a predetermined drive output.

[解決しようとする課題] 上記従来の発音駆動回路では、発音体のインピーダンス
や発音体を駆動するための出力段の駆動能力のばらつき
により、発音体から発せられる音響に歪が生じることが
往々にしである。
[Problems to be Solved] In the conventional sound generation drive circuits described above, distortion often occurs in the sound emitted from the sound generation body due to variations in the impedance of the sound generation body and the drive capacity of the output stage for driving the sound generation body. It is.

特にメロディ−を出力する場合、減衰エンベロープ娠幅
変調や和音合成を行なう際に駆動能力の大小によりエン
ベロープ波形や音に駆動回路が飽和することによる歪が
生じるという問題がある。
Particularly when outputting a melody, there is a problem that distortion occurs in the envelope waveform or sound due to saturation of the drive circuit depending on the magnitude of the drive capacity when performing attenuation envelope width modulation or chord synthesis.

本発明は、接続された発音体に最適の駆動信号を選択し
て出力する発音駆動回路を提供することを目的としてい
る。
SUMMARY OF THE INVENTION An object of the present invention is to provide a sound generation drive circuit that selects and outputs an optimal drive signal for a connected sounding body.

[課題を解決するための手段] 本発明は、発音体を駆動するための複数種類の駆動信号
のうちいずれかを選択的に発生する駆動信号発生回路と
、この駆動信号発生回路から発生する駆動信号により上
記発音体に生じる電圧を検出する電圧検出手段と、この
電圧検出手段によって検出された電圧値に応じて上記各
駆動信号のうち最適の駆動信号を指定して上記駆動信号
発生回路から発生せしめる駆動信号制御回路と、を設け
て上記課題を解決するものである。
[Means for Solving the Problems] The present invention provides a drive signal generation circuit that selectively generates one of a plurality of types of drive signals for driving a sounding body, and a drive signal generated from the drive signal generation circuit. Voltage detection means for detecting the voltage generated in the sounding body by the signal, and a drive signal generating circuit that specifies the optimum drive signal among the drive signals according to the voltage value detected by the voltage detection means and generates it from the drive signal generation circuit. The above-mentioned problem is solved by providing a drive signal control circuit for controlling the drive signal.

〔実施例〕〔Example〕

以下、本発明の一実施例を図面に基づいて説明する。 Hereinafter, one embodiment of the present invention will be described based on the drawings.

第1図において、1a〜1dは“0”が入力されたとき
に導通状態となるトランジスタで、その出力電流の比は
1a:1b:lc:1d−1:2:4:8となっている
。2は“1“が入力されたときに導通状態となるトラン
ジスタ、3はインバータ回路である。1a〜1d12お
よび3によって駆動信号発生回路4が構成される。5は
発音体、6は発音体5を駆動するための出力トランジス
タ、7は端子Eの電圧が所定値以下になったときに出力
“1゛を発生する電圧検出手段である。8はD型フリッ
プフロップ、9はカウンタ、10a〜10dおよび11
〜13はゲート回路であり、これらによって駆動信号制
御回路14が構成される。
In Figure 1, 1a to 1d are transistors that become conductive when "0" is input, and the ratio of their output currents is 1a:1b:lc:1d-1:2:4:8. . 2 is a transistor that becomes conductive when "1" is input, and 3 is an inverter circuit. Drive signal generation circuit 4 is constituted by 1a to 1d12 and 3. 5 is a sounding body, 6 is an output transistor for driving the sounding body 5, and 7 is a voltage detection means that generates an output "1" when the voltage at the terminal E becomes less than a predetermined value. 8 is a D type. Flip-flops, 9 is a counter, 10a to 10d and 11
13 are gate circuits, and these constitute the drive signal control circuit 14.

つぎに、第2図のタイムチャートを参照しながら動作を
説明する。まず、アラーム時刻になると、アラームスイ
ッチ(図示せず。)の動作により、端子Aは第2図Aの
ようにO”となり、端子Bには第2図Bに示されるよう
なりロックパルスが、また、端子C゛には第2図C゛に
示されるような発音用のパルスが供給される。D型フリ
ップフロップ8およびカウンタ9は端子Aが“0”とな
ることによりリセットが解除される。いま、トランジス
タ6がオフのため、電圧検出手段7の出力は“0“とな
っており、p型フリップフロップ8のD入力が“O#な
ので出力Qから“1″が出力され、端子C″からのパル
スがゲート回路11を介してカウンタ9に供給される。
Next, the operation will be explained with reference to the time chart shown in FIG. First, at the alarm time, due to the operation of the alarm switch (not shown), terminal A becomes O'' as shown in Fig. 2A, and a lock pulse is generated at terminal B as shown in Fig. 2B. In addition, a pulse for sound generation as shown in FIG. 2 C is supplied to the terminal C. The reset of the D-type flip-flop 8 and the counter 9 is canceled when the terminal A becomes "0". Now, since the transistor 6 is off, the output of the voltage detection means 7 is "0", and since the D input of the p-type flip-flop 8 is "O#", "1" is output from the output Q, and the terminal C '' is supplied to the counter 9 via the gate circuit 11.

まず、ゲート回路11からの最初のパルスによってカウ
ンタ9の出力端子Q1が“ビとなり、ゲート回路10a
の出力が“O”となり、トランジスタ1aが導通状態と
なる。このとき端子C゛の出力“1”はインバータ回路
3で“0”に反転されてトランジスタ2に供給されてい
るので、トランジスタ2は開放状態となっている。よっ
て端子D′にはトランジスタ1aからの出力電流が供給
され、これによりトランジスタ6が能動状態となる。こ
のときの端子Eの電圧は第2図Eに示すように所定電圧
Vより高いので、電圧検出回路7からはO°が出力され
る。よって、ゲート回路13の出力はO“のままである
First, the output terminal Q1 of the counter 9 becomes "B" due to the first pulse from the gate circuit 11, and the gate circuit 10a
The output of the transistor becomes "O", and the transistor 1a becomes conductive. At this time, since the output "1" of the terminal C' is inverted to "0" by the inverter circuit 3 and supplied to the transistor 2, the transistor 2 is in an open state. Therefore, the output current from the transistor 1a is supplied to the terminal D', thereby making the transistor 6 active. Since the voltage at the terminal E at this time is higher than the predetermined voltage V as shown in FIG. 2E, the voltage detection circuit 7 outputs O°. Therefore, the output of the gate circuit 13 remains at O".

したがって、端子C゛からのつぎのパルスによってカウ
ンタ9の出力端子Q2が“1′になると、トランジスタ
ーbが導通状態となり、端子D゛には上記の場合の2倍
の電流が流れる。このときの端子Eの電圧が第2図Eに
示すように所定電圧Vより高ければ、電圧検出回路7の
出力は“0”であり、ゲート回路13の出力も“0“の
ままである。
Therefore, when the output terminal Q2 of the counter 9 becomes "1" by the next pulse from the terminal C', the transistor b becomes conductive, and a current twice as large as that in the above case flows through the terminal D'. If the voltage at the terminal E is higher than the predetermined voltage V as shown in FIG. 2E, the output of the voltage detection circuit 7 is "0" and the output of the gate circuit 13 also remains at "0".

したがって、さらにつぎのパルスがカウンタ9に供給さ
れると、その出力端子Q とQ2が“1゜となり、これ
によりトランジスターaと1bが導通状態となり、端子
D゛には上記トランジスターaのみのときの3倍の電流
が流れる。このとき端子Eの電圧が第2図Eに示すよう
に所定電圧Vより低ければ、電圧検出回路7の出力は“
1mとなり、ゲート回路13の出力も“1”となる。
Therefore, when the next pulse is further supplied to the counter 9, its output terminals Q and Q2 become "1", thereby transistors a and 1b become conductive, and the terminal D has the same voltage as when only the transistor a is used. Three times as much current flows.At this time, if the voltage at terminal E is lower than the predetermined voltage V as shown in FIG. 2E, the output of voltage detection circuit 7 is "
1m, and the output of the gate circuit 13 also becomes "1".

したがって、D型フリップフロップ8のD入力が“1”
になり、端子Bからのつぎのパルスによって、出力Qが
“0“となる。これによりゲート回路11が閉じ、カウ
ンタ9の歩道が停止し、その出力端子Q とQ2が選択
された状態が保持される。したがって、これ以降は発音
体5には上記トランジスターaだけのときの3倍の電流
が流れ、発音体5は最適の電圧で駆動され続ける。
Therefore, the D input of the D type flip-flop 8 is “1”.
Then, the next pulse from terminal B causes the output Q to become "0". This closes the gate circuit 11, stops the counter 9, and keeps its output terminals Q1 and Q2 selected. Therefore, from now on, three times as much current flows through the sounding element 5 as when only the transistor a is used, and the sounding element 5 continues to be driven at the optimum voltage.

以上の動作により、接続される発音体に応じてトランジ
スターa〜1dが適宜選択され、最適の駆動信号によっ
て駆動されるように自動制御が行なわれる。
Through the above operations, automatic control is performed such that transistors a to 1d are appropriately selected depending on the sounding body to be connected, and are driven by an optimal drive signal.

[効果] 本発明によれば、発音体にかかる電圧を検出し、その電
圧値に応じて最適の駆動信号が選択されるため、駆動回
路の出力電流や発音体のインピーダンスにばらつきがあ
っても、常に一定の音圧、音量を生じることができ、歪
等の発生をなくすことができる。
[Effects] According to the present invention, the voltage applied to the sounding body is detected and the optimal drive signal is selected according to the voltage value, so even if there are variations in the output current of the drive circuit or the impedance of the sounding body, the voltage applied to the sounding body is detected. , it is possible to always generate a constant sound pressure and volume, and it is possible to eliminate the occurrence of distortion and the like.

したがって、例えば、本発明の発音駆動回路をアラーム
機能付時計に使用すれば、同じ製品においても個々の時
計の回路構成部品には性能面で多少の誤差があるものだ
が、どの時計に対しても最適の駆動信号で発音体を駆動
し、歪のないアラーム音を発生させることができる。
Therefore, for example, if the sound generation drive circuit of the present invention is used in a watch with an alarm function, even if the same product is used, the circuit components of each watch will have some errors in terms of performance. It is possible to drive the sounding body with the optimal drive signal and generate an alarm sound without distortion.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示した電気回路図、第2図
は第1図の動作を説明するためのタイムチャートである
。 4・・・駆動信号発生回路 7・・・電圧検出手段 14・・・駆動信号制御回路 以  上 出願人  株式会社 精 工 舎
FIG. 1 is an electric circuit diagram showing an embodiment of the present invention, and FIG. 2 is a time chart for explaining the operation of FIG. 1. 4... Drive signal generation circuit 7... Voltage detection means 14... Drive signal control circuit and above Applicant Seikosha Co., Ltd.

Claims (1)

【特許請求の範囲】 発音体を駆動するための複数種類の駆動信号のうちいず
れかを選択的に発生する駆動信号発生回路と、 この駆動信号発生回路から発生する駆動信号により上記
発音体に生じる電圧を検出する電圧検出手段と、 この電圧検出手段によって検出された電圧値に応じて上
記各駆動信号のうち最適の駆動信号を指定して上記駆動
信号発生回路から発生せしめる駆動信号制御回路と、 からなることを特徴とする発音駆動回路。
[Claims] A drive signal generation circuit that selectively generates one of a plurality of types of drive signals for driving a sounding body; a voltage detection means for detecting voltage; a drive signal control circuit that specifies an optimal drive signal among the drive signals and causes the drive signal generation circuit to generate the optimum drive signal according to the voltage value detected by the voltage detection means; A sound generation drive circuit comprising:
JP4488589A 1989-02-23 1989-02-23 Sound generation driving circuit Granted JPH02223999A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4488589A JPH02223999A (en) 1989-02-23 1989-02-23 Sound generation driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4488589A JPH02223999A (en) 1989-02-23 1989-02-23 Sound generation driving circuit

Publications (2)

Publication Number Publication Date
JPH02223999A true JPH02223999A (en) 1990-09-06
JPH0571960B2 JPH0571960B2 (en) 1993-10-08

Family

ID=12703945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4488589A Granted JPH02223999A (en) 1989-02-23 1989-02-23 Sound generation driving circuit

Country Status (1)

Country Link
JP (1) JPH02223999A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021031646A1 (en) * 2019-08-19 2021-02-25 深圳南云微电子有限公司 Peak current buzzer driving circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021031646A1 (en) * 2019-08-19 2021-02-25 深圳南云微电子有限公司 Peak current buzzer driving circuit

Also Published As

Publication number Publication date
JPH0571960B2 (en) 1993-10-08

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