JP2003282720A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which the film quality of a capacitive insulation layer is stabilized. <P>SOLUTION: The semiconductor device comprises a first conductive layer 20, a second conductive layer 40 formed on the first conductive layer 20, and a capacitive insulation layer 30 formed between the first conductive layer 20 and the second conductive layer 40. The first and second conductive layers 20 and 40 include metal layers, respectively. The first conductive layer 20 is provided with a first connecting part 21 and a first contact 22 is formed above the first connecting part 21. The second conductive layer 40 is provided with a second connecting part 41 and a second contact 42 is formed above the second connecting part 41. The second contact 42 is formed except a region above the first conductive layer 20. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which the film quality of a capacitive insulating layer is stabilized.

[0002]

2. Description of the Related Art Currently, for example, an MIM (metal-insulator-metal) capacitor, a PIP (polysilicon-insulator-polysilicon) capacitor, and a MOS capacitor are used as capacitive elements constituting a semiconductor integrated circuit device. MI
The M capacitor uses a layer including a metal layer as a conductive layer forming a capacitive element, and the PIP capacitor uses polysilicon as a conductive layer forming a capacitive element. Among them, MIM capacitors are generally
Compared with a capacitor or a MOS capacitor, it has an advantage that stable operation can be obtained because the capacitance has less voltage dependency.

The structure of a general semiconductor device 500 functioning as a capacitive element is shown in FIGS. Figure 10
11 is a plan view schematically showing the structure of the semiconductor device 500, and FIG. 11 is a view schematically showing a cross section obtained by cutting along the line D-D in FIG.

This semiconductor device 500 includes a semiconductor substrate 11
The lower conductive layer 120, the capacitive insulating layer 130, and the upper conductive layer 140 are formed on the insulating layer 162 formed to 0. The lower conductive layer 120, the capacitive insulating layer 130, and the upper conductive layer 140 form a capacitive element.

The capacitive insulating layer 130 is formed between the lower conductive layer 120 and the upper conductive layer 140. A first contact 122 is formed on the lower conductive layer 120, and the lower conductive layer 12 is formed through the first contact 122.
0 and the first wiring layer 128 are electrically connected. A second contact 142 is formed on the upper conductive layer 140, and the upper conductive layer 140 and the second wiring layer 148 are electrically connected via the second contact 142.

[0006]

SUMMARY OF THE INVENTION This semiconductor device 500
When manufacturing the first and second contacts 122, 1
42, for example, as shown in FIG. 12, after forming contact holes 126 and 146 on the lower conductive layer 120 and the upper conductive layer 140, respectively, the conductive layers 124 and 144 (FIG. 11) are formed on the contact holes 126 and 146, respectively. Reference) is embedded.

Below the contact hole 146, the upper conductive layer 140, the capacitive insulating layer 130 and the lower conductive layer 12 are formed.
0 is set. When the contact hole 146 is formed by etching, the region 130a of the capacitor insulating layer 130 located below the contact hole 146 may be damaged during etching, which may deteriorate the region 130a of the capacitor insulating layer 130. is there.

In particular, when the contact hole 146 is formed by using plasma etching, the etching progresses when the etchant plasma enters the contact hole. As a result, the contact hole 146
Electric charge may remain at the bottom of the. In this way, when charges are accumulated in the bottom portion 146a of the contact hole 126,
Insulation failure may occur in the region 130a of the capacitive insulating layer 130 located below the contact hole 146.

An object of the present invention is to provide a semiconductor device in which the film quality of the capacitive insulating layer is stabilized.

[0010]

The semiconductor device of the present invention comprises:
A first conductive layer and a second conductive layer formed above the first conductive layer
A first conductive layer and a capacitive insulating layer formed between the first conductive layer and the second conductive layer, wherein the first and second conductive layers are layers including a metal layer; The conductive layer includes
A first connecting portion is provided, and a first connecting portion is provided above the first connecting portion.
A contact is formed, a second connecting portion is provided in the second conductive layer, a second contact is formed above the second connecting portion, and the second contact is above the first conductive layer. Is formed in the area excluding.

According to the semiconductor device of the present invention, the second contact is not formed above the first conductive layer. Accordingly, it is possible to prevent the damage at the time of forming the second contact from being applied to the region of the semiconductor device of the present invention which functions as a capacitive element. This allows
The film quality of the capacitive insulating layer can be stabilized. Details will be described in the section of this embodiment.

The semiconductor device of the present invention has the following (1) to (1).
The aspect of (5) can be adopted.

(1) The second connecting portion can be formed above the capacitive insulating layer.

(2) At least a part of the end of the first conductive layer can be covered with the second conductive layer via the capacitive insulating layer.

In this case, a lead-out portion is further provided on the first conductive layer, and at least an area of the end portion of the first conductive layer excluding the first connecting portion and the lead-out portion is provided with the capacitive insulating layer. It can be covered with the second conductive layer.

(3) A part of the second conductive layer may be formed above the first conductive layer via the capacitive insulating layer.

(4) The side wall of the first conductive layer may have a tapered shape.

(5) The height of the second contact can be 0.75 to 1.5 times the height of the first contact.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described below with reference to the drawings.

[First Embodiment] 1. Structure of Semiconductor Device FIG. 1 is a plan view schematically showing the semiconductor device 100 according to the first embodiment to which the present invention is applied, and FIG. 2 is cut along the line AA of FIG. It is sectional drawing which shows a cross section typically.

The semiconductor device 100 of this embodiment is shown in FIG.
As shown in FIG. 1, the first conductive layer 20, the second conductive layer 40 formed above the first conductive layer 20, and the capacitive insulation formed between the first conductive layer 20 and the second conductive layer 40. And a layer 30. That is, the first conductive layer 20 and the second conductive layer 40
Are formed so as to sandwich the capacitive insulating layer 30. In the semiconductor device 100 of the present embodiment, the first conductive layer 2
0, the second conductive layer 40, and the capacitive insulating layer 30 form a capacitive element.

The first conductive layer 20 is formed above the insulating layer 62. The insulating layer 62 is formed above the semiconductor substrate 10. As the insulating layer 62, for example, an element isolation region can be used.

As shown in FIGS. 1 and 2, a portion of the second conductive layer 40 is formed above the first conductive layer 20 with the capacitive insulating layer 30 interposed therebetween. That is, the first conductive layer 2
At least a part of the end portion of 0 is covered with the second conductive layer 40 via the capacitive insulating layer 30. In this semiconductor device 100, as shown in FIG. 1, the region 20 a of the end portion of the first conductive layer 20 can be covered with the second conductive layer 40 via the capacitive insulating layer 30.

The first conductive layer 20 and the second conductive layer 40 are
It is made of a metal layer of aluminum, copper, tantalum or the like, or a laminated film of the metal layer and a nitride layer of a refractory metal such as titanium or tungsten (further a refractory metal layer of titanium or tungsten), or polysilicon. First
When the conductive layer 20 and the second conductive layer 40 are made of a metal layer or the laminated film, the semiconductor device 100 is a so-called MIM capacitor, and when the first conductive layer 20 and the second conductive layer 40 are made of polysilicon, the semiconductor device is formed. Reference numeral 100 is a so-called PIP capacitor.

As described above, the capacitive insulating layer 30 is formed between the first conductive layer 20 and the second conductive layer 40. The material of the capacitive insulating layer 30 is not particularly limited, but can be formed of, for example, silicon oxide, silicon nitride, silicon oxynitride, or the like.

Further, as shown in FIG. 2, the second conductive layer 40
The insulating layer 60 is stacked above the capacitive insulating layer 30.

Further, in the semiconductor device 100, FIG.
As shown in FIG. 2 and FIG. 2, the first connection portion 21 is formed near the end of the first conductive layer 20. This first connection part 2
A first contact 22 is formed above 1. A first wiring layer 28 is formed on the first contact 22. That is, the first conductive layer 20 has the first connection portion 21.
In, the first wiring layer 28 is electrically connected to the first wiring layer 28 via the first contact 22.

In addition, the second conductive layer 40 has a second
The connection portion 41 is formed. A second contact 42 is formed above the second connecting portion 41. A second wiring layer 48 is formed on the second contact 42. That is, the second conductive layer 40 is electrically connected to the second wiring layer 48 via the second contact 42 in the second connection portion 41. Further, as shown in FIG. 1, the second connecting portion 41 is formed above the capacitive insulating layer 30 with the second conductive layer 40 interposed therebetween.

The first contact 22 and the second contact 42 are formed by burying the conductive layers 24 and 44 in the contact holes 26 and 46 formed in the insulating layer 60, respectively.

The second contact 42 is formed above the second connecting portion 41 formed above the capacitive insulating layer 30. The second connection portion 41 is formed above the capacitive insulating layer 30. That is, a portion of the capacitive insulating layer 30 located below the second connecting portion 41 is formed on the insulating layer 62. Therefore, the second contact 42
Is formed in a region except above the first conductive layer 20, as shown in FIG.

The heights of the first and second contacts 22 and 42 are the same as those of the first and second conductive layers 20 and 40 and the capacitive insulating layer 3.
It is determined based on the film thickness of 0, the film thickness ratio between the first conductive layer 20 and the second conductive layer 40, and the like. In the semiconductor device 100 of the present embodiment, the height of the second contact 42 can be formed to be 0.75 to 1.5 times the height of the first contact 22. According to this configuration, the height of the first contact 22 and the height of the second contact 42 do not differ greatly, so that the first and second contacts 22, 42 are formed in the same step.
In the case of forming, the variation in contact shape can be reduced. In addition, these contacts 22, 4
By forming 2 in the same step, the process can be simplified.

2. Method for Manufacturing Semiconductor Device Semiconductor Device 100 According to One Embodiment to which the Present Invention is Applied
An example of the manufacturing method will be described with reference to FIGS. 3 to 5 show the semiconductor device 1 shown in FIGS. 1 and 2.
00 is a cross-sectional view schematically showing one manufacturing process of No. 00, which corresponds to the cross-section shown in FIG.

In the manufacturing process described below,
First and second conductive layers 20, 40 and capacitive insulating layer 3
The material of 0 is as described in the section of the structure of the semiconductor device.

(1) First, a conductive layer (not shown) for forming the first conductive layer 20 is formed above the insulating layer 62 formed above the semiconductor substrate 10. Next, a resist layer R100 having a predetermined pattern is formed on the conductive layer by photolithography, and then the conductive layer is patterned to form a first conductive layer 20 as shown in FIG. It should be noted that the vicinity of one end of the first conductive layer 20 functions as the first connecting portion 21.
A first contact 22 (see FIGS. 1 and 2) is formed above the. Then, the resist layer R100 is removed.

(2) Next, as shown in FIG. 4, a capacitive insulating layer 30 is formed on the entire surface. Next, the second conductive layer 40a is formed above the capacitive insulating layer 30.

(3) Next, a resist layer R200 having a predetermined pattern is formed on the second conductive layer 40a (see FIG. 4) by photolithography, and then the second conductive layer 40 is formed.
Pattern a. As a result, the second conductive layer 40 is obtained as shown in FIG. The second conductive layer 40
Near one end of the second connection portion 41 functions as the second connection portion 41.
The second contact 42 (see FIGS. 1 and 2) is formed above the connection portion 41.

(4) Next, after removing the resist layer R200, an insulating layer 60 (see FIG. 1) can be laminated on the entire surface. Next, the contact holes 26 and 46 are formed in the regions of the insulating layer 60 located above the first connecting portion 21 and the second connecting portion 41. Contact hole 26,
Plasma etching can be used to form 46. Next, the contact holes 26, 46 are filled with the conductive layers 24, 44 to form the first and second contacts 22, 42. Then, on the first and second contacts 22, 42, respectively, the first and second contacts are formed.
The wiring layers 28 and 48 can be formed. As described above, the semiconductor device 100 shown in FIGS. 1 and 2 is obtained.

The advantages of the semiconductor device 100 according to this embodiment are as follows.

In the semiconductor device 100 of the present embodiment, the second contact 42 is formed in the region except above the first conductive layer 20. That is, the second contact 42 is not formed above the region of the semiconductor device 100 that functions as a capacitive element.

As a result, in the step (4), in the step of forming the contact hole 46 on the second connection portion 41 by etching in order to form the second contact 42, the semiconductor device 100 functions as a capacitor element. It is possible to prevent etching damage from being added to the region to be etched. Thereby, the capacitive insulating layer 30
The film quality of can be stabilized.

In particular, when the contact hole 46 is formed by plasma etching, even if electric charges remain at the bottom of the contact hole 46 as a result of the etching progressing because the etchant plasma enters the contact hole 46, the semiconductor device Since the second contact 42 is not formed above the region of the semiconductor device 100 that functions as a capacitive element, it is possible to effectively prevent damage to the region of the semiconductor device 100 that functions as a capacitive element. .

3. Modified Example Next, a modified example of the semiconductor device according to the present embodiment will be described. FIG. 6 is a sectional view schematically showing a semiconductor device 200 which is a modification of the semiconductor device according to the present embodiment.

The semiconductor device 200 according to the present embodiment is
The first conductive layer 20 has substantially the same structure as the semiconductor device 100 shown in FIGS. 1 and 2, except that the sidewall 25 has a tapered shape. In this semiconductor device 200, components having substantially the same functions as those of the semiconductor device 100 shown in FIGS. 1 and 2 are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 6, the side wall 25 of the first conductive layer 20 has a tapered shape. According to this configuration, since the capacitive insulating layer 30 can be formed more uniformly, the characteristics of the semiconductor device 100 as a capacitive element can be improved.

For example, in the step (1) in the method of manufacturing a semiconductor device according to the present embodiment, the side wall of the first conductive layer 20 is formed by patterning the first conductive layer 20 by isotropic etching. 25 can be formed in a tapered shape.

Incidentally, also in the semiconductor device 300 of the second embodiment which will be described later, the semiconductor device 2 according to the above-described modification example.
Similarly to 00, the sidewall 25 of the first conductive layer 20 may be formed in a tapered shape.

[Second Embodiment] FIG. 7 is a plan view schematically showing a semiconductor device 300 according to a second embodiment of the invention. 8 is a sectional view schematically showing a section taken along line BB in FIG. 7, and FIG.
It is sectional drawing which shows typically the cross section cut | disconnected along CC line of FIG.

In the semiconductor device 300 according to this embodiment, as shown in FIGS. 9 and 10, the first conductive layer 2 is formed.
1 and FIG. 2 in that the drawer 23 is installed at 0.
It has a different structure from the semiconductor device 100 shown in FIG. In this semiconductor device 300, components having substantially the same functions as those of the semiconductor device 100 shown in FIGS. 1 and 2 are designated by the same reference numerals, and detailed description thereof will be omitted.

In this semiconductor device 300, as shown in FIGS. 7 and 9, a lead portion 23 is provided in the first conductive layer 20. That is, the first connecting portion 21 is the first conductive layer 2
From the region of 0 that functions as a capacitive element, the lead portion 23
Is formed in a region separated by.

In addition, at least the region (the region 20b shown in FIGS. 7 and 9 in the present embodiment) of the first conductive layer 20 excluding at least the first connecting portion 21 and the lead-out portion 23 is the capacitive insulating layer 30. Can be covered with the second conductive layer 40. In this semiconductor device 300, as shown in FIGS. 7 and 9, a part of the lead-out portion 23 is covered with the second conductive layer 40 with the capacitive insulating layer 30 interposed therebetween.

This semiconductor device 300 is the first semiconductor device manufactured in the manufacturing process of the semiconductor device 100 of the first embodiment described above.
Also, the second conductive layers 20 and 40 can be formed by patterning the planar shape shown in FIG. That is, it can be formed by the same method as the semiconductor device 100 of the first embodiment except that the first and second conductive layers 20 and 40 are patterned into the planar shape shown in FIG.

According to this semiconductor device 300, of the second conductive layer 40, the first conductive layer 20 is interposed with the capacitive insulating layer 30 interposed therebetween.
It is possible to reduce the area formed above. Thereby, in the step of patterning the second conductive layer 40 by etching, it is possible to prevent damage to the region of the capacitive insulating layer 30 that functions as a capacitive element. As a result, the film quality of the capacitive insulating layer 30 can be further stabilized.

The present invention is not limited to the above-mentioned embodiment, but various modifications can be made. For example, the present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations having the same function, method and result, or configurations having the same object and result). Further, the invention includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. Further, the present invention includes a configuration having the same effects as the configurations described in the embodiments or a configuration capable of achieving the same object. Further, the invention includes configurations in which known techniques are added to the configurations described in the embodiments.

[Brief description of drawings]

FIG. 1 is a plan view schematically showing a semiconductor device according to a first embodiment to which the present invention is applied.

FIG. 2 is a diagram schematically showing a cross section of the semiconductor device shown in FIG. 1 taken along the line AA.

FIG. 3 is a cross-sectional view schematically showing one step in a method for manufacturing the semiconductor device shown in FIGS. 1 and 2.

FIG. 4 is a cross-sectional view schematically showing one step in a method for manufacturing the semiconductor device shown in FIGS. 1 and 2.

5 is a cross-sectional view schematically showing one step in a method for manufacturing the semiconductor device shown in FIGS. 1 and 2. FIG.

FIG. 6 is a cross-sectional view schematically showing a modification of the semiconductor device shown in FIGS. 1 and 2.

FIG. 7 is a plan view schematically showing a semiconductor device according to a second embodiment of the present invention.

8 is a diagram schematically showing a cross section of the semiconductor device shown in FIG. 7 taken along the line BB.

9 is a diagram schematically showing a cross section of the semiconductor device shown in FIG. 7 taken along the line CC.

FIG. 10 is a plan view schematically showing a general semiconductor device.

11 is a sectional view schematically showing the general semiconductor device shown in FIG.

FIG. 12 is a cross-sectional view schematically showing an example of a manufacturing process for the general semiconductor device shown in FIGS. 10 and 11.

[Explanation of symbols]

10 Semiconductor substrate 20 First conductive layer 20a, 20b area 21 First connection part 22 1st contact 23 Drawer 24,44 conductive layer 25 side wall 26,46 contact holes 28 First wiring layer 30,230 capacitive insulating layer 40, 40a second conductive layer 40b joint 41 Second connection part 42 Second contact 48 Second wiring layer 60,62 Insulation layer 100,200 Semiconductor device R100, R200, R300 Resist layer

Claims (7)

[Claims] 1. A first conductive layer, a second conductive layer formed above the first conductive layer, and a capacitive insulating layer formed between the first conductive layer and the second conductive layer. The first and second conductive layers are formed of a layer including a metal layer, the first conductive layer is provided with a first connecting portion, and the first contact is provided above the first connecting portion. Is formed, a second connection portion is provided in the second conductive layer, a second contact is formed above the second connection portion, and the second contact is formed above the first conductive layer. A semiconductor device formed in a region other than the region. 2. The semiconductor device according to claim 1, wherein the second connection portion is formed above the capacitive insulating layer. 3. The semiconductor device according to claim 1, wherein at least a part of an end of the first conductive layer is covered with the second conductive layer via the capacitive insulating layer. 4. The lead-out portion according to claim 3, wherein a lead-out portion is provided on the first conductive layer, and at least an area of the end portion of the first conductive layer excluding the first connecting portion and the lead-out portion is the A semiconductor device, which is covered with the second conductive layer via a capacitive insulating layer. 5. The semiconductor device according to claim 1, wherein a part of the second conductive layer is formed above the first conductive layer with the capacitive insulating layer interposed therebetween. 6. The semiconductor device according to claim 1, wherein a sidewall of the first conductive layer has a tapered shape. 7. The semiconductor device according to claim 1, wherein the height of the second contact is 0.75 to 1.5 times the height of the first contact.