JP2003281996A - Method of manufacturing plasma display device, sandblast processing method, and plasma display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a high definition plasma display device which improves the shape precision of partitions for forming the partitions by sandblasting while achieving the easy and secure peeling of resist patterns. <P>SOLUTION: A fine stripe-shaped resist pattern 25 conforming to the partition pitch is formed on a partition material layer 24A. When outside connection terminal portions 22A of address electrodes 22 are coated with a resist pattern 25, a notch 25D, for example a slit, is formed on the space 22D covering portions between the adjacent outside connection terminal portions 22A. By reducing the variations in the density of the resist patterns 25, that is, in the area of each solid pattern in the whole of the resist patterns 25 over the entire region of a back face substrate 21, a deviation in density of the resist patterns 25 can be decreased or eliminated. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a plasma display device and a method of sandblasting, and a plasma display device which performs display by utilizing plasma discharge.

[0002]

2. Description of the Related Art Various flat panel displays have been studied as an image display device which replaces the currently mainstream cathode ray tube (CRT). Among them, a plasma display panel (PDP) displays an image by irradiating a fluorescent substance with vacuum ultraviolet rays generated by gas discharge to emit light. PDP is CRT
In addition to thin and large screens that are difficult to achieve with, it is relatively easy to widen the viewing angle, has excellent resistance to environmental factors such as temperature, magnetism, vibration, and has a long life. In addition to the wall-mounted TV for home use, it is expected to be expanded to large displays in the future.

In a conventional AC type plasma display device, a sustain electrode and a bus electrode which are paired and arranged in parallel are formed on a front substrate which is a display surface side, and a dielectric layer and magnesium oxide (MgO) are further formed on the sustain electrode and the bus electrode. ) Is formed in order. Address electrodes that are parallel to each other, a dielectric layer that covers the address electrodes, partitions that extend between the address electrodes, and phosphors that cover the side surfaces of the partitions are sequentially formed on the back substrate. The front substrate and the rear substrate are
The sustain electrodes and the bus electrodes are orthogonal to the address electrodes and the partition walls, and they are sealed. AC like this
In the plasma display device, the gas is excited by the discharge in the sustain electrode gap on the front substrate to generate vacuum ultraviolet rays. The phosphors formed on the back substrate are irradiated with this vacuum ultraviolet ray and emit light of each color. This visible light passes through the front substrate and becomes a display emission color. Normally, a voltage is applied between the sustain electrode and the address electrode to accumulate charges on the dielectric layer, thereby controlling the discharge start voltage between the electrodes in each pixel.

As a method of forming the partition wall, for example, a glass paste is uniformly formed on the back substrate, and then a resist is applied and exposed to be patterned, and physical etching by sandblasting is performed. For example, as shown in FIGS. 8 and 9, first, the address electrodes 202 are formed in stripes on the rear substrate 201 using silver (Ag), aluminum (Al), nickel (Ni), or the like. The dielectric layer 203 is formed on the address electrode 202 by printing and baking a low melting point glass paste, for example. The dielectric layer 203 has a function of controlling the characteristics of the address operation when the plasma display device is driven, and a role of preventing the sandblasting abrasive from directly colliding with the address electrode 202 when the partition wall is formed. On the dielectric layer 203, a glass paste, which is a material for the partition, is uniformly applied,
The partition wall material layer 204A is formed by drying to remove the solvent and the like. Furthermore, apply a resist for sandblasting, or press-bond a dry film resist, expose and develop,
A resist pattern 205 having a desired partition pattern is formed.

Here, in the region where the partition wall is formed, that is, in the display region 100, the address electrode 202 serves as the dielectric layer 2.
03, the address electrodes 202 are prevented from being damaged by the sandblasting abrasive. However, the address electrode 202 is usually extended to the outside of the display region 100 for connection with the circuit drive system, and the external connection terminal portion 2
02A and the external connection terminal portion 202A located at the end of the rear substrate 201.
Is not protected by the dielectric layer 203 and is exposed. External connection terminal portion 2 of the address electrode 202
When sandblasting is performed with 02A exposed, generally, the external connection terminal portion 202 exposed by the abrasive material is exposed.
A is damaged. If the external connection terminal portion 202A is damaged, the line resistance increases due to oxidation due to a thermal process or the like, which may adversely affect driving.

Therefore, conventionally, as shown in FIGS. 8 and 9, the resist pattern 205 is spread and applied to the external connection terminal portion 202A of the address electrode 202. By doing so, the external connection terminal portion 202A of the address electrode 202 is protected by the resist pattern 205 even when the abrasive is sprayed from above. In the display area 100, the address electrode 202 is protected by the dielectric layer 203 even when polishing progresses during sandblasting and penetrates the partition wall material layer 204A. By sandblasting from above in such a state to remove unnecessary portions of the partition wall material layer 204A, the partition wall 204 is completed as shown in FIG. 10, for example. Note that FIG. 10 shows a cross section taken along a direction perpendicular to the extension direction of the partition wall 204. As described above, conventionally, when the partition wall is formed by sandblasting, the external connection terminal portion 202A of the address electrode 202 is covered with the resist pattern 205 to protect the external connection terminal portion 202A from damage caused by collision of the abrasive. I was trying to do it.

[0007]

However, in the conventional resist pattern 205, when the pitch of the partition walls is made fine, there is a possibility that the following problems may occur during the step of removing the resist pattern 205.

FIG. 11 shows the resist pattern 205 shown in FIG. 9 in an extracted form. In FIG. 11, the region covered with the resist pattern 205 is shaded for the sake of clarity. In the display area 100,
The resist pattern 205 is formed according to the partition pattern. The pitch of the partition walls is a factor that defines the display pixel. Since the display pixel pitch must be shortened in order to reduce the size and increase the definition of the plasma display device, the pitch of the partition walls must be fine. For example, currently, a 42-inch XGA display class requires a partition having a pitch of about 0.3 mm. Therefore, the resist pattern 205A in the display area 100 is a fine pattern.

On the other hand, outside the display area 100, a striped pattern for forming a partition is not necessary, and instead, to protect the external connection terminal portion 202A of the address electrode 202, a uniform pattern is formed up to the end of the rear substrate 201. The (solid) resist pattern 205B was formed.

That is, a stripe-shaped resist pattern 205A having a high-definition pitch exists inside the display area 100, and a uniform (solid) resist pattern 205B exists outside the display area 100. In such a situation, when the resist pattern 205 is peeled off after sandblasting, the narrow-pitch resist pattern 205A is rapidly peeled off, and the uniform (solid) resist pattern 205B is slow in permeation of the peeling solution. The problem that the peeling does not proceed occurs.

The peeling operation of the resist pattern 205 is carried out by putting the back substrate 201 into a peeling apparatus and exposing the entire back substrate 201 to a shower of a peeling liquid, so that the pattern density of the resist pattern 205 has a large in-plane deviation. If so, it becomes difficult to reliably peel off the resist pattern 205. More specifically, a solid resist pattern 205B outside the display area 100 (on the periphery of the back substrate 201).
If the peeling liquid is to be completely peeled off, the penetration of the peeling liquid proceeds more than necessary in the display region 100, and the partition wall material layer 20
4A may be dissolved, and the partition wall may be bent or the height may be insufficient after processing. Further, if the peeling conditions are adjusted to accurately form the partition walls in the display area 100, a part of the solid resist pattern 205B outside the display area 100 may remain as a residue without being peeled.
Such a problem tends to become a non-negligible problem, especially as the definition of the display pixels of the plasma display device becomes higher and the partition pitch becomes finer.

The present invention has been made in view of the above problems, and an object thereof is to facilitate and ensure the peeling work of a resist pattern while improving the shape accuracy of the partition wall when the partition wall is formed by a sandblast method. To provide a method for manufacturing a plasma display device capable of high-yield and low-cost manufacturing, capable of high-definition display, a sandblasting method suitable for the method, and a plasma display device. is there.

[0013]

According to a first method of manufacturing a plasma display device of the present invention, a plurality of strip-shaped or piece-shaped address electrodes each having an external connection terminal portion are provided on an insulating substrate with a gap. A step of arranging in a row, a step of avoiding the external connection terminal portion to cover the address electrode with a dielectric layer, a step of forming a partition material layer on the dielectric layer, and at least an external connection terminal portion of the address electrode. While covering with a mask, a step of providing a notch for promoting peeling of the mask in a portion of the mask that covers the gap between the external connection terminal portions of the address electrode, and the external connection terminal portion of the address electrode by the mask The method includes a step of processing the partition wall material layer in a protected state by a sand blast method to form a partition wall, and a step of peeling the mask after the sand blast processing. Than it is.

In the second method of manufacturing a plasma display device according to the present invention, a plurality of strip-shaped or piece-shaped address electrodes each having an external connection terminal portion are provided in a row on an insulating substrate with a gap therebetween. Of at least one of the plurality of gaps between the external connection terminal portions of the address electrode, which is wider than the other gaps, and a step of avoiding the external connection terminal portions and covering the address electrodes with a dielectric layer. And a step of forming a barrier rib material layer on the dielectric layer, and at least covering the external connection terminal portion of the address electrode with a mask, and facilitating the peeling of the mask on the portion of the mask covering a wide gap. And a step of providing a notch for protecting the external connection terminal portion of the address electrode with a mask, and processing the partition material layer by sandblasting to form the partition. A step of forming, in which to include a step of removing the mask after the sandblasting.

In the first sandblasting method according to the present invention, a step of forming a plurality of strip-shaped or piece-shaped protected structures on an insulating substrate with a gap, and a protected structure of the insulating substrate are formed. The surface to be processed by a sand blasting method to form a layer to be processed into a desired shape, exposing the structure to be protected, and at least covering the structure to be protected with a mask, And a step of providing a notch for promoting the peeling of the mask in a portion that covers the gap between the protected structures.

In the second sandblasting method according to the present invention, a plurality of strip-shaped or piece-shaped protected structures are formed on an insulating substrate with a gap therebetween, and a plurality of gaps between the protected structures are formed. Of these, a step of setting at least one portion wider than other gaps, and a layer to be processed which is processed into a desired shape by sandblasting on the surface of the insulating substrate on the side where the structure to be protected is formed. A step of forming the exposed exposed structure, and a step of covering at least the protected structure with a mask and providing a notch for promoting separation of the mask in a portion of the mask covering a wide gap. Is included.

In the plasma display device according to the present invention, a plurality of strip-shaped or piece-shaped address electrodes, each having an external connection terminal portion, are provided in a row on an insulating substrate with a gap, and the external connection terminal portion is avoided. A dielectric layer covering the address electrodes, and a partition formed on the dielectric layer, wherein at least one of a plurality of gaps between external connection terminal portions of the plurality of address electrodes is provided. The locations are set wider than other gaps.

In the first method of manufacturing a plasma display device according to the present invention, the external connection terminal portion of the address electrode is covered with a mask, and the portion of the mask covering the gap between the external connection terminal portions of the address electrodes is covered. A notch is provided to promote peeling of the mask. The "cutout" refers to an opening that penetrates the mask in the thickness direction. By providing such a notch in the mask, the total length of the edges in the entire mask becomes longer, and when the mask is peeled off, the peeling liquid causes the peeling liquid to reach the mask and the insulating substrate below the mask. It penetrates into the space and promotes the peeling of the mask.

Further, by providing the notch in the mask, the mask density, that is, the variation in the area for each solid pattern in the entire mask is made more uniform over the entire area of the insulating substrate, The bias of the mask density is reduced or eliminated. As a result, the peeling conditions are further equalized over the entire area of the insulating substrate, and even in the case of high-definition display in which the pitch of the partition walls is fine, the shape accuracy of the partition walls and the easy and reliable peeling of the mask are realized. .

In the second plasma display device manufacturing method according to the present invention, at the time of forming the address electrodes, at least one of the plurality of gaps between the external connection terminal portions of the plurality of address electrodes is replaced with another gap. Set wider than
When the external connection terminal portion of the address electrode is covered with the mask, a notch for facilitating the peeling of the mask is provided in the portion of the mask that covers the widely set gap. Patterning when making a mask notch between connection terminal parts,
It will be easier.

In the first sandblasting method according to the present invention, when the structure to be protected is covered with the mask, a portion of the mask covering the gap between the structures to be protected is cut to promote the peeling of the mask. Since the notch is provided, the total length of the edges of the entire mask becomes long, and when the mask is peeled off, the peeling liquid penetrates between the mask and the underlying insulating substrate, etc. Peeling is promoted.

In the second sandblasting method according to the present invention, at the time of forming the structure to be protected, at least one of the plurality of gaps between the plurality of structures to be protected is set wider than the other gaps. When covering this protected structure with a mask, a notch for facilitating peeling of the mask is provided in a portion of the mask that covers a widely set gap. Patterning when a mask notch is provided therebetween becomes easier.

In the plasma display device according to the present invention, at least one of the plurality of gaps between the external connection terminal portions of the plurality of address electrodes is set wider than the other gaps. Patterning when the mask notch is provided between the external connection terminal portions becomes easier. Therefore, this plasma display device has a structure more directly connected to the simplification of the manufacturing process and the improvement of accuracy.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment] FIG. 2 is a schematic perspective view showing a basic structure of a display portion of a plasma display device according to an embodiment of the present invention. The front substrate 11 located on the display surface side needs to be made of a highly transparent material in order to transmit the light generated inside the plasma display device and take it out to the outside. For example, high strain point glass or soda lime glass is used. To be On the front substrate 11, linear sustain electrodes 12 (12X, 12Y) are arranged in pairs so as to be arranged in parallel, and one sustaining edge of each sustain electrode 12 in the longitudinal direction is
A bus electrode 13 for reducing resistance is attached. The sustain electrode 12 is made of, for example, ITO which is a transparent electrode material, and the bus electrode 13 is made of, for example, a metal thin film such as an Al film or a Cr / Cu / Cr film.

Here, the sustain electrode 12 and the bus electrode 1
3, a dielectric layer 14 is provided, and a protective layer 15 made of, for example, MgO is further provided on the dielectric layer 14. The dielectric layer 14 has a function of accumulating wall charges,
It has a function as a resistor that limits an excessive discharge current, and a memory function that maintains a discharge state. For example, by coating or printing a low melting point glass paste or SiO ₂ , or by vacuum-forming SiO _2. It is formed. The protective layer 15 is for preventing sputtering of gas ions and electrons due to discharge and for facilitating secondary electron emission during discharge.

The sustain electrodes 12 are arranged in parallel to the address electrodes 22 on the rear substrate 21 side in a direction in which their longitudinal directions are orthogonal to each other when viewed from the display surface side, and an electrode matrix is formed by both. . The individual regions in which the pair of sustain electrodes 12 and the address electrodes 22 are formed orthogonal to each other are light emitting regions corresponding to pixels.

The rear substrate 21 is made of the same material as the front substrate 11, for example, and strip-shaped or piece-shaped address electrodes 22 made of a metal thin film such as aluminum (Al) are arranged in parallel on the rear substrate 21. Has been done. Further, a dielectric layer 23 made of, for example, a low-melting glass paste is provided on the address electrodes 22, and a space between the front substrate 11 and the rear substrate 12 is defined on the dielectric layer 23, and both substrates 11, A partition wall 24 is provided for holding a gap between the 12 members. The space partitioned by the partition wall 24 becomes a discharge space. The barrier ribs 24 are formed, for example, in a stripe shape, and partition the discharge space for each address electrode 22. As a result, the light emitting regions adjacent to each other in the width direction of the address electrode 22 are prevented from crosstalk of light emitted from each other. Further, for example, phosphors 26 of three primary colors of red (R), green (G), and blue (B) are periodically arranged in a portion of the partition wall 24 and the dielectric layer 23 facing the discharge space. It is provided and each light emitting region emits light in this color scheme.

As the material of the phosphor 26, known materials can be used.
High quantum efficiency from the inside, less saturation to vacuum ultraviolet light
An appropriate phosphor material can be selected and used. Kara
-When displayed, the three primary colors whose color purity is specified by NTSC
Is a material close to
The afterglow time is short, and the afterglow times of the three colors are almost equal.
It is preferable to use a combination of phosphor materials
Yes. Fluorescent material that emits red light when irradiated with vacuum ultraviolet rays
For example, (Y₂O₃: Eu), (YBO ₃: E
u), (YVO_Four: Eu), (Y_0.96P_0.60V
_0.40O_Four: Eu_0.04), [(Y, Gd) BO₃: E
u], (GdBO₃: Eu), (ScBO₃: Eu),
(3.5 MgO ・ 0.5 MgF₂・ GeO₂: Mn)
To be Fluorescence that emits green light when irradiated with vacuum ultraviolet light
As a material, for example, (ZnSiO₂: Mn), (BaA
l₁₂O₁₉: Mn), (BaMg₂Al₁₆O₂₇: Mn),
(MgGa₂O_Four: Mn), (YBO₃: Tb), (L
uBO₃: Tb), (Sr_FourSi₃O₈Cl_Four: Eu)
Is mentioned. Also, it becomes blue by irradiation with vacuum ultraviolet rays.
Examples of the fluorescent material that emits light include (Y₂SiO_Five: C
e), (CaWO_Four: Pb), (BaMgAl₁₄O_{twenty three}:
Eu), (Sr₂P₂O₇: Eu), (Sr₂P
₂O₇: Sn) can be mentioned.

The front substrate 11 and the rear substrate 21 are arranged so as to face each other with a discharge space therebetween, and are hermetically sealed by frit glass around the display area. In the discharge space,
For example, a discharge gas made of one or more of rare gases such as He, Ne, Ar, Xe, and Kr is enclosed.

FIG. 1 shows an example of a plan view of the rear substrate 21 as seen from the partition wall 24 side. On the rear substrate 21,
The partition walls 24 are arranged in a row at a predetermined pitch. The area in which the partition wall 24 is formed is the display area 10 in which an image or the like is displayed.
Function as. A plurality of strip-shaped or piece-shaped address electrodes 22 are arranged between the partition walls 24. The address electrodes 22 are formed in the display region 10 at a pitch that matches the pitch of the partition walls 24 and along the direction in which the partition walls 24 extend. The address electrode 22 is provided so as to extend to the outside of the display area 10, and the rear substrate 2
The external connection terminal portions 22A at the peripheral edge of the unit 1 are integrally formed (in one connection).

A drive circuit connection region 21A for connecting the address electrode 22 and a drive circuit (not shown) is provided on the peripheral portion of the rear substrate 21. Drive circuit connection area 21
In A, the external connection terminal portion 22A of the address electrode 22
Is exposed. In the drive circuit connection region 21A, the external connection terminal portion 2 of the address electrode 22 is formed.
2A is formed in a shape along the direction in which the partition wall 24 extends, and its pitch is a pitch suitable for the drive circuit. Specifically, in order to divide the address electrodes 22 into a predetermined number and connect them to different drive circuits or the like, a gap 22C for connecting the drive circuits is provided for each predetermined number, and the other gaps 22D are, for example, Everywhere is evenly spaced. The arrangement of the gap 22C for connecting the drive circuit, the pitch, the size of the width, and the like can be appropriately determined in consideration of the balance with the scale of the circuit drive system to be connected.

A pitch adjusting area 21B is provided in a part between the display area 10 and the drive circuit connecting area 21A in order to adjust the pitch deviation between the two areas. In the pitch adjustment region 21B, the external connection terminal portion 2 of the address electrode 22 is formed.
2A is formed obliquely with respect to the direction in which the partition wall 24 extends, for example. As a result, the pitch of the external connection terminal portions 22A formed so as to be connected to the address electrodes 22 is adjusted to be a pitch suitable for the drive circuit within the drive circuit connection region 21A. The display area 1
0 and the drive circuit connection region 21A do not necessarily have to have different pitches between the address electrode 22 and the external connection terminal portion 22A, and they may be the same.

The dielectric layer 23 is formed in a uniform film shape (solid shape) so as to cover almost the entire surface of the display region 10, and the address electrode 22 is covered at that portion. Further, the dielectric layer 23 is provided in the pitch adjustment region 21 provided between the display region 10 and the drive circuit connection region 21A.
Also in B, the external connection terminal portion 2 of the address electrode 22
2A is preferably coated. This eliminates the need to provide a resist pattern in the pitch adjustment region 21B in the manufacturing process described later, and the covered area of the solid resist pattern can be reduced as compared with the conventional case.

On the outside of the display area 10, the rear substrate 2 made of raw glass is provided so as to surround the display area 10 in a frame shape.
It is preferable to provide the sealing region 10A (the hatched region in FIG. 1) on which the address electrode 22 is exposed and the dielectric layer 23 is not provided. The reason is that the sealing area 1
This is because the surface condition of 0A is preferably as smooth as possible in order to eliminate the leak of the sealing gas, and the condition of the raw glass whose surface is not roughened by sandblasting is good. If sandblasting is performed without forming a resist pattern by merely providing the dielectric layer 23 in the sealing region 10A, the surface of the dielectric layer 23 will be roughened by the sandblasting abrasive material, and the frit for sealing will be used. The adhesion of glass may be impaired, and the rare gas sealed in the discharge space may leak. The width of the sealing region 10A is
Considering the tolerance when forming the resist pattern 25, it is preferably about 6 mm, for example.

This plasma display device can be manufactured, for example, as follows.

First, the front substrate 11 is prepared, and then,
For example, a transparent electrode material such as ITO or tin oxide is formed by a thin film technique such as sputtering or vacuum deposition to form a pattern, and the pair of sustain electrodes 12 for surface discharge is formed in a stripe shape. Then, a bus electrode 13 having a predetermined width is formed at a predetermined position at the edge of the sustain electrode 12 opposite to the paired side. Bus electrode 13
Is, for example, Ag, Al, Ni, Cu, Mo or Cr
It is formed by forming a film of a metal material having good conductivity such as, for example, as a single substance or by laminating it as Mo / Al. As the film forming method, in addition to the screen printing method,
A method in which a film is formed by a sputtering method, a vacuum evaporation method or a CVD method and then patterned by a photolithography technique can be used.

After that, for example, a low melting point glass paste is applied by a screen printing method and baked to form the dielectric layer 14. The dielectric layer 14 is
Alternatively, it may be formed by vacuum deposition or sputtering of SiO ₂ or the like. Furthermore, the dielectric layer 1
A protective layer 15 made of MgO is formed on 4 by electron beam evaporation.

Next, a back substrate 21 is prepared, and on top of that,
For example, a metal material having good conductivity, specifically, Ag, Al, N
Referring to FIG. 1, the address electrode 22 and its external connection terminal portion 22A are formed by patterning i, Cu, Cr, etc. by a screen printing method or a thin film technique such as a vacuum deposition method and then patterning by etching. It is formed in a single connection so as to have the pitch and shape described above.

Subsequently, for example, a low melting point glass paste is applied by a screen printing method and baked,
The dielectric layer 23 is formed. As described with reference to FIG. 1, the dielectric layer 23 is not provided in the sealing region 10A, but the display region 10 and its periphery, and the pitch adjustment region 21.
Form B.

Next, as shown in FIG. 3, the dielectric layer 23
The glass paste is uniformly applied to a predetermined region on the base and dried to remove the solvent and the like, thereby forming the partition material layer 24A. After that, for example, a resist for sandblasting is applied or a dry film resist is pressure-bonded and exposed and developed to form a resist pattern 25.

The resist pattern (patterned resist) 25, as shown in FIG.
It is formed in the sealing region 10A and the drive circuit connection region 21A.

In the display area 10, the resist pattern 25
Are formed so as to have a one-to-one correspondence with the shape and pitch of the partition wall 24. Therefore, the resist pattern 2
5 are formed in stripes with a fine pitch as shown in FIG.

Further, in the sealing region 10A, a resist pattern 25 is formed so as to surely cover the surface of the rear substrate 21 made of raw glass and the address electrodes 22 thereon. Since it is difficult to form the resist pattern 25 only in the sealing region 10A, the end of the resist pattern 25 may slightly overlap the edge of the dielectric layer 23.

In the drive circuit connection region 21A, the resist pattern 25 is used to form the external connection terminal portion 22 of the address electrode 22.
Coat A. A notch 25D for promoting peeling of the resist pattern 25 is provided in a portion of the resist pattern 25 that covers the gap 22D between the external connection terminal portions 22A of the address electrodes. This cutout 25D is
This is a slit-shaped (slit-like) opening portion that penetrates through the resist pattern 25 in the thickness direction, and for example, the rear substrate 21 or the dielectric layer 23 is exposed in this opening portion.
This notch 25D lengthens the total length of the edges in the entire resist pattern 25, and when the resist pattern 25 is peeled off, the peeling liquid is passed from the notch 25D to the space between the resist pattern 25 and the underlying back substrate 21 or the like. The penetration can be promoted to promote the peeling of the resist pattern 25.

Here, the notch 25D is not limited to the slit-like shape that fits within the gap 22D of the address electrode 22 as shown in FIG. 3, for example, as shown in FIG. As shown, it is also possible to form one long hole 25E arranged in the gap 22D along the longitudinal direction thereof. Further, as shown in FIG. 5B, a plurality of holes 25F may be provided in a so-called perforated shape. Furthermore, the shapes of these holes 25E and 25F are
The shape is not limited to the rectangular shape shown in FIGS. For example, in the case of the perforated hole 25F of FIG. 5B, a circular hole 25G as shown in FIG. 5C, an elliptical hole 25H as shown in FIG. It is also possible to use such a triangular hole 25I or a rectangular hole 25J with rounded corners as shown in FIG. Needless to say, the same modification is possible in the case of the single elongated hole 25E shown in FIG.

In principle, the cutouts 25D can be provided in the gaps 22D between the external connection terminal portions 22A of all the address electrodes 22, but the present inventors have found that the distribution density of the cutouts 25D. As a result of various investigations regarding the above, from the viewpoint of the complexity of patterning the resist pattern 25 and the ease and reliability of peeling, the cutouts 25D are provided at every one of the external connection terminal portions 22A of the address electrode 22. It has been found that it is preferable to provide each of them. Specifically, for example, it is preferable to provide each of the external connection terminal portions 22A of the address electrode 22 at every 5 to 10 lines.

Further, the cutouts 25D are formed every five lines of the external connection terminal portion 22A of the address electrode 22 in FIG.
It is provided at each place, that is, at a predetermined pitch,
The cutouts 25D are not limited to the predetermined pitch as shown in FIG. 3, but may be provided with a random pitch, or with an irregular pitch such as alternating every three and every five.

In this embodiment, the resist pattern 25 is formed by covering the pitch adjusting region 21B with the dielectric layer 23.
Resist pattern 25
The pitch adjustment region 21
A notch 25B different from the notch 25D is provided on the entire B. With this notch 25B,
By further reducing the covered area of the resist pattern 25 and further increasing the total length of the end sides of the entire resist pattern 25, the resist pattern 25 can be peeled off more reliably and efficiently.

In the drive circuit connection area 21A,
Since there is no external connection terminal portion 22A of the address electrode 22 to be protected in the drive circuit connecting gap 22C, it is not necessary to form the resist pattern 25. Therefore, the notch 25C can be provided in the gap 22C for connecting the drive circuit.

FIG. 4 is a view showing only the resist pattern 25 of FIG. 3 extracted. In FIG. 4, the region covered with the resist pattern 25 is shaded for the sake of clarity. Conventionally, FIG.
As shown in FIG. 5, in the display area 100, a fine stripe-shaped resist pattern 205A exists, while
A uniform solid resist pattern 2 outside the display area 100
Since 05B exists, a fine resist pattern 2
There is a possibility that the peeling solution permeation rate may significantly differ between 05A and the solid resist pattern 205B.

On the other hand, in the present embodiment, as shown in FIG. 4, the resist pattern 25 in the display area 10 is formed.
11 is similar to FIG. 11, but the resist pattern 25 outside the display area 10 is provided with notches 25D, 25C, 25B. As described above, in the present embodiment, by providing the notches 25D, 25C, and 25B, the density of the resist pattern 25, that is, the variation in the area of each continuous solid pattern in the entire resist pattern 25 can be reduced. Can be made more uniform (the uneven distribution of the resist pattern 25 can be reduced or eliminated) over the entire area. As a result, further equalization of the peeling conditions is achieved over the entire area of the back substrate 21, and even in the case of high-definition display in which the pitch of the partition 24 is fine, the partition 24 is formed.
The accuracy of the shape is improved and the resist pattern 25 is easily and surely peeled off.

Notches 25D, 25C, 2 as described above
After the resist pattern 25 having 5B is formed, the partition electrode material layer 24A is formed by sandblasting with the address electrode 22 protected by the resist pattern 25.
To remove unnecessary parts. At this time, since the sandblasting abrasive material collides with the entire surface of the rear substrate 21,
The address electrode 22 is surely protected by the resist pattern 25, but the notches 25D, 25C, and 25B come into contact with the abrasive material of sandblast, and the back substrate 21 of the lower layer.
Alternatively, it is unavoidable that the surface of the dielectric layer 23 is roughened by the abrasive. Therefore, the resist pattern 2
Even after peeling off 5, the cutouts 25D, 25C, 25B are formed in the raw glass portion of the rear substrate 21 and the surface of the dielectric layer 23.
Although the trace of sand blast according to the shape of 1 remains, there is no particular inconvenience.

After the partition wall 24 is shaped into a stripe shape in this way, the back substrate 21 is put into a peeling device to peel off the resist pattern 25. At this time, the resist pattern 25
Since the cutouts 25D, 25C, and 25B are provided in the rear surface, the peeling progresses more uniformly than in the conventional case over the entire rear substrate 21, and there is a possibility that the shape of the partition wall 24 may collapse and residue of the resist pattern 25 may occur. Disappear. Finally, it is fired to complete the partition wall 24.

Next, the phosphors 26 are formed in a predetermined arrangement in each U-shaped valley-shaped region between both side surfaces of the adjacent partition walls 24 and the dielectric layer 23 sandwiched therebetween. The phosphor 26 can be formed by applying it by a screen printing method, or by applying it from the partition wall 24 in the form of a slurry having a photosensitivity function, exposing it to light, and baking it.

Next, the front substrate 11 and the rear substrate 21 are assembled. For example, the front substrate 1 by screen printing
A seal layer (not shown) made of frit glass is formed on the peripheral portion of 1. Then, the front substrate 11 and the rear substrate 12 are accurately positioned so that the sustain electrodes 12 and the address electrodes 22 are orthogonal to each other, and the whole is temporarily fixed, for example, 430.
Main baking is performed at about ℃.

Further, the discharge space provided between the front substrate 11 and the rear substrate 12 and partitioned by the partition wall 24 is evacuated and filled with a mixed gas. First, the back substrate 2
The inside of the discharge space is evacuated by a tip tube (not shown) installed on the upper surface of the nozzle 1 to create a high vacuum state. After that, by enclosing a specific discharge gas, the inside of the discharge space, that is, the panel display portion can be filled with the high-purity discharge gas. Finally, the chip tube is electrically sealed or gas sealed to complete the plasma display device of the present embodiment.

This plasma display device can be operated by the subfield driving method. That is, a display screen of one field in a general image display is configured by subfields in which luminance is weighted by light emission time, and halftone is displayed by light emission control for each subfield. The subfield is divided into three operation periods, that is, a reset period, an address period, and a display period.

First, all the light emitting regions are initialized during the reset period, and charges (wall charges) are uniformly formed on the protective layer 15 in all the light emitting regions. Next, in the address period, display data for one screen is written, the wall charges are selectively erased from the light emitting regions corresponding to the pixels that are not to emit light, and the wall charges are left only in the light emitting regions that are desired to emit light. Next, when a drive voltage of an AC pulse is applied between the pair of sustain electrodes 12 in the display period, sustain discharge occurs in the light emitting region where the wall charges remain. The fluorescent substance 26 emits light by the ultraviolet rays emitted by the discharge gas due to the sustain discharge, and the pixel corresponding to this light emitting region is turned on. In this way
Light emission occurs in one subfield so as to form a predetermined pattern, and the subfields are time-sequentially overlapped with each other, so that a gradation-controlled image of one field is displayed.

As described above, according to the present embodiment, when the external connection terminal portion 22A of the address electrode 22 is covered with the resist pattern 25, the resist pattern 2 is formed.
5, the external connection terminal portion 22A of the address electrode 22
The resist pattern 2 is formed on the portion that covers the gap 22D.
Since the notch 25D for promoting the peeling of No. 5 is provided, the total length of the end side in the entire resist pattern 25 becomes long, and at the time of peeling the resist pattern 25, the peeling liquid is fed from the notch 25D to the resist pattern 25.
It is possible to promote the peeling of the resist pattern 25 by infiltrating into the space between the back substrate 21 and the lower layer thereof.

Further, the notch 2 is formed in the resist pattern 25.
By providing 5D, the density of the resist pattern 25, that is, the variation in the area of each continuous solid pattern in the entire resist pattern 25 is made more uniform over the entire area of the back substrate 21, and the resist pattern 25 is formed. The bias in density can be reduced or eliminated. This makes it possible to further equalize the peeling conditions over the entire area of the back substrate 21, and even in the case of high-definition display in which the pitch of the partition walls 24 is fine, the shape accuracy of the partition walls 24 and the resist pattern 25 can be easily and reliably improved. Peeling is realized.

Further, according to the present embodiment, the notch 2
5D is provided at every one of the plurality of external connection terminal portions 22A of the address electrode 22, specifically, at every one of every 5 to 10 of the external connection terminal portions 22A of the address electrode 22, for example. Therefore, the patterning of the resist pattern 25 is not complicated, and the resist pattern 25 can be peeled easily and reliably.

Further, in the present embodiment, the pitch adjustment region 21B is covered with the dielectric layer 23, and the resist pattern 25 is not intentionally provided in this portion, so that the pitch adjustment region 21B has a notch 25D. Since the notch 25B different from that is provided, the notch 25B reduces the covering area of the resist pattern 25 on the dielectric layer 23 and further increases the total extension of the end sides of the resist pattern 25 as a whole. The peeling of the resist pattern 25 can be made easier and more reliable.

Further, in the present embodiment, outside the display area 10, the address electrode 22 is exposed on the rear substrate 21 made of raw glass so as to surround the periphery of the display area 10 in a frame shape, and the dielectric layer. Since the sealing area 10A not provided with 23 is provided and the area is covered with the resist pattern 25 so as to be protected from sandblasting (not to be roughened),
It is possible to firmly adhere the frit glass for sealing to the sealing region 10A and reliably seal the front substrate 11 and the rear substrate 21.

[Second Embodiment] FIG. 6 shows a second embodiment of the present invention.
2 is a plan view of the back substrate 21 of the plasma display device according to the embodiment viewed from the partition wall 24 side. In this plasma display device, the external connection terminal portions 2 of the adjacent address electrodes 22 are arranged at a predetermined pitch or a random pitch.
The plasma display device is the same as the plasma display device described in the first embodiment, except that a wide gap 22K is provided in which the gap between 2A is set wider than the other gap 22D. Therefore, the same components are designated by the same reference numerals, and detailed description thereof will be omitted.

The wide gap 22K is for widening the interval between the external connection terminal portions 22A of the address electrode 22 to further facilitate the patterning of the notch 25D of the resist pattern 25. Therefore, the first
In the same manner as the description of the cutout 25D in the above embodiment, from the viewpoint of the complexity of patterning the resist pattern 25 and the ease and reliability of peeling, a plurality of external connection terminal portions 22A of the address electrode 22 are arranged. One at a time, specifically, for example, the address electrode 2
It is preferable to provide the external connection terminal portion 22A of No. 2 every 5 to 10 pieces and to provide one place. Further, as shown in FIG. 6, every five lines may be provided at a predetermined pitch, but not limited to this, they may be provided at a random pitch or an irregular pitch.

FIG. 7 shows a state in which the resist pattern 25 is formed on the rear substrate 21 in the manufacturing process of the plasma display device of this embodiment. As shown in FIG. 7, the resist pattern 25 in the display area 10 and the sealing area 10A is the same as that in the first embodiment, but in the drive circuit connection area 21A, of the resist patterns 25,
A notch 25D is provided in a portion that covers the wide gap 22K. The manufacturing process other than this is the same as that described in the first embodiment, and therefore detailed description thereof will be omitted.

According to the present embodiment, a wide gap 22K is provided in which the distance between the external connection terminal portions 22A of the adjacent address electrodes 22 is set wider than that of the other gap 22D, and the resist pattern 25 is used to form the external connection terminal. Since the notch 25D is provided in the portion of the resist pattern 25 that covers the wide gap 22K when the portion 22A is covered, the resist pattern is formed between the external connection terminal portions 22A of the fine address electrodes 22. The patterning when the 25 cutouts 25D are provided becomes easier and more reliable. Therefore, this plasma display device has a structure that is more directly connected to the simplification and accuracy improvement of the manufacturing process, and it is possible to reduce the manufacturing cost by improving the yield and achieve the further refinement of pixels by reducing the partition wall pitch. As a result, it is possible to realize a high-definition display-compatible plasma display device that has few defects and can be manufactured at low cost.

The present invention has been described above with reference to the embodiments, but the present invention is not limited to the above embodiments, and various modifications can be made. For example, in the above-described embodiment, the structure of the plasma display device is specifically described, but it is not necessary to include all the layers described in the above-described embodiment, and further, it is possible to further include other layers. Good. For example, in the above-described embodiment, the dielectric layers 14 and 23 are described as a single layer, but may be a multilayer film. Further, in the above-described embodiment, the partition wall 24 is described as a stripe shape, but the partition wall 24 is formed by the sandblast method even in the case of other shapes such as a lattice shape or a bent shape such as a delta arrangement type (meaner). The present invention is applicable to a plasma display device that does.

Further, the film forming method and film forming conditions described in the above embodiments can be changed to other film forming methods and film forming conditions except that the partition wall 24 is formed by the sandblast method. is there.

Further, in the above embodiment, the pitch adjusting region 21B is covered with the dielectric layer 23, the resist pattern 25 is not intentionally provided in this portion, and the notch 25B is provided in the pitch adjusting region 21B. Although the case has been described, in order to protect the address electrodes 22 during sandblasting, the pitch adjustment region 21B can be covered with the resist pattern 25 instead of the dielectric layer 23. Further, when the pitch adjustment region 21B is covered with the resist pattern 25, the pitch adjustment region 2
It is also possible to extend or dispose the notch 25D in the resist pattern 25 covering 1B in an oblique direction so that the notch 25D is provided over the entire length of the external connection terminal portion 22A of the address electrode 22. However, since it is complicated in design to extend or dispose the notch 25D obliquely, the dielectric layer 23, which does not require peeling, is more advantageous than the solid formation of the resist pattern 25 in the pitch adjustment region 21B. Is preferred.

Further, in the above-described embodiment, the case where the present invention is applied to the manufacturing method of the plasma display device and the plasma display device has been described. However, the resist pattern 25 of the above-mentioned embodiment is used as a “mask” and the address electrode 22 is used. If the external connection terminal portion 22A of "a" is a "protected structure" and the partition wall material layer 24A is a "processed layer", it can be applied to a sandblasting method. Therefore, needless to say, the present invention is not limited to the manufacture of the barrier ribs of the plasma display device, but has versatility that can be widely applied to various industrial products using sandblasting and manufacturing processes thereof.

[0073]

As described above, according to the plasma display device manufacturing method of any one of claims 1 to 6, when the external connection terminal portion of the address electrode is covered with a mask, Since a notch for promoting peeling of the mask is provided in a portion of the mask which covers the gap between the external connection terminal portions of the address electrode,
The total length of the edges of the entire mask becomes longer, and when the mask is peeled off, the peeling liquid can penetrate through the notch between the mask and the underlying insulating substrate, etc., to promote mask peeling. It will be possible.

Further, by providing a notch in the mask, the mask density, that is, the variation in the area for each solid pattern in the entire mask is made more uniform over the entire area of the insulating substrate, and the mask is formed. The bias in density can be reduced or eliminated. As a result, it becomes possible to further equalize the peeling conditions over the entire area of the insulating substrate, and even in the case of high-definition display in which the pitch of the barrier ribs is fine, the shape accuracy of the barrier ribs and easy and reliable peeling of the mask are realized. It

Particularly, according to the manufacturing method of the plasma display device of the second aspect, since the notches are provided at every one of the plurality of external connection terminal portions of the address electrodes, the notches are formed in the mask. The mask can be easily and surely peeled off without complicated patterning at the time of providing.

Further, in particular, according to the manufacturing method of the plasma display device of the fifth aspect, in the pitch adjustment region, the address electrode is covered with the dielectric layer, and the mask is not intentionally provided in this part. Since the notch is provided in the entire pitch adjusting region, the mask covering area is reduced and the total length of the end sides of the entire mask is made longer to make the mask peeling easier and more reliable. be able to.

In addition, in particular, according to the method of manufacturing a plasma display device of the sixth aspect, the address electrode and the insulating substrate are exposed so as to surround the area where the partition wall is formed in a frame shape, and the dielectric is formed. Since the sealing area without the body layer is provided and this sealing area is covered with a mask to protect it from sandblasting, the frit glass for sealing is firmly attached to the sealing area to ensure the discharge space. It is possible to realize various sealing.

According to the method of manufacturing a plasma display device of claim 7, at least one of the plurality of gaps between the external connection terminal portions of the plurality of address electrodes is set wider than the other gaps, and When the external connection terminal portion of the electrode is covered with a mask, a notch for promoting peeling of the mask is provided in a portion of the mask which covers a widely set gap. This facilitates patterning when the mask notch is provided between the external connection terminal portions.

In the sandblasting method according to the eighth aspect, when a plurality of strip-shaped or piece-shaped structures to be protected are covered with a mask, a portion of the mask covering the gap between the structures to be protected is covered with the mask. Since the notch for promoting peeling is provided, the total length of the edge side in the entire mask becomes long, and at the time of peeling the mask, the peeling liquid is separated from the mask and the insulating substrate of the lower layer by the notch. It can be penetrated into the space to promote the peeling of the mask.

Further, by providing a notch in the mask, the mask density, that is, the variation in the area for each solid pattern in the entire mask can be made more uniform over the entire area of the insulating substrate, and the mask can be made uniform. The bias in density can be reduced or eliminated. As a result, the stripping conditions can be further equalized over the entire area of the insulating substrate, and the shape accuracy of the layer to be processed after sandblasting can be improved and the mask can be easily and surely stripped.

In the sandblasting method according to the ninth aspect, at least one of the plurality of gaps between the plurality of structures to be protected is set wider than the other gaps, and the structure to be protected is covered with a mask. Since the notch for promoting the peeling of the mask is provided in the portion of the mask which covers the widely set gap, the patterning when the notch is provided in the mask becomes easier.

In the plasma display device according to claim 10,
Since at least one of the plurality of gaps between the external connection terminal portions of the plurality of address electrodes is set wider than the other gaps, it is necessary to cover the external connection terminal portions of the address electrodes with a mask. Patterning when the notch of the mask is provided between the external connection terminal portions of the address electrode becomes easier. Therefore, this plasma display device has a structure more directly connected to the simplification of the manufacturing process and the improvement of accuracy, and it is possible to improve the yield, reduce the manufacturing cost, and achieve the further refinement of pixels by reducing the partition wall pitch. As a result, it is possible to realize a high-definition display-compatible plasma display device that has few defects and can be manufactured at low cost.

[Brief description of drawings]

FIG. 1 is a plan view showing a planar configuration of a rear substrate of the plasma display device shown in FIG. 2 viewed from a partition side.

FIG. 2 is a schematic perspective view showing a basic structure of a display unit of the plasma display device according to the first embodiment of the present invention.

FIG. 3 is a plan view for explaining a manufacturing process of the plasma display device shown in FIGS. 1 and 2.

FIG. 4 is a plan view showing the resist pattern shown in FIG. 3 by extraction.

FIG. 5 is a diagram showing a modification of the notch shown in FIG.

FIG. 6 is a diagram showing a planar configuration of a rear substrate of a plasma display device according to a second embodiment of the present invention as seen from a partition side.

FIG. 7 is a plan view for explaining a manufacturing process of the plasma display device shown in FIG.

8 is a cross-sectional view taken along the line VIII-VIII of FIG.

FIG. 9 is a plan view for explaining the manufacturing process of the conventional plasma display device.

FIG. 10 is a cross-sectional view for explaining a manufacturing process of the conventional plasma display device.

FIG. 11 is a plan view showing the resist pattern of FIG. 9 extracted.

[Explanation of symbols]

10 ... Display area, 10A ... Sealing area, 11 ... Front substrate,
12 ... Sustain electrode, 13 ... Bus electrode, 14, 23 ... Dielectric layer, 15 ... Protective layer, 21 ... Rear substrate, 21A ... Drive circuit connection area, 21B ... Pitch adjustment area, 22 ... Address electrode, 22A ... External connection Terminal part (protected structure), 22C
... gap for connecting drive circuit, 22D ... gap, 22K ... wide gap, 24 ... partition, 24A ... partition material layer (processed layer),
25 ... Resist pattern (mask), 25D, 25C,
25B ... Notch, 26 ... Phosphor.

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5C027 AA01 AA06 AA09 AA10                 5C040 FA01 FA04 GB03 GD01 GF02                       GK05 JA17 LA05 MA23 MA24                       MA26

Claims (10)

[Claims] 1. A step of arranging a plurality of strip-shaped or piece-shaped address electrodes each having an external connection terminal portion on an insulating substrate in a row with a gap therebetween, and the address electrode avoiding the external connection terminal portion. With a dielectric layer, a step of forming a partition material layer on the dielectric layer, at least the external connection terminal portion of the address electrode is covered with a mask, and the address electrode of the mask In the part that covers the gap between the external connection terminal parts of
A step of providing a notch for promoting peeling of the mask, and a step of processing the partition material layer by a sandblast method in a state where the external connection terminal portion of the address electrode is protected by the mask to form a partition, And a step of removing the mask after the sandblasting. 2. The method of manufacturing a plasma display device according to claim 1, wherein the cutout is provided at every one of the plurality of external connection terminal portions of the address electrode. 3. The method for manufacturing a plasma display device according to claim 1, wherein the notch is provided in a slit-like shape so as to be accommodated in a gap between the external connection terminal portions of the address electrode. 4. The cutout is arranged in a gap between the external connection terminal portions of the address electrode along a longitudinal direction of the gap, and has one or more circular or elliptical shapes.
The method of manufacturing a plasma display device according to claim 1, wherein the hole is provided as a polygonal hole or a polygonal hole having rounded corners. 5. An external connection terminal of the address electrode, wherein the address electrode is formed in a shape along a direction in which the partition wall extends at a pitch matching a pitch of the partition wall in a region where the partition wall is formed. Portions are formed in a driving circuit connection region at a peripheral portion of the insulating substrate in a shape along the direction in which the partition wall extends at a pitch suitable for the driving circuit, and the region where the partition wall is formed and the driving circuit. In the pitch adjustment region provided between the connection region and the connection region, it is formed obliquely with respect to the direction in which the partition wall is extended in order to adjust the pitch deviation between the two, and in the pitch adjustment region, outside the address electrode. The connection terminal portion is covered with the dielectric layer and the mask is not provided, and a cutout different from the cutout is provided in the pitch adjustment region depending on the portion where the mask is not provided. Method of manufacturing a plasma display device according to claim 1, wherein Rukoto. 6. A sealing region is provided so that the plurality of address electrodes and the insulating substrate are exposed and the dielectric layer is not provided so as to surround the region where the partition wall is formed in a frame shape. The method of manufacturing a plasma display device according to claim 1, wherein the sealing region is further covered with the mask. 7. A plurality of strip-shaped or piece-shaped address electrodes each having an external connection terminal portion on an insulating substrate are arranged in a row with a gap therebetween, and a plurality of external connection terminal portions of the plurality of address electrodes are arranged. Setting at least one of the gaps to be wider than the other gaps; a step of avoiding the external connection terminal portion and covering the address electrodes with a dielectric layer; A step of forming a partition wall material layer, and covering at least the external connection terminal portion of the address electrode with a mask, and cutting a portion of the mask covering the wide gap to promote peeling of the mask. A step of providing a notch, and the partition wall material layer is processed by a sand blast method in a state where the external connection terminal portion of the address electrode is protected by the mask to form the partition wall. A step of forming, method of manufacturing a plasma display device characterized by comprising the step of removing the mask after the sandblasting. 8. A step of forming a plurality of strip-shaped or piece-shaped protected structures on an insulating substrate with a gap, and sandblasting the surface of the insulating substrate on the side where the protected structures are formed. Forming a layer to be processed which is processed into a desired shape by exposing the structure to be protected, and at least covering the structure to be protected with a mask, And a step of providing a notch for promoting peeling of the mask in a portion covering a gap between the structures, the sandblasting method. 9. A plurality of strip-shaped or piece-shaped protected structures are formed on an insulating substrate with a gap, and at least one of the plurality of gaps between the protected structures is And a process target layer formed in a desired shape by a sand blasting method on the surface of the insulating substrate on the side where the protected structure is formed. And exposing at least the structure to be protected with a mask, and providing a notch for promoting peeling of the mask in a portion of the mask covering the widely set gap. A method for sandblasting, which comprises: 10. A plurality of strip-shaped or piece-shaped address electrodes, which are arranged in a row on an insulating substrate with a gap and each have an external connection terminal portion, and the address electrode avoiding the external connection terminal portion. A plasma display device having a dielectric layer covering the dielectric layer and a partition formed on the dielectric layer, wherein at least one of a plurality of gaps between external connection terminal portions of the plurality of address electrodes is provided. Is a plasma display device characterized by being set wider than other gaps.