JP2003274559A - Voltage ripple compensator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform efficient voltage compensation, utilizing energy of each phase of capacitor equally, in a voltage ripple compensator which compensates voltage ripples at the instantaneous drop of the system voltage by outputting the voltage of a capacitor, installed in each phase from each phase voltage compensating circuit connected in series with each phase of a power system. <P>SOLUTION: The voltage ripple of line is suppressed by outputting each phase-compensating voltage Via, Vib, and Vic, which is calculated by superposing the same superposed voltage vector V<SB>0</SB>each to each phase voltage Vta, Vtb, and Vtc for compensating the output voltage of each phase into normal voltage at voltage ripple of the power system, from each phase voltage compensating circuit 110 described above. Moreover, the superposed voltage vector V<SB>0</SB>is decided so that the output energy from each phase voltage compensating circuit 110 becomes roughly equal. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage fluctuation compensator for detecting instantaneous fluctuations in the voltage of a power system supplied to a load and compensating for the voltage fluctuations.

[0002]

2. Description of the Related Art The voltage of a power system is instantaneously lowered by lightning or the like, and precision equipment such as factories malfunctions or is temporarily stopped, which may cause a great deal of damage to a production line. In order to prevent such damage, a voltage fluctuation compensating device that monitors voltage fluctuations such as an instantaneous voltage drop in the power system and compensates for the voltage drop is used. FIG. 12 shows a schematic configuration diagram of a conventional voltage fluctuation compensating device. As shown in the figure,
Electric power from the power transmission line 1 is stepped down by the transformer 2 and connected to the customer 3 (load) via the voltage fluctuation compensator.
Power is supplied. The voltage fluctuation compensator includes a DC power supply 4,
Inverter 5, smoothing filter 6 and large capacity transformer 7
Composed of. The voltage compensating operation when the system voltage is momentarily lowered (hereinafter, referred to as momentary voltage drop) in such a conventional voltage fluctuation compensating apparatus will be described below. FIG. 13 shows the system voltage, the compensation voltage output of the voltage fluctuation compensating device, and the voltage supplied to the customer 3 when the system voltage is instantaneously lowered. As shown in the figure, when a voltage drop instantaneously occurs in the system voltage, a detection unit (not shown) that monitors the voltage change detects the voltage drop, and the power supply control based on this detects the voltage change compensator. Then, an AC voltage is generated by the DC power supply 4 and the inverter 5, and is connected in series to the power system via the smoothing filter 6 and the large-capacity transformer 7, thereby compensating for the voltage drop in the power system. This allows
The customer 3 is supplied with power at a substantially normal voltage by adding the compensation voltage output from the voltage fluctuation compensating device to the system voltage that has dropped.

The voltage fluctuation compensating apparatus as described above is connected to the power system via the transformer 7. In recent years, the voltage fluctuation compensating apparatus is composed of a plurality of voltage compensating sub-circuits connected in series. Has been developed that is directly connected to the power system in series, and will be described below with reference to FIG. As shown in FIG. 14, the power from the power transmission line 1 is stepped down by the transformer 2, connected to the customer 3 (load) via the voltage fluctuation compensating device 100, and the power is supplied. As shown in the figure, the voltage fluctuation compensating apparatus 100 is composed of a plurality of voltage compensating units 15 and a control circuit 16, and a voltage compensating sub-circuit P that outputs a compensating voltage with either positive or negative polarity.
N1, PN2, PN3 are connected in series to the power system.
Each of the voltage compensation units 15 includes four semiconductor switching elements 9sw11 to 9 in which diodes are connected in antiparallel.
sw14, 9sw21-9sw24, 9sw31-9s
w34 full bridge inverter, and charging capacitors 10pn1-10p as energy storage means
Each voltage compensation sub-circuit PN (PN1, P
N2, PN3) and the charging capacitor 10 (10pn1 to 10pn1)
The charging diode 11 for charging 10 pn3) and the secondary winding 13 of the charging transformer 14 are provided. Further, the charging voltages V1 to V3 of the charging capacitor 10 are the same as those of the semiconductor switching element 9 (9sw11 to 9sw14, 9s).
On / off control of w21 to 9sw24, 9sw31 to 9sw34) connects to the power system with either positive or negative polarity. In addition, at the output end of each voltage compensation sub-circuit PN,
A high-speed mechanical steady short-circuit switch 8 is provided in parallel with each voltage compensation sub-circuit PN. The charging capacitor 10 is charged with different voltages by the charging diode 11 and the secondary winding 13 of the charging transformer 14, respectively.
The secondary winding 12 is connected to the power system. The ratio of the voltages charged in the charging capacitors 10 in each of the voltage compensation sub-circuits PN1, PN2, PN3 is set to a power of 2 ratio. That is, the following relationships are satisfied. V3 = 2 × V2 = 2 × 2 × V1

The steady short-circuit switch 8 and each semiconductor switching element 9 are connected to a control circuit 16. The configuration and operation of the control circuit 16 will be described below with reference to FIG. As shown in FIG. 15, the system voltage is input to the control circuit 16 and compared with the set voltage 20. At this time, the set voltage 20 is set to a normal system voltage. The difference between the two is amplified by the error amplifier 21, further subjected to absolute value conversion, and then converted into a 3-bit digital signal (D1 to D3) by the A / D converter 22. System voltage and set voltage 20
Is equal to the charging voltage V1 of the charging capacitor 10pn1, only the least significant bit D1 in the output signal from the A / D converter 22 becomes 1, that is, "001", and likewise "010". Also in the case of “...” 111, the gain of the error amplifier 21 is adjusted in advance so that it becomes equal to the combination of the charging voltages of the charging capacitor 10. When any of the signals D1 to D3 becomes 1,
The steady short-circuit switch 8 is turned off by the signal z (= 0) through the NOR circuit 23. On the other hand, the voltage sag control circuit 16
The system voltage input to is also input to the polarity determination circuit 24, and the polarity is determined. 25 is each voltage compensation sub-circuit P
A drive signal generator that generates a drive signal for an N inverter, and signals g11 to g1 that are active in digital signals D1 to D3 depending on whether the polarity of the system voltage is positive or negative.
4, g21 to g24 and g31 to g34 are selected.

For example, the voltage compensation sub-circuit P shown in FIG.
In N1, when the least significant bit D1 = 1 and the polarity of the system voltage is positive, the switching element 9sw11,
9sw14 is turned on, and switching elements 9sw12, 9
By turning off sw13, the charging voltage V1 is output with a positive polarity. When the polarity of the system voltage is negative, the switching elements 9sw12 and 9sw13 are turned on and the switching elements 9sw11 and 9sw14 are turned off.
The charging voltage V1 is output with a negative polarity. When D1 = 0, one of the switching elements 9sw11 to 9sw14, the upper arm side 9sw12, 9sw14 or the lower arm side 9sw11, 9sw13, is turned on and the other is turned off to short-circuit the output terminal, and the voltage compensation sub The output from the circuit PN1 is almost zero. Under normal conditions, that is, when the digital signals D1 to D3 are all 0, the steady short-circuit switch 8 is in the ON state, and the current flows through the steady short-circuit switch 8. Further, when the voltage of the power system drops, the compensation voltage is output in each of the voltage compensation circuits PN1, PN2, PN3 selected by the digital signals D1 to D3 generated according to the error voltage. These outputs can be combined in a system to generate a voltage output of 8 gradations of “000” to “111”, and the maximum compensation voltage is 7 × V1.

Such a conventional voltage fluctuation compensating device 100
Since a plurality of voltage compensation sub-circuits PN1 to PN3 are provided and the compensation voltage is output by gradation control, highly accurate voltage compensation at the time of a system voltage sag is possible, and because it is directly connected to the system voltage. The entire device is inexpensive and can be made compact. The operation of the conventional voltage fluctuation compensating apparatus 100 has been described for only one phase of the system voltage, but as shown in FIG. 16, it is actually a three-phase alternating current (a phase, b phase, c phase).
Capacitors 10a, 10b, for each phase of
A voltage fluctuation compensating device 100a, 100b including 10c,
100c is connected in series to independently compensate for voltage fluctuations. Similarly, in the conventional voltage fluctuation compensating apparatus connected to the power system through the transformer 7, each phase is provided with a voltage fluctuation compensating apparatus to independently compensate for the voltage fluctuation.

[0007]

The conventional voltage fluctuation compensating apparatus independently compensates each phase of the system voltage as described above, and as shown in the flowchart of FIG. 17, detects fluctuations in the system voltage. Then (s1), each phase (a phase, b
Compensation voltage (Vta, Vtb, V) required for each phase and c phase
tc) is calculated, and when they are less than or equal to the output voltage of each phase, that is, the voltage of the capacitor (Va, Vb, Vc) (s2),
Compensation voltage (Vta, Vtb, Vtc) is output to each phase (s
3). If there is a phase in which the required compensation voltage exceeds the voltage of the capacitor in s2, compensation for voltage fluctuation becomes impossible (s4). In this way, the phase where the compensation voltage that the voltage fluctuation compensator can output is less than the required compensation voltage is 1
Since compensation is not possible even if it is a phase, there is a problem in that the compensable time is determined in the phase in which the voltage drop of the capacitor is the largest, and the energy of other phases cannot be effectively used and the compensation is likely to occur.

The present invention has been made in order to solve the above problems, and in a voltage fluctuation compensator for compensating for voltage fluctuations in each phase of a voltage system, the energy storage means of each phase is The purpose is to make effective use of energy as a whole and to be able to continuously perform voltage compensation even if there is a phase in which the compensation voltage that can be output does not reach the required compensation voltage.

[0009]

[Means for Solving the Problems] Claim 1 according to the present invention
The voltage fluctuation compensating device described is a control section that monitors voltage fluctuations in the power system and performs power supply control based on the monitoring.
A device for suppressing fluctuations in voltage supplied to a load, which is connected to each phase of the power system in series and which includes a voltage compensation circuit for converting each phase of the direct current voltage stored in the energy storage means into an alternating current and outputting the alternating current. In the configuration, when the voltage of the power system fluctuates, each phase voltage for compensating the output voltage of each phase to a normal voltage is superposed with the same output voltage vector. The phase voltage compensating circuit outputs the voltage and suppresses the voltage fluctuation of the line voltage in the power system.

According to a second aspect of the present invention, there is provided the voltage fluctuation compensating apparatus according to the first aspect, wherein each phase voltage compensating circuit outputs each phase compensating voltage from an independent energy accumulating means, and compensating each phase. The output voltage vector to be superimposed at the time of voltage calculation is determined so that the output energies from the phase compensation circuits are approximately equal.

According to a third aspect of the voltage fluctuation compensating apparatus of the present invention, in the first aspect, each phase voltage compensating circuit outputs each phase compensating voltage from each independent energy accumulating means to compensate each phase. The output voltage vector to be superimposed is determined so that the magnitudes of the voltages are approximately equal.

According to a fourth aspect of the present invention, there is provided the voltage fluctuation compensating device according to the first aspect, wherein each phase voltage compensating circuit outputs each phase compensating voltage from an independent energy accumulating means, and each energy accumulating circuit. The means is composed of a capacitor and is provided with a voltage detecting means for each energy accumulating means, and an output voltage vector to be superimposed at the time of calculating each phase compensation voltage is determined so as to eliminate the difference between the detected voltages of the energy accumulating means. Is.

A voltage fluctuation compensating apparatus according to a fifth aspect of the present invention is the voltage fluctuation compensating apparatus according to the fourth aspect, wherein an average value of the detected voltage of each energy accumulating means is calculated and the energy accumulating means of each of the energy accumulating means is calculated based on the average value. The allowable range of the detection voltage is set, and the output voltage vector to be superimposed at the time of calculating the compensation voltage for each phase is determined so as to be deflected to the phase exceeding the allowable range.

According to a sixth aspect of the voltage fluctuation compensating apparatus of the present invention, in the first aspect, the energy storage means is shared by a plurality of phase voltage compensating circuits.

According to a seventh aspect of the present invention, there is provided a voltage fluctuation compensating device according to the first or sixth aspect, further comprising means for detecting an abnormality in each phase voltage compensating circuit, and the output voltage to be superposed during each phase compensating voltage calculation. The vector is determined so that the compensation voltage output from the voltage compensation circuit, which has been abnormally detected by the above means, becomes zero.

According to an eighth aspect of the voltage fluctuation compensating apparatus of the present invention, in the first aspect, each phase voltage compensating circuit outputs each phase compensating voltage from the common energy accumulating means, and the energy accumulating means is operated. When the voltage detection means of the energy storage means is formed by a capacitor and each phase voltage for compensating the output voltage of each phase to a normal voltage when the voltage of the power system fluctuates is less than or equal to the detection voltage of the energy storage means. ,
The output voltage vector to be superposed is defined as 0 vector, and when there is a phase exceeding the detection voltage, the output voltage vector to be superposed is determined so that each phase compensation voltage becomes equal to or lower than the detection voltage.

According to a ninth aspect of the present invention, in the voltage fluctuation compensating apparatus according to any one of the second to fifth aspects, each phase voltage compensating circuit connected in series to each phase of the power system is different. A plurality of voltage compensating sub-circuits, each of which has an energy accumulating portion for accumulating a voltage and constitutes an energy accumulating means and which converts a direct current voltage accumulated in the energy accumulating portion into an alternating current and outputs the alternating current; the absolute values of different voltage respectively stored in the energy storage unit in the plurality of voltage compensation subcircuit, smallest voltage approximate 2 ^K times (K = 0, 1, 2 with respect to (the absolute value), ... ), A high-speed mechanical short-circuit switch for bypassing the voltage compensation sub-circuit is provided for each output end of one or a plurality of the voltage compensation sub-circuits connected in series. A desired combination is selected from the plurality of voltage compensation sub-circuits in each phase, and the sum of the output voltages thereof suppresses the voltage fluctuation of the line voltage in the power system.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. The first embodiment of the present invention will be described below. 1 is a schematic configuration diagram of a voltage fluctuation compensating apparatus 200 according to Embodiment 1 of the present invention. As shown in FIG. 1A, the electric power from the power transmission line 1 is stepped down by the transformer 2, and the voltage fluctuation compensating device 20
It is connected to the consumer 3 (load) via 0 and electric power is supplied. As shown in FIG. 1B, the voltage fluctuation compensating apparatus 200 includes capacitors 10a, 1 as energy storage means for each of three-phase alternating current (a-phase, b-phase, c-phase).
0b, 10c each phase voltage compensation circuit 110a, 11
0b and 110c are connected in series, a control circuit 30 common to all phases is provided as a control unit, and each phase voltage compensation circuit 110a, 110b, 11 is supplied with a command from the control circuit 30.
The compensation voltage is output from 0c to each phase to compensate the voltage fluctuation.

Each phase voltage compensation circuit 110a, 110b, 1
The detailed configuration of 10c will be described below with reference to FIG.
As shown in FIG. 2, each phase voltage compensation circuit 110 a, 110
b and 110c are composed of a plurality of (three in this case) voltage compensating units 15, and voltage compensating sub-circuits PN1, PN2, PN3 that output compensating voltage with either positive or negative polarity are connected in series to the power system. . Each voltage compensation unit 15 includes four IGBTs 9 each having a diode connected in antiparallel.
sw11 ~ 9sw14, 9sw21 ~ 9sw24, 9s
Full bridge inverter consisting of w31-9sw34,
And charging capacitor 10p as energy storage means
Each voltage compensation sub-circuit PN composed of n1 to 10pn3
(PN1, PN2, PN3) and charging capacitor 10
A charging diode 11 for charging (10pn1-10pn3) and a secondary winding 13 of a charging transformer 14 are provided. In addition, the charging voltage V1 of the charging capacitor 10
V3 is IGBT9 (9sw11-9sw14, 9sw
21-9sw24, 9sw31-9sw34) ON /
It is connected to the power system with either positive or negative polarity by off control. Charging capacitor 10 (10pn1-10pn3)
1 shows in detail the capacitors 10a, 10b, 10c (see FIG. 1) included in the phase voltage compensation circuits 110a, 110b, 110c.

Further, each phase voltage compensation circuit 110a, 110
A high-speed mechanical steady short-circuit switch 8 is provided in parallel at the output ends of b and 110c. A plurality of steady short-circuit switches 8 may be provided in parallel with each voltage compensation sub-circuit PN, and one steady short-circuit switch 8 may be provided for each output terminal of a plurality of voltage compensation sub-circuits PN connected in series. . Also,
The full-bridge inverter may be composed of a self-turn-off type semiconductor switching element other than the IGBT 9. The charging capacitor 10 is charged with different voltages by the charging diode 11 and the secondary winding 13 of the charging transformer 14,
The charging transformer primary winding 12 is connected to the power system. The ratio of the voltages charged in the charging capacitors 10 in each of the voltage compensation sub-circuits PN1, PN2, PN3 is set to a power of 2 ratio. That is, the following relationships are satisfied. V3 = 2 × V2 = 2 × 2 × V1

Each phase voltage compensation circuit 110a, 110b, 1
The steady short-circuit switch 8 and each semiconductor switching element 9 of 10c are connected to the control circuit 30, and the command signals z, g11 to g14, g21g to 24, g3 from the control circuit 30.
1 to g34. The configuration and operation of the control circuit 30 will be described below with reference to FIG. As shown in FIG. 3, system voltages Vx, Vy, Vz and system currents Ix, I observed by monitoring the currents of the respective phases of the power system are shown.
y and Iz are respectively input to the control circuit 30, and in the compensation voltage calculation unit 33, based on the system voltages Vx, Vy, Vz, system currents Ix, Iy, Iz, and the set voltage 31 and set current 32 of each phase. , Compensation voltages Via, Vib, Vic of each phase are calculated so as to compensate the voltage fluctuation of each line voltage. At this time, the set voltage 31 and the set current 32 are the normal system voltage and system current. Compensation voltage Via, V for each phase
The calculation of ib and Vic is performed by the superposed voltage vector V common to all the phases calculated by the superposed voltage calculation unit 34 in the compensation voltage calculation unit 33.
It is made by superimposing 0, and will be described in detail below.

FIG. 4 is a vector diagram showing the voltage and current of each phase of the power system. In FIG. 4A, the voltage vectors Vna, Vnb, Vnc (hereinafter, normal voltage) of each phase at the normal time are shown. Vector), current vectors Ina, Inb, Inc (hereinafter,
A normal current vector) and voltage vectors Vsa, Vsb, Vsc (hereinafter, referred to as a voltage sag voltage vector) of each phase when the voltage changes due to a voltage sag. Note that θsa, θsb, θsc
Represents the phase difference between the voltage sag voltage vector and the normal current vector when the voltage changes. As shown in FIG. 4B, each phase voltage Vna-V for compensating the voltage sag voltage Vsa, Vsb, Vsc of each phase to the normal voltage vectors Vna, Vnb, Vnc.
sa, Vnb-Vsb, Vnc-Vsc (hereinafter, Vta, Vtb, Vtc
4), the superposed voltage vector V0, which is the same output voltage vector, is superposed (added), and as shown in FIG. 4C, each phase compensation voltage vector Via, Vib, which is the compensation voltage of each phase, Calculate Vic. At this time, the superimposed voltage vector V0 is equal to the phase voltage compensation circuits 110a, 110b, 1
It is calculated by the superposed voltage calculation unit 34 so that the output energy at the time of output of the compensation voltage in 10c is approximately equal. The details of this calculation method will be described later. In this way, the superimposed voltage vector V0 is superimposed to calculate the compensation voltages Via, Vib, Vic of each phase so that the line voltage that fluctuates due to the voltage fluctuation of each phase is compensated by the output energy that is approximately equal.

When the compensating voltages Via, Vib, Vic for each phase are calculated, they are amplified by the amplifying circuit 35 as shown in FIG.
After further absolute value conversion, the A / D converter 36 converts each phase into a 3-bit digital signal (D1 to D3). The magnitude of the compensation voltage Via, Vib, Vic of each phase is
When it becomes equal to the charging voltage V1 of the charging capacitor 10pn1, only the least significant bit D1 in the output signal from the A / D converter 36 becomes 1, that is, "001", and similarly, "010". Also in the case of 111 ″, the gain of the amplifier circuit 35 is adjusted in advance so as to be equal to the combination of the charging voltages of the charging capacitor 10. When any of the signals D1 to D3 becomes 1, NOR
Through the circuit 37, the steady short-circuit switch 8 of each phase voltage compensation circuit 110a, 110b, 110c is turned off by the signal z (= 0). A plurality of NOR circuits 37 (three in this case) may be provided for each phase. In that case, the signal z is output to the steady short-circuit switch 8 of the corresponding voltage compensating circuit 110a, 110b, 110c. .

On the other hand, the calculated compensation voltages Via, V for each phase
The ib and Vic are also input to the polarity determination circuit 38 to determine the polarity. 39a, 39b and 39c are driving signals g for the phase voltage compensating circuits 110a, 110b and 110c.
drive signals generators for generating a, gb, gc, and drive signals ga, gb, gc for each phase are inverters of a plurality of voltage compensation sub-circuits PN in each phase voltage compensation circuit 110a, 110b, 110c. 12 kinds of drive signals g11 to g
14, g21 to g24, g31 to g34, respectively. The drive signal generators 39a, 39b, 39c select signals to be active among the digital signals D1 to D3 in accordance with the positive / negative polarities of the compensation voltages Via, Vib, Vic of each phase, and Phase voltage compensation circuit 110
a, 110b, 110c, drive signals ga, gb,
generate gc.

For example, each phase voltage compensation circuit 11 shown in FIG.
0a, 110b, 110c voltage compensation sub-circuit PN1
In the case of the least significant bit D1 = 1, if the polarity of the system voltage is positive, the switching elements 9sw11, 9s
Turn on w14, switching elements 9sw12, 9sw
By turning off 13, the charging voltage V1 is output with a positive polarity. When the polarity of the system voltage is negative, the switching elements 9sw12 and 9sw13 are turned on and the switching elements 9sw11 and 9sw14 are turned off to output the charging voltage V1 with a negative polarity. When D1 = 0, the upper arm side 9sw12, 9sw14 of the switching elements 9sw11 to 9sw14 or the lower arm side 9sw.
One of the 11 and 9 sw13 is turned on and the other is turned off to short-circuit the output end, and the voltage compensation sub-circuit PN
The output from 1 is almost zero. The outputs from the other voltage compensation sub-circuits PN2 and PN3 are similarly performed according to the digital signals D2 and D3 of the corresponding bits, that is, in the respective phase voltage compensation circuits 110a, 110b and 110c.
Compensation voltages are output from the compensation sub-circuits PN1, PN2, PN3 selected by the digital signals D1 to D3. These outputs are combined in the system,
It is possible to generate a voltage output of 8 gradations of "~ 111" in each phase, and the maximum compensation voltage is 7 × V1.

Next, details of the method of calculating the superimposed voltage vector V0 will be described. This superposed voltage vector V0 is
As described above, each phase voltage compensation circuit 110a, 110
It is calculated by the superposed voltage calculation unit 34 so that the output energies of the compensation voltages at b and 110c are approximately equal. As described with reference to FIG. 4, the compensation voltage vectors Via, Vib, Vic for each phase are the sag voltage vectors Vsa,
The following formulas (1), (2) and (3) are obtained by superimposing the superimposed voltage vector V0, which is the same output voltage vector, on each phase voltage for compensating Vsb and Vsc to the normal voltage vectors Vna, Vnb and Vnc. It is expressed as.

[0027]

[Equation 1]

At this time, each phase voltage compensating circuit 110a, 11
The output energies Pia, Pib, Pic of 0b and 110c are

[Equation 2] Becomes In addition, · represents the dot product.

The normal system voltage and system current are in a three-phase equilibrium state, that is, the normal voltage vectors Vna, Vnb, Vnc.
Have different phases by 120 °, and | Vna | = | Vnb | =
| Vnc | = | Vn |, and normal current vectors Ina, Inb, In
c also has a phase difference of 120 °, and | Ina | = | Inb |
= | Inc | = | In |. Therefore, using an arbitrary constant k,

[Equation 3] If you put it

Equations (4), (5) and (6) are

[Equation 4] Becomes

In equations (8), (9) and (10), k = 1
As a result, each phase voltage compensation circuit 110a, 110
The output energies Pia, Pib, Pic of b and 110c can be made substantially equal. That is, equation (7) when k = 1
Is the superposed voltage vector V0 to be obtained.

Next, the operation of the entire voltage fluctuation compensating apparatus 200 will be described below with reference to the flowchart of FIG. The control unit 30 monitors the system voltage fluctuation (t
1) In normal time (when there is no voltage fluctuation), the digital signals D1 to D3 of each phase are all 0, and the steady short-circuit switch 8
Is on, and the system power is supplied to the load (customer) 3 through the steady short-circuit switch 8 having a small resistance. When a system voltage fluctuation occurs, each phase voltage compensation circuit 110a, 1
The superimposed voltage vector V0 is calculated so that the output energies Pia, Pib, and Pic of the 10b and 110c become substantially equal (t
2) Phase voltages Vt for compensating the instantaneous voltage drop vectors Vsa, Vsb, Vsc to normal voltage vectors Vna, Vnb, Vnc
The superimposed voltage vector V0 is superimposed on each of a, Vtb, and Vtc to calculate the phase compensation voltages Via, Vib, and Vic (t
3). The calculated voltage by each phase compensation voltage Via, Vib, Vic is the phase voltage compensation circuit 110a, 110b, 110.
When the voltage that can be output by c, that is, the total sum of the capacitor voltages in each phase Va, Vb, Vc or less (t4), the phase compensation voltage V of each phase is compensated from each phase voltage compensation circuit 110a, 110b, 110c.
By outputting ia, Vib, and Vic, the fluctuation of the line voltage of each phase is compensated (t5). At t4, the phase compensation voltages Via, Vib, Vic are the sums of the capacitor voltages Va, Vb,
If there is a phase exceeding Vc, compensation for voltage fluctuation becomes impossible (t6).

In this embodiment, when the voltage compensation for each phase is performed, the same superimposed voltage vector V0 is superimposed to calculate the phase compensation voltages Via, Vib, Vic, so that the voltage fluctuation of the line voltage is compensated. As a result, the balance of the output energy in each phase can be adjusted by the superimposed voltage vector V0 while maintaining the reliability of the power supply to the load 3. In this case, since the superimposed voltage vector V0 is calculated so that the output energies of the phase voltage compensating circuits 110a, 110b, 110c are substantially equalized, the phase voltage compensating circuits 110a, 110b,
110c individually include capacitors 10a, 10b, 1
The energy of 0c can be used almost equally. Therefore, even if a biased voltage fluctuation occurs in each phase, the energy of the capacitor of the entire voltage fluctuation compensating apparatus 200 can be effectively used, and as a result, the voltage fluctuation compensable time can be extended.

In this embodiment, the superimposed voltage vector V0 is the phase voltage compensation circuits 110a, 110b, 1
The output energy at the time of compensating voltage output in 10c was calculated so as to be approximately equal, but if the power system is in a nearly three-phase balanced state, the magnitudes of the voltages of the compensating voltages Via, Vib, Vic will be approximately equal. As described above, even if the superposed voltage vector V0 is calculated, the output energies are approximately equal. For this reason, in order to simplify the control, the superimposed voltage vector V is set so that the voltages of the phase compensation voltages Via, Vib, and Vic are approximately equal.
It is also possible to calculate and use 0.

Embodiment 2. Next, a second embodiment of the present invention will be described. Also in this embodiment, each phase voltage compensation circuit 110 similar to that used in the first embodiment is used.
When the voltage compensation of each phase is performed using a, 110b, and 110c, the same superimposed voltage vector V0 is superimposed to calculate each phase compensation voltage Via, Vib, Vic. The superposed voltage vector V0 is calculated so as to eliminate the voltage difference in the capacitors 10a, 10b, and 10c individually provided in the compensation circuits 110a, 110b, and 110c. FIG. 6 is a diagram showing a configuration of a control circuit 30a as a control unit included in the voltage fluctuation compensating apparatus according to this embodiment. Each phase voltage compensating circuit 110a, 110b, 110c is instructed by the control circuit 30a. The compensating voltage is output to each phase to compensate the voltage fluctuation.

The structure and operation of the control circuit 30a will be described below. As shown in FIG. 6, system voltages Vx, V
y, Vz, and each phase voltage compensation circuit 110a, 110
b, 110c each capacitor 10pn1-10pn3
Of the monitored voltage Va1 to Va3, Vb1 to Vb3, Vc1 to
Each Vc3 is input to the control circuit 30a. Input capacitor voltage Va1 to Va3, Vb1 to Vb3, Vc1 to Vc3
Is the sum voltage V of the capacitor for each phase in the voltage adder 40.
a, Vb, Vc are calculated. With respect to the capacitor total voltages Va, Vb, and Vc of each phase, the average value calculator 41 calculates the capacitor average voltage Vave of all phases. Comparison operation unit 4
In 2, the difference between the capacitor total voltage Va, Vb, Vc of each phase and the capacitor average voltage Vave of all phases is calculated,
The voltage variation determination unit 44 determines whether the absolute value of the difference between the calculation results is equal to or less than the preset tolerance 43 of the variation.

In the compensation voltage calculation unit 33a, the system voltage V
x, Vy, Vz, the set voltage 31 of each phase, which is a system voltage in a normal state, the capacitor total voltages Va, Vb, Vc of each phase, the capacitor average voltage Vave of all phases, and the determination result of the voltage variation determination unit 44. Based on this, the compensation voltages Via, Vib, Vic of each phase are calculated so as to compensate for the voltage fluctuation of each line voltage. The compensation voltages Via, Vib, and Vic of each phase are calculated by the instantaneous voltage drop vector V of each phase, as described in FIG.
Phase voltage Vta, Vtb, Vtc (Vna-Vs) for compensating sa, Vsb, Vsc with normal voltage vectors Vna, Vnb, Vnc
a, Vnb-Vsb, Vnc-Vsc) are superimposed with the superimposed voltage vector V0, which is the same output voltage vector, to calculate the compensation voltages Via, Vib, Vic of each phase. At this time,
The superimposed voltage vector V0 is calculated by the voltage compensation circuit 110a for each phase,
110b, 110c capacitor total voltage Va,
The compensation voltage calculation unit 3 is provided so as to eliminate variations in Vb and Vc.
It is calculated by the superimposed voltage calculation unit 34a in 3a, and the details of this calculation method will be described later.

When the compensating voltages Via, Vib, Vic for each phase are calculated, they are amplified by the amplifier circuit 35 and further subjected to absolute value conversion. Similarly, for each phase, a 3-bit digital signal (D1 to D
Convert to 3). NOR circuits 37a, 37b, 37c are provided for each phase, and when any one of the signals D1 to D3 becomes 1, the corresponding voltage compensation circuits 110a, 110.
The signal z (= 0) is output to the steady short-circuit switch 8 of b and 110c to turn off the steady short-circuit switch 8. On the other hand, the polarities of the calculated compensation voltages Via, Vib, Vic for each phase are determined by the polarity determination circuit 38, and the drive signal generators 39a, 39b, 39c are used to determine the polarity of each phase as in the first embodiment. Depending on whether the polarities of the compensation voltages Via, Vib, Vic are positive or negative, the signals to be active are selected from the digital signals D1 to D3, and the phase voltage compensation circuits 110a, 110b,
Drive signals ga, gb, and gc are generated for 110c.

Next, details of the method of calculating the superimposed voltage vector V0 will be described. This superposed voltage vector V0 is
As described above, each phase voltage compensation circuit 110a, 110
b, 110c total capacitor voltages Va, Vb, V
It is calculated by the superimposed voltage calculation unit 34a so as to eliminate the variation of c, and is expressed by the following equation (11). V0 = Sa _k Vna + Sb _k Vnb + Sc _k Vnc (11) Note that the initial values of Sa _k , Sb _k , and Sc _k are Sa ₀ = S
b ₀ = Sc ₀ = 0, and then V 0 = 0. When the determination result of the voltage variation determination unit 44 is GO (less than or equal to the allowable value) in all phases, the superimposed voltage vector V0 becomes 0, and the compensation voltages Via, Vib, Vic of each phase are the sag voltage vector Vsa of each phase. , Vsb, Vsc are normal voltage vectors Vna,
Phase voltages Vta, Vtb, Vtc for compensating for Vnb, Vnc
(Vna-Vsa, Vnb-Vsb, Vnc-Vsc).

The determination result of the voltage variation determination unit 44 is NG.
, That is, when there is a phase in which the difference between the capacitor total voltage Va, Vb, Vc of each phase and the capacitor average voltage Vave of all phases exceeds the allowable value, Sa _k in the equation (11), The values of Sb _k and Sc _k are updated as follows with k = 1. The phase in which the difference between the capacitor total voltage Va, Vb, Vc and the capacitor average voltage Vave of all the phases exceeds the allowable value is defined as the i phase (i is one or more of a, b, and c), and other than the i phase If the phase is the j phase, then Si ₁ = Si ₀ + (Vi−Vave) / | Vn | (12) Sj ₁ = Sj ₀ (13) Using the values of Sa ₁ , Sb ₁ , and Sc ₁ obtained by this, , The superposed voltage vector V0 is obtained from the equation (11).
Here, the superimposed voltage vector V0 is shifted for a phase in which the difference between the capacitor total voltage Va, Vb, Vc and the capacitor average voltage Vave of all phases exceeds an allowable value.
If the capacitor total voltage is larger than the capacitor average voltage Vave, it is shifted in the forward direction (+ direction) of the relevant phase, and if it is smaller than the capacitor average voltage Vave, it is shifted in the opposite direction (− direction). , The superposed voltage vector V0 is obtained.

Next, the calculated superposed voltage vector V0 is superposed to calculate the compensation voltages Via, Vib, Vic of each phase, and these compensation voltages Via, Vib, Vic are the sum total voltages Va, Vb of the capacitors of each phase. , Vc or less, output is possible, so the calculated superimposed voltage vector V0 is adopted.

Here, the calculated compensation voltages Via, Vib,
When there is a phase of Vic that exceeds the capacitor total voltage Va, Vb, Vc of each phase, the values of Sa _k , Sb _k , and Sc _k are set to k =
2 is updated as follows. Sa ₂ = Sa ₁ − (Via + V 0 −Va) / | Vn | (14) Sb ₂ = Sb ₁ − (Vib + V 0 −Vb) / | Vn | (15) Sc ₂ = Sc ₁ − (Vic + V 0 −Vc) / | Vn (16) Note that V0, Via, Vib, and Vic in the formula are V0 and V0 obtained from formula (11) using the values of Sa ₁ , Sb ₁ , and Sc ₁ when k = 1. Compensation voltage Via, Vi calculated using
b, the value of Vic. Formulas (14) (15) (16)
Using the values of Sa ₂ , Sb ₂ and Sc ₂ obtained in step (1),
From 1), the superposed voltage vector V0 is obtained again.

In this embodiment, each phase voltage compensation circuit 1
10a, 110b, 110c capacitor total voltage V
The superposed voltage vector V0 is calculated so as to eliminate variations in a, Vb, and Vc, and the superposed voltage vector V0 is superposed to calculate the phase compensation voltages Via, Vib, and Vic. Therefore, the total voltage Va, Vb, V of the capacitors of each phase is compensated while compensating for the voltage fluctuation of the line voltage and maintaining the reliability of the power supply to the load 3.
c can be reduced almost evenly. Therefore, the energy of the capacitor of the entire voltage fluctuation compensating apparatus 200 can be effectively used, and as a result, the voltage fluctuation compensable time can be extended.

Embodiment 3. In the second embodiment, the values of Sa ₁ , Sb ₁ , and Sc ₁ are obtained by the equation (12), but may be obtained by the following equation using the constant β. _{Si 1 = Si 0 + β (} Vi-Vave) / | Vi-Vave | (17) _{Similarly, Sa 2, Sb 2, Sc} 2 of the value equation (14) (1
5) Instead of (16), a constant γ may be used to obtain the value by the following equation. Sa ₂ = Sa ₁ −γSa ₁ / | Sa ₁ | (18) Sb ₂ = Sb ₁ −γSb ₁ / | Sb ₁ | (19) Sc ₂ = Sc ₁ −γSc ₁ / | Sc ₁ | (20) The above formula By using (17) to (20), it is possible to suppress the abrupt change of the phase voltage due to the output of the compensation voltage,
The malfunction of the voltage fluctuation compensation compensator is prevented, and the reliability of voltage compensation is improved.

Fourth Embodiment Further, in the second embodiment, when the capacitor total voltages Va, Vb, Vc of each phase fluctuate, the superimposed voltage vector V0 is calculated so as to eliminate the fluctuation. However, the capacitor total voltage Va of each phase,
If Vb and Vc are voltages equal to or higher than the constant value (α), the superposed voltage vector V0 is set to 0 and the superposition is not performed, and the constant value (α) is set.
When the voltage is lower than that, the superimposed voltage vector V0 may be calculated and used so as to eliminate the variation. Furthermore, each phase voltage Vta, Vtb, Vtc (Vna-Vsa, Vnb-Vsb, Vnc-) for compensating the voltage sag voltage Vsa, Vsb, Vsc of each phase to the normal voltage vectors Vna, Vnb, Vnc.
Vsc) is the total voltage Va, Vb,
When the voltage is equal to or lower than Vc, the superimposed voltage vector V0 is set to 0 and is not superimposed, and at the time when any of the phase voltages Vta, Vtb, and Vtc becomes equal to or higher than the capacitor total voltage Va, Vb, and Vc, the above-described embodiment is performed. Similarly, the superimposed voltage vector V0 may be calculated and used so as to eliminate the variation.

Embodiment 5. Another example of the control circuit 30a used in the second embodiment is shown in FIG. In the second embodiment, the comparison calculation unit 42 causes the capacitor total voltage V of each phase to be V
Differences between a, Vb, and Vc and the average voltage Vave of the capacitors of all phases are calculated, and the voltage variation determination unit 44 determines whether the absolute value of the difference of the calculation results is equal to or less than a preset variation allowable value 43. It was judged. In this embodiment, in the voltage variation determination unit 44a, the allowable value of the variation is calculated as the average voltage V of the capacitors of all phases calculated by the average value calculation unit 41.
A predetermined constant multiple of ave, the voltage obtained by adding the variation allowable value to this average voltage Vave, and the capacitor total voltage V of each phase.
It is determined by a, Vb, and Vc. In this way, since the voltage variation is always allowed at a constant rate, it is possible to prevent a control error due to an inappropriate tolerance value from occurring easily, and the tolerance value can be easily set from the capacitor average voltage Vave. The configuration of the control circuit can be simplified.

In the first to fifth embodiments described above, the voltage fluctuation compensating devices in which the phase voltage compensating circuits 110a, 110b and 110c shown in FIG. 2 are directly connected in series to the respective phases of the power system have been described. Phase voltage compensation circuit 110a, 110
b and 110c are not limited to those using a full-bridge inverter, but are connected in series to each phase of the power system via a transformer, and are devices that compensate for voltage fluctuations by general PWM control. Alternatively, similarly to the above-described first to fifth embodiments, the superimposed voltage vector V0 is calculated, and the respective phase compensation voltages Via, Vib, and Vic calculated by superimposing the superimposed voltage vector V0 are used for each phase. Compensates for variations in line voltage.

Sixth Embodiment Next, a voltage fluctuation compensating apparatus 210 according to a sixth embodiment of the present invention will be described with reference to FIG. As shown in FIG. 8, three-phase alternating current (a-phase,
For each phase (b phase, c phase), each phase voltage compensation circuit 12 including inverter circuits 53a, 53b, 53c
0a, 120b, 120c and a smoothing filter 52a, 52b, 52c for removing harmonics and a large capacity transformer 51.
It is connected to the electric power system via a, 51b, and 51c. Further, a capacitor 54 shared by all phases as an energy storage means and a control circuit 50 common to all phases as a control unit are provided, and each phase voltage compensation circuit 120a, 120b, 120c is commanded by the control circuit 50. By driving the inverter circuits 53a, 53b, and 53c in the inside, a compensation voltage is generated from the voltage accumulated in the shared capacitor 54, and the voltage fluctuation is compensated.

The voltage fluctuation compensating device 21 configured as described above.
The operation of 0 will be described below based on the flowchart of FIG. The control circuit 50 monitors the system voltage fluctuation (u
1) In normal times (when there is no voltage fluctuation), the system power is supplied to the load (customer) 3 as it is. Further, a value obtained by monitoring the voltage Vabc of the shared capacitor 54 is input to the control circuit 50, and when a system voltage fluctuation occurs in u1, the instantaneous voltage drop vectors Vsa, Vsb, Vsc are compensated to normal voltage vectors Vna, Vnb, Vnc. Each phase voltage Vta for
Vtb, Vtc are calculated, and when all the phase voltages Vta, Vtb, Vtc are equal to or lower than the capacitor voltage Vabc (u2), the phase voltage compensating circuits 120a, 120b, 120c output Vta, Vtb, Vtc as the phase compensating voltages. By outputting, the voltage fluctuation of each phase is compensated (u3). In u2, when there is a phase exceeding the capacitor voltage Vabc at each phase voltage Vta, Vtb, Vtc, all the phase compensation voltages Via, Vib, Vic calculated in the next step u5 are all capacitor voltage Vabc.
The superposed voltage vector V0 is calculated as follows (u
4) The superposed voltage vector V0 is superposed on each phase voltage Vta, Vtb, Vtc, and each phase compensation voltage Via, Vi is superimposed.
b and Vic are calculated (u5). Next, each phase compensation voltage Vi
It is confirmed whether a, Vib, Vic are all equal to or lower than the capacitor voltage Vabc (u6), and the phase voltage compensation circuits 120a, 120
By outputting the phase compensation voltages Via, Vib, Vic from b and 120c, the fluctuation of the line voltage of each phase is compensated (u
7). At u6, if there is a phase exceeding the capacitor voltage Vabc at each phase compensation voltage Via, Vib, Vic, it becomes impossible to compensate for the voltage fluctuation (u8).

In the voltage fluctuation compensating apparatus for performing such voltage compensation, for example, when the voltage of only one phase (a phase) out of three phases is greatly reduced, the phase voltage Vta required for compensation is higher than the capacitor voltage Vabc. The voltage compensation operation in the case of a large value will be described with reference to FIG. FIG. 10 is a vector diagram showing the voltage of each phase of the power system.
The normal voltage vectors Vna, Vnb, and Vnc are shown in FIG. Figure 10
As shown in (b), only the sag voltage vector Vsa among the sag voltage vectors Vsa, Vsb, and Vsc generated by the voltage change due to the voltage sag greatly decreases, and the sag voltage vector Vsa.
Vta (V
na−Vsa) becomes larger than the capacitor voltage Vabc. Therefore, as shown in FIG. 10C, the superimposed voltage vector V0 is determined so that the phase compensation voltages Via, Vib, Vic are equal to or lower than the capacitor voltage Vabc, and the calculated phase compensation voltages Via, Vib and Vic are output from the phase voltage compensation circuits 120a, 120b and 120c.

In this embodiment, when the voltage of each phase is compensated, the same superposed voltage vector V0 is superposed to calculate each phase compensation voltage Via, Vib, Vic, thereby changing the system voltage per single phase. Is larger than the voltage of the shared capacitor 54 of the voltage fluctuation compensating device 210, the voltage fluctuation of the line voltage can be compensated to maintain the reliability of the power supply to the load 3 while maintaining the voltage. Variation compensator 210
The energy of the shared capacitor 54 can be effectively used, and as a result, the voltage fluctuation compensable time can be extended.

In the compensation operation shown in FIG. 9, u
3. When the voltage Vta, Vtb, Vtc as the phase compensation voltage is output and the voltage Vta, Vtb, Vtc for each phase exceeds the capacitor voltage Vabc during the compensation operation for compensating the voltage fluctuation of each phase. By detecting this and switching the control in the control circuit 50 to switch to the processing from u4, the voltage fluctuation compensation can be continuously performed.

Further, although the shared capacitor 54 is shared by all phases, it is also possible to provide a plurality of capacitors shared by a plurality of phases.

Embodiment 7. In the above-described first to sixth embodiments, each phase voltage compensation circuit 110a, 110b, 110c.
(120a, 120b, 120c) is provided with means for detecting an abnormality, and each phase voltage compensation circuit 110a in which the abnormality has occurred,
110b, 110c (120a, 120b, 120c)
The superposed voltage vector V0 is determined so that the compensation voltage output by the
a, 110b, 110c (120a, 120b, 120
The phase compensation voltage output by c) is calculated. This allows
Each phase voltage compensation circuit 110a, 110b of either phase,
Even if 110c (120a, 120b, 120c) falls into uncompensable state, it becomes possible to continue compensating the line voltage fluctuation only in the other phases.

Embodiment 8. By the way, in an actual electric power system, as shown in FIG. 11, the electric power system is branched and, for example, an arrangement for compensating the line voltage supplied to the load 3 by connecting the voltage fluctuation compensating devices 200 and 210 in series. In addition to the power lines, a system 61 that is supplied to customers who are not subject to voltage compensation,
There is a system for detecting the bus zero-phase voltage, and the bus zero-phase voltage detector 60 and the distribution line zero-phase current detector 62 are provided to monitor the bus zero-phase voltage and the distribution line zero-phase current to protect the ground fault. May have been. Therefore, when performing the voltage fluctuation compensating operation according to each of the above-described embodiments, it is necessary to pay attention to the following measures. 1. The superposed voltage vector V0 is limited or the voltage fluctuation compensating devices 200 and 210 are operating in a range within the abnormality detection threshold of the bus zero-phase voltage detector 60 or the distribution line zero-phase current detector 62. At times, the operation of the bus zero-phase voltage detector 61 is ignored. 2. A bus zero-phase voltage detector is separately incorporated in the voltage fluctuation compensating devices 200 and 210, and the superimposed voltage vector V0 is controlled so as to always be equal to or less than the operation threshold of the bus zero-phase voltage detector. 3. The time for superimposing the superimposed voltage vector V0 and outputting the compensation voltage is controlled so as to be within the operation threshold time of the abnormality determination timer of the bus zero-phase voltage detector 60. 4. The operation threshold value of the bus zero-phase voltage detector 60 is set in advance as the control circuit 3 in the voltage fluctuation compensating devices 200 and 210.
It is set to 0 or 50 and the superposed voltage vector V0 is controlled so as to be equal to or less than this value. 5. The operation status signal of the bus zero-phase voltage detector 60 prevents the control of superposing the superposed voltage vector V0 while the bus zero-phase voltage detector 60 is operating.

For example, Sa _k , Sb _k , for calculating the superposed voltage vector V0 in the second and third embodiments,
If the upper limit can be set for the value of Sc _k , the above-mentioned measure for monitoring the busbar zero-phase voltage and the distribution line zero-phase current can be easily performed.

[0057]

The voltage fluctuation compensating apparatus according to the first aspect of the present invention is connected in series to each phase of the power system and a control unit for monitoring the voltage fluctuation in the power system and performing power supply control based on the monitoring. And a voltage compensating circuit for converting each phase of the direct current voltage accumulated in the energy accumulating means into an alternating current and outputting the alternating current, and suppressing fluctuation of the voltage supplied to the load. At the same time, each phase voltage for compensating the output voltage of each phase to the normal voltage is superimposed on the same output voltage vector, and the calculated phase compensation voltage is output from the phase voltage compensation circuit to output the power. In order to suppress the voltage fluctuation of the line voltage in the system, the balance of the output energy is compensated for by the voltage fluctuation of the line voltage while maintaining the reliability of the power supply to the load. That adjust it becomes possible.

According to a second aspect of the present invention, there is provided the voltage fluctuation compensating apparatus according to the first aspect, wherein each phase voltage compensating circuit outputs each phase compensating voltage from an independent energy accumulating means, and compensating each phase. Since the output voltage vector to be superimposed at the time of voltage calculation is determined so that the output energy from each phase voltage compensating circuit is approximately equal, the energy of the energy accumulating means of each phase can be used almost uniformly, and Energy can be effectively used, and the voltage fluctuation compensable time can be extended.

According to a third aspect of the present invention, there is provided the voltage fluctuation compensating apparatus according to the first aspect, wherein each phase voltage compensating circuit outputs each phase compensating voltage from an independent energy accumulating means to compensate each phase. Since the output voltage vectors to be superimposed are determined so that the magnitudes of the voltages are approximately equal, the energy of the energy storage means of each phase can be used almost equally, and the entire energy can be easily and effectively used. It is possible to extend the voltage fluctuation compensable time.

According to a fourth aspect of the present invention, there is provided the voltage fluctuation compensating apparatus according to the first aspect, wherein each phase voltage compensating circuit outputs each phase compensating voltage from an independent energy accumulating means, and each energy accumulating circuit. In order to eliminate the difference between the detection voltages of the energy storage means, the output voltage vector to be superimposed at the time of calculating the phase compensation voltage is determined by forming the means by a capacitor and including the voltage detection means of the energy storage means. The capacitor voltage of each phase can be reduced almost uniformly, the energy of the entire capacitor can be effectively used, and the voltage fluctuation compensable time can be extended.

According to a fifth aspect of the present invention, in the voltage fluctuation compensating apparatus according to the fourth aspect, the average value of the detected voltage of each energy accumulating means is calculated, and based on the average value, the energy accumulating means of each energy accumulating means is calculated. The allowable range of the detection voltage is set, and the output voltage vector that is superimposed when calculating the compensation voltage for each phase is determined so as to deflect to a phase that exceeds the allowable range above. Therefore, it is possible to reliably determine so as to eliminate the difference between the detection voltages of the energy storage means.

According to a sixth aspect of the present invention, in the voltage fluctuation compensating device according to the first aspect, the energy storage means is shared by the voltage compensation circuits of a plurality of phases. The balance of each phase of output energy to be output is adjusted by the output voltage vector to be superimposed, and the voltage fluctuation compensable time is extended.

According to a seventh aspect of the present invention, there is provided a voltage fluctuation compensating apparatus according to the first or sixth aspect, further comprising means for detecting an abnormality in each phase voltage compensating circuit, and the output voltage to be superposed during each phase compensating voltage calculation. Since the vector is determined so that the compensation voltage output from the voltage compensation circuit abnormally detected by the above means is set to 0, even if the above occurs in each phase voltage compensation circuit of any phase, the line voltage fluctuation It is possible to continue the compensation of.

According to the eighth aspect of the present invention, in the voltage fluctuation compensating apparatus according to the first aspect, each phase voltage compensating circuit outputs each phase compensating voltage from the common energy accumulating means, and the energy accumulating means is operated. When the voltage detection means of the energy storage means is formed by a capacitor and each phase voltage for compensating the output voltage of each phase to a normal voltage when the voltage of the power system fluctuates is less than or equal to the detection voltage of the energy storage means. ,
When the output voltage vector to be superposed is 0 vector and there is a phase exceeding the detection voltage, the output voltage vector to be superposed is determined so that each phase compensation voltage becomes equal to or lower than the detection voltage. Even when the fluctuation is larger than the shared capacitor voltage, the line voltage fluctuation can be continuously compensated, the capacitor energy can be effectively used, and the voltage fluctuation compensable time can be extended.

According to a ninth aspect of the present invention, in the voltage fluctuation compensating apparatus according to any one of the second to fifth aspects, each phase voltage compensating circuit connected in series to each phase of the power system is different. A plurality of voltage compensating sub-circuits, each of which has an energy accumulating portion for accumulating a voltage and constitutes an energy accumulating means and which converts a direct current voltage accumulated in the energy accumulating portion into an alternating current and outputs the alternating current; the absolute values of different voltage respectively stored in the energy storage unit in the plurality of voltage compensation subcircuit, smallest voltage approximate 2 ^K times (K = 0, 1, 2 with respect to (the absolute value), ... ), A high-speed mechanical short-circuit switch for bypassing the voltage compensation sub-circuit is provided for each output end of one or a plurality of the voltage compensation sub-circuits connected in series. A desired combination is selected from the plurality of voltage compensation sub-circuits for each phase, and the sum of the output voltages is used to suppress the voltage fluctuation of the line voltage in the power system. Effective and highly accurate voltage compensation that enables effective use of energy makes it possible to compensate for line voltage fluctuations.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a voltage fluctuation compensating device according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of each phase voltage compensation circuit according to the first embodiment of the present invention.

FIG. 3 is a configuration diagram of a control circuit of the voltage fluctuation compensating device according to the first embodiment of the present invention.

FIG. 4 is a vector diagram of voltage and current for explaining the operation of the voltage fluctuation compensating apparatus according to the first embodiment of the present invention.

FIG. 5 is a flowchart showing an operation of the voltage fluctuation compensating apparatus according to the first embodiment of the present invention.

FIG. 6 is a configuration diagram of a control circuit of a voltage fluctuation compensating device according to a second embodiment of the present invention.

FIG. 7 is a configuration diagram of a control circuit of a voltage fluctuation compensating device according to a fifth embodiment of the present invention.

FIG. 8 is a schematic configuration diagram of a voltage fluctuation compensating device according to a sixth embodiment of the present invention.

FIG. 9 is a flowchart showing an operation of the voltage fluctuation compensating device according to the sixth embodiment of the present invention.

FIG. 10 is a voltage vector diagram for explaining the operation of the voltage fluctuation compensating device according to the sixth embodiment of the present invention.

FIG. 11 is a diagram for explaining the operation of the voltage fluctuation compensating device according to the eighth embodiment of the present invention.

FIG. 12 is a schematic configuration diagram of a conventional voltage fluctuation compensating device.

FIG. 13 is a diagram for explaining the operation of the conventional voltage fluctuation compensating device.

FIG. 14 is a block diagram of a conventional voltage fluctuation compensating apparatus according to another example.

15 is a configuration diagram of a control circuit of the voltage fluctuation compensating apparatus in FIG.

FIG. 16 is a diagram showing three-phase AC voltage compensation by a conventional voltage fluctuation compensating apparatus.

FIG. 17 is a flowchart showing an operation of three-phase AC voltage compensation by the conventional voltage fluctuation compensating apparatus.

[Explanation of symbols]

3 load, 8 short-circuit switch, 10, 10a, 10b,
10c capacitor as energy storage means 30,
30a Control circuit as control unit, 31 Set voltage as normal voltage, 33, 33a Compensation voltage calculation unit, 34,
34a Superimposed voltage calculator, 39a, 39b, 39c Phase voltage compensation circuit drive controller, 41 Average value calculator, 4
4, 44a Voltage variation determination unit, 50 Control circuit as control unit, 54 Common capacitor as common energy storage means, 110a to 110c, 120a to 120
c Each phase voltage compensation circuit, 200, 210 voltage fluctuation compensator, PN1, PN2, PN3 voltage compensation sub-circuit, V
0 Superposed voltage vector, Via, Vib, Vic phase compensation voltage vector, Va1 to Va3, Vb1 to Vb3, Vc1 to Vc3 capacitor detection voltage, Vx, Vy, Vz system voltage.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Akihiko Iwata             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Akihiro Suzuki             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Toshiyuki Kikunaga             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Mitsugu Takahashi             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Hiroyuki Sasao             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Kenichi Koyama             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Nobuhiko Hatano             3-3-22 Nakanoshima, Kita-ku, Osaka City, Osaka Prefecture             Kansai Electric Power Co., Inc. (72) Inventor Kazuo Yamamoto             3-3-22 Nakanoshima, Kita-ku, Osaka City, Osaka Prefecture             Kansai Electric Power Co., Inc. F-term (reference) 5G066 DA07                 5H750 AA01 AA02 BA05 CC02 CC06                       CC12 CC14 DD14 DD18 DD26                       FF05 GG03 GG06

Claims (9)

[Claims] 1. A control unit for monitoring voltage fluctuations in a power system and for controlling power supply based on the same, and connected in series to each phase of the power system to convert a DC voltage stored in an energy storage means into an AC voltage. In the voltage fluctuation compensating device that suppresses the fluctuation of the voltage supplied to the load by including each phase voltage compensating circuit that outputs the voltage for compensating the output voltage of each phase to the normal voltage when the voltage of the power system changes. It is characterized in that each phase compensation voltage calculated by superimposing the same output voltage vector on each phase voltage is output from each phase voltage compensation circuit to suppress voltage fluctuation of line voltage in the power system. Voltage fluctuation compensator. 2. Each phase voltage compensating circuit outputs each phase compensating voltage from an independent energy accumulating means, and outputs an output voltage vector to be superimposed at the time of calculating each phase compensating voltage from each phase voltage compensating circuit. 2. The voltage fluctuation compensating device according to claim 1, wherein the energy is determined so as to be approximately equal. 3. Each phase voltage compensation circuit outputs each phase compensation voltage from an independent energy storage means, and determines the output voltage vector to be superimposed so that the magnitudes of the phase compensation voltages are approximately equal. The voltage fluctuation compensating apparatus according to claim 1, wherein: 4. Each phase voltage compensating circuit outputs each phase compensating voltage from an independent energy accumulating means, each energy accumulating means is constituted by a capacitor, and the voltage detecting means of each energy accumulating means is provided. 2. The voltage fluctuation compensating apparatus according to claim 1, wherein the output voltage vector to be superposed at the time of calculating the phase compensation voltage is determined so as to eliminate the difference between the detection voltages of the energy storage means. 5. An output voltage which is calculated when an average value of the detection voltage of each energy accumulating means is calculated, an allowable range of the detection voltage of each energy accumulating means is set based on the average value, and which is superimposed at the time of calculating each phase compensation voltage. The voltage fluctuation compensating apparatus according to claim 4, wherein the vector is determined so as to be deflected to a phase exceeding the allowable range. 6. The voltage fluctuation compensating apparatus according to claim 1, wherein the energy storage means is shared by a plurality of phase voltage compensating circuits. 7. A means for detecting abnormality of each phase voltage compensating circuit is provided, and an output voltage vector to be superposed at the time of calculating each phase compensating voltage is set to 0 as a compensation voltage output from the voltage compensating circuit for which abnormality is detected by said means. 7. The voltage fluctuation compensating device according to claim 1, wherein the voltage fluctuation compensating device is determined as follows. 8. Each phase voltage compensating circuit outputs each phase compensating voltage from a common energy accumulating means, the energy accumulating means is composed of a capacitor, and is provided with a voltage detecting means of the energy accumulating means. When the voltage of each phase for compensating the output voltage of each phase to the normal voltage at the time of voltage fluctuation is equal to or lower than the detection voltage of the energy storage means, the output voltage vector to be superposed is set as 0 vector, and there is a phase exceeding the detection voltage. In this case, the voltage fluctuation compensator according to claim 1, wherein the output voltage vector to be superimposed is determined so that the phase compensation voltage becomes equal to or lower than the detection voltage. 9. A voltage compensating circuit for each phase, which is connected in series to each phase of the power system, is provided with an energy accumulating section that constitutes energy accumulating means by accumulating different voltages, and is accumulated in the energy accumulating section. It is configured by connecting a plurality of voltage compensation sub-circuits that convert DC voltage to AC and output them in series, and the absolute values of different voltages that are respectively stored in the energy storage units in the plurality of voltage compensation sub-circuits, Approximately 2 ^K times (K = 0,
1, 2, ...), and a high-speed mechanical short-circuit switch for bypassing the voltage compensation sub-circuit is provided for each output end of one or a plurality of the voltage compensation sub-circuits connected in series, When outputting each phase compensation voltage, a desired combination is selected from the plurality of voltage compensation sub-circuits in each phase, and the sum of the output voltages suppresses the voltage fluctuation of the line voltage in the power system. Claim 2
5. The voltage fluctuation compensating device according to any one of 5 above.