CN109756116B - Boost chip and short-circuit protection circuit thereof - Google Patents
Boost chip and short-circuit protection circuit thereof Download PDFInfo
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- CN109756116B CN109756116B CN201910091785.0A CN201910091785A CN109756116B CN 109756116 B CN109756116 B CN 109756116B CN 201910091785 A CN201910091785 A CN 201910091785A CN 109756116 B CN109756116 B CN 109756116B
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- 239000000758 substrate Substances 0.000 claims description 21
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- 230000000670 limiting effect Effects 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 15
- 230000009471 action Effects 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- HEZMWWAKWCSUCB-PHDIDXHHSA-N (3R,4R)-3,4-dihydroxycyclohexa-1,5-diene-1-carboxylic acid Chemical compound O[C@@H]1C=CC(C(O)=O)=C[C@H]1O HEZMWWAKWCSUCB-PHDIDXHHSA-N 0.000 description 1
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 1
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- 229910001416 lithium ion Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
Abstract
The invention discloses a boost chip and a short-circuit protection circuit thereof, wherein when the output end of the boost chip has a short-circuit fault, the short-circuit protection circuit can enable a first switching tube to be turned off, so that the grid potential of a second switching tube gradually transits to a target control potential from the grid opening potential of the second switching tube, the current in the second switching tube gradually decreases, and the second electrode of the second switching tube is grounded through the output end, thus, the short-circuit current can be released through a loop formed by the second switching tube, thereby avoiding the problem of voltage overshoot of a first node caused by completely disconnecting the first switching tube and the second switching tube when the short-circuit fault occurs, and avoiding the problem of breakdown of the first switching tube due to the inductor current when the boost chip has the short-circuit fault.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a boost chip and a short-circuit protection circuit thereof.
Background
The popularity of portable electronic products has prompted the rapid development of chips powered by lithium ion batteries, with DCDC-type chips being used in a variety of contexts. The boost chip is one of the DCDC chips, and realizes that the output direct current level is higher than the input direct current level. As a OTG (On the going) circuit, a boost-type chip is typically used, and the market and its mass are. Because the portable electronic products support driving the external equipment, for example, the mobile phone can drive the USB electric fan, can light the USB lamp, and can charge another mobile phone, and the like, the portable electronic products are the manifestations of OTG application. The boost chip is also applied to the inside of the electronic device, such as providing power for modules such as power amplifiers.
The output of the boost chip is prone to short circuit faults, especially when used as an OTG circuit. Since the output of the boost chip is the USB port we typically see, there is a high probability that the output VOUT will be shorted out during operation.
How to protect a chip from being damaged when a short circuit fault occurs is an increasingly important topic, and the prior art is that when the chip detects that VOUT has a short circuit fault, a switching tube inside the chip is directly closed, but the burning of the switching tube inside the chip is caused.
Disclosure of Invention
Therefore, the technical scheme of the invention provides the boost chip and the short-circuit protection circuit thereof, and the problem that the internal switching tube is burnt out when the boost chip has short-circuit fault is avoided.
In order to achieve the above object, the present invention provides the following technical solutions:
a short-circuit protection circuit for a boost chip, the short-circuit protection circuit comprising:
the switching device comprises a first switching tube, a second switching tube and a current source module;
the first electrode of the first switch tube is connected with a first node, the second electrode of the first switch tube is grounded, the first node is connected with one end of an inductor, and the grid electrode of the first switch tube is used for inputting a first control signal; the other end of the inductor is used for inputting power supply voltage;
a first electrode of the second switching tube is connected with the first node, and a second electrode of the second switching tube is connected with the output end of the boost chip;
when the output end of the boost chip is in short circuit fault, the output end is grounded, the first control signal is used for controlling the first switching tube to be turned off, and the current source module is used for controlling the grid potential of the second switching tube to gradually transit from the grid starting potential to the target control potential, so that the current in the second switching tube is gradually reduced.
Optionally, in the foregoing short-circuit protection circuit, the current source module includes: a third switching tube and a preset current source;
the grid electrode of the third switching tube is connected with the first electrode of the third switching tube, the first electrode of the third switching tube is grounded through the preset current source, and the second electrode of the third switching tube is used for inputting the power supply voltage;
when the output end of the boost chip has a short circuit fault, the grid electrode of the third switching tube is conducted with the grid electrode of the second switching tube, so that the grid electrode potential of the second switching tube is transited from the grid electrode starting potential to the target control potential through the preset current source.
Optionally, in the above short-circuit protection circuit, a gate of the second switching tube is connected with a gate of the third switching tube through a switching element;
the switching element is provided with a first switching state and a second switching state, when the output end of the boost chip is not in short circuit fault, the switching element is in the first switching state, the grid electrode of the second switching tube is used for inputting a second control signal, when the output end of the boost chip is in short circuit fault, the switching element is in the second switching state, and the grid electrode of the second switching tube is communicated with the grid electrode of the third switching tube.
Optionally, in the above short-circuit protection circuit, the third switching tube and the second switching tube are PMOS, and the second switching tube has a larger gate-to-ground capacitance.
Optionally, in the above short-circuit protection circuit, the first switching tube is an NMOS, and when a short-circuit fault occurs at an output end of the boost chip, the first control signal is a low potential, so as to control the first switching tube to be turned off.
Optionally, in the above short-circuit protection circuit, the target control potential is located between a gate-on potential and the gate-off potential of the second switching tube.
Optionally, in the above short-circuit protection circuit, when a short-circuit fault occurs at the output end of the boost chip, the substrate of the second switching tube is conducted with the first electrode thereof.
Optionally, in the above short-circuit protection circuit, the substrate of the second switching tube is connected with a switching component, the switching component has a first switching state and a second switching state, when the boost chip is in a short-circuit state, the switching component is in the first switching state, the substrate of the second switching tube is conducted with the first electrode thereof, when the boost chip is in a non-short-circuit state, the switching component is in the second switching state, and the substrate of the second switching tube is conducted with the first electrode thereof.
The invention also provides a boost chip, which is characterized in that the boost chip comprises: a short circuit protection circuit as claimed in any one of the preceding claims.
Optionally, in the above boost chip, the boost chip includes a detection circuit and a BST loop control circuit, where the detection circuit is configured to compare an output voltage of an output end of the boost chip with a set reference voltage, and output a comparison result, and the BST loop control circuit is configured to provide a control signal for a gate of a first switching tube and a gate of a second switching tube of the short-circuit protection circuit based on the comparison result.
As can be seen from the above description, the boost chip and the short-circuit protection circuit thereof provided by the technical scheme of the invention have at least the following beneficial effects:
when the output end of the boost chip has short-circuit fault, the first switching tube can be turned off through the short-circuit protection circuit, so that the grid potential of the second switching tube gradually transits from the grid opening potential to the target control potential, the current in the second switching tube gradually decreases, and the second electrode of the second switching tube is grounded through the output end, thus, the short-circuit current can be released through a loop formed by the second switching tube, the problem of voltage overshoot of the first node caused by completely disconnecting the first switching tube and the second switching tube when the short-circuit fault occurs is avoided, and the problem of burning out of the internal switching tube when the boost chip has short-circuit fault is avoided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a circuit diagram of a conventional boost chip;
FIG. 2 is a timing diagram illustrating the internal control of the boost chip of FIG. 1;
FIG. 3 is an enlarged partial timing diagram of the output of the boost chip of FIG. 1 when a short circuit fault occurs;
FIG. 4 is a schematic diagram of a control principle when a short circuit fault occurs at an output end of the boost chip shown in FIG. 1;
fig. 5 is a schematic structural diagram of a short-circuit protection circuit of a boost chip according to an embodiment of the present invention;
FIG. 6 is an equivalent circuit of the short-circuit protection circuit of FIG. 5 when a short-circuit fault occurs;
FIG. 7 is a timing diagram of the short-circuit protection circuit of FIG. 5 when a short-circuit fault occurs;
fig. 8 is a schematic structural diagram of a boost chip according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a circuit diagram of a conventional booster chip, which includes at least: the first port, the second port, the enabling terminal, the grounding terminal and the output terminal. The positive pole of power E passes through inductance L and connects first port, and power E's positive pole is directly connected with the second port, and power E's positive pole passes through a resistance R and is connected with enabling end. The first port corresponds to the voltage signal SW, the second port corresponds to the power voltage VIN of the power source E, the enable terminal corresponds to the enable signal EN, the ground is grounded GND, and the output terminal corresponds to the output voltage VOUT.
The chip comprises at least: a BST (BOOST) loop control circuit 11, a first switching tube M1, a second switching tube M2, and a detection circuit 12. The detection circuit 12 is used for collecting the output voltage VOUT at the output terminal and comparing the output voltage VOUT with a reference voltage. The reference voltage may be set as desired, and is generally smaller than the power voltage VIN, for example, may be 0.9 x VIN. The reference voltage may be set to a value of 0.9vin according to the requirement. Wherein the output terminal is grounded through a capacitor Cout.
The detection circuit 12 is a comparator, and has a negative phase input terminal, a positive phase input terminal, and a comparison output terminal, and the collected output voltage VOUT is used as a feedback signal en_det to be input to the negative phase input terminal, and a reference voltage is input to the positive phase input terminal. When the feedback signal en_det is smaller than 0.9×vin, the output signal vout_short, and the BST loop control circuit 11 determines that a short circuit fault occurs at the output end of the chip based on the signal vout_short, so as to control the first switching tube M1 and the second switching tube M2 to be turned off, and control one switch through the switching signal sel_vout to disconnect the substrate of the second switching tube M2 from the second electrode thereof, and control the other switch through the switching signal sel_voutb to connect the substrate of the second switching tube M2 to the first electrode thereof.
The timing diagrams of the boost chip shown in fig. 1 are shown in fig. 2 and 3, fig. 2 is an internal control timing diagram of the boost chip shown in fig. 1, and fig. 3 is a partial timing amplification diagram when a short-circuit fault occurs at the output terminal of the boost chip shown in fig. 1. When a short-circuit fault occurs, an equivalent circuit diagram is shown in fig. 4, and fig. 4 is a schematic diagram of a control principle when the output end of the boost chip shown in fig. 1 has a short-circuit fault.
The first switching tube M1 is an NMOS, the gate input voltage signal thereof is ngate, the second switching tube M2 is a PMOS, and the gate input voltage signal thereof is pgate.
As can be seen from fig. 2 to fig. 4, when a short circuit fault occurs, as shown in the dashed line position in fig. 3, the short circuit fault occurs at a moment, the output voltage VOUT is smaller than the reference voltage (e.g. the reference voltage is 0.9×vin), the signal vout_short is continuously high, which indicates that the short circuit fault occurs, the switching signal sel_vout is continuously low, so that the substrate of the second switching tube M2 is disconnected from the first electrode thereof, the voltage signal ngate is continuously low, and the voltage signal pgate is continuously high, so that both the first switching tube M1 and the second switching tube M2 are turned off.
When a short circuit fault occurs, the substrate of the second switching tube M2 is disconnected from the first electrode thereof, and the substrate of the second switching tube M2 is conducted with the first electrode thereof through the switching signal sel_voutb, so that the body diode of the second switching tube M2 points to the first port, and the inductor current IL corresponding to the first port is prevented from continuously increasing to an uncontrollable extent.
Although, when a short circuit fault occurs, the first switching tube M1 and the second switching tube M2 are turned off at the same time, so that the inductor current IL cannot continuously increase, the damage probability of the boost chip is reduced, but the boost chip is possibly damaged, because after the detection circuit 12 detects that the output port has a short circuit fault, the body diode of the second switching tube M2 points to the first port, the first switching tube M1 and the second switching tube M2 are both turned off, so that the inductor L is instantly disconnected, the inductor has the characteristic of current incapability of abrupt change, no current leakage path exists, the inductor current IL can impact the first port, the potential of the first node SW can be high, the potential of the voltage signal SW of the first port is high, the first switching tube M1 can easily reach the breakdown voltage, and all currents flow away from the first switching tube M1, so that the first switching tube M1 bears great power and is easily burned out.
From the above description, it is clear that when a short-circuit fault occurs, if the current loop is completely cut off, the switching tube will burn out.
Based on this, the technical scheme of the invention provides a short-circuit protection circuit of a boost chip, when a short-circuit fault occurs, a first switching tube M1 is turned off, a second switching tube M2 is turned on, and the grid potential of the second switching tube M2 is gradually transited from the grid-on potential to the target control potential of a preset current source, so that the current flowing through the second switching tube M2 is gradually reduced, and therefore, no matter the short-circuit fault occurs in the conduction period of the first switching tube M1 or in the conduction period of the second switching tube, the overshoot problem of a voltage signal SW of a first port can be avoided, and the problem that the boost chip burns out when the output end has the short-circuit fault is fundamentally solved.
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a short-circuit protection circuit of a boost chip according to an embodiment of the present invention, where the short-circuit protection circuit includes: a first switching tube M1, a second switching tube M2 and a current source module 21. The first electrode of the first switch tube M1 is connected with a first node A, the second electrode of the first switch tube M is grounded, the first node A is connected with one end of an inductor L, and the grid electrode of the first switch tube M is used for inputting a first control signal V1; the other end of the inductor L is used for inputting the power supply voltage VIN. The first electrode of the second switching tube M2 is connected with the first node A, and the second electrode of the second switching tube M2 is connected with the output end of the boost chip. The output terminal corresponds to the output voltage VOUT. The first node a corresponds to the voltage signal SW.
The output end of the boosting chip is grounded through a capacitor Cout. As shown in fig. 5, the inductor L is connected to the power source E to input the power source voltage VIN. The first switching tube M1 and the second switching tube M2 are power switching tubes. The second switch tube M2 has a larger gate-to-ground capacitance, and can gradually decrease the conduction degree and gradually increase the current limiting effect when the gate-on potential gradually transits to the target control potential, so that the flowing current can gradually decrease. When a short circuit fault occurs, the grid potential of the second switch tube M2 is in a continuous gradual conversion process, the current is continuously gradually reduced, and the short circuit fault corresponds to the grounding with the output end of the chip, so that the purpose of releasing the short circuit current can be realized. And compared with the direct turn-off of all the switching tubes, the scheme has a circuit for releasing the short-circuit current, so that the inductive current is released according to the set path, and the situation that the inductive current IL goes to an undesired place, such as the first node SW is rushed up, and the first switching tube M1 breaks down is avoided.
When the output end of the boost chip has a short circuit fault, the output end is grounded, the first control signal V1 is used for controlling the first switching tube M1 to be turned off, and the current source module 21 is used for controlling the gate potential of the second switching tube M2 to gradually transition from the gate-on potential to the target control potential, so that the current in the second switching tube M2 gradually decreases. Each switching tube is MOS, and the control of the switching state of each switching tube can be realized by controlling the grid potential of the switching tube.
As shown in fig. 5, the current source module 21 includes: a third switching tube M3 and a preset current source I0; the gate of the third switching tube M3 is connected to the first electrode thereof, the first electrode thereof is grounded through the preset current source I0, and the second electrode thereof is used for inputting the power voltage VIN.
When a short circuit fault occurs at the output end of the boost chip, the gate of the third switching tube M3 is turned on with the gate of the second switching tube M2, so that the gate potential of the second switching tube M2 is transited from the gate-on potential to the target control potential by the preset current source I0.
Optionally, the gate of the second switching tube M2 is connected with the gate of the third switching tube M3 through a switching element K1; the switching element K1 has a first switching state and a second switching state, when the output end of the boost chip has no short-circuit fault, the switching element is in the first switching state, the gate of the second switching tube is used for inputting a second control signal V2, when the output end of the boost chip has the short-circuit fault, the switching element K1 is in the second switching state, and the gate of the second switching tube M2 is conducted with the gate of the third switching tube M3.
In the embodiment shown in fig. 5, the third switch tube M3 and the second switch tube M3 are PMOS, and the second switch tube M3 has a larger gate-to-ground capacitance. The first switch tube M1 is NMOS. When the first switching tube is NMOS, and a short circuit fault occurs at the output end of the boost chip, the first control signal V1 is low potential so as to control the first switching tube M1 to be turned off.
In the embodiment of the present invention, the types of the switching tubes are not limited to the mode shown in fig. 5, and each switching tube may be set to be NMOS or PMOS according to the requirement, when the corresponding gate voltage signal controls the short-circuit fault, the first switching tube M1 is turned off, and the second switching tube M2 gradually transits from the gate turn-on potential to the target control potential, so that the flowing current is gradually reduced, thereby achieving the purpose of preventing the first switching tube M1 from burning out.
Optionally, when the output end of the boost chip has a short circuit fault, the substrate of the second switch tube M2 is conducted with the first electrode thereof. The substrate of the second switching tube M2 may be provided with a switching assembly, where the switching assembly has a first switching state and a second switching state, when the boost chip is in a short-circuit state, the switching assembly is in the first switching state, the substrate of the second switching tube M2 is conducted with the first electrode thereof, and when the boost chip is in a non-short-circuit state, the switching assembly is in the second switching state, and the substrate of the second switching tube M2 is conducted with the second electrode thereof. For example, the switching assembly may include a switching element K2 and a switching element K3, where the switching element K2 is connected between the substrate of the second switching tube M2 and the first electrode thereof, the switching element K3 is connected between the substrate of the second switching tube M2 and the second electrode thereof, when the switching assembly is in the first switching state, the switching element K2 is turned on, the switching element K3 is turned off, and when the switching assembly is in the second switching state, the switching element K2 is turned off, and the switching element K3 is turned on.
Taking the first switching tube as an NMOS, the second switching tube M2 and the third switching tube M3 as examples, when the output end of the boost chip has a short-circuit fault, the equivalent circuit of the protection circuit shown in fig. 5 is shown in fig. 6, and the timing chart when the short-circuit fault occurs is shown in fig. 7.
Referring to fig. 6 and 7, fig. 6 is an equivalent circuit of the short-circuit protection circuit shown in fig. 5 when a short-circuit fault occurs, and fig. 7 is a timing chart of the short-circuit protection circuit shown in fig. 5 when a short-circuit fault occurs. When a short circuit fault occurs: the grid electrode of the first switching tube M1 inputs low potential, and the first switching tube M1 is turned off and is equivalent to being connected with the second electrode of the first switching tube M, and the first switching tube M and the second electrode are grounded; the substrate of the second switching tube M2 is connected with the first electrode, the grid electrode of the second switching tube M2 is connected with the grid electrode of the third switching tube M3, the grid potential of the second switching tube M2 is gradually transited to the target control potential from the grid electrode opening potential, the output end of the boosting chip is directly grounded, and the positive electrode of the power supply E sequentially passes through the first node A and the second switching tube M2 and forms a loop with the forming circuit to release current.
The position of the output terminal where the short-circuit fault occurs is shown by a dotted line in fig. 7, and the output voltage VOUT is smaller than the reference voltage, which may be 0.9VIN as described above. The detection circuit output signal vout_short continues to be high, indicating that a short circuit fault occurs, the voltage signal ngate continues to be low, the first switching tube M1 is turned off, the gate voltage signal pgate of the second switching tube M2 transitions to 0 potential no matter whether it is at the gate-on potential (set low potential, e.g., may be 0 potential) or at the gate-off potential (set high potential) at the time of occurrence of the short circuit, and gradually rises from 0 potential to the target control potential under the control of the current source module 21. The target control potential is located between the gate-on potential and the gate-off potential of the second switching tube M2, and in the transition process, the second switching tube is in a conducting state, the conducting degree is gradually reduced, and the flowing current is gradually reduced.
Optionally, in the embodiment of the present invention, the boost chip is a low-voltage boost chip, and the substrate potential of the second switch tube M2 may be switched. Compared with the traditional short-circuit protection scheme, the technical scheme of the invention can be realized by only changing the closing time sequence of the switching tube and controlling the grid potential of the second switching tube M2 through the current source module 21, and the circuit is easy to realize, low in cost and convenient to popularize and use.
Based on the foregoing embodiment, another embodiment of the present invention further provides a boost chip, where the boost chip is shown in fig. 8, and fig. 8 is a schematic structural diagram of the boost chip provided in the embodiment of the present invention, where the boost chip includes the short-circuit protection circuit described in the foregoing embodiment. The boost chip comprises a detection circuit 12 and a BST loop control circuit 11, the detection circuit 12 is configured to compare an output voltage of an output end of the boost chip with a set reference voltage, and output a comparison result, and the BST loop control circuit 11 is configured to provide a control signal for a gate of the first switching tube M1 and a gate of the second switching tube M2 of the short-circuit protection circuit based on the comparison result.
The mode shown in fig. 8 is to add a switching element K1 and a current source module 21 to the mode shown in fig. 1 to construct the short-circuit protection circuit inside the chip. The BST loop control circuit 11 provides a first control signal V1 for the gate of the first switching tube M1 and a second control signal V2 for the gate of the second switching tube M2.
The BST loop control circuit 11 can be used as a BST voltage generation module for generating the periodically varying voltage signal SW when no short-circuit fault occurs. When a short-circuit fault occurs, the first switching tube M1 is continuously controlled to be turned off through the first control signal V1 within the fault duration time, and after a grid electrode on potential is input to the second switching tube M2, the switching element K2 is switched to a second switching state. The control of the potential of the switch Guan Shanji and the control of the switching state of the switching element can be achieved by controlling the internal control timing of the BST loop control circuit 11.
The boost chip of the embodiment of the invention adopts the short-circuit protection circuit of the embodiment, can be realized only by changing the closing time sequence of the switching tube and controlling the grid potential of the second switching tube M2 through a current source module 21, and has the advantages of easy realization, low cost and convenient popularization and use.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. The boost chip disclosed in the embodiment corresponds to the short-circuit protection circuit disclosed in the embodiment, so that the description is simpler, and the relevant parts are described with reference to the corresponding parts of the short-circuit protection circuit.
It is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in an article or apparatus that comprises such element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. A short-circuit protection circuit for a boost chip, the short-circuit protection circuit comprising:
the switching device comprises a first switching tube, a second switching tube and a current source module;
the first electrode of the first switch tube is connected with a first node, the second electrode of the first switch tube is grounded, the first node is connected with one end of an inductor, and the grid electrode of the first switch tube is used for inputting a first control signal; the other end of the inductor is used for inputting power supply voltage;
a first electrode of the second switching tube is connected with the first node, and a second electrode of the second switching tube is connected with the output end of the boost chip;
when the output end of the boost chip is in short circuit fault, the output end is grounded, the first control signal is used for controlling the first switching tube to be turned off, and the current source module is used for controlling the grid potential of the second switching tube to gradually transit from the grid starting potential to the target control potential so as to gradually reduce the current in the second switching tube;
wherein, the current source module includes: a third switching tube and a preset current source;
the grid electrode of the third switching tube is connected with the first electrode of the third switching tube, the first electrode of the third switching tube is grounded through the preset current source, and the second electrode of the third switching tube is used for inputting the power supply voltage;
when the output end of the boost chip has a short circuit fault, the grid electrode of the third switching tube is conducted with the grid electrode of the second switching tube, so that the grid electrode potential of the second switching tube is transited from the grid electrode starting potential to the target control potential through the preset current source.
2. The short-circuit protection circuit according to claim 1, wherein the gate of the second switching tube is connected to the gate of the third switching tube through a switching element;
the switching element is provided with a first switching state and a second switching state, when the output end of the boost chip is not in short circuit fault, the switching element is in the first switching state, the grid electrode of the second switching tube is used for inputting a second control signal, when the output end of the boost chip is in short circuit fault, the switching element is in the second switching state, and the grid electrode of the second switching tube is communicated with the grid electrode of the third switching tube.
3. The short-circuit protection circuit according to claim 1, wherein the third switching tube and the second switching tube are PMOS, and the second switching tube has a larger gate-to-ground capacitance, so that the conduction degree gradually decreases and the current limiting effect gradually increases when the gate-on potential gradually transits to the target control potential, so that the flowing current gradually decreases.
4. The short-circuit protection circuit according to claim 1, wherein the first switching tube is an NMOS, and the first control signal is low potential to control the first switching tube to be turned off when a short-circuit fault occurs at the output end of the boost chip.
5. The short-circuit protection circuit according to claim 1, wherein the target control potential is located between a gate-on potential and the gate-off potential of the second switching tube.
6. The short-circuit protection circuit according to claim 1, wherein the substrate of the second switching tube is conducted with the first electrode thereof when the output terminal of the boost chip is short-circuited.
7. The short-circuit protection circuit according to claim 6, wherein the substrate of the second switching tube is connected with a switching assembly, the switching assembly has a first switching state and a second switching state, the switching assembly is in the first switching state when the boost chip is in the short-circuit state, the substrate of the second switching tube is in conduction with the first electrode thereof, and the switching assembly is in the second switching state when the boost chip is in the non-short-circuit state, the substrate of the second switching tube is in conduction with the second electrode thereof.
8. A boost chip, the boost chip comprising: a short-circuit protection circuit according to any one of claims 1-7.
9. The boost chip of claim 8, wherein the boost chip comprises a detection circuit for comparing an output voltage of an output terminal of the boost chip with a set reference voltage and outputting a comparison result, and a BST loop control circuit for providing control signals to a gate of a first switching tube and a gate of a second switching tube of the short-circuit protection circuit based on the comparison result.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910091785.0A CN109756116B (en) | 2019-01-30 | 2019-01-30 | Boost chip and short-circuit protection circuit thereof |
| PCT/CN2020/072163 WO2020156160A1 (en) | 2019-01-30 | 2020-01-15 | Boost chip and short-circuit protection circuit therefor |
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| CN201910091785.0A CN109756116B (en) | 2019-01-30 | 2019-01-30 | Boost chip and short-circuit protection circuit thereof |
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| CN109756116B true CN109756116B (en) | 2024-03-01 |
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| CN109756116B (en) * | 2019-01-30 | 2024-03-01 | 上海艾为电子技术股份有限公司 | Boost chip and short-circuit protection circuit thereof |
| CN115021215B (en) * | 2022-08-05 | 2022-11-15 | 禹创半导体(深圳)有限公司 | Method for reducing overshoot phenomenon of input voltage of power circuit |
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| WO2020156160A1 (en) | 2020-08-06 |
| CN109756116A (en) | 2019-05-14 |
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