JP2003264465A - Pulse width modulation device and da converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-grade PWM (pulse width modulation) device in which generation of noise such as secondary harmonics, etc., is suppressed while suppressing the sampling frequencies, and to provide a DA converter. <P>SOLUTION: A compensation circuit 1 predicts harmonic distortion of input data to be generated due to pulse width modulation in the pulse width modulation circuit 5 and applies compensation to set off the harmonic distortion. Thus, the grade of reproduction is secured by suppressing to the utmost the harmonic distortion according to the pulse width modulation which becomes remarkable when a low sampling frequency is used. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pulse width modulator and a DA converter equipped with the same, and more particularly to a pulse for pulse width modulating a digital signal representing an instantaneous amplitude level with a plurality of bits to convert it into a 1-bit digital signal. The present invention relates to a width modulation device and a DA converter including the same.

[0002]

2. Description of the Related Art Currently, in a 1-bit DA converter, a pulse width modulation (hereinafter referred to as PWM (Pulse Width Modulatio
n)) The device controls the data forming the digital signal representing the instantaneous amplitude level with a plurality of bits, for example, the data output from the noise shaper 71 as shown in FIG. 7, by the PWM device 72 with respect to the center of each sampling period. There is one that modulates into a 1-bit PWM pulse having a different waveform and gives this to a low-pass filter 73 or a class D amplifier to convert it into an analog signal. In the PWM device, the waveform of the PWM pulse is configured to have a symmetrical waveform with respect to the center position of the sampling period in the time axis direction, thereby making it possible to relatively reduce the occurrence of distortion such as a second harmonic. is there.

[0003]

However, the PWM
Even in the device, the distortion of the second harmonic or the like occurs due to the change of the pulse width. Therefore, if the required specifications become strict, this distortion cannot be ignored.

This distortion increases as the change in pulse width between adjacent PWM pulses increases. Therefore, in order to reduce this distortion, it is necessary to sufficiently increase the sampling frequency with respect to the signal frequency. However, increasing the sampling frequency in this way increases noise and distortion associated with clock jitter and distortion of pulse edges, and also adversely affects unnecessary radiation and power consumption. There is a limit to increasing the digitization frequency, which is not a preferable solution.

In the present invention, the sampling frequency is reduced to 2
An object of the present invention is to provide a high-quality PWM device that suppresses the generation of noise such as second harmonics and a DA converter equipped with the same.

[0006]

A pulse width modulation apparatus of the present invention sequentially captures first data constituting a first digital signal in accordance with a specific sampling frequency and performs an operation based on a predetermined correction formula. A correction circuit that corrects the first data according to the first data before and after it to generate second data; and a pulse width modulation of the second data according to the sampling frequency. And a pulse width modulation circuit for outputting a digital signal of 2, and the correction formula is for suppressing distortion of a reproduction signal due to the pulse width modulation.

The above correction equation is calculated as follows: the first slope and curvature of the first digital signal in each first data, the pulse width with respect to the sampling period when the first data is pulse width modulated as it is. It is preferably determined according to the ratio.

The first data of the i-th (i is an integer of 2 or more) is X _i , the second data of the first data of the i-th is H _i, and the modulation factor of the pulse width modulation is Be k (k is 0 <k <1), and the slope of the first digital signal in the i-th first data is S _i = (X
_{i + 1 -X i-1)} / 2 and then, the curvature of the first digital signal at the i-th of said first data _{C i = X i + 1 -2} × X i
+ X _i−1 , the ratio of the pulse width to the sampling period when the i-th first data is directly pulse-width modulated is B _i = (k × X _i +1) / 2, and the second Is set to H _i, and the above correction formula for obtaining the H _i is set to H _i
= X _i −B _i × (B _i × C _i + S _i × S _i ) / (8 × k), the correction circuit sequentially includes first and second registers,
According to the sampling frequency, the first data is sequentially loaded into the first and second registers, and the latest first data is stored.
X _i is the X _{i + 1} and the first data before the two read from X _i and said second register is a first data of the previous read out from said first register is a data _-1
It is also preferable to execute the above correction equation using and.

It is also preferable to provide a noise shaper between the correction circuit and the pulse width modulation circuit.

Further, it is preferable that the DA converter of the present invention includes the above pulse width modulator.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will now be described in detail based on examples with reference to the accompanying drawings. A pulse width modulation apparatus according to a first embodiment of the present invention and a DA converter including the same will be described with reference to FIG.
In this example, pulse width modulation (hereinafter, PWM (Pulse Width Modu
device) is a device for pulse-width modulating a digital signal representing an instantaneous amplitude level with a plurality of bits, and for example, receives data constituting a digital signal from a noise shaper of a 1-bit DA converter as input data. To do. The correction circuit 1 performs correction calculation on one input data by a predetermined correction formula using the data and the data before and after the data to generate correction output data. To this end, the correction circuit 1 includes registers 2 and 3 and a calculation unit 4. These operate according to a sample clock Cks having a predetermined sampling frequency.

The PWM circuit 5 pulse-width-modulates the correction output data from the correction circuit 1 to convert it into a PWM pulse and converts it into a 1-bit digital signal. The sample clock Cks and a predetermined operation for determining the pulse width are provided. Frequency P
It operates according to the WM clock Ckp.

Low-pass filter (hereinafter LPF (Low Pa
ss Filter)) 6 converts the PWM pulse from PWM circuit 5 into an analog signal. The DA converter of this example includes a correction circuit 1, a PWM circuit 5, and an LPF 6.

Next, the operation of this example will be described. The correction circuit 1 takes in the input data according to the sampling frequency and sequentially stores it in the registers 2 and 3. The arithmetic unit 4 receives the latest input data X _{i + 1} , the previous input data X _i stored in the register 2, and the previous input data X _i−1 stored in the register 3. Is used to correct the input data X _i and output corrected output data H _i . For convenience, X _i is the i-th (i
Is an integer of 2 or more). The corrected output data H _i is modulated into a PWM pulse by the PWM circuit 5 and further converted into an analog signal by the low pass filter 6. In the PWM circuit 5, harmonic distortion is generated by pulse width modulation. In this example, however, the correction circuit 1 predicts the harmonic distortion in advance and corrects the corrected output data so as to cancel the distortion. Therefore, the harmonic distortion caused by the pulse width modulation is canceled by this correction and suppressed to a low level.

Next, an example of the correction formula executed by the arithmetic unit 4 will be shown. As a premise, if the pulse width modulation is directly applied to the i-th input data X _i in the PWM circuit 5, the pulse width Tpwm _i of the PWM pulse is given by the following equation. Ts
Is a sampling period, k is 0 <k <1, and is a modulation factor of pulse width modulation. Tpwm _i = Ts × (k × X _i +1) / 2

The calculation unit 4 generates the corrected output data H _i based on the following correction formula. H _i = X _i −B _i × (B _i × C _i + S _i × S _i ) / (8 × k)

Here, B _i is the ratio of the pulse width to the sampling period when the i-th input data X _i is pulse-width modulated by the PWM circuit 5 as it is, and is given by the following equation. B _i = (k × X _i +1) / 2

Here, C _i is an approximation of the curvature of the input digital signal in the input data X _i , and is given by the following equation. C _i = X _{i + 1} -2 × X _i + X _i-1

Here, S _i is an approximation of the slope of the input digital signal in the i-th input data X _i , and is given by the following equation. S _i = (X _{i + 1} −X _i-1 ) / 2

The effects of performing the correction based on the above correction formula are shown below by simulation. The sampling frequency is 32 × 44.1 kHz, and the amplitude level of the digital signal to be handled is −5/6, as shown in FIG.
There are 11 levels from +5/6 to +5/6, and the PWM circuit 5 outputs a PWM pulse corresponding to each level as a pulse symmetrical to the pulse center Sc for each sampling period, as shown in FIGS. 2 and 3. The frequency of the input digital signal is 5 kHz
If a reproduction spectrum is simulated as a sine wave with z and an amplitude level of 0.5, the output spectrum with and without the correction represented by the above correction formula becomes as shown in FIG. . The spectrum shown in FIG. 4a is for the case where the correction is performed, and the spectrum shown in FIG. 4b is for the case where the correction is not performed. As shown in the figure, when the correction is not performed, the second harmonic of -95 dB and the third harmonic of -110 dB are seen.
When corrected, the second and third harmonics are -17 respectively.
It is reduced to 0 dB and -190 dB, which is a great effect in suppressing harmonics.

The frequency of the input digital signal is 2k.
Hz, amplitude level 0.2 sine wave, frequency 5 kHz,
FIG. 5 shows a reproduction spectrum simulation with a two-spectrum signal composed of a sine wave having an amplitude level of 0.1 and the other conditions being the same as those shown in FIG. The spectrum indicated by a'in FIG. 5 is the one when the correction is performed, and the spectrum indicated by b'in the same figure is the one when the correction is not performed. Due to non-linearity due to pulse width modulation, cross modulation occurs and 2 kHz
And a noise spectrum is generated other than 5 kHz. Even in this case, the level of the noise spectrum is significantly reduced by the correction.

As described above, in the PWM device of the present example and the DA converter equipped with the PWM device, since the harmonic distortion generated by the pulse width modulation is predicted in advance by the correction circuit 1, the correction is performed so as to cancel it. Even if pulse width modulation is performed at a low sampling frequency, sufficient reproduction quality can be obtained, and it is effective in reducing unnecessary radiation and power consumption.

Next, a PWM device according to a second embodiment of the present invention and a DA converter including the same will be described with reference to FIG. Although the correction circuit 1 is provided immediately before the PWM circuit 5 in the first embodiment, the present invention is not limited to this. The PWM device of this example and a DA converter including the same are provided with an oversampling circuit and a noise shaper between the correction circuit and the PWM circuit. The configuration shown in FIG. 6 with the same reference numerals as in FIG. 1 is similar to that in FIG. The correction circuit 1 of this example takes in input data in accordance with a sample clock Cks' having a predetermined sampling frequency. The oversampling circuit 7 oversamples the correction output data from the correction circuit 1 in accordance with the noise shaper clock Ckns having a frequency several times to several tens times the sample clock Cks ′, for example, 32 times the sampling frequency. The noise shaper 8 performs noise shaping on the corrected output data oversampled according to the noise shaper clock Ckns. The PWM circuit 5 operates according to a PWM clock Ckp ′ having a predetermined frequency that determines the pulse width and a noise shaper clock Ckns, and PWMs the output data of the noise shaper 8.

Also in this example, the correction circuit 1 predicts the harmonic distortion in advance as in the first embodiment and performs a correction operation so as to cancel it, so that the harmonic distortion due to the pulse width modulation is eliminated. It is offset by correction and suppressed to a low level.

Further, in this example, an oversampling circuit 7 and a noise shaper 8 are provided between the correction circuit 1 and the PWM circuit 5 to perform noise shaping on the correction output data to perform the correction output data level of the correction circuit 1. I have reduced the number. In order to obtain the PWM pulse, a PWM clock with a high frequency for finely controlling the pulse width according to the number of levels of the modulated data is required. Since the frequency of this PWM clock is approximately (the repetition frequency of the PWM pulse) × (the number of levels of the modulated data + α), the higher the number of levels of the modulated data, the higher the frequency. However, increasing the frequency of the PWM clock leads to an increase in unnecessary radiation and an increase in power consumption, and the frequency cannot be unnecessarily increased in practical use. Therefore, in this example, the number of levels of the correction output data is once reduced by using the noise shaper, and the pulse width modulation is performed to suppress the frequency of the PWM clock.
It suppresses the increase of unnecessary radiation and power consumption.

[0026]

In the pulse width modulation device of the present invention and the DA converter equipped with the same, the harmonic distortion associated with the pulse width modulation is predicted in advance by the correction circuit, and a correction for canceling the harmonic distortion is made into the first data. Since the pulse width modulation is performed after applying this as the second data, sufficient reproduction quality can be obtained even if the pulse width modulation is performed at a low sampling frequency, and unnecessary radiation and power consumption are reduced. effective.

Further, by temporarily using the noise shaper to reduce the number of levels of the second data from the correction circuit and performing pulse width modulation on the second data, the operating frequency of the pulse width modulation circuit can be suppressed to be more effective. Moreover, it is possible to suppress an increase in unnecessary radiation and an increase in power consumption.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configurations of a pulse width modulation device and a DA converter according to a first embodiment of the present invention.

2 is a waveform diagram illustrating a PWM pulse of the PWM circuit of FIG.

3 is a waveform diagram illustrating a PWM pulse of the PWM circuit of FIG.

4 is an explanatory diagram showing a reproduction spectrum when one sine wave is input to the pulse width modulator of FIG.

5 is an explanatory diagram showing a reproduction spectrum when two sine waves are input to the pulse width modulation device of FIG. 1. FIG.

FIG. 6 is a block diagram showing the configurations of a pulse width modulation device and a DA converter according to a second embodiment of the present invention.

FIG. 7 is a block diagram for explaining a conventional pulse width modulator and DA converter.

[Explanation of symbols]

1 Correction circuit 2 First register (register) 3 Second register (register) 5 Pulse width modulation circuit 8 noise shaper

Continued front page    (72) Inventor Akira Toyama             222 Amanauma 5 Chigasaki City, Kanagawa Prefecture F term (reference) 5J022 AB08 BA02 CA07 CE08                 5J064 AA01 BA01 BB04 BB07 BC04                       BC07 BC12 BC15 BC18 BD01

Claims (5)

[Claims] 1. The first data constituting the first digital signal is sequentially taken in according to a specific sampling frequency, and an operation based on a predetermined correction formula is performed to obtain the first data before and after the first data. Corrected according to the data of the second
And a pulse width modulation circuit for outputting a second digital signal obtained by pulse width modulating the second data in accordance with the sampling frequency, and the correction equation is the pulse width modulation. A pulse width modulator for suppressing the distortion of a reproduced signal caused by. 2. The correction formula is the slope and curvature of the first digital signal in each first data, the ratio of the pulse width to the sampling period when the pulse width modulation is performed on each first data as it is. The pulse width modulation device according to claim 1, wherein the pulse width modulation device is determined according to 3. The first of the i-th (i is an integer of 2 or more)
X _i , the second data for the i-th first data is H _i , the modulation factor of the pulse width modulation is k (k is 0 <k <1), and the i-th data is X _i . First above
The slope of the first digital signal in the data of S _i =
(X _{i + 1} −X _i−1 ) / 2, and the curvature of the first digital signal in the i-th first data is C _i = X _{i + 1} −2 ×
X _i + X _i−1 , the ratio of the pulse width to the sampling period when the i-th first data is directly pulse width modulated is B _i = (k × X _i +1) / 2, and Second
The data as H _i, the correction formula for obtaining the H _i, H
_i = X _i −B _i × (B _i × C _i + S _i × S _i ) / (8 × k), and the correction circuit sequentially includes first and second registers,
According to the sampling frequency, the first data is sequentially loaded into the first and second registers, and the latest first data is stored.
X _i is the X _{i + 1} and the first data before the two read from X _i and said second register is a first data of the previous read out from said first register is a data _-1
3. The pulse width modulator according to claim 2, wherein the correction formula is executed by using and. 4. The pulse width modulator according to claim 1, further comprising a noise shaper provided between the correction circuit and the pulse width modulation circuit. 5. A DA converter comprising the pulse width modulation device according to any one of claims 1 to 4.