JP2003264266A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the generation of eccentrically applied excessive pressure in the initial stage of pressure application to a contact terminal member in a semiconductor device, which has an insulated-gate structure and has a structure in which a contact terminal member is pressure-contacted. <P>SOLUTION: Pedestals 31, 32 are formed on a buffer region 4 so that the height of the surface of a second metal layer 19 on the buffer region 4 is higher than that on a gate region 3 before pressure is applied to a contact terminal member 6. The pedestals 31, 32 are so structured as to be squeezed by the pressure application to the contact terminal member 6. By applying pressure to the contact terminal member 6 to squeeze the pedestals 31, 32 to such an extent as the height of the surface of the second metal layer 19 on the buffer region 4 is equal to that on the gate region 3, the tilting of the contact terminal member 6 in the initial stage of the pressure application is eliminated, and the contact terminal member 6 is uniformly pressure-contacted to the second metal layer 19 on the buffer region 4 and on the gate region 3. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having an insulated gate structure such as an IGBT (insulated gate bipolar transistor) and having a structure in which a contact terminal body is brought into pressure contact.

[0002]

2. Description of the Related Art As a power semiconductor device for switching a large current capacity, one having a structure in which a metal contact terminal body is brought into pressure contact with a main electrode portion of a semiconductor element is known. In such a pressure contact type semiconductor device, electrical connection with the main electrode is secured through the contact terminal body instead of wire bonding, and also from the front surface side of the semiconductor element through the contact terminal body. Since it radiates heat, it has the advantage of high reliability.

By the way, IGBTs are widely used in inverters for driving motors. The IGBT is advantageous in that it is a voltage-driven type and is easy to handle in application, and high-speed switching is possible. When the contact terminal body is brought into pressure contact with a semiconductor element having an insulated gate structure such as an IGBT, it is necessary to prevent the pressure from being directly applied to the insulated gate structure formed in large numbers on the emitter electrode side. The reason is that when stress is applied to the gate oxide film on the channel, not only the electrical characteristics such as the threshold voltage change but also the characteristics may be defective.

FIG. 4 is a plan view of the conventional pressure contact type IGBT on the emitter side. As shown in FIG. 4, a breakdown voltage structure 2 is formed in the peripheral portion of the IGBT chip 1, and a gate region 3 having an insulated gate structure is provided inside the breakdown voltage structure 2. A buffer region 4 surrounding the gate region 3 is provided between the gate region 3 and the breakdown voltage structure portion 2. A gate pad 5 electrically connected to the gate electrode is provided outside the buffer region 4. The contact terminal body is omitted in FIG.

FIG. 5 is a vertical sectional view taken along the line AA 'in FIG. In FIG. 5, reference numeral 6 is a contact terminal body, reference numeral 10 is a semiconductor substrate, reference numeral 11 is a p-well region,
Reference numeral 12 is a source region, reference numeral 13 is a gate oxide film, reference numeral 14 is a gate electrode, reference numeral 15 is an interlayer insulating film, reference numeral 16 is a p-buffer region, reference numeral 17 is a first metal layer, reference numeral 18 is a pedestal portion, and reference numeral 19 is The second metal layer.

In the gate region 3, the gate electrode 14 is formed on the gate oxide film 13, the first metal layer 17 is laminated on the gate electrode 14 with the interlayer insulating film 15 interposed therebetween, and the second metal layer 17 is further formed thereon.
The metal layer 19 is laminated. In the buffer area 4, p
A first metal layer 17 is stacked on the buffer region 16, a pedestal portion 18 is formed on the first metal layer 17, and a second metal layer 19 is further stacked thereon. The height of the pedestal portion 18 is the same as the height of the first metal layer 17 in the gate region 3. Therefore, the height of the second metal layer 19 is the same in the gate region 3 and the buffer region 4, and the contact terminal body 6 is brought into pressure contact with the second metal layer 19.

Further, as shown in FIG. 6, in the gate region 3, a gate pedestal portion 21 is formed on the first metal layer 17 while avoiding the channel formation region, and the second metal layer 1 is formed thereon.
A structure is also adopted in which the pressure applied by a contact terminal body (not shown) is dispersed by stacking 9 so that the pressure is not directly applied to the channel formation region (Japanese Patent Laid-Open No. 2000-114525).

Further, for further strengthening, as shown in FIG. 6, a structure in which a terrace-shaped oxide film 22 is formed on the gate oxide film 13 and the gate electrode 14 is formed thereon is also adopted. When the gate pedestal portion 21 and the terrace-shaped oxide film 22 are thus provided, the pedestal portion 18 of the buffer region 4 is formed higher by that amount.

In any of the structures, the peripheral portion of the contact terminal body 6 is the portion that is most likely to be biased.
Therefore, the p buffer region 16 having no insulated gate structure is provided below the peripheral portion of the contact terminal body 6, and the pressing force is shared by the p buffer region 16 via the pedestal portion 18, whereby the cell portion of the IGBT is It prevents excessive stress.

Instead of the p buffer region 16, a structure in which the source region 12 is not formed is used as a buffer region, or the source region 12 is not formed in the p well region 11 near the p buffer region 16 is also proposed. ing.

[0011]

However, as shown in FIG. 7, even if the contact terminal body 6 is carefully attached to the chip 1, the contact terminal body 6 is inclined with respect to the element surface of the chip 1 immediately after the attachment. Will end up. Therefore, if pressure is applied to the contact terminal body 6 in this state, there is a problem that even if the buffer region is provided, excessive biased pressure is applied to the element pressing surface around the contact terminal body, resulting in element failure. It was

The present invention has been made in view of the above problems, and in a semiconductor device having an insulated gate structure and a structure in which a contact terminal body is brought into pressure contact, a contact terminal body is initially pressed. It is an object of the present invention to provide a semiconductor device having a structure capable of preventing an excessive biased pressure from being generated.

[0013]

In order to achieve the above object, a semiconductor device according to the present invention is provided with a gate region having an insulated gate structure selectively formed on a substrate surface, and the gate region on the substrate surface. A buffer region selectively formed in a region other than the above, a contact terminal body whose peripheral portion is located on the buffer region and covers the gate region, and a contact terminal body formed on the buffer region, In the unpressurized state, the height of the outermost surface on the buffer region is made higher than the height of the outermost surface on the gate region, and the pressure of the contact terminal body increases the height of the outermost surface on the buffer region. A pedestal portion that is crushed to the same height as the outermost surface on the gate region, the pedestal portion is crushed by pressurization, and the contact terminal body is crushed by the buffer region and the front portion. It characterized in that in contact with the outermost surface of the gate region.

According to the present invention, since the pedestal is provided, the height of the outermost surface on the buffer region is higher than the height of the outermost surface on the gate region when the contact terminal body is not pressurized. Get higher Then, since the pedestal portion is crushed by the pressurization of the contact terminal body, the height of the outermost surface on the buffer region becomes the same as the height of the outermost surface on the gate region, so that the inclination of the contact terminal body is corrected, The contact terminal body uniformly comes into pressure contact with the outermost surfaces on the buffer region and the gate region.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a vertical cross-sectional view showing an example of a pressure contact type IGBT that constitutes a semiconductor device according to an embodiment of the present invention, and is a view when a contact terminal body is in a non-pressurized state. The sectional structure shown in FIG. 1 corresponds to the sectional structure taken along the line AA ′ in the plan view shown in FIG.

As shown in FIG. 1, a p-well region 11 and a p-buffer region 16 are selectively formed in the surface layer of the semiconductor substrate 10. In the gate region 3, the source region 12 is selectively formed in the p well region 11. p
A gate electrode 14 is formed via a gate oxide film 13 between the well region 11 and its adjacent p buffer region 16 and between the p well region 11 and its adjacent p well region 11. An interlayer insulating film 15 is provided on the gate electrode 14, and the gate electrode 14 is insulated from the first metal layer 17 thereon by the interlayer insulating film 15.

In the buffer area 4, the p buffer area 16
The first metal layer 17 is laminated directly on top of it, and on top of that,
Although the material is not particularly limited, a lower pedestal portion 31 made of, for example, a polyimide film is formed. Further, although not particularly limited in its material, an upper layer pedestal portion 32 made of, for example, a polyimide film is partially formed on the lower layer pedestal portion 31. The second metal layer 19 is laminated on the entire upper surface of the upper pedestal 32, the lower pedestal 31, and the first metal layer 17 of the gate region 3.

The upper pedestal 32 and the lower pedestal 3
No. 1 has a thickness such that the surface of the second metal layer 19 in the buffer region 4 is higher than the surface in the gate region 3 when the contact terminal body 6 is not pressurized. Then, when the contact terminal body 6 is pressed, the upper pedestal portion 32 and the lower pedestal portion 31 are kept until the surface of the second metal layer 19 in the buffer region 4 becomes the same height as the surface of the gate region 3. Collapse.

Here, the width of the p buffer region 16 is IG at which the pressing force of the contact terminal body 6 is about 80 kgf / cm ² .
In the BT chip, it is about 250 to 260 μm, and
It is suitable that the applied pressure is about 300 to 320 μm for the IGBT chip having a pressing force of about 120 kgf / cm ² . Also,
The width of the upper pedestal portion 32 is 80 to 1 when it is made of polyimide.
About 10 μm is suitable.

The reason is that if these widths are too wide, the crushing condition of the contact terminal body 6 at the time of pressurization is insufficient,
This is because the pressure may be insufficient near the boundary between the buffer region 4 and the gate region 3. On the other hand, if the width is too narrow, the desired effect cannot be obtained due to excessive crushing during pressing. That is, in order that the pedestal portions 31 and 32 are crushed by the pressure of the contact terminal body 6 and the surface height of the second metal layer 19 becomes the same in the buffer region 4 and the gate region 3, it is desirable to set the above range.

Further, it is suitable that the difference between the surface height of the second metal layer 19 in the buffer region 4 and the surface height of the gate region 3 in the unpressurized state is 5 μm or less. That is, the upper pedestal portion 32 and the lower pedestal portion 31 are formed to have a thickness such that the surface of the second metal layer 19 in the buffer region 4 is higher than the surface of the gate region 3 by 5 μm or less. If the difference in height exceeds 5 μm, the upper pedestal portion 32 is pressed by the pressure applied to the contact terminal body 6.
Even if the lower pedestal portion 31 is crushed, the buffer region 4 and the gate region 3 do not have the same surface height of the second metal layer 19, which causes insufficient pressurization.

FIG. 2 is a vertical cross-sectional view showing another example of the pressure contact type IGBT constituting the semiconductor device according to the embodiment of the present invention when the contact terminal body is in a non-pressurized state. Is. The sectional structure shown in FIG. 2 corresponds to the sectional structure taken along the section line AA ′ in the plan view shown in FIG.

In the example shown in FIG. 2, the upper pedestal portion 32 and the lower pedestal portion 31 are provided as in the example shown in FIG. 1, and in addition to the terrace-shaped oxidation as in the conventional example shown in FIG. Although the film 22 and the material thereof are not particularly limited, the gate pedestal portion 21 made of, for example, a polyimide film is provided. That is, in the gate region 3, avoiding the channel formation region, the terrace-shaped oxide film 2 is formed on the gate oxide film 13.
2 is formed, and the gate electrode 14 is formed thereon.

A gate pedestal portion 21 is formed on the first metal layer 17, and a second metal layer 19 is laminated on the gate pedestal portion 21. In this case, the upper pedestal 32 and the lower pedestal 31 are thicker by the thickness of the terrace-shaped oxide film 22 and the gate pedestal 21.

A pressure contact type I having the structure shown in FIG. 1 or FIG.
In the GBT, first, at the initial stage of pressurizing the contact terminal body 6,
Since the contact terminal body 6 is inclined, the second metal layer 19
The peripheral portion of the contact terminal body 6 comes into contact with the surface portion of the buffer region 4 and the inclination of the contact terminal body 6 is received (FIG. 3A). Then, the hitting upper layer pedestal portion 32 and lower layer pedestal portion 31 are crushed by the pressure. As a result, the inclination of the contact terminal body 6 is corrected and the contact terminal body 6 comes into contact with the element surface in parallel (FIG. 3B).

When the contact terminal body 6 is further pressed, the upper pedestal portion 32 and the lower pedestal portion 31 are uniformly crushed in the entire buffer region 4, and the second metal layer 19 is crushed.
The height of the surface of the buffer region 4 becomes the same as the height of the surface of the gate region 3. At this point, the contact terminal body 6 comes into pressure contact with the second metal layer 19 on the entire surfaces of the buffer region 4 and the gate region 3 (FIG. 3).
(C)). In this way, the biased pressurization due to the inclination of the contact terminal body 6 in the initial stage of pressurization is corrected.

According to the above-described embodiment, the pedestal portions 31, 3 on the buffer region 4 when the contact terminal body 6 is pressed.
Since the surface height of the second metal layer 19 in the buffer region 4 and the surface height of the gate region 3 become the same, the inclination of the contact terminal body 6 in the initial stage of pressurization is corrected, and the contact terminal body is corrected. 6 will come into uniform pressure contact with the second metal layer 19 on the buffer region 4 and the gate region 3.

Therefore, it is possible to prevent the excessive biased pressure from being generated in the initial stage of pressurization of the contact terminal body 6, and it is possible to eliminate the element failure due to the excessive biased pressure. Further, it is possible to enhance the reliability against mechanical shock and burrs of the contact terminal body 6 (protrusions generated by machining). This makes it possible to manufacture a highly reliable pressure contact type semiconductor element with a good yield rate.

Further, according to the structure shown in FIG. 2, since the pressure is not directly applied to the channel forming region, the characteristics of the element can be improved. Further, if the pedestal portions 31 and 32 on the buffer region 4 and the gate pedestal portion 21 are made of the same material, for example, polyimide, the pedestal portions 31 and 32 and the gate pedestal portion 21 undergo substantially the same deformation at the time of pressurization. Will happen. Therefore, the effect that the contact terminal body 6 comes into pressure contact with the second metal layer 19 on the buffer region 4 and the gate region 3 more uniformly can be obtained.

In the above, the present invention is not limited to the above-mentioned embodiment, but can be variously modified. For example, the layer structure on the buffer region 4 may be composed of five layers or more. Further, the layer structure on the buffer region 4 may be a structure in which films of the same metal or films of the same insulator are laminated. The same applies to the layer structure on the gate region. Also, the p-type and n-type conductivity types may be reversed.

[0031]

According to the present invention, in the unpressurized state of the contact terminal body, the height of the outermost surface on the buffer region is higher than the height of the outermost surface on the gate region. When pressure is applied, the pedestal is crushed and the height of the outermost surface on the buffer region becomes the same as the height of the outermost surface on the gate region, so the inclination of the contact terminal body is corrected, and the contact terminal body moves to the buffer region and the gate region. The uppermost surface is uniformly in pressure contact. Therefore, it is possible to obtain a semiconductor device having a structure capable of preventing an excessive biased pressure from being generated in the initial stage of pressurization of the contact terminal body.

[Brief description of drawings]

FIG. 1 is a pressure contact type IGB according to an embodiment of the present invention.
It is a longitudinal section showing an example of T.

FIG. 2 is a pressure contact type IGB according to an embodiment of the present invention.
It is a longitudinal section showing other examples of T.

FIG. 3 is a schematic diagram for explaining an action at the time of assembling a contact terminal body in the pressure contact type IGBT shown in FIG. 1 or FIG.

FIG. 4 is a plan view showing a structure on a side of an emitter of a conventional pressure contact type IGBT.

5 is a vertical cross-sectional view showing the configuration taken along the section line AA ′ in FIG.

6 is a vertical cross-sectional view showing another configuration example of the gate region taken along the section line AA ′ in FIG.

FIG. 7 is a schematic diagram for explaining a problem at the time of assembling the contact terminal body.

[Explanation of symbols]

3 gate area 4 buffer area 6 Contact terminal body 10 Semiconductor substrate 13 Gate oxide film 14 Gate electrode 16p buffer area 31 Lower pedestal 32 Upper pedestal

Claims (2)

[Claims] 1. A gate region having an insulated gate structure selectively formed on a substrate surface; a buffer region selectively formed on a region other than the gate region on the substrate surface; and a peripheral portion of the buffer region. A contact terminal body located on a region and covering the gate region; and a contact terminal body formed on the buffer region, wherein the height of the outermost surface on the buffer region is the gate region in the unpressurized state of the contact terminal body. A pedestal portion that is higher than the height of the uppermost surface and is crushed until the height of the outermost surface on the buffer region becomes equal to the height of the outermost surface on the gate region due to the pressure of the contact terminal body, The semiconductor device according to claim 1, wherein the pedestal portion is crushed by pressurization, and the contact terminal body is in contact with the outermost surface on the buffer region and the gate region. 2. The semiconductor device according to claim 1, wherein the pedestal portion is made of a metal single layer film, an insulator single layer film, or a laminated film in which a metal and an insulator are combined. .