JP3265894B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power device such as an insulated gate bipolar transistor (IGBT) and a first main electrode (emitter) and a control electrode (gate) on one main surface of a substrate. Second main electrode (collector) on main surface
The present invention relates to a semiconductor device in which a semiconductor chip having the above is incorporated in a package.

[0002]

2. Description of the Related Art An IGBT is applied to an inverter for controlling a motor by PWM as a power switching device.
It has been used widely throat. In addition, market demands have been toward higher capacities because the IGBT is a voltage-driven type and easy to handle. In such a MOS control device as an IGBT, an emitter electrode and a gate electrode are formed side by side on one main surface of a semiconductor chip. Because of this I
When the GBT is incorporated in a package container, the collector formed on the lower surface side can be mounted on a metal base that also functions as a radiator and can be extracted to the outside. Need to be withdrawn through. Therefore, in the conventional device structure, an emitter and an external lead-out terminal for the gate are provided on the upper surface side of the package container together with the above-mentioned metal base, and a number of gates are provided between the emitter electrode and the external lead-out terminal and between the gate electrode and the external lead-out terminal. As many as 10 aluminum wires having a wire diameter of about 300 μm are connected by wire bonding.

However, in such a conventional structure, heat can be radiated from the collector side, but not from the emitter side, which hinders an increase in the capacity of the element.
Therefore, the inventors, on the emitter side surface of the MOS device, proposed a structure called have not been emitter collector electrode acts as a heat and current path release without creating MOS portion,
The element was pressurized by an electrode called a contact terminal which can pressurize only the current collecting electrode portion, and wire bonding to the main electrode was achieved. (Fuji Times May 1994 issue
PP283-287)

[0004]

In this structure, in addition to heat radiation from the collector side, heat radiation from the emitter side can be performed, so that the current density can be increased and wire bonding to the main electrode becomes unnecessary. Has the advantage that the reliability can be greatly improved.
An invalid area without the S structure must be created. The reason for providing this collector electrode is that, in a device having a MOS structure such as an IGBT, the emitter electrode is formed by extending the oxide film on the gate electrode, so that the package-side electrode plate is pressed over the entire surface of the emitter electrode. If contact is made, the pressure will be applied to the gate electrode and the characteristics will change or deteriorate.
This is because it is not practical. In addition, when the area of the semiconductor chip increases, the transmission time of the gate signal varies due to the difference in the distance from the gate pad, and it becomes difficult to operate the entire semiconductor chip uniformly.

The present invention has been made to solve the above-mentioned drawbacks.
A semiconductor chip is divided into a plurality of regions, gate wiring is formed in two layers, and each block is connected by a second-layer wiring, thereby uniformly operating the entire chip. In order to prevent the pressing force from being applied to the emitter electrode on the gate electrode, the emitter electrode other than this area is brought into contact with the electrode plate on the package side, and the structure is made so that an invalid area called a current collecting electrode is not provided. It is another object of the present invention to provide a semiconductor device having a MOS structure in which the active region is widened without a change in characteristics due to pressure.

[0006]

In order to achieve the above object, a MOS structure semiconductor chip having a first main electrode and a control electrode on a first main surface and a second main electrode on a second main surface, respectively, is provided. It is incorporated in a flat package in which an insulating outer cylinder is interposed between a pair of common electrode plates whose both surfaces are exposed, and a capacitance is applied between the first main electrode of the semiconductor chip and the common electrode plate on the package side facing the first main electrode. In a semiconductor device in which a contact terminal body that also serves as a pressure, conductive, and radiator is interposed,
A first conductive film formed on the first main surface via a first insulating film, and a second conductive film formed on the first conductive film via a second insulating film partially opened in a window; A film and a third conductive film formed through a third insulating film partially opened on the second conductive film, and also on the first conductive film via the second insulating film. Having a first main electrode formed.

It is preferable that the semiconductor chip is divided into a plurality of regions and each block has an independent second conductive film and a third conductive film common to each block. The first main electrode has a two-layer structure, and a fourth insulating film is interposed between the first layer and the second layer of the first main electrode on a region other than the first conductive film. The surface height of the first main electrode other than the first main electrode is higher than the surface height of the first main electrode on the first conductive film.

The contact terminal body in a region facing the third conductive film is formed in a concave shape, and the contact terminal body is formed as a third conductive film.
With a structure that does not come into contact with Further first conductive film is formed of polysilicon, the second and third conductive film is formed of a metal, a third insulating film so as Ru is formed of polyimide.
Further, it is preferable that the fourth insulating film is formed of polyimide.

[0009]

According to the structure of the present invention, as in the prior art,
It is possible to make pressure contact through a contact terminal body that comes into surface contact with the entire surface of the emitter electrode without providing an emitter current collector electrode part having both a current path and heat dissipation without a MOS structure provided on the emitter side, M of semiconductor chip
Radiation from the emitter side is performed without improper pressing force applied to the OS control structure. In addition, since the conventional emitter collecting electrode portion can be used as an active region and the effective area of the semiconductor chip can be increased, the heat dissipation is dramatically improved and the current capacity of the semiconductor device is increased as compared with the conventional case. Can be achieved.

Further, since no bonding wire is used to connect the main electrodes, the reliability is improved and the internal inductance is reduced. Further, by dividing the chip into blocks and connecting the gate electrodes of each block with a metal film, the gate internal inductance can be reduced and made uniform even in a block remote from the bonding pad portion.

[0011]

FIG. 1 is a sectional view of an essential part showing an embodiment of the present invention. An n-type layer 2 is stacked on the p-type layer 1 by epitaxial growth, and a p-type region 3 is selectively formed on the surface layer of the n-type layer 2 by diffusion or the like. A region 4 is formed, and the high concentration n-type region 4 and the n-type layer 2 are formed.
Polysilicon gate electrodes 5 and 6 (first conductive film) are formed on p-type region 3 sandwiched between the first insulating film 7 and the oxide film on the gate electrodes 5 and 6. The second insulating film 71 is covered, and a first Al-Si
Forming a first gate current collecting electrode on an emitter electrode and a second insulating film partially opened on the gate electrode ;
A second gate current collecting electrode 10 (third conductive film) of Al-Si is formed on a third insulating film 9 of polyimide which is partially opened on the first gate current collecting electrode 8 (second conductive film). . Also the first
A third insulating film 9 of a polyimide film is formed except on the gate electrode 5 on the emitter electrode 22, and a second insulating film 9 is formed on the third insulating film 9 so as to cover the entire surface of the first emitter electrode 22 except for the region of the second gate current collecting electrode 10. An emitter electrode 23 is formed. The emitter terminal 11, which is a contact terminal body that presses the second emitter electrode 23, is formed into a concave shape 12 so as not to contact the second gate collector electrode 10. The electrode formation by Al-Si is performed by vapor deposition. Al may be used instead of Al-Si.

FIG. 2 shows a plan view of a chip according to the present invention. The inside of the large-area IGBT chip 13 is divided into a plurality (10 divisions in the example of the present invention), and each is divided into blocks. First gate collector electrode of each block 15 (not shown)
Is connected to the second gate current collecting electrode 10, and the second gate current collecting electrode 10 has an Al wiring 17, a polysilicon Al connecting portion 19,
The second gate current collecting electrode 10 connects the blocks to each other. Gate pad 1
Eight parts are connected to external gate circuits by gate bonding wires (not shown). The first and second gate collector electrodes 8, 10 are formed of Al-Si or Al. A guard ring 1 is provided around the periphery to ensure pressure resistance.
4 are formed.

FIGS. 3A and 3B show an emitter terminal according to the present invention. FIG. 3A is a plan view and FIG.
2 shows a cross-sectional view taken along line AA. Concave portions 12 and 21 are provided in the emitter terminal 11 so as not to contact the emitter terminal 11 and the second gate collector electrode and the guard ring.

[0014]

As above mentioned base according to the present invention, according to the present invention, without adding unduly pressurizing force MOS control electrode structure of the semiconductor chip, with uniform pressure contact by surface contact can be achieved, the semiconductor Heat can be dissipated from both sides of the chip, and the current capacity can be greatly increased.In addition, since the bonding wire is not used to draw current from the main electrode, the internal wiring inductance is also reduced, and it can be combined with a flat package with a hermetically sealed structure. The reliability of the semiconductor device can be greatly improved.

Further, by dividing the chip into blocks and connecting the gate electrodes of each block with a metal film, the gate internal inductance is reduced even in a block distant from the bonding pad portion. The operating current could be greatly increased.

[Brief description of the drawings]

FIG. 1 is a sectional view of a main part showing an embodiment of the present invention.

FIG. 2 is a plan view of a chip according to the present invention.

3A and 3B show an emitter terminal according to the present invention, wherein FIG. 3A is a plan view and FIG.

[Explanation of symbols]

 Reference Signs List 1 p-type layer 2 n-type layer 3 p-type region 4 high-concentration n-type region 5 polysilicon gate electrode 6 polysilicon gate electrode 7 first insulating film 71 second insulating film 8 first gate current collecting electrode 9 third polyimide Insulating film 10 Second gate collector electrode 11 Emitter terminal 12 Concave part (part corresponding to second gate collector electrode) 13 IGBT chip 14 Guard ring 15 Block 17 Al wiring 18 Gate pad 19 Polysilicon Al connection part 21 Concave part (Guard) (A part corresponding to a ring) 22 first emitter electrode 23 second emitter electrode

Claims (6)

(57) [Claims] 1. A semiconductor chip having a MOS structure having a first main electrode and a control electrode on a first main surface and a second main electrode on a second main surface, and an insulating outer cylinder between a pair of common electrode plates having both surfaces exposed. And pressurizing, conducting, and radiating a contact terminal body between the first main electrode of the semiconductor chip and the common electrode plate on the package side facing the first main electrode of the semiconductor chip. In the interposed semiconductor device, the control electrode has a first conductive film formed on a first main surface via a first insulating film, and a second conductive film partially opened on the first conductive film. A second conductive film formed through the insulating film, and a third conductive film formed through the third insulating film partially opened on the second conductive film; A semiconductor device having a first main electrode formed also on a first conductive film via a film. 2. The semiconductor chip according to claim 1, wherein the semiconductor chip is divided into a plurality of regions, and each block has an independent second conductive film and a third conductive film common to each block.
13. The semiconductor device according to claim 1. 3. The first main electrode has a two-layer structure, and a fourth insulating film is interposed between a first layer and a second layer of the first main electrode on a region other than the first conductive film. 2. The semiconductor device according to claim 1, wherein the surface height of the first main electrode other than on the conductive film is higher than the surface height of the first main electrode on the first conductive film. 4. A contact pin of the region facing the third conductive film in a concave, the semiconductor device according to claim 1, characterized in that a structure in which the contact terminal member does not contact the third conductive film. 5. The semiconductor according to claim 1, wherein the first conductive film is formed of polysilicon, the second and third conductive films are formed of metal, and the third insulating film is formed of polyimide. apparatus. 6. The semiconductor device according to claim 3 , wherein the fourth insulating film is formed of polyimide.