JP2003258573A - Electronic circuit apparatus - Google Patents

Electronic circuit apparatus

Info

Publication number
JP2003258573A
JP2003258573A JP2002050942A JP2002050942A JP2003258573A JP 2003258573 A JP2003258573 A JP 2003258573A JP 2002050942 A JP2002050942 A JP 2002050942A JP 2002050942 A JP2002050942 A JP 2002050942A JP 2003258573 A JP2003258573 A JP 2003258573A
Authority
JP
Japan
Prior art keywords
transistor
conversion circuit
current conversion
current
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002050942A
Other languages
Japanese (ja)
Other versions
JP3992512B2 (en
Inventor
Satoshi Terada
聡 寺田
Masaki Kinoshita
雅貴 木下
Hitoshi Aizawa
仁志 会沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2002050942A priority Critical patent/JP3992512B2/en
Publication of JP2003258573A publication Critical patent/JP2003258573A/en
Application granted granted Critical
Publication of JP3992512B2 publication Critical patent/JP3992512B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic circuit apparatus having an increased gain with less distortion. <P>SOLUTION: In this apparatus, emitter electrodes of third and fourth transistors 18, 19 being components of a voltage current conversion circuit 17 are connected to collector electrodes of first and second transistors 12, 13 being components a differential voltage current conversion circuit 11, resistors 22, 23 interconnect the collector electrodes of the first and second transistors 12, 13 and a prescribed current I2 not in excess of the operating current of the differential voltage current conversion circuit 11 is injected to the midpoint of the resistors. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明はテレビ受像器又はC
ATV等の電子機器の増幅回路あるいは周波数変換回路
に用いられる電子回路装置に関する。
TECHNICAL FIELD The present invention relates to a television receiver or C
The present invention relates to an electronic circuit device used in an amplifier circuit or a frequency conversion circuit of an electronic device such as an ATV.

【0002】[0002]

【従来の技術】図7は従来のベース接地を有する差動増
幅回路である。差動電圧電流変換回路1はエミッタ電極
が共通接続された1対のトランジスタ2とトランジスタ
3とよりなる。前記トランジスタ2及びトランジスタ3
のベース電極には入力差動電圧Vinが加えられ、又エ
ミッタ電極には動作電流源IAからの動作電流I1は供
給される。
2. Description of the Related Art FIG. 7 shows a conventional differential amplifier circuit having a grounded base. The differential voltage-current conversion circuit 1 includes a pair of transistors 2 and 3 whose emitter electrodes are commonly connected. The transistor 2 and the transistor 3
An input differential voltage Vin is applied to the base electrode of, and the operating current I1 from the operating current source IA is supplied to the emitter electrode.

【0003】ベース共通接続回路4はべース電極が共通
接続された対をなすのトランジスタ5とトランジスタ6
とよりなり、トランジスタ5のエミッタ電極は前記トラ
ンジスタ2のコレクタ電極に接続され、またトランジス
タ6のエミッタ電極は前記トランジスタ3のコレクタ電
極に接続されている。そしてトランジスタ5及びトラン
ジスタ6のコレクタ電極には負荷7及び負荷8が夫々接
続されている。
The common base connection circuit 4 has a pair of transistors 5 and 6 whose base electrodes are commonly connected.
And the emitter electrode of the transistor 5 is connected to the collector electrode of the transistor 2, and the emitter electrode of the transistor 6 is connected to the collector electrode of the transistor 3. Loads 7 and 8 are connected to the collector electrodes of the transistors 5 and 6, respectively.

【0004】今トランジスタ2及びトランジスタ3の電
圧電流変換コンダクタンスgmは動作電流I1で以下の
式のように表される。
Now, the voltage-current conversion conductance gm of the transistor 2 and the transistor 3 is expressed by the following equation with the operating current I1.

【0005】gm=ΔI/ΔV=I1/4VTT=kT/q となるここでΔIはトランジスタ2とトランジスタ3の
コレクタ電極から引き込む出力電流差、またΔVはトラ
ンジスタ2とトランジスタ3のベース電極に加わる入力
電圧差、さらにkはボルツマン定数、Tは絶対温度、q
は電子の電荷量である。
Gm = ΔI / ΔV = I1 / 4V T V T = kT / q where ΔI is the output current difference drawn from the collector electrodes of the transistors 2 and 3, and ΔV is the base electrode of the transistors 2 and 3. Input voltage difference, k is Boltzmann's constant, T is absolute temperature, q
Is the electron charge.

【0006】前記ベース接地回路4は対をなすトランジ
スタ5及びトランジスタ6のベース電極が共通接続さ
れ、ベース接地回路として動作するため、図7のアンプ
の電圧利得Vaは入力差動電圧をVin、負荷7及び負
荷8の抵抗値をRL(RL1=RL2)とすると、 Va=Vout/Vin=gm・RL=I1/4VT×R
L となり、動作電流I1と前記負荷7又は負荷8の抵抗値
RL及び物理定数qで表せる。
Since the base electrodes of the paired transistors 5 and 6 are commonly connected to the grounded base circuit 4 and operate as a grounded base circuit, the voltage gain Va of the amplifier shown in FIG. 7 has an input differential voltage of Vin and a load. If the resistance value of 7 and the load 8 is RL (RL1 = RL2), Va = Vout / Vin = gm.RL = I1 / 4V T × R
It becomes L 2, and can be represented by the operating current I1, the resistance value RL of the load 7 or the load 8 and the physical constant q.

【0007】前記ベース接地回路4のベース接地された
効果は、周波数応答を悪化させるミラー容量の無効化と
して知られている。具体的には差動電圧電流変換回路1
のトランジスタ2とトランジスタ3のコレクタ電圧は、
ベース接地回路4のトランジスタ5とトランジスタ6の
エミッタ電極に接続されているので、ほとんど変化する
ことがなく、前記トランジスタ2とトランジスタ3のベ
ース・コレクタ間の容量による負帰還での利得減少を防
ぐことができる。
The grounded base effect of the grounded base circuit 4 is known as nullifying the Miller capacitance which degrades the frequency response. Specifically, the differential voltage-current conversion circuit 1
The collector voltage of transistor 2 and transistor 3 of
Since it is connected to the emitter electrodes of the transistor 5 and the transistor 6 of the base-grounded circuit 4, it hardly changes and prevents the gain reduction due to the negative feedback due to the capacitance between the base and collector of the transistor 2 and the transistor 3. You can

【0008】しかしながら、ベース接地回路4のトラン
ジスタ5とトランジスタ6のコレクタ直流電圧は、前記
入力差動電圧Vin=0のとき、電源電圧VccからR
L×0.5×I1だけさがったものになるために利得を
大きくするためには前記動作電流I1を大きくするか、
抵抗値Rlを大きくする必要があり、おのずから限界が
ある。従って差動増幅回路1が本来持つ電圧電流変換の
非線形特性のために大入力かつ高利得を両立させること
が困難である。
However, the collector DC voltage of the transistors 5 and 6 of the grounded base circuit 4 changes from the power supply voltage Vcc to R when the input differential voltage Vin = 0.
The operating current I1 is increased in order to increase the gain because the gain is decreased by L × 0.5 × I1.
It is necessary to increase the resistance value Rl, which naturally has a limit. Therefore, it is difficult to achieve both high input and high gain because of the non-linear characteristic of the voltage-current conversion that the differential amplifier circuit 1 originally has.

【0009】図8は前述の従来回路の入力差動電圧対出
力電圧特性図である。前記入力差動電圧Vinに対する
出力電圧Vout1及びVout2はある電圧以上及び
ある電圧以下では目で見てわかるほど明らかに線形性が
失われており、入力差動信号を利得倍した精度のよい増
幅は期待できない。
FIG. 8 is a characteristic diagram of input differential voltage versus output voltage of the above-mentioned conventional circuit. The output voltages Vout1 and Vout2 with respect to the input differential voltage Vin have apparently lost linearity above a certain voltage and below a certain voltage, and accurate amplification by multiplying the input differential signal by gain is performed. I can't expect.

【0010】図9は前記図7の電子回路装置を改良した
電子回路装置のブロック図である。図1と異なるところ
は差動電圧電流変換回路1のトランジスタ2及びトラン
ジスタ3のエミッタ電極にエミッタ抵抗9及びエミッタ
抵抗10を接続した以外は同じである。前記エミッタ抵
抗9及びエミッタ抵抗10を挿入し、利得を減少させる
ことにより線形性を保つことを行っている。
FIG. 9 is a block diagram of an electronic circuit device obtained by improving the electronic circuit device of FIG. The difference from FIG. 1 is the same except that the emitter resistors 9 and 10 are connected to the emitter electrodes of the transistors 2 and 3 of the differential voltage-current conversion circuit 1. The linearity is maintained by inserting the emitter resistor 9 and the emitter resistor 10 and reducing the gain.

【0011】図10から分かるように、入力差動電圧V
inに対する出力電圧Vout1及びVout2はある
電圧以上及びある電圧以下での線形性が改善されている
ことが分る。しかし代わりに前記入力差動電圧Vinに
対する出力電圧Vout1及びVout2の変化が減少
していることが分る。
As can be seen from FIG. 10, the input differential voltage V
It can be seen that the output voltages Vout1 and Vout2 for in have improved linearity above a certain voltage and below a certain voltage. However, instead, it can be seen that the changes in the output voltages Vout1 and Vout2 with respect to the input differential voltage Vin are decreasing.

【0012】このときの電圧電流変換コンダクタンスg
mは gm=1/2RE (4VT/I1<<2REとする)、REはエミッタ抵抗
9及び10の抵抗値である。となり、電圧利得Vaが Va=gm・RL=RL/2RE となり、減少していることが分る。
Voltage-current conversion conductance g at this time
m is gm = 1 / 2RE (4V T / I1 << 2RE), and RE is the resistance value of the emitter resistors 9 and 10. Then, the voltage gain Va becomes Va = gm · RL = RL / 2RE, and it can be seen that the voltage gain Va is decreasing.

【0013】[0013]

【発明が解決しようとする課題】前述したように、差動
電圧電流変換回路に接続されたベース接地回路は周波数
応答を悪化させるミラー容量の無効化とする効果があ
る。前述した如く、差動電圧電流変換回路の各トランジ
スタのコレクタ電圧は、前記ベース接地回路の各トラン
ジスタのエミッタ電極に接続されているので、ほとんど
変化することがなく、差動電圧電流変換回路の各トラン
ジスタのベース・コレクタ間の容量による負帰還での利
得減少を防ぐことができる。
As described above, the grounded base circuit connected to the differential voltage-current conversion circuit has the effect of nullifying the mirror capacitance that deteriorates the frequency response. As described above, since the collector voltage of each transistor of the differential voltage-current conversion circuit is connected to the emitter electrode of each transistor of the base-grounded circuit, it hardly changes and each collector voltage of the differential voltage-current conversion circuit does not change. It is possible to prevent the gain reduction due to the negative feedback due to the capacitance between the base and collector of the transistor.

【0014】しかしながら、ベース接地回路の各トラン
ジスタのコレクタ直流電圧は、前記入力差動電圧が0V
のとき、電源電圧Vccから0.5I1×RL分だけさ
がったものになるために利得を大きくすることにおのず
から限界があり、差動増幅回路が本来持つ電圧電流変換
の非線形特性のために大入力かつ高利得を両立させるこ
とが困難である。
However, the input DC voltage of the collector DC voltage of each transistor of the grounded base circuit is 0V.
In this case, since the power supply voltage Vcc is reduced by 0.5I1 × RL, there is a limit in increasing the gain, and due to the nonlinear characteristic of the voltage-current conversion originally possessed by the differential amplifier circuit, a large input is obtained. Also, it is difficult to achieve both high gain.

【0015】そこで前記差動電圧電流変換回路の各トラ
ンジスタのエミッタ電極にエミッタ抵抗を接続すること
により前記結合抵抗を挿入し、利得を減少させることに
より線形性を保つことを行っている。しかし前記入力差
動電圧に対する出力電圧の変化が減少してしまい、利得
を減少させることなく線形性を保持することが出来なか
った。
Therefore, the emitter resistance of each transistor of the differential voltage current conversion circuit is connected to the emitter resistance to insert the coupling resistance, and the gain is reduced to maintain the linearity. However, the change in the output voltage with respect to the input differential voltage is reduced, and the linearity cannot be maintained without reducing the gain.

【0016】[0016]

【課題を解決するための手段】本発明は利得を減少させ
ることなく線形性を保持する電子回路装置を提供するも
ので、本発明は第1トランジスタと第2トランジスタと
よりなる差動電圧電流変換回路と、ベース電極が共通接
続され、コレクタ電極に夫々負荷が接続された第3トラ
ンジスタと第4トランジスタよりなるベース共通接続回
路とを備え、前記第3トランジスタのエミッタ電極を第
1トランジスタのコレクタ電極に接続すると共に前記第
4トランジスタのエミッタ電極を第2トランジスタのコ
レクタ電極に接続し、且つ第1トランジスタと第2トラ
ンジスタのコレクタ電極を抵抗で接続し、前記抵抗の中
点に前記差動電圧電流変換回路の動作電流を超えない一
定の電流を注入する電流源を備えた電子回路装置を提供
する。
SUMMARY OF THE INVENTION The present invention provides an electronic circuit device that maintains linearity without reducing gain, and the present invention is a differential voltage-current conversion circuit comprising a first transistor and a second transistor. A base common connection circuit including a third transistor and a fourth transistor in which a base electrode is commonly connected and a load is connected to each collector electrode, and a common base connection circuit including a third transistor and a fourth transistor, the emitter electrode of the third transistor being a collector electrode of the first transistor And the emitter electrode of the fourth transistor is connected to the collector electrode of the second transistor, and the collector electrodes of the first transistor and the second transistor are connected by a resistor, and the differential voltage current is connected to the middle point of the resistor. Provided is an electronic circuit device including a current source that injects a constant current that does not exceed the operating current of a conversion circuit.

【0017】又本発明は前記差動電圧電流変換回路の第
1トランジスタと第2トランジスタに加えられる入力差
動信号の電位差に応じ増幅された出力信号を負荷に取出
す増幅回路である電子回路装置を提供する。
Also, the present invention provides an electronic circuit device which is an amplifier circuit for taking out an output signal amplified according to a potential difference between input differential signals applied to the first transistor and the second transistor of the differential voltage-current conversion circuit to a load. provide.

【0018】本発明は対をなす第1トランジスタと第2
トランジスタとよりなる第1差動電圧電流変換回路と、
各々のコレクタ電極に負荷が接続され、エミッタ電極が
第1差動電圧電流変換回路の各トランジスタのコレクタ
電極に接続されたトランジスタを有する第2及び第3電
圧電流変換回路とを設け、前記第1差動電圧電流変換回
路の第1トランジスタと第2トランジスタのコレクタ電
極を抵抗で接続し、前記抵抗の中点に前記差動電圧電流
変換回路の動作電流を超えない一定の電流を注入する電
流源を備えた電子回路装置を提供する。
The present invention comprises a pair of first transistor and second transistor.
A first differential voltage-current conversion circuit including a transistor,
A load is connected to each collector electrode, and a second and a third voltage-current conversion circuit having a transistor whose emitter electrode is connected to the collector electrode of each transistor of the first differential voltage-current conversion circuit are provided. A current source in which the collector electrodes of the first transistor and the second transistor of the differential voltage-current conversion circuit are connected by a resistor, and a constant current which does not exceed the operating current of the differential voltage-current conversion circuit is injected at the midpoint of the resistor. There is provided an electronic circuit device including:

【0019】さらに本発明は第2及び第3電圧電流変換
回路に加えられる入力差動信号の周波数に応じて第1差
動電圧電流変換回路に加えられた入力差動信号と周波数
変換された出力信号を負荷に取出す周波数変換回路であ
る電子回路装置を提供する。
Further, according to the present invention, the input differential signal applied to the first differential voltage-current conversion circuit and the frequency-converted output according to the frequency of the input differential signal applied to the second and third voltage-current conversion circuits. Provided is an electronic circuit device which is a frequency conversion circuit for extracting a signal to a load.

【0020】本発明は対をなす第1トランジスタと第2
トランジスタとよりなる第1差動電圧電流変換回路と、
エミッタ電極が結合され、コレクタ電極に夫々負荷が接
続された第3トランジスタと第5トランジスタよりなる
第2差動電圧電流変換回路と、エミッタ電極が結合さ
れ、コレクタ電極に夫々負荷が接続された第4トランジ
スタと第6トランジスタよりなる第3差動電圧電流変換
回路とを備え、前記第3及び第5トランジスタのエミッ
タ電極を第1トランジスタのコレクタ電極に接続すると
共に前記第4及び第6トランジスタのエミッタ電極を第
2トランジスタのコレクタ電極に接続し、且つ第1トラ
ンジスタと第2トランジスタのコレクタ電極を抵抗で接
続し、前記第3トランジスタと第4トランジスタのベー
ス電極及び前記第5トランジスタと第6トランジスタの
ベース電極とを夫々共通接続し、前記抵抗の中点に前記
差動電圧電流変換回路の動作電流を超えない一定の電流
を注入する電流源を備えた電子回路装置を提供する。
The present invention includes a first transistor and a second transistor which form a pair.
A first differential voltage-current conversion circuit including a transistor,
A second differential voltage-current conversion circuit including a third transistor and a fifth transistor, each of which has an emitter electrode coupled thereto and a load connected to a collector electrode thereof, and a second differential voltage-current conversion circuit including an emitter electrode coupled to the collector electrode and a load coupled to the collector electrode thereof, respectively. A third differential voltage-current conversion circuit including four transistors and a sixth transistor, wherein the emitter electrodes of the third and fifth transistors are connected to the collector electrodes of the first transistor and the emitters of the fourth and sixth transistors are provided. An electrode connected to the collector electrode of the second transistor, a collector electrode of the first transistor and the second transistor connected by a resistor, and a base electrode of the third transistor and the fourth transistor and a base electrode of the fifth transistor and the sixth transistor. The base electrode is commonly connected, and the differential voltage-current conversion circuit is connected to the middle point of the resistance. To provide an electronic circuit device having a current source for injecting a constant current which does not exceed the operating current.

【0021】本発明は前記夫々共通接続した第3トラン
ジスタと第4トランジスタのベース電極及び前記第5ト
ランジスタと第6トランジスタのベース電極とに加えら
れる入力差動信号の周波数差に応じて第1差動電圧電流
変換回路に加えられる入力差動信号を周波数変換した出
力信号を負荷に取出す周波数変換回路である電子回路装
置を提供する。
The present invention provides a first difference according to a frequency difference of input differential signals applied to the base electrodes of the third transistor and the fourth transistor and the base electrodes of the fifth transistor and the sixth transistor, respectively, which are commonly connected. Provided is an electronic circuit device which is a frequency conversion circuit for taking out an output signal obtained by frequency-converting an input differential signal applied to a dynamic voltage / current conversion circuit to a load.

【0022】本発明は前記夫々共通接続した第3トラン
ジスタと第4トランジスタのベース電極及び前記第5ト
ランジスタと第6トランジスタのベース電極とに加えら
れる入力差動信号の電位差に応じて第1差動電圧電流変
換回路に加えられた入力差動信号が増幅された出力信号
を負荷に取出す可変利得増幅回路である電子回路装置を
提供する。
The present invention provides a first differential according to a potential difference of an input differential signal applied to the base electrodes of the third transistor and the fourth transistor and the base electrodes of the fifth transistor and the sixth transistor, respectively, which are commonly connected. Provided is an electronic circuit device which is a variable gain amplifier circuit for taking out an output signal obtained by amplifying an input differential signal applied to a voltage-current conversion circuit to a load.

【0023】[0023]

【発明の実施の形態】本発明の電子回路装置を図1〜図
6に従って説明する。
DETAILED DESCRIPTION OF THE INVENTION An electronic circuit device of the present invention will be described with reference to FIGS.

【0024】図1は本発明の電子回路装置の図で、差動
電圧電流変換回路11は1対の第1トランジスタ12と
第2トランジスタ13とよりなり、前記第1トランジス
タ12及び第2トランジスタ13のベース電極には入力
差動電圧Vinが加えられる。又前記第1トランジスタ
12及び第2トランジスタ13のエミッタ電極は結合抵
抗14及び結合抵抗15を介して結合されて、その中点
には動作電流I1を供給する第1電流源IAが接続され
ている。尚前記第1トランジスタ12と第2トランジス
タ13のエミッタ電極は抵抗を介さず直接結合し第1電
流源IAに接続してもよい。
FIG. 1 is a diagram of an electronic circuit device according to the present invention. A differential voltage-current conversion circuit 11 comprises a pair of a first transistor 12 and a second transistor 13, and the first transistor 12 and the second transistor 13 are provided. An input differential voltage Vin is applied to the base electrode of. Further, the emitter electrodes of the first transistor 12 and the second transistor 13 are coupled via a coupling resistor 14 and a coupling resistor 15, and a first current source IA for supplying an operating current I1 is connected to the midpoint thereof. . The emitter electrodes of the first transistor 12 and the second transistor 13 may be directly connected without a resistor and connected to the first current source IA.

【0025】ベース共通接続回路17はべース電極が共
通接続され接地された対をなす第3トランジスタ18と
第4トランジスタ19とよりなり、第3トランジスタ1
8のエミッタ電極は前記第1トランジスタ12のコレク
タ電極に接続され、また第4トランジスタ19のエミッ
タ電極は前記第2トランジスタ13のコレクタ電極に接
続されている。そして第3トランジスタ18及び第4ト
ランジスタ19のコレクタ電極には負荷20及び負荷2
1が夫々接続されている。
The common base connection circuit 17 is composed of a third transistor 18 and a fourth transistor 19, which are paired with their base electrodes commonly connected and grounded.
The emitter electrode of 8 is connected to the collector electrode of the first transistor 12, and the emitter electrode of the fourth transistor 19 is connected to the collector electrode of the second transistor 13. The collector electrodes of the third transistor 18 and the fourth transistor 19 have loads 20 and 2
1 is connected to each.

【0026】さらに第3トランジスタ18のエミッタ電
極が接続された前記第1トランジスタ12のコレクタ電
極と第4トランジスタ19のエミッタ電極が接続された
前記第2トランジスタ13のコレクタ電極とは抵抗22
及び抵抗23を介して結合され、その結合された中点に
差動電圧電流変換回路11の前記動作電流I1を超えな
い一定の電流I2を注入する第2電流源IBが接続され
ている。
Further, the collector electrode of the first transistor 12 to which the emitter electrode of the third transistor 18 is connected and the collector electrode of the second transistor 13 to which the emitter electrode of the fourth transistor 19 are connected are the resistor 22.
A second current source IB, which is coupled via a resistor 23 and injects a constant current I2 that does not exceed the operating current I1 of the differential voltage-current conversion circuit 11, is connected to the coupled midpoint.

【0027】本発明の電子回路装置は上述の構成をなし
差動電圧電流変換回路11の第1トランジスタ12のベ
ース電極に加えられる差動電位Vinに応じて負荷20
及び負荷21に出力電圧が得られる。ところで第2電流
源IBの電流I2は、抵抗22及び抵抗23を介して夫
々差動電圧電流変換回路11の第1トランジスタ12及
び第2トランジスタ23に注入されているため、負荷抵
抗20及び負荷抵抗21に流れる直流電流は結果的に減
少する。
The electronic circuit device of the present invention has the above-mentioned structure and has the load 20 depending on the differential potential Vin applied to the base electrode of the first transistor 12 of the differential voltage-current conversion circuit 11.
And an output voltage is obtained at the load 21. By the way, the current I2 of the second current source IB is injected into the first transistor 12 and the second transistor 23 of the differential voltage-current conversion circuit 11 via the resistors 22 and 23, respectively. The direct current flowing through 21 consequently decreases.

【0028】そこで、負荷20の抵抗値RL3及び負荷
21の抵抗値RL4を図7及び図9に示めす従来の負荷
7の抵抗値RL1及び負荷8の抵抗値RL2より大きく
することにより、直流電位を同じ電位まで下げることが
できる。この場合電圧利得Vaは、先の式と同様に Va=gm・RLa=RLa/2RE 但しRLa=RL3=RL4 で表される。
Therefore, the resistance value RL3 of the load 20 and the resistance value RL4 of the load 21 are made larger than the resistance value RL1 of the conventional load 7 and the resistance value RL2 of the load 8 shown in FIGS. Can be reduced to the same potential. In this case, the voltage gain Va is represented by Va = gm.RLa = RLa / 2RE, where RLa = RL3 = RL4, as in the above equation.

【0029】図2に示めすように負荷20、21の抵抗
値RL3、RL4を従来回路の負荷7、8の負荷抵抗値
RL1、RL2より大きくした分だけ図10に比して利
得を向上したことができる。さらに図8の従来の電子回
路装置の入力差動信号差対出力信号特性に比較して非線
形性向上が見て取れる。
As shown in FIG. 2, the resistances RL3 and RL4 of the loads 20 and 21 are made larger than the load resistances RL1 and RL2 of the loads 7 and 8 of the conventional circuit to improve the gain as compared with FIG. be able to. Further, improvement in non-linearity can be seen in comparison with the input differential signal difference vs. output signal characteristic of the conventional electronic circuit device of FIG.

【0030】図3に示めすように、非線形性の向上は差
動増幅回路1の入出力特性での比較でより具体的に理解
できる。横軸が入力差動信号の大きさで、縦軸が出力信
号の大きさを表し、点線□が図7の従来の電子回路装置
の入出力特性、点線×が図9の従来の電子回路装置の入
出力特性、実線◇が図1の本発明の電子回路装置の入出
力特性である。本発明の電子回路装置の入出力特性は図
7の従来の電子回路装置の入出力特性と比較して利得が
ほぼ同じであるにもかかわらず高調波成分が非常に小さ
く、右下に示したように歪特性が改善されていることを
分る。又電子回路装置の入出力特性は図9の従来の電子
回路装置の入出力特性と比較して歪特性はほぼ同じであ
るが、電圧利得が大きく取れていることが分る。
As shown in FIG. 3, the improvement of the non-linearity can be understood more concretely by comparing the input / output characteristics of the differential amplifier circuit 1. The horizontal axis represents the magnitude of the input differential signal, the vertical axis represents the magnitude of the output signal, the dotted line □ is the input / output characteristic of the conventional electronic circuit device of FIG. 7, and the dotted line × is the conventional electronic circuit device of FIG. I / O characteristics, solid line ⋄ is the input / output characteristics of the electronic circuit device of the present invention in FIG. The input / output characteristic of the electronic circuit device of the present invention is very small compared to the input / output characteristic of the conventional electronic circuit device of FIG. As shown, the distortion characteristics are improved. The input / output characteristic of the electronic circuit device is almost the same as the input / output characteristic of the conventional electronic circuit device shown in FIG. 9, but the voltage gain is large.

【0031】図4は本発明の電子回路装置を周波数変換
回路に用いた実施例を示めすブロック図である。第1差
動電圧電流変換回路22は前述と同様に1対の第1トラ
ンジスタ12と第2トランジスタ13とよりなり、前記
第1トランジスタ12及び第2トランジスタ13のベー
ス電極には入力差動信号f1が加えられる。又前記第1
トランジスタ12及び第2トランジスタ13のエミッタ
電極には直接に第1電流源I1が接続されているが、前
述と同様に結合抵抗14及び結合抵抗15を介して結合
し前記第1電流源I1に接続してもよい。
FIG. 4 is a block diagram showing an embodiment in which the electronic circuit device of the present invention is used in a frequency conversion circuit. The first differential voltage-current conversion circuit 22 is composed of a pair of the first transistor 12 and the second transistor 13 as described above, and the input differential signal f1 is applied to the base electrodes of the first transistor 12 and the second transistor 13. Is added. Also the first
Although the first current source I1 is directly connected to the emitter electrodes of the transistor 12 and the second transistor 13, the first current source I1 is connected to the first current source I1 via the coupling resistor 14 and the coupling resistor 15 as described above. You may.

【0032】第2差動電圧電流変換回路33は前記第3
トランジスタ18と第5トランジスタ35とよりなり、
第3差動電圧電流変換回路34は第4トランジスタ19
と第6トランジスタ36を有し、前記第5トランジスタ
35と第6トランジスタ36のコレクタ電極に夫々負荷
37と負荷38が接続されている。
The second differential voltage / current conversion circuit 33 includes the third differential voltage / current conversion circuit 33.
It consists of a transistor 18 and a fifth transistor 35,
The third differential voltage-current conversion circuit 34 includes the fourth transistor 19
And a sixth transistor 36, and loads 37 and 38 are connected to the collector electrodes of the fifth transistor 35 and the sixth transistor 36, respectively.

【0033】前記第3トランジスタ18と第4トランジ
スタ19のベース電極及び前記第5トランジスタ35と
第6トランジスタ36のベース電極とは各々接続されて
いる。
The base electrodes of the third transistor 18 and the fourth transistor 19 and the base electrodes of the fifth transistor 35 and the sixth transistor 36 are connected to each other.

【0034】又第3トランジスタ18と第5トランジス
タ35のエミッタ電極は結合され、前記第1差動電圧電
流変換回路32の第1トランジスタ12のコレクタ電極
に接続されている。同様に第4トランジスタ19と第6
トランジスタ36のエミッタ電極は結合され、第1差動
電圧電流変換回路32の第2トランジスタ13のコレク
タ電極に接続されている。
The emitter electrodes of the third transistor 18 and the fifth transistor 35 are coupled to each other and connected to the collector electrode of the first transistor 12 of the first differential voltage-current conversion circuit 32. Similarly, the fourth transistor 19 and the sixth transistor
The emitter electrode of the transistor 36 is coupled and connected to the collector electrode of the second transistor 13 of the first differential voltage-current conversion circuit 32.

【0035】前記第1トランジスタ12のコレクタ電極
と前記第2トランジスタ13のコレクタ電極とは前記と
同じく抵抗22及び抵抗23を介して結合され、その結
合された中点の第1電流源IAから第1差動電圧電流変
換回路32の動作電流I1を超えない一定に電流I2を
注入する第2電流源IBが接続されている。
The collector electrode of the first transistor 12 and the collector electrode of the second transistor 13 are coupled via the resistors 22 and 23 as described above, and the first current source IA at the coupled middle point A second current source IB for injecting a constant current I2 that does not exceed the operating current I1 of the first differential voltage-current conversion circuit 32 is connected.

【0036】図5に示めすように、共通接続された第3
トランジスタ18と第4トランジスタ19のベース電極
と第5トランジスタ35と第6トランジスタ36のベー
ス電極に周波数f2の入力差動信号が加えられる。この
場合にも第2電流源IBからの電流I2が第1トランジ
スタ12と第2トランジスタ13に抵抗22、23を介
して加えられるため、第1トランジスタ12と第2トラ
ンジスタ13のベース電極に加えられる図5(ロ)に示
す入力差動信号の周波数f1との和の周波数f1+f2
と差の周波数f1−f2との周波数変換された図5
(イ)に示す出力信号が負荷20、21等から歪みがな
く取出されることとなる。
As shown in FIG. 5, the commonly connected third
An input differential signal of frequency f2 is applied to the base electrodes of the transistor 18 and the fourth transistor 19 and the base electrodes of the fifth transistor 35 and the sixth transistor 36. Also in this case, the current I2 from the second current source IB is applied to the first transistor 12 and the second transistor 13 via the resistors 22 and 23, and thus is applied to the base electrodes of the first transistor 12 and the second transistor 13. The frequency f1 + f2 which is the sum of the frequency f1 of the input differential signal shown in FIG.
And frequency difference f1-f2 frequency conversion FIG.
The output signal shown in (a) is taken out from the loads 20, 21 and the like without distortion.

【0037】図6は本発明の電子回路装置を可変利得変
換回路に用いた実施例を示めすブロック図で、前記共通
接続された第3トランジスタ18と第4トランジスタ1
9のベース電極と第5トランジスタ35と第6トランジ
スタ36のベース電極に直流電位差Eoを有する信号が
加えられる。従って前述と同様に第2電流源IBからの
電流I2が第1トランジスタ12と第2トランジスタ1
3に抵抗22、23を介して加えられるため、前記第3
トランジスタ18と第4トランジスタ19のベース電極
と第5トランジスタ35と第6トランジスタ36のベー
ス電極に加えられる直流電位差の電流分配の比率を変え
ることにより負荷20、21から利得を変化させた歪み
がない大出力信号を取出され、可変利得増幅回路として
も利用できる。
FIG. 6 is a block diagram showing an embodiment in which the electronic circuit device of the present invention is used in a variable gain conversion circuit. The third transistor 18 and the fourth transistor 1 are commonly connected.
A signal having a DC potential difference Eo is applied to the base electrode of 9 and the base electrodes of the fifth transistor 35 and the sixth transistor 36. Therefore, as described above, the current I2 from the second current source IB is applied to the first transistor 12 and the second transistor 1
3 through the resistors 22 and 23, the third
By changing the ratio of the current distribution of the DC potential difference applied to the base electrodes of the transistor 18 and the fourth transistor 19 and the base electrodes of the fifth transistor 35 and the sixth transistor 36, there is no distortion in which the gain is changed from the loads 20 and 21. A large output signal can be taken out and used as a variable gain amplifier circuit.

【0038】[0038]

【発明の効果】本発明の電子回路装置はベース電極が共
通接続された第1トランジスタと第2トランジスタとよ
りなる第1差動電圧電流変換回路に、第2差動電圧変換
回路を構成する第3トランジスタと第4トランジスタの
エミッタ電極を第1及び第2トランジスタのコレクタ電
極に夫々接続すると共に、前記第1トランジスタと第2
トランジスタのコレクタ電極を抵抗で接続し、前記抵抗
の中点に前記差動電圧電流変換回路の動作電流を超えな
い一定の電流を注入したので、前記負荷に流れる直流電
位を減少させることことが出来、その分負荷の抵抗を大
きく出来る。従って負荷の抵抗を大きくした分だけ利得
を向上し、かつ歪を少なくした出力信号を取出すことが
できる。
According to the electronic circuit device of the present invention, the second differential voltage conversion circuit is formed by the first differential voltage current conversion circuit having the first transistor and the second transistor whose base electrodes are commonly connected. The emitter electrodes of the third transistor and the fourth transistor are connected to the collector electrodes of the first and second transistors, respectively, and the first transistor and the second transistor are connected.
Since the collector electrode of the transistor is connected by a resistor and a constant current that does not exceed the operating current of the differential voltage-current conversion circuit is injected at the middle point of the resistor, the DC potential flowing in the load can be reduced. Therefore, the load resistance can be increased accordingly. Therefore, it is possible to take out an output signal in which the gain is improved and the distortion is reduced by the amount that the resistance of the load is increased.

【0039】また本発明の電子回路装置は周波数変換回
路及び可変利得増幅回路に用いた場合にも前記と同様に
利得を向上し、かつ歪を少なくした出力信号を取出すこ
とができる。
Also, when the electronic circuit device of the present invention is used in a frequency conversion circuit and a variable gain amplifier circuit, it is possible to take out an output signal with improved gain and reduced distortion as described above.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の電子回路装置のブロック図である。FIG. 1 is a block diagram of an electronic circuit device of the present invention.

【図2】本発明の電子回路装置の入力差動信号の電位差
対出力電圧の関係を示めす特性図である。
FIG. 2 is a characteristic diagram showing the relationship between the potential difference of the input differential signal and the output voltage of the electronic circuit device of the present invention.

【図3】本発明及び従来の電子回路装置の入力差動信号
の大きさと出力信号の大きさの関係を示めす特性図であ
る。
FIG. 3 is a characteristic diagram showing the relationship between the magnitude of an input differential signal and the magnitude of an output signal of the electronic circuit device of the present invention and the related art.

【図4】本発明の電子回路装置の他の実施例を示めすブ
ロック図である。
FIG. 4 is a block diagram showing another embodiment of the electronic circuit device of the present invention.

【図5】本発明である図4の電子回路装置の出力信号の
波形図である。
5 is a waveform diagram of an output signal of the electronic circuit device of FIG. 4 according to the present invention.

【図6】本発明の電子回路装置の他の実施例を示めすブ
ロック図である。
FIG. 6 is a block diagram showing another embodiment of the electronic circuit device of the present invention.

【図7】従来の電子回路装置のブロック図である。FIG. 7 is a block diagram of a conventional electronic circuit device.

【図8】図7の従来の電子回路装置の入力差動信号の電
位差対出力電圧の関係を示めす特性図である。
8 is a characteristic diagram showing the relationship between the potential difference of the input differential signal and the output voltage of the conventional electronic circuit device of FIG.

【図9】従来の電子回路装置の他の実施例を示めすブロ
ック図である。
FIG. 9 is a block diagram showing another embodiment of the conventional electronic circuit device.

【図10】図9の従来の電子回路装置の入力差動信号の
電位差対出力電圧の関係を示めす特性図である。
10 is a characteristic diagram showing a relationship between a potential difference of an input differential signal and an output voltage of the conventional electronic circuit device of FIG.

【符号の説明】[Explanation of symbols]

11 差動電圧電流変換回路 12 第1トランジスタ 13 第2トランジスタ 14 結合抵抗 15 結合抵抗 17 ベース共通接続回路 18 第3トランジスタ 19 第4トランジスタ 20 負荷 21 負荷 22 抵抗 23 抵抗 32 第1差動電圧電流変換回路 33 第2差動電圧電流変換回路 34 第3差動電圧電流変換回路 35 第5トランジスタ 36 第6トランジスタ IB 電流源 11 Differential voltage-current conversion circuit 12 First transistor 13 Second transistor 14 Coupling resistance 15 Coupling resistance 17-base common connection circuit 18 Third transistor 19 Fourth transistor 20 load 21 load 22 Resistance 23 Resistance 32 first differential voltage-current conversion circuit 33 Second differential voltage-current conversion circuit 34 Third differential voltage-current conversion circuit 35 Fifth Transistor 36 sixth transistor IB current source

フロントページの続き (72)発明者 会沢 仁志 群馬県邑楽郡大泉町坂田1丁目1番1号 三洋エルエスアイデザイン・システムソフ ト株式会社内 Fターム(参考) 5J066 AA01 AA12 CA21 CA35 FA01 HA02 HA25 HA30 KA05 MA04 MA17 MA21 ND01 ND11 ND22 ND23 PD02 SA08 TA02 TA06 5J090 AA01 AA12 CA21 CA35 FA01 GN01 HA02 HA25 HA30 KA05 MA04 MA17 MA21 SA08 TA02 TA06 5J500 AA01 AA12 AC21 AC35 AF01 AH02 AH25 AH30 AK05 AM04 AM17 AM21 AS08 AS09 AT02 AT06 DN01 DN11 DN22 DN23 DP02 Continued front page    (72) Inventor Hitoshi Aizawa             1-1-1 Sakata, Oizumi-cho, Ora-gun, Gunma Prefecture             Sanyo LSI Design System Soft             Inside the corporation F term (reference) 5J066 AA01 AA12 CA21 CA35 FA01                       HA02 HA25 HA30 KA05 MA04                       MA17 MA21 ND01 ND11 ND22                       ND23 PD02 SA08 TA02 TA06                 5J090 AA01 AA12 CA21 CA35 FA01                       GN01 HA02 HA25 HA30 KA05                       MA04 MA17 MA21 SA08 TA02                       TA06                 5J500 AA01 AA12 AC21 AC35 AF01                       AH02 AH25 AH30 AK05 AM04                       AM17 AM21 AS08 AS09 AT02                       AT06 DN01 DN11 DN22 DN23                       DP02

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 対をなす第1トランジスタと第2トラン
ジスタとよりなる差動電圧電流変換回路と、 ベース電極が共通接続され、コレクタ電極に夫々負荷が
接続された第3トランジスタと第4トランジスタよりな
るベース共通接続回路とを備え、 前記第3トランジスタのエミッタ電極を第1トランジス
タのコレクタ電極に接続すると共に前記第4トランジス
タのエミッタ電極を第2トランジスタのコレクタ電極に
接続し、且つ前記第1トランジスタと第2トランジスタ
のコレクタ電極を抵抗で接続し、 前記抵抗の中点に前記差動電圧電流変換回路の前記動作
電流を超えない一定の電流を注入する電流源を備えるこ
とを特徴とする電子回路装置。
1. A differential voltage-current conversion circuit comprising a pair of a first transistor and a second transistor, and a third transistor and a fourth transistor in which a base electrode is commonly connected and a load is connected to each collector electrode. A base common connection circuit, the emitter electrode of the third transistor is connected to the collector electrode of the first transistor, the emitter electrode of the fourth transistor is connected to the collector electrode of the second transistor, and the first transistor is connected. And a collector electrode of a second transistor are connected by a resistor, and a current source for injecting a constant current that does not exceed the operating current of the differential voltage-current conversion circuit is provided at the middle point of the resistor. apparatus.
【請求項2】 前記差動電圧電流変換回路の第1トラン
ジスタと第2トランジスタに加えられる入力差動信号の
電位差に応じ増幅された出力信号を負荷より取出す増幅
回路であることを特徴とする請求項1記載の電子回路装
置。
2. An amplifier circuit for extracting an output signal amplified from a load according to a potential difference between input differential signals applied to a first transistor and a second transistor of the differential voltage-current conversion circuit. Item 2. The electronic circuit device according to Item 1.
【請求項3】 対をなす第1トランジスタと第2トラン
ジスタとよりなる第1差動電圧電流変換回路と、 各コレクタ電極に負荷が接続され、各エミッタ電極が第
1前記差動電圧電流変換回路の第1トランジスタと第2
トランジスタのコレクタ電極に夫々接続されたトランジ
スタを有する第2及び第3電圧電流変換回路とを備え、 前記第1差動電圧電流変換回路の第1トランジスタと第
2トランジスタのコレクタ電極を抵抗で接続し、 前記抵抗の中点に前記第1差動電圧電流変換回路の動作
電流を超えない一定の電流を注入する電流源を設けたこ
とを特徴とする電子回路装置。
3. A first differential voltage-current conversion circuit comprising a pair of a first transistor and a second transistor, a load connected to each collector electrode, and each emitter electrode having a first differential voltage-current conversion circuit. First transistor and second
A second and a third voltage-current conversion circuit each having a transistor connected to the collector electrode of the transistor, wherein the collector electrodes of the first and second transistors of the first differential voltage-current conversion circuit are connected by a resistor. An electronic circuit device, wherein a current source for injecting a constant current that does not exceed an operating current of the first differential voltage-current conversion circuit is provided at a middle point of the resistor.
【請求項4】 第2及び第3電圧電流変換回路に加えら
れる入力差動信号の周波数に応じて第1差動電圧電流変
換回路に加えられた入力差動信号を周波数変換した出力
信号を負荷より取出す周波数変換回路であることを特徴
とする請求項3に記載の電子回路装置。
4. An output signal obtained by frequency-converting the input differential signal applied to the first differential voltage-current conversion circuit according to the frequency of the input differential signal applied to the second and third voltage-current conversion circuits. The electronic circuit device according to claim 3, wherein the electronic circuit device is a frequency conversion circuit to be extracted.
【請求項5】 対をなす第1トランジスタと第2トラン
ジスタとよりなる第1差動電圧電流変換回路と、 コレクタ電極に夫々負荷が接続された第3トランジスタ
と第5トランジスタよりなる第2差動電圧電流変換回路
と、 コレクタ電極に夫々負荷が接続された第4トランジスタ
と第6トランジスタよりなる第3差動電圧電流変換回路
とを備え、 前記第3トランジスタと第4トランジスタのベース電極
及び前記第5トランジスタと第6トランジスタのベース
電極とを夫々共通接続し、 前記第3及び第5トランジスタのエミッタ電極を第1ト
ランジスタのコレクタ電極に接続すると共に前記第4及
び第6トランジスタのエミッタ電極を第2トランジスタ
のコレクタ電極に接続し、且つ前記第1トランジスタと
第2トランジスタのコレクタ電極を抵抗で接続し、 前記抵抗の中点に第1差動電圧電流変換回路の前記動作
電流を超えない一定の電流を注入する電流源を設けるこ
とを特徴とする電子回路装置。
5. A first differential voltage-current conversion circuit comprising a pair of a first transistor and a second transistor, and a second differential comprising a third transistor and a fifth transistor whose loads are respectively connected to collector electrodes. A voltage-current conversion circuit; and a third differential voltage-current conversion circuit composed of a fourth transistor and a sixth transistor, each of which has a load connected to a collector electrode, the base electrode of the third transistor and the fourth transistor, and the third transistor. The 5th transistor and the base electrode of the 6th transistor are commonly connected to each other, the emitter electrodes of the 3rd and 5th transistors are connected to the collector electrode of the 1st transistor, and the emitter electrodes of the 4th and 6th transistors are connected to the 2nd The collector electrodes of the transistors, and the collector electrodes of the first and second transistors Connect anti electronic circuit apparatus characterized by providing a current source for injecting a constant current, wherein no more than the operating current of the first differential voltage-to-current conversion circuit to the midpoint of the resistor.
【請求項6】 前記夫々共通接続した第3トランジスタ
と第4トランジスタのベース電極及び前記第5トランジ
スタと第6トランジスタのベース電極とに加えられる入
力差動信号の周波数差に応じて第1差動電圧電流変換回
路に加えられる入力差動信号を周波数変換した出力信号
を負荷に取出す周波数変換回路であることを特徴とする
請求項5に記載の電子回路装置。
6. The first differential according to the frequency difference of the input differential signals applied to the base electrodes of the third transistor and the fourth transistor and the base electrodes of the fifth transistor and the sixth transistor, respectively, which are commonly connected to each other. The electronic circuit device according to claim 5, wherein the electronic circuit device is a frequency conversion circuit that takes out an output signal obtained by frequency-converting an input differential signal applied to the voltage-current conversion circuit to a load.
【請求項7】 前記夫々共通接続した第3トランジスタ
と第4トランジスタのベース電極及び前記第5トランジ
スタと第6トランジスタのベース電極とに加えられる入
力差動信号の電位差に応じて第1差動電圧電流変換回路
に加えられる入力差動信号が増幅された出力信号を負荷
に取出す可変利得増幅回路であることを特徴とする請求
項5に記載の電子回路装置。
7. A first differential voltage according to a potential difference between input differential signals applied to the base electrodes of the third transistor and the fourth transistor and the base electrodes of the fifth transistor and the sixth transistor, respectively, which are commonly connected to each other. The electronic circuit device according to claim 5, wherein the electronic circuit device is a variable gain amplifier circuit that takes out an output signal obtained by amplifying an input differential signal applied to the current conversion circuit to a load.
JP2002050942A 2002-02-27 2002-02-27 Electronic circuit equipment Expired - Fee Related JP3992512B2 (en)

Priority Applications (1)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002050942A JP3992512B2 (en) 2002-02-27 2002-02-27 Electronic circuit equipment

Related Child Applications (1)

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JP2007115910A Division JP2007195260A (en) 2007-04-25 2007-04-25 Electronic circuit device

Publications (2)

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JP2003258573A true JP2003258573A (en) 2003-09-12
JP3992512B2 JP3992512B2 (en) 2007-10-17

Family

ID=28663041

Family Applications (1)

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Country Status (1)

Country Link
JP (1) JP3992512B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007274631A (en) * 2006-03-31 2007-10-18 Sharp Corp Differential amplifier circuit
JP2014096760A (en) * 2012-11-12 2014-05-22 Sumitomo Electric Ind Ltd Differential amplification circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007274631A (en) * 2006-03-31 2007-10-18 Sharp Corp Differential amplifier circuit
JP4545705B2 (en) * 2006-03-31 2010-09-15 シャープ株式会社 Differential amplifier circuit
JP2014096760A (en) * 2012-11-12 2014-05-22 Sumitomo Electric Ind Ltd Differential amplification circuit

Also Published As

Publication number Publication date
JP3992512B2 (en) 2007-10-17

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