JP2003243567A - Reinforcing material for semiconductor device - Google Patents

Reinforcing material for semiconductor device

Info

Publication number
JP2003243567A
JP2003243567A JP2002038120A JP2002038120A JP2003243567A JP 2003243567 A JP2003243567 A JP 2003243567A JP 2002038120 A JP2002038120 A JP 2002038120A JP 2002038120 A JP2002038120 A JP 2002038120A JP 2003243567 A JP2003243567 A JP 2003243567A
Authority
JP
Japan
Prior art keywords
semiconductor device
semiconductor element
reinforcing
reinforcing member
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002038120A
Other languages
Japanese (ja)
Other versions
JP3858719B2 (en
Inventor
Tadahiko Sakai
忠彦 境
Mitsuru Osono
満 大園
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2002038120A priority Critical patent/JP3858719B2/en
Publication of JP2003243567A publication Critical patent/JP2003243567A/en
Application granted granted Critical
Publication of JP3858719B2 publication Critical patent/JP3858719B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping

Landscapes

  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reinforcing material for semiconductor device to facilitate the handling of a thin semiconductor device by reinforcing it. <P>SOLUTION: In a process for manufacturing a semiconductor device 9 by bonding a reinforcing member 14a to a thin semiconductor element 1a, the reinforcing material for the semiconductor device used as a material of the reinforcing member 14a is composed of a thin planar main plate, and an adhesive layer 4b of resin adhesive material having a low elastic modulus formed on one side of the main plate. The material is selected such that, under assembled state of the semiconductor device 9, the bending rigidity of the reinforcing member 14a is higher than that of the semiconductor element 1a, and thickness dimensions are set such that the adhesive layer 4b allows the deformation of the semiconductor element 1a under a state where the reinforcing member 14a is bonded to the semiconductor element 1a. According to the arrangement, the handling of the thin semiconductor element 1a can be facilitated by reinforcing it. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、薄型の半導体素子
に補強部材を接合して成る半導体装置の製造工程におい
て前記補強部材として用いられる半導体装置用の補強材
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reinforcing member for a semiconductor device, which is used as the reinforcing member in a manufacturing process of a semiconductor device which is formed by joining a reinforcing member to a thin semiconductor element.

【0002】[0002]

【従来の技術】電子機器の基板などに実装される半導体
装置は、ウェハ状態で回路パターン形成が行われた半導
体素子にリードフレームのピンや金属バンプなどを接続
するとともに樹脂などで封止するパッケージング工程を
経て製造されている。最近の電子機器の小型化に伴って
半導体装置の小型化も進み、中でも半導体素子を薄くす
る取り組みが活発に行われている。半導体素子が薄型化
することにより、実装後の熱応力が半導体素子が撓むこ
とによって緩和され、接合信頼性が向上するという利点
がある。
2. Description of the Related Art A semiconductor device mounted on a substrate of an electronic device is a package in which pins or metal bumps of a lead frame are connected to a semiconductor element on which a circuit pattern has been formed in a wafer state and which is sealed with resin or the like. It is manufactured through a manufacturing process. With the recent miniaturization of electronic devices, the miniaturization of semiconductor devices is also advancing, and in particular, efforts to reduce the thickness of semiconductor elements are being actively made. The thinning of the semiconductor element has an advantage that the thermal stress after mounting is relieved by the bending of the semiconductor element and the joint reliability is improved.

【0003】薄化された半導体素子は外力に対する強度
が弱くハンドリング時のダメージを受けやすいことか
ら、従来より薄化された半導体素子を用いた半導体装置
は、半導体素子を補強のための樹脂層で封止する構造が
一般的である。
Since a thinned semiconductor element has low strength against external force and is easily damaged during handling, a semiconductor device using a thinner semiconductor element than before has a resin layer for reinforcing the semiconductor element. A sealing structure is generally used.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、薄い半
導体素子の表面に樹脂層を形成する工程においては、樹
脂層形成時の硬化収縮による半導体素子の反りや割れな
どの不具合が発生しやすいものであった。この問題は半
導体素子が薄化するほど顕著となり、100μm以下の
極薄の半導体素子では樹脂封止することすら困難な状況
となる。
However, in the step of forming the resin layer on the surface of the thin semiconductor element, defects such as warpage and cracks of the semiconductor element due to curing shrinkage during the formation of the resin layer are likely to occur. It was This problem becomes more remarkable as the semiconductor element becomes thinner, and even an extremely thin semiconductor element having a thickness of 100 μm or less is difficult to be resin-sealed.

【0005】そこで本発明は、薄化された半導体素子を
補強して取り扱いを容易にするために用いられる半導体
装置用の補強材を提供することを目的とする。
Therefore, an object of the present invention is to provide a reinforcing material for a semiconductor device which is used to reinforce a thinned semiconductor element to facilitate handling.

【0006】[0006]

【課題を解決するための手段】請求項1記載の半導体装
置用の補強材は、薄型の半導体素子に補強部材を接合し
て成る半導体装置の製造工程において前記補強部材とし
て用いられる半導体装置用の補強材であって、薄板形状
の主板と、この主板の一方側の面に形成され低弾性係数
の樹脂接着材より成る接着層とを備え、前記補強部材の
曲げ剛性は半導体素子の曲げ剛性よりも大きく、かつ半
導体素子に補強部材を接合した状態において前記樹脂接
着材は半導体素子の変形を許容する。
A reinforcing material for a semiconductor device according to claim 1 is used for the semiconductor device used as the reinforcing member in a manufacturing process of a semiconductor device, which is formed by joining a reinforcing member to a thin semiconductor element. A reinforcing material, which includes a thin-shaped main plate and an adhesive layer formed on one surface of the main plate and made of a resin adhesive having a low elastic coefficient, and the bending rigidity of the reinforcing member is higher than that of the semiconductor element. Is large, and the resin adhesive allows the semiconductor element to be deformed when the reinforcing member is joined to the semiconductor element.

【0007】請求項2記載の半導体装置用の補強材は、
請求項1記載の半導体装置用の補強材であって、前記補
強材は、円板形状である。
A reinforcing material for a semiconductor device according to claim 2 is
The reinforcing material for a semiconductor device according to claim 1, wherein the reinforcing material has a disc shape.

【0008】請求項3記載の半導体装置用の補強材は、
請求項1記載の半導体装置用の補強材であって、前記補
強材は、連続したシート状である。
A reinforcing material for a semiconductor device according to claim 3 is
The reinforcing material for a semiconductor device according to claim 1, wherein the reinforcing material has a continuous sheet shape.

【0009】請求項4記載の半導体装置用の補強材は、
請求項1乃至3記載の半導体装置用の補強材であって、
前記接着層の表面を覆うセパレータテープを備えた。
A reinforcing material for a semiconductor device according to claim 4 is
A reinforcing material for a semiconductor device according to claim 1,
A separator tape covering the surface of the adhesive layer was provided.

【0010】本発明によれば、半導体装置用の補強材
を、薄板形状の主板と、この主板の一方側の面に形成さ
れ低弾性係数の樹脂接着材より成る接着層とで構成し、
補強部材の曲げ剛性を半導体素子の曲げ剛性よりも大き
く、かつ半導体素子に補強部材を接合した状態において
樹脂接着材が半導体素子の変形を許容するような材質や
厚みの設定とすることにより、薄化された半導体素子を
補強して取り扱いを容易にすることができる。
According to the present invention, a reinforcing material for a semiconductor device is composed of a thin main plate and an adhesive layer formed on one surface of the main plate and made of a resin adhesive having a low elastic coefficient,
By setting the material and thickness such that the bending rigidity of the reinforcing member is larger than that of the semiconductor element and the resin adhesive allows the deformation of the semiconductor element when the reinforcing member is bonded to the semiconductor element, It is possible to reinforce the semiconductor element that has been made into a semiconductor and to make it easy to handle.

【0011】[0011]

【発明の実施の形態】次に本発明の実施の形態を図面を
参照して説明する。図1、図3は本発明の一実施の形態
の半導体装置の製造方法の工程説明図、図2は本発明の
一実施の形態の半導体装置用の補強材の斜視図、図4は
本発明の一実施の形態の半導体装置の実装方法の工程説
明図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. 1 and 3 are process explanatory views of a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a perspective view of a reinforcing material for a semiconductor device according to an embodiment of the present invention, and FIG. FIG. 6 is an explanatory process diagram of the method for mounting the semiconductor device of the one embodiment.

【0012】まず図1〜図3を参照して、薄型の半導体
素子に補強部材を接合して成る半導体装置の製造方法に
ついて説明する。図1(a)において、1は複数の半導
体素子が形成された半導体ウェハである。半導体ウェハ
1の上面には、外部接続用のバンプ2が形成されてい
る。図1(b)に示すように、半導体ウェハ1の上面の
バンプ形成面(電極形成面)には保護シート3が貼着さ
れ、保護シート3によって補強された状態で電極形成面
の裏面の薄化加工が行われる。薄化加工手段としては、
砥石を用いた機械研磨や、ドライエッチング装置による
エッチング、さらには薬液の化学反応を利用してエッチ
ングを行うものがある。これにより、半導体ウェハ1は
約50μmの厚さまで薄化される。
First, with reference to FIGS. 1 to 3, a method of manufacturing a semiconductor device in which a reinforcing member is joined to a thin semiconductor element will be described. In FIG. 1A, 1 is a semiconductor wafer on which a plurality of semiconductor elements are formed. Bumps 2 for external connection are formed on the upper surface of the semiconductor wafer 1. As shown in FIG. 1B, a protective sheet 3 is attached to the bump forming surface (electrode forming surface) on the upper surface of the semiconductor wafer 1, and the thin back surface of the electrode forming surface is reinforced by the protective sheet 3. Chemical processing is performed. As thinning processing means,
There are those which perform mechanical polishing using a grindstone, etching by a dry etching apparatus, and further etching by utilizing a chemical reaction of a chemical solution. As a result, the semiconductor wafer 1 is thinned to a thickness of about 50 μm.

【0013】次に、薄化された半導体ウェハ1と補強材
4との接合が行われる。ここで図2を参照して、補強材
4について説明する。図2(a)に示すように、補強材
4は円板形状の薄板の主板4aを主体としている。主板
4aとしては、樹脂やセラミックまたは金属などの材質
を薄板状に成型したものが用いられる。この補強材4
は、各半導体素子毎に切り分けられて半導体装置を形成
した状態で、半導体装置のハンドリング用の保持部とし
て機能すると共に、半導体素子を外力や衝撃から保護す
る補強部材としての役割をも有するものである。このた
め主板4aは、薄化された半導体素子の曲げ剛性よりも
大きな曲げ剛性を有する充分な厚さとなっている。
Next, the thinned semiconductor wafer 1 and the reinforcing member 4 are joined. Here, the reinforcing member 4 will be described with reference to FIG. 2. As shown in FIG. 2A, the reinforcing member 4 is mainly composed of a disc-shaped thin main plate 4a. As the main plate 4a, a thin plate-shaped material such as resin, ceramic or metal is used. This reinforcement 4
The semiconductor device functions as a holding portion for handling the semiconductor device in a state where the semiconductor device is formed by being cut into each semiconductor element, and also has a role as a reinforcing member that protects the semiconductor element from an external force or an impact. is there. Therefore, the main plate 4a has a sufficient thickness that has a bending rigidity greater than that of the thinned semiconductor element.

【0014】主板4aの一方側の面には、接着層4bが
形成されている。接着層4bは低弾性係数の樹脂接着材
より成り、エラストマーなど接合状態における弾性係数
が小さく、小さな外力で容易に伸縮する材質が用いられ
る。そして後述するように、半導体装置完成後の半導体
素子に補強部材を接合した状態において、接着層4bが
半導体素子の変形を許容するような材質や厚み寸法の構
成が選択される。
An adhesive layer 4b is formed on one surface of the main plate 4a. The adhesive layer 4b is made of a resin adhesive having a low elastic coefficient, and a material such as an elastomer having a small elastic coefficient in a joined state and easily expanding and contracting with a small external force is used. Then, as will be described later, in the state where the reinforcing member is bonded to the semiconductor element after the completion of the semiconductor device, the material and the thickness dimension are selected so that the adhesive layer 4b allows the deformation of the semiconductor element.

【0015】接着層4bの表面には、セパレータテープ
4cが貼着されている。セパレータテープ4cは、補強
材4の使用時まで接着層4bの表面を覆って保護するた
めに形成されており、補強材4の使用に先立って接着層
4bから剥離される。補強材4のサイズは、対象とされ
る半導体ウェハ1のサイズと同じかそれよりも幾分大き
いものが用いられる。
A separator tape 4c is attached to the surface of the adhesive layer 4b. The separator tape 4c is formed to cover and protect the surface of the adhesive layer 4b until the reinforcing material 4 is used, and is separated from the adhesive layer 4b before the reinforcing material 4 is used. The size of the reinforcing material 4 is the same as or slightly larger than the size of the target semiconductor wafer 1.

【0016】図1(c)に示すように、補強材4との接
合に際しては、半導体ウェハ1はバンプ形成面を下向き
にして反転された状態で圧着台6上に載置される。そし
てセパレータテープ4cが剥離され接着層4bが露呈し
た状態の補強材4を、接着層4bを下向きにして圧着ツ
ール7に保持させる。次いで図1(d)に示すように、
接着層4bを半導体ウェハ1のバンプ形成面の裏面に密
着させて圧着ツール7によって補強材4を押圧するとと
もに、圧着台6と圧着ツール7によって加熱する。これ
により、半導体ウェハ1は接着層4bによって主板4a
に接合される。
As shown in FIG. 1C, the semiconductor wafer 1 is mounted on the crimping table 6 in an inverted state with the bump forming surface facing downward when bonding the reinforcing material 4. Then, the reinforcing material 4 in a state where the separator tape 4c is peeled off and the adhesive layer 4b is exposed is held by the pressure bonding tool 7 with the adhesive layer 4b facing downward. Then, as shown in FIG.
The adhesive layer 4b is brought into close contact with the back surface of the bump forming surface of the semiconductor wafer 1, the reinforcing material 4 is pressed by the pressure bonding tool 7, and the pressure bonding table 6 and the pressure bonding tool 7 heat the material. As a result, the semiconductor wafer 1 is bonded to the main plate 4a by the adhesive layer 4b.
To be joined to.

【0017】なお、上記例では円板形状の補強材4を用
いる例を示したが、図2(b)に示すように、ロール状
に卷回された状態で供給される連続したシート状材料か
ら、所要長さ分だけ切り出した補強材4’を用いるよう
にしてもよい。この例においても、補強材4’は前述の
補強材4と同様の材質で製作された薄板の主板4’aを
主体としており、主板4’aの一方側の面には、接着層
4’bが形成されている。そして接着層4’bの表面を
覆って、セパレータテープ4’cが貼着されている。
In the above example, the disc-shaped reinforcing member 4 is used. However, as shown in FIG. 2B, a continuous sheet-shaped material supplied in a rolled state. Therefore, the reinforcing member 4 ′ cut out by the required length may be used. Also in this example, the reinforcing material 4'is mainly composed of a thin main plate 4'a made of the same material as the above-mentioned reinforcing material 4, and the adhesive layer 4'on one surface of the main plate 4'a. b is formed. Then, a separator tape 4'c is attached to cover the surface of the adhesive layer 4'b.

【0018】次いで、図3(a)に示すように、ダイシ
ングシート8によって保持された補強材4および半導体
ウェハ1はダイシング工程に送られる。ここでは、図3
(b)に示すように補強材4の主板4aと半導体ウェハ
1とを異なるダイシング幅で切り分ける2段ダイシング
が行われる。すなわち半導体ウェハ1はダイシング幅b
1で切り分けられて個片の半導体素子1aに分割され、
主板4aはb1よりも狭いダイシング幅b2で切り分け
られて個片の補強部材14aとなる。
Next, as shown in FIG. 3A, the reinforcing material 4 and the semiconductor wafer 1 held by the dicing sheet 8 are sent to the dicing process. Here, FIG.
As shown in (b), two-step dicing is performed in which the main plate 4a of the reinforcing member 4 and the semiconductor wafer 1 are cut with different dicing widths. That is, the semiconductor wafer 1 has a dicing width b.
1 is divided into individual semiconductor elements 1a,
The main plate 4a is divided into dicing widths b2 narrower than b1 to form individual reinforcing members 14a.

【0019】そして、接着材4bによって半導体素子1
aと接着された補強部材14aをダイシングシート8か
ら剥離することにより、図3(c)に示すように個片の
半導体装置9が完成する。この半導体装置9は、外部接
続用の電極であるバンプ2が形成された半導体素子1a
と、この半導体素子1aの電極形成面の裏面に接着層4
bにより接合された補強部材14aとを備えた構成とな
っており、補強部材14aのサイズB2は半導体素子1
aのサイズB1よりも大きく、その外周端は、半導体素
子1aの外周端よりも外側に突出している。補強部材1
4aは半導体素子1aに接着層4bによって接合された
構造となっており、接着層4bは低弾性係数数の樹脂接
着材であるので、半導体素子1aの変形を許容する状態
で、この半導体素子1aを補強部材14aに接合してい
る。
Then, the semiconductor element 1 is bonded by the adhesive 4b.
By peeling the reinforcing member 14a bonded to a from the dicing sheet 8, the individual semiconductor device 9 is completed as shown in FIG. The semiconductor device 9 includes a semiconductor element 1a having bumps 2 which are electrodes for external connection.
And the adhesive layer 4 on the back surface of the electrode formation surface of the semiconductor element 1a.
and the reinforcing member 14a joined by b. The size B2 of the reinforcing member 14a is the semiconductor element 1
The size is larger than the size B1 of a, and the outer peripheral edge of the a projects outside the outer peripheral edge of the semiconductor element 1a. Reinforcement member 1
4a has a structure in which it is bonded to the semiconductor element 1a by an adhesive layer 4b. Since the adhesive layer 4b is a resin adhesive material having a low elastic modulus number, the semiconductor element 1a can be deformed in a state in which it is allowed to deform. Is joined to the reinforcing member 14a.

【0020】この半導体装置9の実装について図4を参
照して説明する。図4(a)に示すように、半導体装置
9は補強部材14aの上面を実装ヘッド10によって吸
着して保持され、実装ヘッド10を移動させることによ
り、基板11の上方に位置する。そして半導体装置9の
バンプ2を基板11の電極12に位置合わせした状態
で、実装ヘッド10を下降させて半導体素子1aのバン
プ2を基板11の電極12に上に着地させる。
The mounting of the semiconductor device 9 will be described with reference to FIG. As shown in FIG. 4A, the semiconductor device 9 is held on the upper surface of the reinforcing member 14 a by being adsorbed and held by the mounting head 10, and is positioned above the substrate 11 by moving the mounting head 10. Then, with the bump 2 of the semiconductor device 9 aligned with the electrode 12 of the substrate 11, the mounting head 10 is lowered to land the bump 2 of the semiconductor element 1 a on the electrode 12 of the substrate 11.

【0021】その後基板11を加熱することにより、バ
ンプ2を電極12に半田接合する。すなわち、半導体装
置9を基板11へ搭載する際のハンドリングにおいて、
実装ヘッド10によって、補強部材14aを保持する。
なおバンプ2の電極12との接合は、半田接合以外にバ
ンプ2と電極12を圧接させた状態で樹脂によって半導
体装置9と基板11を接着する方法、あるいはバンプ2
と電極12との金属間接合による方法、あるいは導電性
樹脂接着材による接合方法を用いてもよい。
Thereafter, the substrate 2 is heated to solder the bumps 2 to the electrodes 12. That is, in handling when mounting the semiconductor device 9 on the substrate 11,
The mounting head 10 holds the reinforcing member 14a.
The bonding of the bump 2 to the electrode 12 is performed by a method of bonding the semiconductor device 9 and the substrate 11 with resin in a state where the bump 2 and the electrode 12 are pressed to each other in addition to solder bonding.
A method of joining between the metal and the electrode 12 by metal, or a method of joining with a conductive resin adhesive may be used.

【0022】この半導体装置9を基板11に実装して成
る実装構造は、半導体装置9の電極であるバンプ2をワ
ークである基板11の電極12に接合することにより半
導体装置9が基板11に固定される形態となっている。
図4(c)に示すように、実装後に基板11に何らかの
外力により、撓み変形が発生した場合には、半導体素子
1aは薄くて撓みやすいくしかも接着層4bは低弾性係
数の変形しやすい材質を用いていることから、基板11
の撓み変形に対して半導体素子1aと接着層4bのみが
追従して変形する。
In the mounting structure in which the semiconductor device 9 is mounted on the substrate 11, the semiconductor device 9 is fixed to the substrate 11 by bonding the bump 2 which is the electrode of the semiconductor device 9 to the electrode 12 of the substrate 11 which is the work. It is in the form of being.
As shown in FIG. 4C, when the substrate 11 is flexed and deformed by some external force after mounting, the semiconductor element 1a is thin and easily bent, and the adhesive layer 4b has a low elastic modulus and is easily deformed. Since the substrate 11 is used,
Only the semiconductor element 1a and the adhesive layer 4b follow and deform in accordance with the bending deformation.

【0023】したがって上記実装構造によれば、実装後
にアンダーフィル樹脂を充填するなどの補強処理を必要
とすることなく接合部の応力が緩和され、単に半導体素
子1aと補強部材14aとを接着層4bにより接合する
という簡易な形態のパッケージ構造で、実装後の信頼性
の確保が実現される。
Therefore, according to the mounting structure described above, the stress at the joint portion is relieved without the need for a reinforcing process such as filling an underfill resin after mounting, and the semiconductor element 1a and the reinforcing member 14a are simply bonded together by the adhesive layer 4b. With a simple package structure in which they are joined together, reliability after mounting can be ensured.

【0024】[0024]

【発明の効果】本発明によれば、半導体装置用の補強材
を、薄板形状の主板と、この主板の一方側の面に形成さ
れ低弾性係数の樹脂接着材より成る接着層とで構成し、
補強部材の曲げ剛性を半導体素子の曲げ剛性よりも大き
く、かつ半導体素子に補強部材を接合した状態において
樹脂接着材が半導体素子の変形を許容するような材質、
厚み設定としたので、薄化された半導体素子を補強して
取り扱いを容易にすることができる。
According to the present invention, a reinforcing material for a semiconductor device is constituted by a thin main plate and an adhesive layer formed on one surface of the main plate and made of a resin adhesive having a low elastic coefficient. ,
A material such that the bending rigidity of the reinforcing member is larger than that of the semiconductor element, and the resin adhesive allows deformation of the semiconductor element when the reinforcing member is bonded to the semiconductor element,
Since the thickness is set, the thinned semiconductor element can be reinforced to facilitate handling.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施の形態の半導体装置の製造方法
の工程説明図
FIG. 1 is a process explanatory view of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

【図2】本発明の一実施の形態の半導体装置用の補強材
の斜視図
FIG. 2 is a perspective view of a reinforcing member for a semiconductor device according to an embodiment of the present invention.

【図3】本発明の一実施の形態の半導体装置の製造方法
の工程説明図
FIG. 3 is a process explanatory diagram of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

【図4】本発明の一実施の形態の半導体装置の実装方法
の工程説明図
FIG. 4 is a process explanatory diagram of a semiconductor device mounting method according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 半導体ウェハ 1a 半導体素子 2 バンプ 3 保護シート 4 補強材 4a 主板 4b 接着層 9 半導体装置 14a 補強部材 1 Semiconductor wafer 1a Semiconductor element 2 bumps 3 protection sheet 4 Reinforcement material 4a Main plate 4b adhesive layer 9 Semiconductor devices 14a Reinforcing member

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】薄型の半導体素子に補強部材を接合して成
る半導体装置の製造工程において前記補強部材として用
いられる半導体装置用の補強材であって、薄板形状の主
板と、この主板の一方側の面に形成され低弾性係数の樹
脂接着材より成る接着層とを備え、前記補強部材の曲げ
剛性は半導体素子の曲げ剛性よりも大きく、かつ半導体
素子に補強部材を接合した状態において前記樹脂接着材
は半導体素子の変形を許容することを特徴とする半導体
装置用の補強材。
1. A reinforcing material for a semiconductor device, which is used as the reinforcing member in a manufacturing process of a semiconductor device, comprising a thin semiconductor element and a reinforcing member bonded to the thin semiconductor element, the thin main plate and one side of the main plate. And a bonding layer made of a resin bonding material having a low elastic coefficient, the bending rigidity of the reinforcing member is larger than the bending rigidity of the semiconductor element, and the resin bonding is performed in a state where the reinforcing member is bonded to the semiconductor element. The material is a reinforcing material for a semiconductor device, which allows deformation of a semiconductor element.
【請求項2】前記補強材は、円板形状であることを特徴
とする請求項1記載の半導体装置の補強材。
2. The reinforcing material for a semiconductor device according to claim 1, wherein the reinforcing material has a disc shape.
【請求項3】前記補強材は、連続したシート状であるこ
とを特徴とする請求項1記載の半導体装置の補強材。
3. The reinforcing material for a semiconductor device according to claim 1, wherein the reinforcing material has a continuous sheet shape.
【請求項4】前記接着層の表面を覆うセパレータテープ
を備えたことを特徴とする請求項1乃至3記載の半導体
装置の補強材。
4. The reinforcing material for a semiconductor device according to claim 1, further comprising a separator tape covering the surface of the adhesive layer.
JP2002038120A 2002-02-15 2002-02-15 Reinforcing materials for semiconductor devices Expired - Fee Related JP3858719B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002038120A JP3858719B2 (en) 2002-02-15 2002-02-15 Reinforcing materials for semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002038120A JP3858719B2 (en) 2002-02-15 2002-02-15 Reinforcing materials for semiconductor devices

Publications (2)

Publication Number Publication Date
JP2003243567A true JP2003243567A (en) 2003-08-29
JP3858719B2 JP3858719B2 (en) 2006-12-20

Family

ID=27779514

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3858719B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010123839A (en) * 2008-11-21 2010-06-03 Sharp Corp Semiconductor module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010123839A (en) * 2008-11-21 2010-06-03 Sharp Corp Semiconductor module

Also Published As

Publication number Publication date
JP3858719B2 (en) 2006-12-20

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