JP2003218644A - Optical reception differential circuit and optical receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stable perform processing of converting an optical signal into a prescribed electric signal at a high-speed. <P>SOLUTION: An automatic output adjustment circuit 60 in the optical reception differential circuit 1 is capable of matching a reference output signal S1 of a differential amplifier circuit 62 having a characteristic similar to that of a differential amplifier circuit 41 with the threshold value of an inverter 64 having a characteristic similar to that of an inverter 50a, and adjusts an output signal level of the differential amplifier circuit 41 so as to march the threshold value of the inverter 50a. Similarly, the automatic output adjustment circuit 60 adjusts an output signal level of the differential amplifier circuit 42 so as to match the threshold value of the inverter 50a. Thus, the inverter 50a responds to a change in the output signal from the differential amplifier circuits 41, 42 at a high-speed to obtain a proper output signal. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical receiving differential circuit and an optical receiving device for converting an optical signal into a predetermined electric signal.

[0002]

2. Description of the Related Art In recent years, optical communication has been widely used, and accordingly, high speed of a receiving circuit has been required. That is, since the transmission rate of optical communication is very high, such as about several GHz, in an optical receiving circuit or the like, the process of converting an optical signal into a predetermined electric signal can be performed at high speed and stably. There is a need to do.

Here, speeding up the output signal of the optical receiving device
As a technique for eliminating the need for adjustment, Japanese Patent Laid-Open No. 23234/1993
The technique described in Japanese Patent No. 2 is cited. According to the technique described in this publication, an amplitude limiter for limiting the amplitude of a current-voltage converted input signal is provided, and the operating point of the amplitude limiter is set by negative feedback, thereby receiving the signal. It absorbs level fluctuations and can binarize output signals stably at high speed.

[0004]

However, according to the technique described in the above publication, the center of the amplitude of the amplitude limiter is irrelevant to the threshold value of the subsequent circuit, and the amplitude of the binary signal is also It is independent of the operating input voltage of subsequent circuits. A feedback circuit is connected to the output section of the differential amplifier, and the feedback circuit includes an integrator. Therefore, it becomes a factor of lowering the frequency response of the amplitude limiter.

Further, the output signal of the negative feedback circuit is the current −
It is necessary to match the center of the amplitude of the voltage signal which is the output of the voltage converter, or to satisfy the relationship that the level of the voltage signal is the same and the phase is opposite. Otherwise,
This causes a situation in which the output of the differential amplifier circuit of the amplitude limiter cannot be obtained or the output waveform is distorted. Also, the current −
An optical receiving device including a voltage converter, an amplitude limiter, and a feedback circuit is a MOS receiving device during a process flow (manufacturing process).
If there is a fluctuation (variation) in the transistor threshold,
The duty ratio of the output waveform of the binary signal may deteriorate.

An object of the present invention is to perform a process of converting an optical signal into a predetermined electric signal at high speed and stably.

[0007]

Therefore, according to the present invention, a photoelectric conversion circuit for converting an optical signal into a current signal (for example, the photodiode 10 in FIG. 1) and a current signal output from the photoelectric conversion circuit are converted into a voltage signal. A current-voltage conversion circuit (for example, TIA 20 in FIG. 1) that converts the signal into a signal, and a reference generation circuit that generates a reference input signal indicating the center of amplitude of the voltage signal output by the current-voltage conversion circuit (for example, FIG. 1 filter circuit 30), the voltage signal output by the current-voltage conversion circuit, and the reference input signal as inputs,
An amplification circuit (for example, the main amplification circuit in FIG. 1) that amplifies the difference between the voltage signal and the reference input signal, and an inverter circuit that is connected to a subsequent stage of the amplification circuit and has a predetermined threshold value for the input signal (for example, FIG. 1 inverter 50
a) an optical receiving differential circuit including: a), a correction amplifying circuit having the same characteristics as the amplifying circuit (for example, a portion including the differential amplifying circuits 62 and 63 in FIG. 1), and the correction amplifying circuit. Reference input signal supply means (for example, TI of FIG. 1) for inputting the reference input signal or a signal corresponding thereto into the circuit.
A61), a threshold signal generating means for generating a threshold signal serving as a threshold of the inverter circuit (for example, a portion including the inverter 64 and the resistor 65 in FIG. 1), an output signal of the correction amplifying circuit, and the threshold signal. And a voltage comparison unit that outputs a gain adjustment signal for adjusting the gains of the amplification circuit and the correction amplification circuit according to the comparison result (for example, the voltage comparison circuits 66 and 67 in FIG. 1 are provided. Part) and the reference input signal or a signal corresponding thereto is input as two input signals of the correction amplification circuit, and the voltage comparison unit outputs the correction amplification circuit of the correction amplification circuit according to the comparison result. The gain adjustment signal is output so that the output signal matches the threshold signal.

Further, the amplifier circuit receives the voltage signal output by the current-voltage conversion circuit and a reference input signal indicating the center of the amplitude of the voltage signal, and inputs the input signal with respect to the reference input signal. A first differential amplifier circuit (for example, the differential amplifier circuit 41 in FIG. 1) that amplifies the difference, an amplified signal that is the amplification result of the difference by the first differential amplifier circuit, and the inverted signal And a second differential amplifier circuit (for example, the differential amplifier circuit 42 of FIG. 1) that receives the inverted amplified signal and that amplifies the difference between the amplified signal and the inverted amplified signal. Is the first
First differential amplifier circuit for correction (for example, the differential amplifier circuit 62 in FIG. 1) having the same characteristics as the second differential amplifier circuit, and a second differential amplifier circuit having the same characteristics as the second differential amplifier circuit. Correction differential amplifier circuit (for example, the differential amplifier circuit 63 in FIG. 1), the voltage comparison unit compares the output signal of the first correction differential amplifier circuit with the threshold signal. A first voltage comparison circuit (for example, the voltage comparison circuit 66 in FIG. 1), a second voltage comparison circuit for comparing the output signal of the second differential amplifier circuit and the threshold signal (for example, FIG. 1) voltage comparison circuit 67), and the first voltage comparison circuit is configured to match the output signal of the first correction differential amplification circuit with the threshold signal according to the comparison result. A gain adjustment signal for the first differential amplifier circuit is output, and the second voltage comparison circuit compares Depending on the result, the output signal of the second correction differential amplifier circuit so as to match with the threshold value, is characterized by outputting a gain control signal for said second differential amplifier circuit.

The first correction differential amplifier circuit and the second correction differential amplifier circuit are the same circuits as the first differential amplifier circuit and the second differential amplifier circuit, respectively. It is characterized by having a configuration. Further, the first correction differential amplifier circuit and the second correction differential amplifier circuit are manufactured by the same process as the first differential amplifier circuit and the second differential amplifier circuit, respectively. It is characterized by that.

Further, the reference input signal supply means is a correction current-which has the same characteristics as the current-voltage conversion circuit.
It is characterized by being configured by a voltage conversion circuit. Further, the correction current-voltage conversion circuit is manufactured by the same process as the current-voltage conversion circuit. Further, the reference input signal supply means is characterized in that the reference input signal output by the reference generation circuit is used as two inputs of the amplification circuit.

A bias voltage common to the inverter circuit is applied to the correction inverter circuit, and the output signal is fed back to the input through a predetermined resistor to match the input signal with the threshold value. Is characterized by. Further, it is an optical receiving device comprising the optical receiving differential circuit according to the present invention and capable of converting an input optical signal into a predetermined electric signal.

According to the present invention, the reference of the output signal of the correction amplifying circuit having the same characteristics as the amplifying circuit is matched with the output signal (threshold value) by the threshold signal generating means for generating the threshold value of the inverter circuit. The output signal level of the amplifier circuit is adjusted so as to match the threshold value of the inverter circuit. Therefore, the inverter circuit can quickly respond to a change in the output signal of the amplifier circuit, and an appropriate output signal can be obtained.

Further, since no load other than the inverter circuit is applied to the output side of the amplifier circuit, the gain of the output signal of the amplifier circuit is reduced and the high-speed response is impeded (delay of rise time or fall time). Will not be invited. Further, by manufacturing the amplifying circuit, the correcting amplifying circuit, the inverter circuit, and the threshold signal generating means by the same process (for example, the same production line), these characteristics are made more identical. be able to.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an optical receiving differential circuit according to the present invention will be described in detail below with reference to the drawings. First,
The configuration will be described. FIG. 1 is a block diagram showing the configuration of an optical receiving differential circuit 1 to which the present invention is applied. In FIG.
The light receiving differential circuit 1 includes a photodiode 10, a transimpedance amplifier (TIA) 20, a filter circuit 30, a main amplifier 40, and inverters 50a to 50d.
And an automatic output adjusting circuit 60, and the respective circuit parts are connected by signal lines L1 to L11 and the like.

The photodiode 10 photoelectrically converts the received optical signal and outputs it as a current signal. TIA20
Converts the current signal output by the photodiode 10 into a voltage signal. The filter circuit 30 is TIA2
The waveform of the voltage signal output by 0 is flattened, and a signal indicating the center of amplitude (hereinafter, referred to as "center signal") is output to.

The main amplifier 40 further includes a differential amplifier circuit 4.
1, 42 are included. The differential amplifier circuit 41 has a T
The voltage signal output from the IA 20 and the central signal output from the filter circuit 30 are input, the difference between them is amplified and output to the signal line L3. Further, the differential amplifier circuit 41 outputs a signal obtained by inverting the signal output to the signal line L3 to the signal line L4. Further, the differential amplifier circuit 41 includes a signal line L7.
Are connected, and the gain of the differential amplifier circuit 41 changes according to the signal voltage input through the signal line L7.

The differential amplifier circuit 42 receives the output signal to the signal line L3 of the differential amplifier circuit 41 and the output signal to the signal line L4, respectively, and amplifies the difference between them to obtain a signal line L5.
Output to. Further, the differential amplifier circuit 42 outputs a signal obtained by inverting the signal output to the signal line L5 to the signal line L11. Furthermore, the signal line L10 is connected to the differential amplifier circuit 42, and the gain of the differential amplifier circuit 42 changes according to the signal voltage input by the signal line L10.

Each of the inverters 50a to 50d has a predetermined threshold value, and when the input signal is equal to or higher than the threshold value,
When a signal having a predetermined level is output and the input signal is less than the threshold value, a signal having the opposite polarity to Va and the same amplitude is output.
For example, the inverter 50a outputs a signal Va representing "0" when the input signal is equal to or more than the threshold value, and outputs a signal Vb representing "1" when the input signal is less than the threshold value.

The automatic output adjustment circuit 60 further includes a TIA.
61, differential amplifier circuits 62 and 63, and an inverter 64
, A resistor 65, and voltage comparison circuits 66 and 67. The TIA 61 has the same characteristics as the TIA 20, and when the constant current corresponding to the center of the amplitude of the signal input to the TIA 20 is input, the TIA 61 changes to
A signal corresponding to the central signal output by the filter circuit 30 is always input to the differential amplifier circuit 62.

The differential amplifier circuit 62 has the same characteristics as the differential amplifier circuit 41, and a signal corresponding to the center signal is input by the TIA 61 as two inputs. That is, the differential amplifier circuit 62 is different from the differential amplifier circuit 41 in that
The output signal when the difference between the input signals is zero (hereinafter, referred to as "reference output signal S1") is always output to the signal line L8. The differential amplifier circuit 62 includes the differential amplifier circuit 4
Similar to 1, the signal line L7 is connected, and its gain changes depending on the signal voltage of the signal line L7.

The differential amplifier circuit 63 has the same characteristics as the differential amplifier circuit 42, and the differential amplifier circuit 6 has two inputs as two inputs.
Two output signals (reference output signal S1) are input.
That is, the differential amplifier circuit 63 always outputs the output signal (hereinafter, referred to as “reference output signal S2”) when the reference output signal S1 is used as two input signals in the differential amplifier circuit 42 to the signal line L9. It will be output. Further, the signal line L10 is connected to the differential amplifier circuit 63, similarly to the differential amplifier circuit 42, and the gain thereof changes depending on the signal voltage of the signal line L10.

The inverter 64 includes the inverters 50a and 5a.
It has the same characteristics as 0c. In addition, the inverter 64
The output signal is fed back to the input through the resistor 65, whereby the input voltage is changed to the inverters 50a, 5a.
The bias voltage Vdd, which is common with 0c, is maintained at approximately 1/2. That is, the input voltage of the inverter 64 is kept at the threshold voltage of the inverter 64 (and the inverters 50a and 50c).

The voltage comparison circuit 66 receives the reference output signal S1 output from the differential amplifier circuit 62 and the inverter 64.
Is input, and a signal of a predetermined level (hereinafter referred to as "gain adjustment signal P1") is output to the signal line L7 in accordance with the result of comparison of these. Since the signal line L7 is commonly connected to the differential amplifier circuits 41 and 62, the differential amplifier circuits 41 and 62 must be adjusted to have the same gain according to the level of the gain adjustment signal P1. Becomes

Similarly, the voltage comparison circuit 67 receives the reference output signal S2 output by the differential amplification circuit 63 and the input voltage of the inverter 64 as input, and according to the result of comparison between them, a predetermined value is applied to the signal line L10. Level signal (below,
This is called "gain adjustment signal P2". ) Is output. Signal line L
Since 10 is commonly connected to the differential amplifier circuits 42 and 63, the differential amplifier circuits 42 and 63 are adjusted to have the same gain according to the level of the gain adjustment signal P2. .

Next, the operation will be described. FIG. 2 is a diagram showing a specific configuration of the differential input circuit 1 shown in FIG. In FIG. 2, the differential amplifier circuit 41 and the differential amplifier circuit 62, the differential amplifier circuit 42 and the differential amplifier circuit 63, or the inverter 50.
a and 50c and the inverter 64 have the same element configuration, and the corresponding elements in these configurations are
It has almost the same characteristics.

The operation of the optical receiving differential circuit 1 will be described below with reference to FIG. An optical signal is input to the optical receiving differential circuit 1 and is separated into an input voltage signal V1 and a central signal V2 via the photodiode 10 and the TIA 20.
Then, the input voltage signal V1 and the center signal V2 are input to the main amplification circuit 40. That is, in the main amplifier circuit 40, the input voltage signal V1 and the center signal V2 are input to the two positive and negative input terminals of the differential amplifier circuit 41.

Next, the differential amplifier circuit 41 is connected to the signal line L7.
The difference between the center signal V2 and the input voltage signal V1 is amplified on the basis of the gain determined by the gain adjustment signal P1 input via the, and the result is output to the signal line L3 and the inverted signal thereof is input to the signal line L4. Output to. Here, the differential amplifier circuit 4
The center level (DC level) of the output signal of 1 is based on the output signal level (level of the reference output signal S1) when the difference between the center signal V2 and the input voltage signal V1 is zero.

When the level of the reference output signal S1 matches the threshold value of the inverter 50a, the differential amplifier circuit 42 is controlled even if the output signal level of the differential amplifier circuit 41 is small. Through this, the inverter 20 responds at high speed, and any output signal (Va or Vb) can be appropriately output. Therefore, in FIG. 2, the voltage comparison circuit 66 compares the output signal (reference output signal S1) of the differential amplifier circuit 62 with the input signal of the inverter 64, and when they do not match, the signal level of the signal line L7. By changing, the two operate so as to match each other.

Specifically, in FIG. 2, the voltage comparison circuit 66 includes a signal from the signal line L6 (input signal of the inverter 40) and a signal from the signal line L8 (reference output signal S).
1) is input, and the signal level of the signal line L7, which is the output of the voltage comparison circuit 66, changes as follows according to the comparison result. When the signal level of the signal line L6 is higher than the signal level of the signal line L8, the output signal level of the voltage comparison circuit 66 decreases and the signal level of the signal line L8 (that is, the signal level of the signal line L3) rises. Operate.

On the other hand, the signal level of the signal line L6 is the signal line L
8 is lower than the signal level of 8, the output signal level of the voltage comparison circuit 66 rises and the signal level of the signal line L8 (that is,
It operates so as to lower the signal level of the signal line L3). FIG. 3 is a diagram showing signal waveforms of the input voltage signal V1, the center signal V2, the signal V4 of the signal line L4 that is the inverted output of the differential amplifier circuit 41, and the input voltage V6 of the inverter 64. As shown in FIG. 3, the center signal V2 and the input voltage V6 of the inverter 64 are signals at substantially constant levels, and the input voltage signal V1 is centered on the level of the center signal.
The square wave signal having a constant amplitude in the positive and negative directions, and the inverted output signal V4 of the differential amplifier circuit 41 has a constant amplitude in the positive and negative directions around the input voltage of the inverter 64 (that is, the threshold voltage of the inverter 50a). It is a square wave signal.

That is, the inverted output signal V of the differential amplifier circuit 41
Since 4 is centered on the threshold voltage of the inverter 50a, the output signal level of the differential amplifier circuit 41 is appropriate at this time. Returning to FIG. 2, the differential amplifier circuit 42
The output signal V3 of the differential amplifier circuit 41 and its inverted signal V4 are input to the two positive and negative input terminals of.

The differential amplifier circuit 42 is connected to the signal line L1.
Amplifying the difference between the input signals V3 and V4 based on the gain determined by the gain adjustment signal P2 input via 0,
The result is output to the signal line L5, and its inverted signal is output to the signal line L11. Here, the output signal level of the differential amplifier circuit 42 is based on the output signal level (the level of the reference output signal S2) when the difference between the input signals V3 and V4 is zero.

When the level of the reference output signal S2 matches the threshold value of the inverter 50a, the inverter 20 responds at high speed even to a minute change in the output signal level of the differential amplifier circuit 42. However, either output signal (Va or Vb) can be output appropriately. Therefore, similarly to the adjustment of the gain of the differential amplifier circuit 41 in the preceding stage, the voltage comparison circuit 67 compares the output signal (reference output signal S2) of the differential amplifier circuit 63 with the input signal of the inverter 64, and the two signals are equal to each other. If not done, signal line L10
By changing the signal level of, the two operate so as to match each other.

That is, the signal level of the signal line L6 is the signal line L
9 is higher than the signal level of the signal comparison circuit 67, the output signal level of the voltage comparison circuit 67 decreases and the signal level of the signal line L9 (that is,
It operates so as to raise the signal level of the signal line L5). On the other hand, when the signal level of the signal line L6 is lower than the signal level of the signal line L9, the output signal level of the voltage comparison circuit 67 rises and the signal level of the signal line L9 (that is, the signal line L9).
5 signal level).

FIG. 4 is a diagram showing the output signal levels V5 and V11 of the differential amplifier circuit 42 and the threshold voltage V6 of the inverter 50a and the inverter 64. In FIG. In FIG.
The output signal levels V5 and V11 of the differential amplifier circuit 42 are centered on the threshold voltage V6 of the inverter 50a (inverter 64). When V5 and V11 are centered on the thresholds of the inverters 50a and 64, the signal line L
Differential amplifier circuit 42 defined by 10 signal levels
It can be said that the gain of is an appropriate value.

As a result of the operation as described above, the level of the output signal of the main amplifier 40 becomes a balanced state at a level centered on the threshold value of the inverter 50a, and the output signal of the optical receiving differential circuit 1 has an appropriate value ("0". "Or a signal indicating" 1 "). FIG. 5 is a diagram showing an example of output signal waveforms of the inverter 50a when the output signal levels of the differential amplifier circuits 41 and 42 are adjusted to appropriate voltages. According to FIG. 5, the width (t1) of the low-level signal representing “0”
And the width (t2) of the high-level signal representing "1" is the same, and no distortion occurs.

On the other hand, when the output signal levels of the differential amplifier circuits 41 and 42 are not adjusted to appropriate voltages, the center of the output signal levels V5 and V11 of the differential amplifier circuit 42 shown in FIG. It will deviate from the threshold voltage V6. Then, the output signal waveform of the inverter 50a has a low-level signal width (t1) representing "0" in FIG.
And the width (t2) of the high-level signal representing "1" is not the same, which causes distortion.

As described above, in the optical receiving differential circuit 1 according to the present embodiment, the reference output signal S1 of the differential amplifier circuit 62 having the same characteristics as the differential amplifier circuit 41 is fed to the inverter 5
The output signal level of the differential amplifier circuit 41 is adjusted so as to match the threshold value of the inverter 50a by the automatic output adjustment circuit 60 capable of matching the threshold value of the inverter 64 having the same characteristics as 0a.

Similarly, the automatic output adjustment circuit 60 adjusts the output signal level of the differential amplifier circuit 42 so as to match the threshold value of the inverter 50a. Therefore, with respect to changes in the output signals of the differential amplifier circuits 41 and 42,
The inverter 50a responds at high speed and can obtain an appropriate output signal. Further, since no load other than the inverters 50a to 50d is applied to the output side of the differential amplifier circuit 42, the gain of the output signal of the differential amplifier circuit 10 is reduced and the high-speed response is inhibited (rise time or rise time). Delay time).

By manufacturing the differential amplifier circuits 41 and 62, the differential amplifier circuits 42 and 63, and the inverters 50a and 64 by the same process (for example, the same production line), these characteristics can be improved. It can be highly identical. Although the input signal of the automatic output adjustment circuit 60 is generated by the TIA 61 in the present embodiment, the output signal of the filter circuit 30 may be input to the differential amplifier circuit 62.

As a concrete example of the optical receiving differential circuit 1,
Although the circuit configuration shown in FIG. 2 is shown, the same function can be realized by another circuit configuration, and the circuit configuration shown in FIG. 6 or 7 may be used, for example.

[0042]

According to the present invention, the reference of the output signal of the correction amplifier circuit having the same characteristics as the amplifier circuit is made to coincide with the output signal (threshold value) by the threshold signal generating means for generating the threshold value of the inverter circuit. Thereby, the output signal level of the amplifier circuit is adjusted so as to match the threshold value of the inverter circuit.

Therefore, the inverter circuit responds to the change of the output signal of the amplifier circuit at high speed, and an appropriate output signal can be obtained. In addition, since the load other than the inverter circuit is not applied to the output side of the amplifier circuit, the gain of the output signal of the amplifier circuit is lowered and the high-speed response is impeded (delay of rise time or fall time). There is no.

By manufacturing the amplifying circuit, the correcting amplifying circuit, the inverter circuit, and the threshold value signal generating means in the same process (for example, the same production line), these characteristics are more uniform. Can be one.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an optical receiving differential circuit 1 to which the present invention is applied.

FIG. 2 is a diagram showing a specific configuration of a differential input circuit 1 shown in FIG.

3 is a diagram showing signal waveforms of an input voltage signal V1, a center signal V2, a signal V4 of a signal line L4 which is an inverted output of the differential amplifier circuit 41, and an input voltage V6 of an inverter 64. FIG.

FIG. 4 shows output signal levels V5 and V1 of the differential amplifier circuit 42.
1 is a diagram showing 1 and a threshold voltage V6 of the inverter 50a and the inverter 64. FIG.

FIG. 5 is a diagram showing an example of an output signal waveform of the inverter 50a when the output signal levels of the differential amplifier circuits 41 and 42 are adjusted to appropriate voltages.

FIG. 6 is a diagram showing another example of a specific configuration of the differential input circuit 1.

FIG. 7 is a diagram showing another example of a specific configuration of the differential input circuit 1.

[Explanation of symbols] 1 Differential input circuit 1a Automatic output adjustment circuit 10,30 Differential amplifier circuit 20,40 inverter 50 resistance 60 voltage comparison circuit

Continued front page    F term (reference) 5J092 AA01 AA12 AA56 CA65 FA10                       HA10 HA17 HA25 HA29 KA02                       KA04 KA09 KA12 KA17 KA27                       KA42 MA21 TA01 TA06 UL02                 5J500 AA01 AA12 AA56 AC65 AF10                       AH10 AH17 AH25 AH29 AK02                       AK04 AK09 AK12 AK17 AK27                       AK42 AM21 AT01 AT06 LU02

Claims (9)

[Claims] 1. A photoelectric conversion circuit for converting an optical signal into a current signal, a current-voltage conversion circuit for converting a current signal output from the photoelectric conversion circuit into a voltage signal, and an output by the current-voltage conversion circuit. A reference generation circuit that generates a reference input signal indicating the center of the amplitude of the voltage signal, a voltage signal output by the current-voltage conversion circuit, and the reference input signal, and the reference input of the voltage signal. An optical receiving differential circuit including an amplifier circuit for amplifying a difference between signals and an inverter circuit connected to a subsequent stage of the amplifier circuit and having a predetermined threshold value for an input signal, the optical receiver differential circuit having the same characteristics as the amplifier circuit. A correction amplifier circuit, reference input signal supply means for inputting the reference input signal or a signal corresponding thereto to the correction amplifier circuit, and a threshold value of the inverter circuit. A threshold signal generation unit that generates a threshold signal, an output signal of the correction amplification circuit, and the threshold signal are compared, and the gains of the amplification circuit and the correction amplification circuit are adjusted according to the comparison result. And a voltage comparison unit that outputs a gain adjustment signal, and inputs the reference input signal or a signal corresponding thereto as two input signals of the correction amplification circuit, and the voltage comparison unit is responsive to the comparison result. And the gain adjustment signal is output so that the output signal of the correction amplifier circuit matches the threshold signal. 2. The amplifier circuit receives the voltage signal output by the current-voltage conversion circuit and a reference input signal indicating the center of the amplitude of the voltage signal, and inputs the voltage signal with respect to the reference input signal. A first differential amplifier circuit for amplifying a difference, an amplified signal that is the amplification result of the difference by the first differential amplifier circuit, and an inverted amplified signal obtained by inverting the amplified signal are input, and the amplified signal A second differential amplifier circuit for amplifying a difference with respect to the inverted amplified signal of the first differential amplifier circuit, wherein the correction amplifier circuit has the same characteristics as the first differential amplifier circuit. Circuit and the second
A second correction differential amplification circuit having the same characteristics as the differential correction circuit of No. 1, the voltage comparison unit outputs the output signal of the first correction differential amplification circuit and the threshold signal. A first voltage comparison circuit for comparing, a second voltage comparison circuit for comparing the output signal of the second differential amplifier circuit and the threshold signal, the first voltage comparison circuit comprising: According to the result, a gain adjustment signal for the first differential amplifier circuit is output so as to match the output signal of the first correction differential amplifier circuit with the threshold signal, and the second voltage comparison circuit According to a comparison result, the circuit outputs a gain adjustment signal to the second differential amplifier circuit so as to match the output signal of the second correction differential amplifier circuit with the threshold value. The optical receiving differential circuit according to claim 1. 3. The first correction differential amplifier circuit and the second correction differential amplifier circuit are the same circuits as the first differential amplifier circuit and the second differential amplifier circuit, respectively. 3. The optical receiving differential circuit according to claim 1, which has a configuration. 4. The first correction differential amplifier circuit and the second correction differential amplifier circuit are the same processes as the first differential amplifier circuit and the second differential amplifier circuit, respectively. The optical receiving differential circuit according to claim 2 or 3, which is manufactured by. 5. The correction input current-voltage conversion circuit having the same characteristics as the current-voltage conversion circuit, wherein the reference input signal supply means is constituted by a correction current-voltage conversion circuit.
5. The optical receiving differential circuit according to any one of 4 to 4. 6. The optical receiving differential circuit according to claim 5, wherein the correction current-voltage conversion circuit is manufactured by the same process as the current-voltage conversion circuit. 7. The reference input signal supply means uses the reference input signal output by the reference generation circuit as two inputs of the amplifier circuit.
4. The optical receiving differential circuit according to any one of 4 above. 8. A bias voltage common to the inverter circuit is applied to the correction inverter circuit, and an output signal is fed back to an input through a predetermined resistor to match the input signal with the threshold value. The optical receiving differential circuit according to any one of claims 1 to 7. 9. An optical receiving device comprising the optical receiving differential circuit according to claim 1 and capable of converting an input optical signal into a predetermined electric signal.