JP2003218522A - Multilayer printed-circuit board and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve electrical connectability and reliability on a connection by inhibiting the generation of the warp of the whole board when a plurality of one-surface circuit boards are laminated and multi-layered. <P>SOLUTION: In a multilayer printed-circuit board in which a plurality of one-sided circuit boards with insulating base materials, conductor circuits 28 formed on one surfaces of the base materials, via holes containing a conductive substance 18 filled into openings reaching the conductor circuits from the other surfaces of the base materials and conductive bumps 44 electrically connected to the via holes and formed to project outside the openings and laminated through adhesive layers and unified, the multilayer printed-circuit board, in which the mat surface of a metallic foil 30, in which one surface is mat-finished, is contact-bonded with a surface on the conductive bump side of either one one-sided circuit board in a plurality of the laminated one-sided circuit boards in the metallic foil 30 and which is formed to the conductor circuits with fixed wiring patterns, and its manufacturing method are proposed. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer circuit board and a method for manufacturing the same, and more particularly to a multilayer circuit board having an interstitial via hole (IVH) structure and a method for manufacturing the same.

[0002]

2. Description of the Related Art A conventional multilayer circuit board is composed of a laminated body formed by alternately stacking copper clad laminates and prepregs and integrating them, and has a surface wiring pattern on the surface of the laminated body, There is an inner layer wiring pattern between the layers. These wiring patterns are electrically connected to each other between the inner layer wiring patterns or between the inner layer wiring pattern and the surface layer wiring pattern through through holes formed in the thickness direction of the laminated body.

However, in the multilayer circuit board having the through hole structure as described above, it is difficult to increase the density of component mounting because it is necessary to secure a region for forming the through hole, and the portable electronic device However, there is a drawback in that it is not possible to sufficiently meet the demands for miniaturization of devices and practical application of narrow pitch packages and MCMs. Therefore, recently, in place of the above-mentioned multilayer printed circuit board having a through hole structure,
Attention has been focused on a multilayer printed circuit board having an all-layer interstitial via hole (IVH) structure that can easily cope with high density.

The multi-layered printed circuit board having the all-layer IVH structure is a printed circuit board having a structure in which via holes for electrically connecting the conductor layers are provided in each interlayer insulating layer forming the laminate. In other words, this substrate is electrically connected to each other between inner layer wiring patterns or between inner layer wiring patterns and surface layer wiring patterns by via holes (lead via holes or blind via holes) that do not penetrate the substrate.

Therefore, in the multilayer printed circuit board having the IVH structure, it is not necessary to specially provide a region for forming a through hole, and arbitrary layers can be freely connected by a fine via hole, so that the electronic device can be miniaturized. It is possible to easily realize high density and high speed signal propagation. Such IV
The H-structured multilayer printed circuit board uses, for example, a material obtained by impregnating an aramid nonwoven fabric with epoxy resin as a prepreg, and an opening for forming a via hole is formed in this prepreg, and a conductive paste is formed in the opening for forming the via hole. Has a filled structure.

Copper foils are superposed on both surfaces of the prepreg, and the epoxy resin and the conductive paste of the prepreg are hardened by heating and pressing, and the copper foils on both surfaces are electrically connected to each other. Then, the copper foil is patterned by an etching method to obtain a hard double-sided circuit board having via holes.

The double-sided circuit board thus obtained is used as a core for multilayering. Specifically, both sides of the core layer are sequentially laminated while aligning the prepreg filled with the above-mentioned conductive paste, and the laminate and the copper foils arranged above and below are heated and pressed. After that, the uppermost copper foil is etched to form a four-layered multilayer circuit board. When the number of layers is further increased, the above steps are repeated to form a 6-layer or 8-layer multilayer circuit board.

[0008]

By the way, when manufacturing a multilayer circuit board having an IVH structure according to the above-mentioned prior art, it is necessary to accurately align the adjacent single-sided circuit boards. However, a conductor circuit is formed on one surface, a via hole is formed on the other surface, or a single-sided circuit board having conductive bumps formed on the via hole is formed by stacking at least two layers. In the multilayered circuit board described above, the via hole or the conductive bump formed on the via hole is exposed at the outermost surface layer portion, and the surface layer portion has electronic components such as semiconductor elements, capacitors, and resistors. May be mounted or terminals for connection with an external substrate such as BGA, PGA or solder bumps may be provided. In such a case, as compared with the diameter of the via hole, the allowable range of the alignment is small, so that connection or disconnection may occur.

Further, when a solder resist layer is formed on the surface layer portion, a via hole is exposed from an opening provided in the solder resist layer, and a solder pad is formed on the via hole, a via hole is formed. Because the solder pad alignment tolerance is small, the center of the solder pad may be offset from the center of the via hole.In such a case, the conductor portion area of the via hole connected to the solder pad is For small or extreme cases,
The position of the via hole and the solder pad was completely offset, and the via hole was not exposed at all from the opening. In such a case, there is a problem in that the solder pad and the via hole are not electrically connected to each other, and thus the electronic component or the connecting terminal as described above cannot be substantially mounted on the surface layer of the substrate. It was

Further, when one or more layers are further laminated on a multi-layered circuit board formed by laminating at least two layers of one-sided circuit board, or another one-sided circuit board is formed on such a multi-layered circuit board. In the case of stacking double-sided circuit boards, double-sided circuit boards, etc., and forming an interlayer resin insulation layer between the boards, and making an electrical connection by via holes, the above problems become prominent and the electrical connectivity And the connection reliability is reduced.

Further, a conductor circuit is formed on one surface,
A circuit board in which a multilayer structure is formed by laminating a plurality of single-sided circuit boards, each having a via hole formed on the other surface or conductive bumps formed on the via hole, in one direction is structurally liable to warp. Has a basic problem.

As a result, the conductor circuit formed on the substrate may be broken or broken, and in particular, a connection failure may occur at the via hole portion, or the filling metal may be peeled off, resulting in electrical connectivity and connection reliability. There is a problem in that

Therefore, the present invention has been made in view of the problems of the above-mentioned conventional technique, and an object thereof is an IVH structure which can be manufactured with a high yield by using only a single-sided circuit board. Another object of the present invention is to provide a multi-layer circuit board capable of high-density mounting and a method for manufacturing the same.

[0014]

As a result of intensive research aimed at achieving the above-mentioned object, the inventors have come up with an invention having the following contents as a gist configuration. That is, (A) the multilayer circuit board of the present invention has an insulating base material, a conductor circuit formed on one surface thereof, and an opening for reaching the conductor circuit from the other surface of the insulating base material. A single-sided circuit having a via hole filled with a conductive substance and a conductive bump electrically connected to the via hole and formed so as to project to the outside of the opening. In a multilayer circuit board in which a plurality of boards are laminated via an adhesive layer and integrated, a metal foil whose one surface is matt treated has a matte surface among the plurality of single-sided circuit boards. One of the one-sided circuit board, in a state of facing the surface on the conductive bump side, is crimped to the one-sided circuit board and is formed into a conductor circuit having a predetermined wiring pattern. To do.

As the metal foil, copper, an alloy mainly containing copper, or nickel can be used. This is because in forming a conductor circuit, greater strength can be obtained as compared with other metals. Particularly, a metal foil using copper or an alloy mainly containing copper is preferable. This is because the matte surface formed on one of the surfaces can be formed by any one of plating treatment, etching treatment, and blackening treatment. The wiring pattern formed from the metal foil is preferably formed by an etching process, a tenting process, an additive method, or the like.

In the multilayer circuit board described in (A) above, the metal foil is pressure-bonded to the surface of the outermost one-sided circuit board on the side of the conductive bumps and has a predetermined wiring pattern. It is desirable to form it on the outermost conductor circuit, and it is desirable to form solder bodies such as solder bumps, solder balls or T pins on the outermost conductor circuit. Furthermore, it is desirable that the matte surface of the metal foil be covered with a protective film made of at least one selected from tin, zinc, nickel, phosphorus and noble metals.

(B) In the present invention, a conductive circuit is formed on one surface of an insulating base material, and a conductive material is provided in an opening reaching the conductive circuit from the other surface of the insulating base material. To form a via hole, and then form a conductive bump electrically connected to the via hole and protruding from the surface of the insulating substrate. When manufacturing a multi-layer circuit board that is laminated and integrated, at least the following steps (1) to (3), that is, (1) the same single-sided circuit board is used during the manufacturing process. While stacking in the direction,
A step of laminating a metal foil, one surface of which is matt-treated, with its matt surface facing the surface of the outermost one-sided circuit board of the laminated one-sided circuit boards on the side of the conductive bumps; And (2) a step in which the laminated single-sided circuit board and the metal foil are integrated by heat pressing, and the metal foil is pressure-bonded to the surface of the single-sided circuit board on the side of the conductive bumps, (3) And a step of selectively etching the pressure-bonded metal foil to form a conductor circuit of a surface layer having a predetermined wiring pattern, which is a method for manufacturing a multilayer circuit board.

In the method for manufacturing a multilayer circuit board as described in (B) above, tin, zinc, nickel, phosphorus and noble metals are selected for the matte surface of the metal foil before the step (1). It is desirable that the method includes a step of forming a protective film of at least one kind as described above. This is because the shape of the matte surface can be maintained without lowering the adhesiveness with the resin surface.

Further, after the step (3), a step of forming a solder body such as a solder bump, a solder ball or a T pin on the surface conductor circuit of the integrated circuit board may be included. desirable.

(C) Further, according to the present invention, in manufacturing a multilayer circuit board in which a plurality of single-sided circuit boards are laminated via an adhesive layer and integrated by heating press, at least during the manufacturing process. The following steps (1) to (5), that is, (1) forming a conductor layer on one surface of the insulating substrate,
A conductive material is filled into an opening reaching the conductor layer from the other surface of the insulating base material to form a via hole, and the via hole is electrically connected to the insulating base material. Manufacturing a single-sided circuit board in which conductive bumps are formed so as to protrude from the surface of the substrate, (2)
After forming a conductor circuit on one surface of the insulating base material, after forming a via hole by filling a conductive material in the opening that reaches the conductor circuit from the other surface of the insulating base material,
A step of producing a single-sided circuit board which is electrically connected to the via hole and is formed with conductive bumps protruding from the surface of the insulating base material; and (3) the step (1) The single-sided circuit board obtained in step (1) and the plurality of single-sided circuit boards obtained in step (2) above
The single-sided circuit board obtained in the step of is placed on the uppermost layer, and is laminated in the same direction, and the metal foil whose one surface is matt-treated, the matt surface of which is located on the lowermost layer (2) The step of laminating the single-sided circuit board obtained in the step of facing the surface on the conductive bump side of the single-sided circuit board, and (4) heating the laminated single-sided circuit board and the metal foil together via an adhesive. Integrated by pressing, a step of crimping the metal foil to the surface of the single-sided circuit board located on the lowermost layer on the side of the conductive bumps, (5) formed on the single-sided circuit board located on the uppermost layer And a step of forming a conductor circuit having a predetermined wiring pattern by etching the metal foil that is pressure-bonded to the conductor layer and the one-sided circuit board located at the lowermost layer.

In the method (C) for manufacturing a multilayer circuit board, the matte-treated surface of the copper foil is protected in advance by at least one selected from tin, zinc, nickel, phosphorus and noble metals. It is desirable to include a step of forming a film by coating. This is because the shape of the matte surface can be maintained without lowering the adhesiveness with the resin surface.

It is preferable that the method further includes the step of forming a solder body such as a solder bump, a solder ball or a T pin on the conductor circuit after the step (5).

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION According to the present invention, an insulating base material, a conductor circuit formed on one surface of the insulating base material, and an opening reaching the conductor circuit from the other surface of the insulating base material are filled. Of single-sided circuit boards, each having a via hole containing the conductive material, and a conductive bump electrically connected to the via hole and formed so as to project to the outside of the opening. In a multi-layered circuit board in which one sheet is laminated and integrated with an adhesive layer, one surface of the metal foil is matt-treated, and the matte-treated surface (hereinafter referred to as "matte surface"). ) Is pressure-bonded in a state of being opposed to the surface on the conductive bump side of one of the laminated single-sided circuit boards, and is formed into a conductor circuit having a predetermined wiring pattern. It is characterized by

The single-sided circuit board as a basic unit constituting the multilayered circuit board according to the present invention is an insulating base material.
It is desirable to use a hard resin base material formed from a completely cured resin material. By adopting such a resin material, a metal foil for forming a conductor circuit on the resin base material is integrated with a heat press or the like. When crimping by chemical treatment,
Since the final thickness of the insulating base material does not fluctuate due to a pressing force or the like, it is possible to minimize the displacement of the via hole and reduce the via land diameter. Therefore, the wiring pitch can be reduced to improve the wiring density. Further, since the thickness of the base material can be kept substantially constant, it is easy to set the laser irradiation conditions when forming an opening for forming a filled via hole as described later by laser processing.

As such an insulating resin substrate, a glass cloth epoxy resin substrate, a glass cloth bismaleimide triazine resin substrate, a glass cloth polyphenylene ether resin substrate, an aramid nonwoven fabric-epoxy resin substrate, an aramid nonwoven fabric-polyimide A hard base material selected from resin base materials is preferably used, and a glass cloth epoxy resin base material is most preferable.

The thickness of the insulating base material is 20 to 6
00 μm is desirable. The reason for this is that if the thickness is less than 20 μm, the strength is lowered and the handling becomes difficult, and the reliability of electrical insulation is lowered.
This is because if it exceeds 0 μm, it becomes difficult to form a fine via-hole forming opening and the substrate itself becomes thick.

The conductor layer or the conductor circuit formed on one surface of the insulating base material is obtained by applying a metal foil on the insulating base material with an appropriate resin adhesive or by etching the metal foil. Formed respectively.
As the metal foil, copper, an alloy mainly containing copper, or nickel can be used. This is because in forming a conductor circuit, greater strength can be obtained as compared with other metals. The conductor layer is formed by hot-pressing a metal foil having a thickness of 5 to 18 μm onto an insulating base material via a resin adhesive layer held in a semi-cured state, and the conductor circuit is made of metal. After heat-pressing the foil, apply a photosensitive dry film to the metal foil surface or apply a liquid photosensitive resist, and then place a mask with a predetermined wiring pattern on it and expose and develop it to form a plating resist. It is preferably formed by forming a layer and then etching the metal foil in the portion where the etching resist is not formed.

The hot pressing of the metal foil onto the insulating base material is carried out at an appropriate temperature and pressure, more preferably under reduced pressure, and only the semi-cured resin adhesive layer is formed. By curing the metal foil, the metal foil can be firmly adhered to the insulating base material, so that the manufacturing time is shortened as compared with the circuit board using the conventional prepreg. Instead of sticking the metal foil on such an insulating base material, a single-sided copper-clad laminated board on which a copper foil is pasted on the insulating base material is adopted, and the single-sided copper-clad laminated board is etched. It can also be processed to form conductor circuits.

Lands (pads) as a part of the conductor circuit are formed on the surface corresponding to each via hole of the conductor circuit.
The diameter is preferably formed in the range of 50 to 250 μm. The etching for forming the pattern is performed with at least one selected from an aqueous solution of sulfuric acid-hydrogen peroxide, persulfate, cupric chloride, and ferric chloride.

It is preferable that a roughening layer is formed on the surface of the wiring pattern of the conductor circuit to improve the adhesion with the adhesive layer for bonding the circuit boards to each other and prevent the occurrence of delamination. As the roughening treatment method, for example,
Soft etching treatment, blackening (oxidation) -reduction treatment, formation of needle-like alloy plating consisting of copper-nickel-phosphorus (made by EBARA Eugelite: product name Interplate), product name "Mech Etch Bond" manufactured by MEC There is surface roughening due to the etching liquid.

The via hole forming opening formed to reach the conductor circuit from the surface opposite to the surface of the insulating resin substrate on which the conductor circuit is formed has a pulse energy of 0.5 to 100 mJ. Pulse width is 1-100μ
s, pulse interval is 0.5 ms or more, and the number of shots is 3 to 5
It is preferably formed by a carbon dioxide gas laser which is irradiated under the condition of 0, and its opening diameter is preferably in the range of 50 to 250 μm. The reason is that if the thickness is less than 50 μm, it becomes difficult to fill the openings with a conductive substance and the connection reliability is lowered, and if it exceeds 250 μm, it is difficult to achieve high density.

Before forming an opening by such a carbon dioxide laser, it is desirable to adhere a resin film to the surface of the insulating base material opposite to the surface on which the conductor circuit is formed, and perform laser irradiation from the resin film.

This resin film functions as a protective mask when the inside of the opening for forming the via hole is desmeared and the inside of the opening after the desmearing is filled with the metal plating by electrolytic plating, and the metal plating of the via hole is performed. It functions as a printing mask for forming a protruding conductor (conductive bump) directly on the layer.

In the above resin film, for example, the pressure-sensitive adhesive layer has a thickness of 1 to 20 μm, and the film itself has a thickness of 1
It is preferably formed from a PET film that is 0 to 50 μm. The reason for this is that the height of the protruding conductors, which will be described later, is determined depending on the thickness of the PET film. Therefore, if the thickness is less than 10 μm, the protruding conductors are too low and connection failure tends to occur. This is because the fine conductor cannot be formed with the thickness because the projecting conductors spread too much at the connection interface.

In order to form a via hole by filling the inside of the via hole forming opening with a conductive substance, it is desirable to fill the plate with a paste or a conductive paste. In order to simplify the filling process, reduce the manufacturing cost, and improve the yield, the filling of the conductive paste is suitable, but the plating filling is preferable from the viewpoint of connection reliability.

The above-mentioned plating filling can be performed by either electrolytic plating treatment or electroless plating treatment, but metal plating formed by electrolytic plating treatment, for example, tin, silver, solder, copper / tin, copper / Metal plating of silver or the like is preferable, and electrolytic copper plating is most preferable because it has excellent electrical characteristics.

In the case of filling by electrolytic plating treatment, the copper foil formed on the insulating base material is preliminarily adhered to the copper foil attaching surface (conductor circuit forming surface) of the insulating base material. Electrolytic plating is performed as a plating lead. Since this copper foil (metal layer) is formed over the entire surface of one surface of the insulating base material, the current density becomes uniform, and the via hole forming openings are filled by electrolytic plating at a uniform height. can do. Here, the surface of the metal layer in the non-through holes may be activated with an acid or the like before the electrolytic plating treatment.

After electroplating, the electroplating (metal) rising from the opening edge may be removed by belt sander polishing, buff polishing or the like to flatten the surface.

Further, instead of the filling of the conductive material by the plating treatment, a method of filling the conductive paste, or a portion of the opening is filled by the electrolytic plating treatment or the electroless plating treatment, and the remaining portion is filled with the conductive paste. You can also do it. As the conductive paste, a conductive paste made of at least one kind of metal particles selected from copper, tin, gold, silver, nickel and various solders can be used.

Further, as the above-mentioned metal particles, those obtained by coating the surface of the metal particles with a different metal can be used.
Specifically, metal particles in which the surface of copper particles is coated with a noble metal selected from gold and silver can be used. The conductive paste is preferably an organic conductive paste obtained by adding thermosetting resin such as epoxy resin and polyphenylene sulfide (PPS) resin to metal particles.

Since the opening formed by the laser processing has a fine diameter of 20 to 150 μm,
When the conductive paste is filled, bubbles tend to remain, so filling by electrolytic plating is practical.

The via holes formed in the above-mentioned one-sided circuit board have the highest arrangement density in the one-sided circuit board laminated on the outermost side for mounting the LSI chip or the like, and the outermost hole for connecting to the mother board. For other single-sided circuit boards, it is formed to be the smallest
That is, the distance between the via holes formed in each of the laminated circuit boards may be formed so as to increase from the circuit board on which the LSI chip or the like is mounted to the circuit board on the side connected to the motherboard. Preferably, according to such a configuration, the routing performance of the wiring is improved,

In the production of the multilayer circuit board according to the present invention, a single-sided circuit board which is a basic unit to be laminated is provided with a projecting conductor, that is, a conductive bump, on a via hole, and another single-sided circuit board is provided. It is desirable to configure so as to secure an electrical connection with. It is desirable that the conductive bumps be formed by filling the openings of the protective film formed by laser irradiation with plating or filling a conductive paste.

The plating filling can be performed by either electrolytic plating treatment or electroless plating treatment, but electrolytic plating treatment is preferable. For electrolytic plating,
Low melting point metals such as copper, gold, nickel, tin, and various solders can be used, but tin plating or solder plating is most suitable.

The height of the conductive bumps is 3 to 6
The range of 0 μm is desirable. The reason for this is that if the thickness is less than 3 μm, variations in bump height cannot be tolerated due to deformation of the bumps, and if it exceeds 60 μm, the resistance value becomes high and the bumps spread laterally when they are formed. This can cause a short circuit.

When the conductive bumps are formed by filling the conductive paste, variations in the height of the electrolytic plating for forming the via holes are corrected by adjusting the amount of the conductive paste to be filled. The height of the conductive bumps can be made uniform.

The bumps made of this conductive paste are preferably in a semi-cured state. This is because the conductive paste is hard even in a semi-cured state and can penetrate the softened organic adhesive layer during hot pressing. Further, it is because the contact area is increased due to deformation during hot pressing, which can reduce the conduction resistance and can correct the variation in the bump height.

In addition to this, for example, a method of screen-printing a conductive paste using a metal mask having openings at predetermined positions, a method of printing a solder paste which is a low melting point metal, and immersion in a solder melt The conductive bump can be formed by the method described above. As the low melting point metal, Pb—Sn based solder, Ag—Sn based solder, indium solder or the like can be used.

The multilayer circuit board according to the present invention is formed by laminating a plurality of single-sided circuit boards each having a conductor circuit formed on one surface of an insulating base material in a predetermined direction as described above. One surface of the single-sided circuit board of one of the single-sided circuit boards is bonded to a surface of the single-sided circuit board on the side of the conductive bumps, the metal foil being mat-processed with the matted surface facing each other, and having a predetermined size. Is formed in a conductor circuit having a wiring pattern of.

As the above-mentioned metal foil, copper, an alloy mainly containing copper, or nickel, which has a higher strength than other metals in forming a conductor circuit, can be used. Particularly, a metal foil using copper or an alloy mainly containing copper is preferable. This is because the matte surface formed on one of the surfaces can be formed by any one of plating treatment, etching treatment, and blackening treatment. The matte surface is preferably formed by a known etching treatment, electroless plating treatment, redox treatment, or the like, and particularly preferably an etching treatment. For example, as the etching process, CZ
There is a treatment, the electroless plating treatment includes an interplate treatment, and the redox treatment includes a blackening treatment.

The adhesion between the matt-treated metal foil and the insulating resin substrate varies depending on the resin viscosity, the thickness of the copper foil, the heating press pressure, etc., but the insulating resin substrate is hard. When the thickness of the metal foil is in the range of 1 to 36 μm, the surface roughness of the matte surface of the metal foil is
It is in the range of 0.5 to 5 μm, and the heating press pressure is 1 to 1
It is in the range of 0 MPa and the resulting peel strength is 0.5 to 2.0 Kgf / cm ² (4.9 × 10 ⁴ Pa).
˜19.6 × 10 ⁴ Pa) is desirable.

The matte surface of the metal foil is pressed against the surface of the outermost one-sided circuit board of the laminated one-sided circuit boards on the side of the conductive bumps, or is pressed or laminated. Of the plurality of single-sided circuit boards thus formed, the single-sided circuit board located inside may be crimped in a state of being opposed to the surface on the side of the conductive bumps. It is formed in a conductor circuit having a predetermined wiring pattern.

The matte surface of the metal foil is pressure-bonded not only to the conductive bump-side surface of the single-sided circuit board but also to the conductive bumps protruding from the surface. The bondability between the formed conductor circuit and the surface on the conductive bump side and between the conductor circuit and the conductive bump is improved.

In particular, in the above case, a plurality of single-sided circuit boards laminated in the same direction and the metal foil can be integrated by one heating press, and then the metal foil is subjected to etching treatment. The conductor circuit can be formed in a desired wiring pattern having at least a conductor pad for mounting a solder body such as a solder bump.

In general, when a single-sided circuit board is laminated in multiple layers in the same direction, the heating process such as drying and annealing is repeated after dipping in a plating solution or a cleaning solution, so that the conductor circuit which is a metal layer is formed. Since the stress applied to the non-existing part is not buffered, the board itself warps, which causes breakage of the conductor circuit, disconnection, defective connection at the via hole part, peeling of the filling metal, etc., and electrical connection. It may cause deterioration in reliability and reliability.

However, as in the present invention, a metal foil having a matte surface is laminated on the surface on the conductive bump side of a plurality of single-sided circuit boards laminated in the same direction, and the laminated body is subjected to one heating press. When the conductor circuit is formed by etching the pressure-bonded metal foil after the integration by, the strength in the stacking direction is increased and the stress is buffered.

Therefore, since the peel strength and the pull strength of the conductor circuit with respect to the surface of the substrate on the side of the conductive bumps are sufficiently secured, it is possible to prevent the displacement of the conductor pad with respect to the via hole due to the heating press. Also, sufficient strength is ensured during or after mounting on solder pads such as solder bumps or electronic parts such as IC chips on conductor pads.
Moreover, since the mounting allowable range is widened, reliable electrical connection can be performed.

In the above case, a plurality of single-sided circuit boards laminated in the same direction and the metal foil are integrated by hot pressing in the same manner as in the above case, and then the metal foil is etched to form a conductor circuit. Is formed, and a plurality of other single-sided circuit boards are laminated on the conductor circuit formation surface in the direction opposite to the above direction and integrated by heating and pressing.

In this case, the matte surface of the metal foil is pressure-bonded to the inner surface of the single-sided circuit board on the conductive bump side, and the conductor circuit formed by etching the metal foil is It can be formed into a desired wiring pattern having at least a conductor pad to be bonded to a conductive bump of another one-sided circuit board to be laminated with respect to it.

Therefore, similarly to the above case, the peel strength and pull strength of the conductor circuit with respect to the surface of the substrate on the side of the conductive bumps are sufficiently secured, and the position of the conductor pad with respect to the via hole by the integration processing such as heating press. The shift can be prevented.

Further, in this case, since it is necessary to perform the integration processing such as heating press twice, an accurate scale factor is required, but higher peel strength and pull strength than those in the above case. Can be obtained.

The matte surface of the metal foil forming the conductor circuit is coated with at least one protective film selected from tin, zinc, nickel and phosphorus or a protective film composed of a noble metal such as gold or platinum. Is the preferred embodiment.

The thickness of such a protective film is 0.01 to 3
The range of μm is desirable. The reason is that if it is less than 0.01 μm, it may not be possible to completely cover fine irregularities on the mat surface, and if it exceeds 3 μm, the protective film is filled in the recesses on the formed mat surface, and the mat treatment effect is offset. This is because it may happen. A particularly preferred film thickness is 0.0
It is in the range of 3 to 1 μm.

Of the above protective films, the protective film made of tin can be formed most advantageously because it can be formed as a thin film layer deposited by electroless displacement plating and has excellent adhesion to the matte surface.

As the electroless plating bath for forming such a tin-containing plating film, tin borofluoride-thiourea solution or tin chloride-thiourea solution is used, and the plating treatment conditions are about 20 ° C. Approximately 5 minutes at room temperature, 50 ℃ ~ 6
It is desirable to set the temperature at about 0 ° C. for about 1 minute.

According to such an electroless plating treatment, copper-based copper-based thiourea metal complexes are formed on the surface of the copper pattern.
A tin substitution reaction occurs and a tin thin film layer is formed. Since it is a copper-tin substitution reaction, the matte surface can be covered without destroying the uneven shape.

The noble metal which can be used in place of the metal such as tin is preferably gold or platinum. This is because these noble metals are less likely to be affected by an acid or an oxidizing agent which is a roughening treatment liquid as compared with silver or the like, and can easily coat the matte surface. However, precious metals are often used only in high value-added products due to their high cost.
Such a gold or platinum coating can be formed by sputtering, electrolytic or electroless plating.

By providing such a coating layer,
The wettability of the matte surface becomes uniform, improving not only the bondability with the conductive bumps formed corresponding to the via holes, but also the bondability with the resin impregnated in the core material that constitutes the resin insulation layer. The electrical connection and the connection reliability are significantly improved.

In the multilayer circuit board formed by the above-mentioned lamination / heating press, a solder resist layer can be provided to cover the outermost circuit boards, that is, the surfaces of the circuit boards located in the uppermost layer and the lowermost layer. The solder resist layer is mainly formed of a thermosetting resin or a photosensitive resin, an opening is formed at a position corresponding to a via hole position on a circuit board, and a solder bump is formed on a conductor circuit (conductor pad) exposed from the opening. , Solder balls, or solder bodies such as T-shaped conductive pins are formed.

For example, of the outermost circuit boards, the uppermost circuit board on the side where a semiconductor element such as an LSI is mounted has a conductive pad such as tin / silver or tin / lead on the conductor pad. Bumps are formed by printing a conductive paste, and then fixed by reflow processing.

Of the outermost circuit boards, the other circuit board in the lowermost layer on the side connected to the mother board is located directly above the via hole,
For example, a T-shaped conductive pin formed of a metal material such as 42 alloy or phosphor bronze, or a conductive ball formed of a metal material such as gold, silver or solder can be provided.

Hereinafter, an example of a method of manufacturing the multilayer circuit board according to the present invention will be specifically described with reference to the accompanying drawings. (1) In manufacturing a multilayer circuit board according to the present invention, a single-sided circuit board as a basic unit constituting the multilayer circuit board is prepared by using a copper foil 12 attached to one surface of an insulating base material 10 as a starting material. (See FIG. 1 (a)).

The insulating base material 10 is, for example, a glass cloth epoxy resin base material, a glass cloth bismaleimide triazine resin base material, a glass cloth polyphenylene ether resin base material, an aramid nonwoven fabric-epoxy resin base material, an aramid nonwoven fabric-polyimide resin. Although rigid laminated substrates selected from the substrates can be used, glass cloth epoxy resin substrates are most preferred.

The insulating base material 10 has a thickness of 20 to 60.
0 μm is desirable. The reason is that if the thickness is less than 20 μm, the strength is reduced and handling becomes difficult, and the reliability of electrical insulation is reduced, and if the thickness exceeds 600 μm, formation of fine via holes and filling of conductive paste are performed. It becomes difficult and the substrate itself becomes thick.

The thickness of the copper foil 12 is preferably 5 to 18 μm. The reason is that, when forming an opening for forming a via hole in an insulating base material by using laser processing as described below, it penetrates if it is too thin, and conversely if it is too thick, it becomes fine by etching. This is because it is difficult to form a conductor circuit pattern having a large line width.

As the insulating base material 10 and the copper foil 12, in particular, an epoxy resin is impregnated in a glass cloth to form B.
It is preferable to use a single-sided copper-clad laminate obtained by laminating a prepreg used as a stage and a copper foil and heating and pressing. The reason is that the wiring pattern and the via hole are not displaced during the handling after the copper foil 12 is etched, and the positional accuracy is excellent.

(2) Next, the copper foil 12 of the insulating base material 10
A transparent protective film 14 is attached to the surface opposite to the surface to which is attached. In this protective film 14, the thickness of the pressure-sensitive adhesive layer is 1 to 20 μm, and the thickness of the film itself is 10 to 10.
Polyethylene terephthalate (P
ET) film is used.

(3) Next, carbon dioxide gas laser irradiation is performed from the PET film 14 attached on the insulating base material 10 to penetrate the PET film 14 and the copper foil 12 ( Or conductor circuit pattern)
The opening 16 is formed (see FIG. 1B). This laser processing is performed by a pulse oscillation type carbon dioxide gas laser processing apparatus, and the processing condition is that the pulse energy is 0.
It is desirable that the pulse width is 5 to 100 mJ, the pulse width is 1 to 100 μs, the pulse interval is 0.5 ms or more, and the number of shots is 3 to 50. The diameter of the via forming opening 16 that can be formed under such processing conditions is 50 to 250 μm.
It is desirable that it is m. The protective film 14
Can be used as a printing mask for forming solder bumps, which will be described later, by printing a conductive paste.

(4) In order to remove the resin residue remaining on the side surface and the bottom surface of the opening 16 formed in the step (3), desmear processing is performed. This desmear treatment is preferably performed by a dry treatment such as oxygen plasma discharge treatment, corona discharge treatment, ultraviolet laser treatment, or excimer laser treatment.

(5) Next, a PET film 15 as a plating protection film is attached to the copper foil surface of the desmeared substrate, and then electrolytic copper plating treatment using the copper foil 12 as a plating lead is performed. Electrolytic copper plating in opening 16 1
8 to fill the via hole 20 (FIG. 1).
(See (c)). After the electrolytic copper plating treatment, the PET film 14 attached to the substrate may be peeled off, and the electrolytic copper plating 18 rising above the opening 16 may be removed and flattened by belt sander polishing, buff polishing, or the like.

(6) After performing the electrolytic copper plating treatment of (5) above, electrolytic solder (Sn / Pb) plating treatment using the copper plating 18 as a plating lead is performed to form a protruding conductor formed of electrolytic solder plating. That is, the solder bumps 24 are formed so as to slightly project from the surface of the electrolytic copper plating (see FIG. 1).
(See (d)).

(7) Next, a resin adhesive is applied to the surface of the insulating base material 10 including the solder bumps 24 to form an adhesive layer 26, which is then attached on the copper foil 12 of the insulating base material 10. The PET film 15 is peeled off (see FIG. 1E). Such a resin adhesive is, for example, an insulating base material 1.
0 is formed on the entire surface including the solder bumps 24 or the surface not including the solder bumps 24 as an adhesive layer made of an uncured resin in a dried state. This adhesive layer is preferably pre-cured because it is easy to handle, and its thickness is preferably in the range of 5 to 50 μm.

The adhesive layer 26 is preferably made of an organic adhesive. As the organic adhesive, epoxy resin, polyimide resin, thermosetting polyphenolene ether (PPE), epoxy resin and thermoplastic resin are used. Composite resin, composite resin of epoxy resin and silicone resin, BT
It is desirable that it is at least one resin selected from resins. A curtain coater, a spin coater, a roll coater, spray coating, screen printing, etc. can be used for the coating method of the uncured resin which is an organic adhesive. The adhesive layer can also be formed by laminating an adhesive sheet.

The single-sided circuit board A manufactured according to the above steps (1) to (7) has a copper foil as a conductor layer on one surface of the insulating base material 10, and a copper foil from the other surface. Solder bumps 2 formed by solder plating on the filled via holes while having filled via holes in the openings reaching
Insulating substrate 1 having solder bumps 24
When the multi-layered circuit board according to the present invention is manufactured, the circuit board is formed with the adhesive layer 26 on the surface of No. 0 and is laminated on the uppermost layer.

Next, another one-sided circuit board B laminated on the lower layer of the one-sided circuit board A is prepared. (8) First, after performing the same processing as the above steps (1) to (6) (see FIGS. 2A to 2D), an etching protection film is formed on the surface of the insulating base material 10 on which the solder bumps 24 are formed. 25
Is attached, the copper foil 12 is covered with a mask having a predetermined circuit pattern, and then an etching process is performed to form a conductor circuit 28 (including via land) (see FIG. 2E).

In this processing step, first, the copper foil 12
After sticking the photosensitive dry film resist on the surface of
An exposure resist is developed along a predetermined circuit pattern to form an etching resist, and a metal layer in a portion where the etching resist is not formed is etched to form a conductor circuit pattern 28 including a via land. The etching liquid is preferably at least one aqueous solution selected from aqueous solutions of sulfuric acid monohydrogen peroxide, persulfate, cupric chloride, and ferric chloride.

The copper foil 12 is etched to form the conductor circuit 2.
As a pretreatment for forming 8, in order to facilitate formation of a fine pattern, the entire surface of the copper foil is etched in advance to a thickness of 1 to 10 μm, more preferably 2 to 8 μm.
It can be thinned to about m. The via land as a part of the conductor circuit has an inner diameter substantially similar to the via hole diameter, but the outer diameter is preferably formed in the range of 50 to 250 μm.

(9) Conductor circuit 2 formed in (8) above
A tin thin film layer (not shown) is formed on the surface of No. 8 by electroless plating. An electroless plating bath for forming such a tin-containing plating film uses tin borofluoride-thiourea solution or tin chloride-thiourea solution, and the plating treatment condition is about 20 ° C. at room temperature. It is desirable that the time is 5 minutes, and the time is about 1 minute at a high temperature of 50 ° C. to 60 ° C. According to such electroless plating treatment, a copper-tin substitution reaction based on the formation of a metal complex of thiourea occurs on the surface of the copper pattern, and a tin thin film layer having a thickness of 0.01 to 1 μm is formed.

The surface of the conductor circuit 28 formed in the above step (7) is subjected to a roughening treatment if necessary, and the tin layer formed in the above step (8) is formed on the roughened layer. It can also be formed. Further, instead of the tin layer, it is desirable to coat with a protective film made of at least one selected from zinc, nickel and phosphorus or a protective film made of a noble metal such as gold or platinum. The roughening treatment is to improve adhesion with the adhesive layer and prevent peeling (delamination) when forming a multilayer structure. Examples of the roughening treatment method include soft etching treatment, blackening (oxidation) -reduction treatment, and copper-
There is formation of needle-like alloy plating made of nickel-phosphorus (made by EBARA Eugelite: trade name Interplate) and surface roughening by an etching solution called "Mec Etch Bond" manufactured by MEC.

The roughening layer is preferably formed by using an etching solution. For example, the surface of the conductor circuit is etched from a mixed aqueous solution of a cupric complex and an organic acid using the etching solution. Can be formed by. It is presumed that such an etching solution can dissolve the copper conductor circuit pattern under oxygen coexisting conditions such as spraying and bubbling, and the reaction proceeds as follows. Cu + Cu (II) A _n → 2Cu (I) A _{n / 2} 2Cu (I) A _{n / 2} + n / 4O ₂ + nAH (aeration) → 2Cu (II) A _n + n / 2H ₂ O In the formula, A is complexed. Agent (acts as a chelating agent), n represents a coordination number.

As shown in the above equation, the generated cuprous complex is dissolved by the action of acid and is combined with oxygen to form a cupric complex, which again contributes to the oxidation of copper. The cupric complex used in the present invention is preferably a cupric complex of azoles.
The etching solution containing the organic acid-cupric acid complex can be prepared by dissolving the cupric complex of an azole and the organic acid (halogen ion as necessary) in water. Such an etching solution is, for example, imidazole copper.
It is formed from an aqueous solution in which 10 parts by weight of the (II) complex, 7 parts by weight of glycolic acid, and 5 parts by weight of potassium chloride are mixed.

(10) Next, after peeling off the protective film from the surface of the insulating base material 10 including the solder bumps 24, the resin adhesive 26 is applied to the surface of the insulating base material 10 (see FIG. See f)). Such a resin adhesive is applied to, for example, the entire surface of the insulating substrate 10 including the solder bumps 24 or the surface not including the solder bumps 24, and an adhesive layer made of an uncured resin in a dried state. Formed as. This adhesive layer is preferably pre-cured because it is easy to handle, and its thickness is 5 to 5
The range of 0 μm is desirable.

The adhesive layer 26 is preferably made of an organic adhesive. As the organic adhesive, an epoxy resin, a polyimide resin, a thermosetting polyphenolene ether (PPE), an epoxy resin and a thermoplastic resin are used. Composite resin, composite resin of epoxy resin and silicone resin, BT
It is desirable that it is at least one resin selected from resins. A curtain coater, a spin coater, a roll coater, spray coating, screen printing, etc. can be used for the coating method of the uncured resin which is an organic adhesive. The adhesive layer can also be formed by laminating an adhesive sheet.

The single-sided circuit board B produced by the steps (8) to (10) has a conductor circuit on one surface of the insulating base material 10 and solder formed by solder plating on the other surface. The bumps 24 are formed, and the adhesive layer 26 is formed on the surface of the insulating base 10 including the solder bumps 24.

(11) A plurality of the single-sided circuit boards B,
For example, four sheets of B1, B2, B3, B4 are laminated in the same direction with respect to the surface of the single-sided circuit board A on the solder bump side, and on the surface of the single-sided circuit board B4 located on the lowermost layer on the solder bump side. Then, a copper foil 30 having a matte surface having a surface roughness of 3 μm and a thickness of 5 to 18 μm is laminated with the matte surfaces facing each other, and the heating temperature is 150 to 250 ° C. and the pressure is 1 to 10 MPa. Under a single heating press, the single-sided circuit board A and the plurality of single-sided circuit boards B1,
B2, B3, B4 and the copper foil 30 are integrated.

In this case, another resin adhesive layer 32, which is maintained in a semi-cured state, is formed in place of the adhesive layer 26 on the surface of the single-sided circuit board B4 located at the lowermost layer on the solder bump side. Then, it is desirable that the copper foil 30 is hot pressed through the resin adhesive layer 32.

Such hot pressing is carried out under appropriate temperature and pressure, more preferably under reduced pressure, to cure the uncured resin adhesive layer 26 and the resin adhesive layer 32. By doing so, the one-sided circuit board A and the one-sided circuit board B are bonded together, and the lowermost one-sided circuit boards B1, B2, B3, B4 and the copper foil 30 are bonded together. At that time, the copper foil 30 is the cured adhesive layer 3
The copper foil 30 and the solder bumps 24 are electrically connected to each other while being adhered to the insulating base material 10 of the single-sided circuit board B4 via 2.

(12) The uppermost copper foil 12 and the lowermost copper foil 30 of the circuit board integrated in (11) above.
Is etched to form conductor circuits 36 and 38 (both including via lands) in the upper and lower layers of the multilayer circuit board (see FIG. (B)).

In this processing step, first, the copper foil 12
After a photosensitive dry film resist is attached to the surface of the copper foil 30, the resist is exposed and developed along a predetermined circuit pattern to form an etching resist, and the metal layer in the portion where the etching resist is not formed is etched to form a via land. To form a conductor circuit 36 and a conductor circuit 38.

(13) Next, solder resist layers 37 and 39 are formed on the surfaces of the outermost circuit boards A and B4, respectively. In this case, the solder resist composition is applied to the entire outer surfaces of the circuit boards A and B4, the coating film is dried, and then a photomask film having an opening is placed on the coating film for exposure and development. By the processing, openings 40 and 42 exposing the solder pad portions directly above the via holes in the conductor circuits 36 and 38 are formed, respectively.

(14) The conductive bumps 44, the conductive balls 46, or the conductive pins are formed on the solder pad portions exposed right above the via holes through the openings 40 and 42 of the solder resists 37 and 39 obtained by the process (12). It is preferable to form a metal layer 50 made of "nickel-gold" on each solder pad portion before disposing.

The thickness of the nickel layer is preferably 1 to 7 μm, and the thickness of the gold layer is preferably 0.01 to 0.06 μm. The reason for this is that if the nickel layer is too thick, the resistance value will increase, and if it is too thin, it will easily peel off. On the other hand, if the gold layer is too thick, the cost will increase, and if it is too thin, the adhesion effect with the solder body will decrease.

(15) A solder body is supplied onto the metal layer 50 made of nickel-gold provided on the solder pad portion,
The conductive bumps 44 are formed by melting and solidifying the solder body, or the conductive balls 46 or the conductive pins are joined to the solder pad portions to form the multilayer circuit board 60.

As a method of supplying the solder body, a solder transfer method or a printing method can be used. Here, in the solder transfer method, a solder foil is attached to a prepreg, and the solder foil is etched by leaving only a portion corresponding to an opening to form a solder pattern to form a solder carrier film. In this method, a flux is applied to the solder resist opening portion of the substrate, then the solder patterns are laminated so that the solder patterns come into contact with the pads, and this is heated and transferred.

On the other hand, the printing method is a method in which a printing mask (metal mask) having an opening provided at a position corresponding to a pad is placed on a substrate, a solder paste is printed, and heat treatment is performed. As the solder, tin-silver, tin-indium, tin-zinc, tin-bismuth and the like can be used.

That is, the solder resist layers 37, 39
An appropriate solder body is supplied on each solder pad exposed from the openings 40 and 42 to form the conductive bump 44, or the conductive ball 46 or the conductive T pin is connected.

As a solder material for forming the conductive bumps 44, tin / lead solder (melting point 1
83 ° C.) or tin / silver solder (melting point 220 ° C.), as a solder material for connecting the conductive balls 46 and T pins, tin / antimony solder having a relatively high melting point of 230 ° C. to 270 ° C., tin It is preferable to use / silver solder or tin / silver / copper solder.

According to the embodiment according to the steps (1) to (15), the multilayer circuit board 60 according to the present invention.
Is a single-sided circuit board A and a plurality of single-sided circuit boards B1 and B.
2, B3, B4 are laminated in the same direction, and a copper foil 30 having a matt-treated surface is made to face the surface of the bottom surface of the single-sided circuit board B4 on the solder bump side. After arranging them in a state of being arranged, the one-sided circuit boards are bonded to each other by one heating press, and the copper foil 30 is pressure-bonded to the lowermost-sided one-sided circuit board B4 to form a multilayer, and then the uppermost one-sided circuit board. Although the conductor circuits 36 and 38 are formed on the single-sided circuit board B4 of A and the lowermost layer, respectively, in addition to such an embodiment, the following embodiments can be adopted.

Five single-sided circuit boards B1 to B5 made of the same material are sequentially laminated in the same direction, and a mat is formed on the surface of the lowermost one-sided circuit board B5 on the solder bump side. The single-sided circuit boards are bonded to each other by one vacuum heating press in a state where the copper foils 30 having the surfaces are opposed to each other, and the copper foil 30 is pressure-bonded to the lowermost-sided single-sided circuit board B5 to form a multilayer. After such layering,
Etching protection film 2 on top of single-sided circuit board B1
In the state where 5 is attached, an etching process is performed to selectively etch the copper foil 30 pressed onto the lowermost one-sided circuit board B5 to form a conductor circuit 38 having a predetermined pattern.

As shown in FIG. 5A, a single-sided circuit board
Instead of the adhesive layer 26 to be applied to the solder bump side surface of A, a resin adhesive 36 for copper foil adhesion is applied, and a copper having a matte surface is applied to a single-sided circuit board in a semi-cured state. After the foils 30 are arranged opposite to each other and the copper foil 30 is pressure-bonded to the single-sided circuit board A by a heat press (see FIG. 5B),
Conducting circuits 62 and 64 having a predetermined pattern on both front and back surfaces of the single-sided circuit board A after etching
Then, the double-sided circuit board C is formed (see FIG. 5C). After that, four single-sided circuit boards B1 to B4 are sequentially laminated in the same direction, and the double-sided circuit board C is attached to the matt surface of the surface of the single-sided circuit board B4 located at the lowermost layer on the solder bump side. With one side facing outward, four single-sided circuit boards B1 to B4 and one double-sided circuit board C are integrated by a vacuum heating press.

The copper foil 30 having a matte surface is arranged to face the surface of the single-sided circuit board B on the solder bump side,
After the copper foil 30 is pressure-bonded to the single-sided circuit board B by a heat press, the etching protection film 25 is attached to the conductor circuit formation surface of the single-sided circuit board B, and then the etching treatment is applied to the back surface of the single-sided circuit board B. The conductor circuit 62 having a predetermined pattern is formed to form the double-sided circuit board C.
After that, four single-sided circuit boards B1 to B4 are sequentially laminated in the same direction, and the lowermost single-sided circuit board B4
The double-sided circuit board C is integrated with the double-sided circuit board C by a vacuum heating press in a state where the matte surface of the double-sided circuit board C faces outward with respect to the surface of the solder bump side. .

The double-sided circuit board C is formed by the same method as in the above embodiment. Then, as shown in FIG.
The surfaces on the solder bump side of the single-sided circuit boards B1 and B2 are made to face the conductor circuits 62 and 64 on the front and back surfaces of the double-sided circuit board C, respectively, and the surfaces on the conductor circuit side of the single-sided circuit boards B1 and B2 are arranged. On the other hand, the single-sided circuit boards A1 and A2 are sequentially laminated with the surfaces on the solder bump side facing each other, and these laminated bodies are integrated by a vacuum heating press. After such multi-layering, an etching process is performed, and as shown in FIG. 7, the copper foil surfaces of the uppermost and lowermost single-sided circuit boards A1 and A2 are etched to form a conductor circuit 36 having a predetermined pattern. And 3
8 are formed respectively.

In the above embodiment, five single-sided circuit boards and a copper foil having a matte surface are laminated and integrated, or four single-sided circuit boards and one double-sided circuit board are laminated and integrated, Although the number of layers is 5, the number of layers can be 4 or less, or 6 or more, and can be multilayered as needed.

[0114]

Example (Example 1) (1) First, a single-sided circuit board constituting a multilayer circuit board is manufactured. This circuit board uses, as a starting material, a single-sided copper-clad laminate obtained by laminating a prepreg, which is a B stage made by crushing an epoxy resin in a glass cloth, and a copper foil and heat-pressing them. This insulating base material 10
Has a thickness of 75 μm, and the copper foil 12 has a thickness of 12 μm,
On the surface of the laminated plate opposite to the copper foil forming surface, a thickness of 10
It has an adhesive layer of μm and the thickness of the film itself is 12
Laminate PET film 14 such that it is μm.

(2) Next, carbon dioxide laser irradiation is performed from above the PET film 14 to form a via hole forming opening 16 which penetrates the PET film 14 and the insulating base material 10 and reaches the copper foil 12, and further the opening. The inside of 16 was desmeared by oxygen plasma discharge. In this example, a high peak short pulse oscillation type carbon dioxide laser processing machine manufactured by Mitsubishi Electric was used to form an opening for forming a via hole, and a PET film having a thickness of 22 μm as a whole was laminated on a resin surface. A glass cloth epoxy resin substrate having a material thickness of 75 μm was irradiated with a laser beam from the PET film side by a mask image method to form an opening for forming a via hole of 150 μmφ at a speed of 100 holes / sec.

(3) Insulating substrate after desmear treatment
The PET film 15 is attached to the copper foil attachment surface of 10,
Electrolysis using copper foil 12 as a plating lead under the following conditions
Copper plating treatment is applied to form electrolytic copper plating 18 in the opening 16.
To form a via hole 20. At that time, electrolytic copper
The plating was exposed slightly above the opening 16, so
Exposed areas are removed by Darbelt polishing and buffing
And flattened. [Electrolytic copper plating solution] Sulfuric acid: 180 g / l Copper sulfate: 80 g / l Additive (made by Atotech Japan, trade name: Kaparaside G
L): 1 ml / l [Electrolytic plating conditions] Current density: 2 A / dm^Two Time: 30 minutes Temperature: 25 ℃

(4) Further, electrolytic solder plating treatment is performed under the following conditions to form a solder plating layer on the copper plating layer 18 filled in the openings 16 to form the insulating base material 1.
Solder bumps 24 protruding from the surface of 0 by 10 μm are formed. [Electrolytic solder plating solution] Sn (BF ₄ ) ₂ : 25 g / l Pb (BF ₄ ) ₂ : 12 g / l Additive: 5 ml / l (electrolytic solder plating conditions) Temperature: 20 ° C Current density: 0.4 A / dm ^Two

(5) Next, the insulating base material 1 in the above (3).
After peeling the PET film 15 attached to No. 0, an epoxy resin adhesive is applied to the entire surface of the insulating base material 10 on the solder bump 24 side and pre-cured to form an adhesive layer 26 for multi-layering. . The single-sided circuit board A produced according to the above (1) to (5) is a circuit board to be arranged in the uppermost layer in the case of forming multiple layers.

(6) After the same treatments as those in the above steps (1) to (4) (see FIGS. 2A to 2D), the PET film 15 is transferred from the copper foil sticking surface of the insulating base material 10. Is removed, and the copper foil 12 is subjected to an appropriate etching treatment while the etching protection film 25 is attached to the surface of the insulating base material 10 on the solder bump side to form a conductor circuit 28 having a predetermined pattern (FIG. 2). (See (e)).

(7) Then, using tin borofluoride-thiourea solution as an electroless plating bath on the surface of the conductor circuit 28 obtained in the above (6), the plating conditions are set at about 20 ° C. for about 5 minutes. Then, electroless plating treatment was performed to form a tin thin film layer (not shown) having a thickness of 0.1 μm.

(8) After the etching protection film 25 attached to the insulating base material 10 in (6) above is peeled off, an epoxy resin adhesive is applied to the entire surface of the insulating base material 10 on the solder bump 24 side, Pre-curing was performed to form an adhesive layer 26 for adhering each circuit board to form a multilayer (FIG. 2).
(See (f)).

The single-sided circuit board B manufactured according to the above (6) to (8) is a circuit board to be laminated on the surface of the single-sided circuit board A on the solder bump side. In this embodiment, 3 A single-sided circuit board B was produced.

(9) Further, as a circuit board which is located below these three single-sided circuit boards B and is laminated at the bottom, the same processing as the above step (6) is performed, and then the above (7) ), An epoxy resin adhesive for adhering a copper foil 30 having a matte surface as described later on the insulating substrate 10 is applied, and dried at 100 ° C. for 30 minutes. A resin adhesive layer 32 having a thickness of 20 μm was formed, and another one-sided circuit board B was manufactured.

(10) The single-sided circuit board A manufactured according to the above (1) to (5), the three single-sided circuit boards B1 to B3 manufactured according to the above (6) to (8), and the above (9 1 single-sided circuit board B4 manufactured according to
And are sequentially laminated in the same direction and at a predetermined position,
The surface of the lowermost single-sided circuit board B4 on the solder bump side is matt-processed on one side, and a copper foil 30 having a surface roughness of 3 μm and a thickness of 12 μm faces the matte surface. In this state, the single-sided circuit boards are bonded together by heating and pressing collectively under the conditions of a heating temperature of 180 ° C., a heating time of 70 minutes, a pressure of 5 MPa, and a vacuum degree of 2.5 × 10 ³ Pa. At the same time, the copper foil 30 was adhered to the surface of the single-sided circuit board B4 on the solder bump side to form a multilayer structure.

(11) Then, the copper foils 12 and 30 on the one-sided circuit board A and the one-sided circuit board B4, which are located in the uppermost layer and the lowermost layer of the multi-layered board, are subjected to an appropriate etching process to form the conductor circuits 36 and 38. By forming (including via land), a multilayer circuit board 60 having an IVH structure in all layers was manufactured.

(12) Solder resist layers 37 and 39 are formed on the surfaces of the circuit boards A and B4 located in the uppermost layer and the lowermost layer of the multilayer circuit board 60 manufactured according to the steps (1) to (11). Before that, if necessary, a roughening layer made of copper-nickel-phosphorus is provided.

(13) On the other hand, 6 dissolved in DMDG
46.67 parts by weight of a photosensitizing oligomer (molecular weight 4000) obtained by acrylating 50% of epoxy groups of 0% by weight of cresol nopolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.), 80% by weight dissolved in methyl ethyl ketone 14.121 parts by weight of bisphenol A type epoxy resin (Yukaka Shell, Epicoat 1001), 1.6 parts by weight of imidazole curing agent (2E4MZ-CN manufactured by Shikoku Kasei), polyvalent acrylic monomer as a photosensitive monomer (Japaneseized) Medicinal,
R604) 1.5 parts by weight, similarly polyvalent acrylic monomer (manufactured by Kyoeisha Chemical Co., Ltd., DPE6A) 30 parts by weight, and 0.36 part by weight of an acrylic ester polymer leveling agent (manufactured by Kyoeisha Polyflow No. 75). To this mixture, 20 parts by weight of penzophenone (manufactured by Kanto Kagaku) as a photoinitiator and 0.2 part by weight of EAB (manufactured by Hodogaya Kagaku) as a photosensitizer were added, and further 10 parts by weight of DMDG (diethylene glycol dimethyl ether). Was added to obtain a solder resist composition having a viscosity adjusted to 1.4 ± 0.3 Pa · S at 25 ° C. The viscosity was measured with a B-type viscometer (Tokyo Keiki, DVL-B type) using rotor No. 4 at 60 rpm, and rotor No. 3 at 6 rpm.

(14) 20 μm of the solder resist composition obtained in (13) above is applied to the surfaces of the uppermost and lowermost circuit boards of the multilayer circuit board obtained in (11) above.
Was applied at a thickness of. Then 100 at 20 ° C. for 20 minutes
After drying for 30 minutes at ℃, a 5mm thick soda lime glass substrate with a circular pattern (mask pattern) of the solder resist opening drawn by the chrome layer was soldered on the side where the chrome layer was formed. The film was brought into close contact with the resist layer and exposed to UV light of 1000 mJ / cm ² , and DMTG
It was developed. Further, at 80 ° C for 1 hour, at 100 ° C for 1 hour
Heat treatment was performed under the conditions of 120 ° C. for 1 hour and 150 ° C. for 3 hours to form solder resist layers 37 and 39 (thickness 20 μm) having openings 40 and 42 corresponding to the pad portions (opening diameter 200 μm).

(15) Next, the solder resist layer 37
And the substrate on which 39 was formed, nickel chloride 30 g /
1) Sodium hypophosphite 10 g / 1, sodium citrate 10 g / 1 It was immersed in an electroless nickel plating solution of pH = 5 for 20 minutes to form a nickel plating layer having a thickness of 5 μm in the opening. Furthermore, the substrate is gold cyanide 2g / 1, ammonium chloride 75g / 1, sodium citrate 50g / 1, sodium hypophosphite 1
2g at 93 ℃ in electroless gold plating solution consisting of 0g / 1
Immerse for 3 seconds, thickness 0.03μ on the nickel plating layer
m gold plating layer was formed, and a coating metal layer 50 including a nickel plating layer and a gold plating layer was formed.

(16) Then, a solder paste made of tin / lead solder having a melting point of about 183 ° C. is printed on the solder pad exposed from the opening 40 of the solder resist layer 37 covering the uppermost single-sided circuit board A. By reflowing at 183 ° C. to form the solder bumps 44, and the openings 4 of the solder resist layer 39 covering the lowermost single-sided circuit board B4.
The melting point of the solder pad exposed from 2 is about 230 ℃
The tin / antimony solder was supplied and reflowed in an atmosphere near 230 ° C., so that the solder balls 46 were connected and the multilayer circuit board 60 was manufactured.

(Example 2) (1) A single-sided circuit board B was manufactured by the same process as the step (9) of the above-described Example 1, and the surface of the single-sided circuit board B on the solder bump side was matted. After the copper foils 30 having the surfaces are arranged to face each other and the copper foils 30 are pressure-bonded to the one-sided circuit board B by a heat press, the etching protection film 25 is attached to the conductor circuit formation surface of the one-sided circuit board B, and the etching is performed. By processing, the conductor circuit 34 having a predetermined pattern is formed on the back surface of the single-sided circuit board B, and the double-sided circuit board C is manufactured.

(2) Then, (6) to
By the same process as the step (8), four single-sided circuit boards B1 to B4 are produced, and they are sequentially laminated in the same direction, and on the surface of the bottom-side single-sided circuit board B4 on the solder bump side. On the other hand, the double-sided circuit board C is laminated at a predetermined position with its matte surface facing outward, and the four single-sided circuit boards B1 to B4 and the double-sided circuit board C are integrated by a vacuum heating press. Layered into layers.

(3) (12) to (1) of the first embodiment
By the same process as the process of 6), the solder bumps 44 are formed on the conductor circuits 28 (conductor pads) of the one-sided circuit board B1 located on the outermost side of the circuit board having five layers, and the outermost side is formed. A solder ball 46 was formed on the conductor circuit 34 (conductor pad) of the other circuit board C located at, to manufacture the multilayer circuit board 60.

(Embodiment 3) (1) A single-sided circuit board A is manufactured by the same processing as the steps (1) to (5) of the above-mentioned embodiment 1, and the surface of the single-sided circuit board A on the solder bump side. On the other hand, the copper foil 30 having a matte surface is arranged to face each other, and the copper foil 30 is pressure-bonded to the single-sided circuit board A by a heat press, and then subjected to an etching treatment to form a predetermined pattern on both front and back surfaces of the single-sided circuit board A. The conductor circuits 28 and 34 having the are formed to form the double-sided circuit board C.

(2) Then, (6) to
Two single-sided circuit boards B1 and B2 are produced by the same processing as the step (9), and the (1) of the first embodiment is performed.
Two single-sided circuit boards A1 and A2 are manufactured by the same processing as the steps (5) to (5). The surfaces of the single-sided circuit boards B1 and B2 on the solder bump side are made to face the conductor circuits 28 and 34 on the front and back surfaces of the double-sided circuit board C, respectively, and to the surfaces of the single-sided circuit boards B1 and B2 on the conductor circuit side. Then, the single-sided circuit boards A1 and A2 were sequentially laminated with the surfaces on the solder bump side facing each other, and the laminated body was integrated by a vacuum heating press to form five layers.

(3) After the multi-layer is formed by the process of (2) above, an etching process is performed to form conductor circuits 36 and 38 having a predetermined pattern on the outermost two single-sided circuit boards A1 and A2, respectively. . (4) Next, the multilayer circuit board 60 was manufactured by the same processing as the step (3) of Example 2 above.

With respect to the multilayer circuit boards manufactured in the above Examples 1 to 3, after conducting a reliability test such as a heat cycle test and a high temperature test, a continuity test was conducted, and as a result, continuity between all the circuit boards was confirmed. It was

[0138]

As described above, according to the multilayer circuit board of the present invention, the metal foil whose one surface is mat-treated,
Since the matt surface is pressure-bonded to the conductive bump side surface of one of the laminated single-sided circuit boards and is formed into a conductor circuit having a predetermined wiring pattern. It is possible to suppress warpage that may occur in a multi-layered board, and as a result, breakage or disconnection of the conductor circuit formed on the board, especially connection failure in the via hole part, and peeling of the filling metal It is possible to improve the electrical connectivity and the connection reliability by preventing the occurrence of the above.

Further, since the peel strength and pull strength of the conductor circuit with respect to the surface of the substrate on the conductive bump side are sufficiently secured, the displacement of the conductor pad with respect to the via hole due to the heating press is prevented, and the electrical connection is ensured. Therefore, it is possible to surely mount the electronic component and the connecting terminals such as the solder ball and the T pin on the surface layer of the substrate on the solder pad.

[Brief description of drawings]

1A to 1E are views showing a part of a manufacturing process of a single-sided circuit board A constituting a multilayer circuit board according to the present invention.

2A to 2F are views showing a part of a manufacturing process of a single-sided circuit board B constituting a multilayered circuit board according to the present invention.

FIG. 3 is a diagram showing a laminated state of a single-sided circuit board and a copper foil forming a multilayer circuit board according to the present invention.

FIG. 4 is a diagram showing a multilayer circuit board according to the present invention.

5A to 5C are views showing a part of a manufacturing process of a double-sided circuit board constituting the multilayer circuit board according to the present invention.

FIG. 6 is a diagram showing a laminated state of a single-sided circuit board and a double-sided circuit board that constitute the multilayered circuit board according to the present invention.

FIG. 7 is a diagram showing a multilayer circuit board in which the single-sided circuit board and the double-sided circuit board in the stacked state shown in FIG. 6 are stacked and integrated.

[Explanation of symbols]

10 Insulating resin base material 12 Copper foil 14 Protective film 16 Via hole forming openings 18 Electrolytic copper plating 20 Filled via holes 24 Conductive bump 26 Resin adhesive layer 28 conductor circuits 30 copper foil 32 resin adhesive layer 36 conductor circuit 37 Solder resist layer 38 conductor circuit 39 Solder resist layer 40, 42 openings 44 Solder bump 46 Solder ball 50 metal layer A, B single-sided circuit board C double-sided circuit board

Continued front page    (72) Inventor Masanori Tamaki             1-1 Ibide, Northern Ibigawa-cho, Ibi-gun, Gifu Prefecture             Within the corporation F-term (reference) 5E343 AA07 AA15 AA16 AA17 BB23                       BB24 BB34 BB44 BB47 BB48                       BB49 BB54 BB57 BB67 DD33                       DD43 EE33 ER12 ER18 ER54                       GG20                 5E346 AA15 AA32 CC04 CC09 CC31                       CC32 CC37 CC38 CC40 DD12                       DD24 EE09 EE12 EE13 EE19                       FF03 FF07 FF14 GG15 HH07                       HH11

Claims (10)

[Claims] 1. An insulating base material, a conductor circuit formed on one surface of the insulating base material, and a conductive substance filled in an opening reaching the conductor circuit from the other surface of the insulating base material. A plurality of single-sided circuit boards each having a via hole including a conductive bump electrically connected to the via hole and formed so as to project to the outside of the opening are adhesive layers. In a multi-layered circuit board that is laminated and integrated via a metal foil having a matte surface on one side, the matt surface is a single-sided circuit board of any one of the plurality of single-sided circuit boards. Is crimped to the surface of the conductive bump side of
A multilayer circuit board formed on a conductor circuit having a predetermined wiring pattern. 2. The metal foil is pressure-bonded to the surface of the outermost one-sided circuit board on the side of the conductive bumps,
The multi-layer circuit board according to claim 1, wherein the multi-layer circuit board is formed on a surface conductor circuit having a predetermined wiring pattern by an etching process. 3. The multilayered circuit board according to claim 2, wherein a conductive body, a solder ball, or a solder body made of T-pins is formed on the outermost conductor circuit. 4. The matte surface of the metal foil comprises tin, zinc,
The multilayered circuit board according to claim 1, which is covered with a protective film made of at least one selected from nickel, phosphorus and noble metals. 5. A via hole is formed by forming a conductor circuit on one surface of an insulating base material and filling a conductive material into an opening reaching the conductor circuit from the other surface of the insulating base material. After formation, a plurality of single-sided circuit boards electrically connected to the via hole and having conductive bumps protruding from the surface of the insulating base material are laminated and integrated. When manufacturing a multilayer circuit board consisting of, during the manufacturing process, at least the following (1) ~ (3)
The step, namely, (1) while laminating the plurality of single-sided circuit boards in the same direction, and one surface is matted copper foil, the matt surface is the most one of the laminated single-sided circuit boards. A step of laminating the one-sided circuit board located on the outer side in a state of facing the surface on the side of the conductive bumps, and (2) integrating the laminated one-sided circuit board and a metal foil by a heat press to form the copper foil A step of crimping to the surface of the single-sided circuit board on the side of the conductive bumps;
(3) A method for producing a multilayer circuit board, comprising the step of selectively etching the pressure-bonded metal foil to form a conductor circuit having a predetermined wiring pattern. 6. Before the step (1), a step of forming a coating layer made of at least one selected from tin, zinc, nickel, phosphorus and noble metals on the matte surface of the metal foil is included. The method for manufacturing a multilayer circuit board according to claim 5, comprising: 7. The method for manufacturing a multilayer circuit board according to claim 5, further comprising a step of forming a solder body on the conductor circuit after the step (3). 8. When manufacturing a multi-layered circuit board in which a plurality of single-sided circuit boards are laminated and integrated with an adhesive layer, at least the following (1)
Steps (1) to (5), that is, (1) forming a conductor layer on one surface of the insulating base material, and forming a conductive material in the opening reaching the conductor layer from the other surface of the insulating base material. To form a via hole, and further to electrically connect to the via hole, and to form a conductive bump so as to protrude from the surface of the insulating base material, (2) A conductor circuit is formed on one surface of the insulating base material, and a via hole is formed by filling a conductive material into the opening reaching the conductor circuit from the other surface of the insulating base material. And then manufacturing a single-sided circuit board electrically connected to the via hole and forming conductive bumps protruding from the surface of the insulating substrate, and (3) above (1) ) And the single-sided circuit board obtained in step (2) and the one obtained in step (2) above. And a plurality of single-sided circuit boards, the single-sided circuit board obtained in the step (1) is positioned in the uppermost layer, and laminated in the same direction, and a metal foil having one surface mat-treated, The matte surface
The step of stacking in a state of facing the conductive bump side surface of the single-sided circuit board obtained in the step (2) located in the lowermost layer, and (4) the stacked single-sided circuit board and the metal foil. Integrating by collectively heat-pressing with an adhesive, the step of pressure-bonding the metal foil to the surface of the conductive bump side of the one-sided circuit board located in the lowermost layer, (5)
A step of etching the conductor layer formed on the one-sided circuit board located on the uppermost layer and the metal foil crimped on the one-sided circuit board located on the lowermost layer to form conductor circuits having predetermined wiring patterns, respectively. And a method of manufacturing a multilayer circuit board, comprising: 9. The method according to claim 8, further comprising the step of previously forming a protective film made of at least one selected from tin, zinc, nickel, phosphorus and noble metals on the mat-treated surface of the metal foil. A method for manufacturing the multilayer circuit board according to. 10. The method of manufacturing a multilayer circuit board according to claim 8, further comprising a step of forming a solder body on the conductor circuit after the step (5).