JP2003209141A - Flexible wiring board and packaging method of semiconductor element - Google Patents

Flexible wiring board and packaging method of semiconductor element

Info

Publication number
JP2003209141A
JP2003209141A JP2002004592A JP2002004592A JP2003209141A JP 2003209141 A JP2003209141 A JP 2003209141A JP 2002004592 A JP2002004592 A JP 2002004592A JP 2002004592 A JP2002004592 A JP 2002004592A JP 2003209141 A JP2003209141 A JP 2003209141A
Authority
JP
Japan
Prior art keywords
semiconductor element
wiring board
flexible wiring
mounting
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002004592A
Other languages
Japanese (ja)
Other versions
JP3743716B2 (en
Inventor
Kazunari Tanaka
一成 田中
Mamoru Izawa
守 井澤
Daijuro Takano
大樹郎 高野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2002004592A priority Critical patent/JP3743716B2/en
Publication of JP2003209141A publication Critical patent/JP2003209141A/en
Application granted granted Critical
Publication of JP3743716B2 publication Critical patent/JP3743716B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reliable flexible wiring board by uniformly applying pressure to conductive particles in an ACF and adhering them to a connecting terminal and an electrode terminal when a semiconductor element is bonded by thermal compression to the flexible wiring board of a multilayer construction using the ACF. <P>SOLUTION: The flexible wiring board FC includes wiring layers 2A, 2B and a protective layer 6 on both front and rear faces of a film substrate 1 and has the semiconductor element 4 fitted by thermocompression bonding on a packaging region 3 formed on the front face, wherein an opening 9 is formed on the rear face of the packaging region 3 in which the wiring layers 2A, 2B and the protective layer 6 are not arranged of which each area is the same as or larger than the base area of the semiconductor element 4. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、多層構造のフレキ
シブル配線基板及び半導体素子の実装方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flexible wiring board having a multilayer structure and a method for mounting a semiconductor element.

【0002】[0002]

【従来の技術】フレキシブル配線基板は、可撓性を有す
るフィルム基板の表面又は表裏面に金属製の配線パター
ンが形成され、樹脂等により適宜保護された多層構造を
持ち、主に電子部品や装置間に配されて接続回路基板と
して使用されることが多い。また、ICやLSI等の半
導体素子や電子部品等が搭載されるものもある。フレキ
シブル配線基板の有する可撓性によって、電子部品や装
置間の微小な位置ズレや振動等を吸収することができ、
また、折り曲げて使用することもできるため製品の小型
化に有効であり、近年、多用されている。
2. Description of the Related Art A flexible wiring board has a multi-layered structure in which a wiring pattern made of metal is formed on the front surface or front and back surfaces of a flexible film substrate and is appropriately protected by a resin or the like. It is often arranged between and used as a connection circuit board. In addition, there are also those in which semiconductor elements such as ICs and LSIs, electronic parts, etc. are mounted. Due to the flexibility of the flexible wiring board, it is possible to absorb minute positional deviations and vibrations between electronic components and devices,
Further, since it can be bent and used, it is effective for downsizing of products and has been widely used in recent years.

【0003】従来のフレキシブル配線基板の構造を図3
に示す。フレキシブル配線基板FCは、ポリイミド等の
樹脂フィルムで形成されたフィルム基板1の表裏面に、
それぞれ銅等による金属製の配線2A,2Bが所定の形
状にて形成され、スルーホール5及びスルーホールメッ
キ5aにより、表裏面の配線2A,2Bが適宜導通され
ている。フィルム基板1上の実装領域3には、配線2A
により電極端子Pが形成され、LSI等の半導体素子4
が実装されている。さらに、配線2A,2Bを保護する
ため、保護剤(ウレタン製のソルダーレジストやポリイ
ミド等によるカバーフィルム)6が配設されている。図
3に示すように、フレキシブル配線基板FCの断面形状
はフィルム基板1、配線2A,2B、保護剤6が層状に
重なっており、このような形状のフレキシブル配線基板
FCは、多層構造のフレキシブル配線基板とも言われ
る。
The structure of a conventional flexible wiring board is shown in FIG.
Shown in. The flexible wiring board FC is formed on the front and back surfaces of the film substrate 1 formed of a resin film such as polyimide,
Metal wirings 2A and 2B made of copper or the like are formed in a predetermined shape, and the wirings 2A and 2B on the front and back surfaces are appropriately conducted by the through hole 5 and the through hole plating 5a. In the mounting area 3 on the film substrate 1, the wiring 2A
The electrode terminal P is formed by the semiconductor element 4 such as an LSI.
Has been implemented. Further, in order to protect the wirings 2A and 2B, a protective agent (cover film made of urethane solder resist, polyimide or the like) 6 is provided. As shown in FIG. 3, the cross-sectional shape of the flexible wiring board FC is such that the film substrate 1, the wirings 2A and 2B, and the protective agent 6 are layered on top of each other. The flexible wiring board FC having such a shape has a multilayered flexible wiring. Also called a substrate.

【0004】半導体素子4は、ペースト状若しくはフィ
ルム状の接着剤である異方導電性樹脂膜(Anisotropic
Conductive Film;以下ACF)7を用いて、加熱圧
着により実装される。ACF7は、熱可塑性あるいは熱
硬化性の樹脂フィルム内に導電粒子を分散させたもので
ある。実装方法は、図4に示すように、フレキシブル配
線基板FCを搬送ステージSに固定し、実装領域3にA
CF7を塗布し、半導体素子4を位置合わせしてその上
方から昇降動する加熱ツール8により加熱及び加圧して
行われる。これにより、半導体素子4の接続端子4aと
電極端子Pとの間においてACF7の導電粒子が密着
し、接続端子4aと電極端子Pが導通する。
The semiconductor element 4 is an anisotropic conductive resin film (Anisotropic) which is a paste or film adhesive.
A conductive film (hereinafter referred to as ACF) 7 is used for mounting by thermocompression bonding. ACF7 is a thermoplastic or thermosetting resin film in which conductive particles are dispersed. As for the mounting method, as shown in FIG. 4, the flexible wiring board FC is fixed to the carrier stage S, and the A
CF7 is applied, the semiconductor element 4 is aligned, and heating and pressurization are performed by a heating tool 8 which moves up and down from above. As a result, the conductive particles of the ACF 7 are brought into close contact with each other between the connection terminal 4a of the semiconductor element 4 and the electrode terminal P, and the connection terminal 4a and the electrode terminal P are electrically connected.

【0005】[0005]

【発明が解決しようとする課題】フレキシブル配線基板
FCの両面に配線2A,2B及び保護剤6が形成されて
いる場合、半導体素子4が実装される実装領域3の裏面
側にも、配線2B及び保護剤6が形成されることとな
り、加熱圧着の際の圧力が各層において吸収されてしま
っていた。すなわち、半導体素子4の実装時は、加熱加
圧される半導体素子4と搬送ステージSとの間に、AC
F7の他、配線2Aによる電極端子P、フィルム基板
1、配線2B及び保護剤6の順に4層を介することとな
り、多層構造のフレキシブル配線基板FCにACF7を
介して半導体素子4を実装すると、加熱ツール8による
圧力が各層で奪われ、ACF7の導電粒子の密着性が低
下し、導通の安定が得られないという問題があった。ま
た、裏面側の配線2Bのパターン形状が実装領域3にお
いて一様でない場合、加熱ツール8による圧力が一定と
ならないため、ACF7の導電粒子の密着性に偏りが生
じてしまう問題を有していた。また、実装後は通電によ
る導通試験を行うが、密着性の偏りの度合いによって
は、導通試験時には導通が認められても、その後、振動
や経年劣化によって導通しなくなってしまうことがあっ
た。また、導通試験には電源や計測器等が必要であり、
特に量産品の場合に全数試験を行う際、その手間やコス
トが問題となっていた。
When the wirings 2A and 2B and the protective agent 6 are formed on both surfaces of the flexible wiring board FC, the wiring 2B and the wiring 2B are also formed on the back surface side of the mounting area 3 where the semiconductor element 4 is mounted. Since the protective agent 6 was formed, the pressure at the time of thermocompression bonding was absorbed in each layer. That is, when the semiconductor element 4 is mounted, an AC voltage is applied between the semiconductor element 4 to be heated and pressed and the transfer stage S.
In addition to F7, the electrode terminal P by the wiring 2A, the film substrate 1, the wiring 2B, and the protective agent 6 are arranged in this order in four layers. When the semiconductor element 4 is mounted on the flexible wiring board FC having a multilayer structure via the ACF7, heating There is a problem that the pressure from the tool 8 is lost in each layer, the adhesiveness of the conductive particles of the ACF 7 is lowered, and stable conduction cannot be obtained. Further, when the pattern shape of the wiring 2B on the back surface side is not uniform in the mounting region 3, the pressure by the heating tool 8 is not constant, which causes a problem in that the adhesion of the conductive particles of the ACF 7 becomes uneven. . After the mounting, a continuity test is conducted by energizing. However, depending on the degree of unevenness of adhesion, even if the continuity is confirmed during the continuity test, the continuity may not be established due to vibration or deterioration over time. In addition, the continuity test requires a power supply, a measuring instrument, etc.
In particular, in the case of mass-produced products, when performing 100% testing, the labor and cost were problems.

【0006】そこで本発明の目的は、多層構造のフレキ
シブル配線基板にペースト状若しくはフィルム状の接着
剤を用いて半導体素子を熱圧着する際、十分な加圧力に
よりペースト状若しくはフィルム状の接着剤を均一に密
着させることにより、信頼性の高いフレキシブル配線基
板とこの基板に対する半導体素子の実装方法を提供する
ことにある。
Therefore, an object of the present invention is to apply a paste or film adhesive to a flexible wiring board having a multi-layer structure by thermocompression bonding a semiconductor element using the paste or film adhesive. It is an object of the present invention to provide a highly reliable flexible wiring board and a method for mounting a semiconductor element on this board by making them adhere uniformly.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に、本発明の請求項1記載のフレキシブル配線基板は、
フィルム基板の表裏両面に、電極端子を有する配線層を
少なくとも有し、フィルム基板上の実装領域に半導体素
子が、ペースト状若しくはフィルム状の接着剤を用いて
加熱圧着されることにより、半導体素子の接続端子が配
線層と電気的に導通している多層構造のフレキシブル配
線基板において、上記フィルム基板の実装領域において
実装された半導体素子の裏面側となる部分には、半導体
素子の底面積と同じか又は大きい面積にて配線層が配さ
れない領域が形成されていることを特徴とする。
In order to solve the above-mentioned problems, the flexible wiring board according to claim 1 of the present invention comprises:
At least wiring layers having electrode terminals are provided on both front and back surfaces of the film substrate, and the semiconductor element is heat-pressed using a paste-like or film-like adhesive in a mounting area on the film substrate, thereby In a flexible wiring board having a multi-layer structure in which the connection terminals are electrically connected to the wiring layer, whether the bottom surface area of the semiconductor element is the same as the bottom surface side of the semiconductor element mounted in the mounting area of the film substrate. Alternatively, a region where a wiring layer is not arranged is formed in a large area.

【0008】この発明によれば、半導体素子が実装され
る実装領域の裏面側には、半導体素子の底面積と同じか
又は大きい面積にて、配線層が配されない領域が形成さ
れているため、半導体素子を加熱圧着にて実装する際、
裏面側の配線層に圧力を吸収されることがなく、半導体
素子の実装の接続信頼性を高めることができる。
According to the present invention, a region where the wiring layer is not arranged is formed on the back surface side of the mounting region where the semiconductor element is mounted, the area being equal to or larger than the bottom area of the semiconductor element. When mounting a semiconductor element by thermocompression bonding,
The pressure is not absorbed by the wiring layer on the back surface side, so that the connection reliability in mounting the semiconductor element can be improved.

【0009】また、本発明の請求項2記載のフレキシブ
ル配線基板は、請求項1記載の発明を前提に、前記フィ
ルム基板は、実装される半導体素子の位置、又は、実装
される半導体素子の接続端子の位置が、前記配線層が配
されない領域からから確認できるほどに透明であること
を特徴とする。ここで、ペースト状若しくはフィルム状
の接着剤が異方性導電膜(ACF)の場合は、フィルム
基板は、接着剤中の導電粒子が前記配線層が配されない
領域から確認できるほどに透明であるとしても良い。
According to a second aspect of the present invention, in the flexible wiring board according to the first aspect of the present invention, the film substrate has a position of a semiconductor element to be mounted or a connection of semiconductor elements to be mounted. The position of the terminal is transparent so that it can be seen from the region where the wiring layer is not arranged. Here, when the paste-like or film-like adhesive is an anisotropic conductive film (ACF), the film substrate is so transparent that the conductive particles in the adhesive can be confirmed from a region where the wiring layer is not arranged. Also good.

【0010】この発明によれば、半導体素子の実装後に
フィルム基板の裏面側から半導体素子の位置、半導体素
子の接続端子の位置を、又は、異方性導電膜(ACF)
の場合は接着剤の導電粒子を確認することができる。し
たがって、通電による導通試験を行う前に、簡便な外観
検査による接続部の確認を行うことができる。
According to the present invention, after mounting the semiconductor element, the position of the semiconductor element, the position of the connection terminal of the semiconductor element, or the anisotropic conductive film (ACF) is measured from the rear surface side of the film substrate.
In this case, the conductive particles of the adhesive can be confirmed. Therefore, the connection portion can be confirmed by a simple visual inspection before conducting the continuity test by energizing.

【0011】また、本発明の請求項3記載の半導体素子
のフレキシブル配線基板への実装方法は、請求項1又は
請求項2記載のフレキシブル配線基板に前記半導体素子
を加熱圧着により実装するに際し、前記配線層が配され
ない領域に、前記領域と同じ面積かつ同じか又は大きい
厚さの固定板をはめ込み、加熱加圧を施した後に、固定
板を外すことを特徴とする。
According to a third aspect of the present invention, there is provided a method for mounting a semiconductor element on a flexible wiring board, wherein the semiconductor element is mounted on the flexible wiring board according to the first or second aspect by thermocompression bonding. It is characterized in that a fixing plate having the same area and the same or a large thickness as that of the region is fitted in a region where the wiring layer is not arranged, and after applying heat and pressure, the fixing plate is removed.

【0012】この発明によれば、配線層が配されない領
域に固定板をはめ込んで加熱加圧を施すため、半導体素
子に加えられる圧力は、すき間を介することなく固定板
で確実に受け止めることができる。したがって、請求項
1又は請求項2記載のフレキシブル配線基板を実装する
際に、従来と同じ形状の搬送ステージに固定して加熱加
圧を施す場合は、裏面側の配線層等の厚さの分だけ搬送
ステージとの間にすき間が生じるのに比べて、本発明の
方法によれば、より有効に半導体素子に圧力を加えるこ
とができる。
According to the present invention, since the fixing plate is fitted in the region where the wiring layer is not arranged and heat and pressure are applied, the pressure applied to the semiconductor element can be reliably received by the fixing plate without passing through the gap. . Therefore, when mounting the flexible wiring board according to claim 1 or 2, when the flexible wiring board is mounted on a carrying stage having the same shape as the conventional one and heat and pressure are applied, the thickness of the wiring layer on the back side is reduced. According to the method of the present invention, it is possible to more effectively apply pressure to the semiconductor element, as compared with the case where a gap is generated between the semiconductor element and the transfer stage.

【0013】[0013]

【発明の実施の形態】以下、本発明の実施の形態を図面
を引用しながら説明する。図1は、本実施の形態のフレ
キシブル配線基板の断面構造図、図2は、本実施の形態
のフレキシブル配線基板に半導体素子を実装する構造を
示す図である。本実施の形態のフレキシブル配線基板F
Cは、ポリイミド等の樹脂フィルムで形成されたフィル
ム基板1の表裏面に、それぞれ銅等による金属製の配線
2A,2Bが所定の形状にて形成され、スルーホール5
及びスルーホールメッキ5aにより、表裏面の配線2
A,2Bが適宜導通されている。フィルム基板1は半透
明であり、裏面側から表面側の配線2Aを確認すること
ができる。フィルム基板1は完全に無色透明である必要
はなく、裏面側から肉眼あるいは顕微鏡にて所望の事項
が確認できる程度に透明であればよい。所望の事項と
は、実装される半導体素子の位置、又は、実装される半
導体素子の接続端子の位置、又は、ペースト状若しくは
フィルム状の接着剤が異方性導電膜(ACF)の場合
は、その接着剤中の導電粒子等であり、更には、後述す
る、突起電極(バンプ)付きの半導体素子4の場合は、
その突起電極である。なお、これらの所望の事項を確認
し易くするために、対象物を着色等させることも可能で
ある。フィルム基板1を透明に近づけるには、フィルム
基板1の厚さを薄くすることで実現できる(例えば25
μm程度)。フィルム基板1上の実装領域3には、配線
2Aにより電極端子Pが形成され、ICやLSI等の半
導体素子4が実装されている。さらに、配線2A,2B
を保護するため、保護剤(ウレタン製のソルダーレジス
トやポリイミド等によるカバーフィルム)6が配設され
ている。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional structure diagram of a flexible wiring board according to this embodiment, and FIG. 2 is a diagram showing a structure for mounting a semiconductor element on the flexible wiring board according to this embodiment. Flexible wiring board F of the present embodiment
In C, metal wirings 2A and 2B made of copper or the like are formed in a predetermined shape on the front and back surfaces of the film substrate 1 formed of a resin film such as polyimide, and the through hole 5 is formed.
And the wiring 2 on the front and back by the through hole plating 5a
A and 2B are properly conducted. The film substrate 1 is semitransparent, and the wiring 2A on the front surface side can be confirmed from the back surface side. The film substrate 1 does not have to be completely colorless and transparent, and may be transparent so that desired items can be confirmed from the back side with the naked eye or a microscope. The desired matter is the position of the semiconductor element to be mounted, the position of the connection terminal of the semiconductor element to be mounted, or when the paste-like or film-like adhesive is an anisotropic conductive film (ACF), Conductive particles and the like in the adhesive, and in the case of a semiconductor element 4 with a bump electrode (bump), which will be described later,
That is the protruding electrode. In addition, in order to make it easy to confirm these desired items, it is possible to color the object. The film substrate 1 can be made close to transparent by reducing the thickness of the film substrate 1 (for example, 25
μm). In the mounting area 3 on the film substrate 1, the electrode terminal P is formed by the wiring 2A, and the semiconductor element 4 such as IC or LSI is mounted. Furthermore, the wiring 2A, 2B
A protective agent (a urethane solder resist, a cover film made of polyimide, etc.) 6 is provided to protect the.

【0014】そして、半導体素子4が実装される実装領
域3の裏面側には、半導体素子4より少し大きい面積の
長方形となるように、裏面側の配線2B及び保護剤6が
除去された窓9が形成されている。窓9は、フィルム基
板1の裏面の配線層や保護層等が配されない領域であ
り、長方形に形成されている。本実施の形態では、長方
形の窓9の一辺の長さは、当該窓9の裏面側に実装され
る半導体素子4の一辺の長さのおよそ1.5倍から2倍
程度であり、半導体素子4を実装したとき、窓9の辺と
半導体素子4の辺との間にすき間ができるように形成さ
れているが、窓9の裏面において、窓9の内側(窓9の
辺で囲まれた部分)に半導体素子4をはめ込むことがで
きれば同じ大きさでも良く、また、その形状は問題とな
らない。なお、突起電極(バンプ)付きの半導体素子4
の場合は、接続されるバンプの部分のみ上記窓9を形成
することも可能である。
Then, on the back surface side of the mounting region 3 where the semiconductor element 4 is mounted, the window 9 in which the wiring 2B and the protective agent 6 on the back surface side are removed so as to form a rectangle having a slightly larger area than the semiconductor element 4. Are formed. The window 9 is a region on the back surface of the film substrate 1 where the wiring layer, the protective layer, and the like are not arranged, and is formed in a rectangular shape. In the present embodiment, the length of one side of the rectangular window 9 is approximately 1.5 to 2 times the length of one side of the semiconductor element 4 mounted on the back surface side of the window 9. 4 is formed so that there is a gap between the side of the window 9 and the side of the semiconductor element 4 when mounted, but on the back surface of the window 9, the inside of the window 9 (enclosed by the side of the window 9 The same size may be used as long as the semiconductor element 4 can be fitted in the (part), and its shape does not matter. In addition, the semiconductor element 4 with the bump electrode (bump)
In this case, it is possible to form the window 9 only in the bump portion to be connected.

【0015】半導体素子4は、ペースト状若しくはフィ
ルム状の接着剤である異方性導電膜(ACF)7を用い
て、加熱圧着により実装される。ACF7は、熱可塑性
あるいは熱硬化性の樹脂フィルム内に導電粒子を分散さ
せたものである。詳しくは、絶縁性を有する接着剤中に
導電粒子が分散され厚み方向(接続方向)に導電性を有
し、面方向(横方向)に絶縁性を有するもので、導電粒
子と接着剤から構成される。その接続は基本的には加熱
圧着であり、導電粒子が電気接続の機能を担当し、接着
剤が圧接状態を保持する機能を担当する。導電粒子の表
面には絶縁皮膜が施されており、特定の方向に圧力がか
けられることにより、絶縁皮膜が一部破壊される。絶縁
皮膜の材質としては、樹脂が多く使用されている。な
お、導電粒子を潰すように加熱圧着させるものもある。
本発明に使用されるペースト状若しくはフィルム状の接
着剤は、ACF7の場合においては、導電粒子や接着剤
の構成等を限定することはなく、加熱圧着により使用さ
れるものであれば、汎用のACFで足り、ACF以外の
場合においては、導電性接着剤(導電性ペースト)やク
リーム半田等であってもよい。
The semiconductor element 4 is mounted by thermocompression bonding using an anisotropic conductive film (ACF) 7 which is a paste or film adhesive. ACF7 is a thermoplastic or thermosetting resin film in which conductive particles are dispersed. Specifically, conductive particles are dispersed in an insulating adhesive, have conductivity in the thickness direction (connection direction), and have insulating properties in the plane direction (lateral direction), and are composed of conductive particles and an adhesive. To be done. The connection is basically thermocompression bonding, the conductive particles are responsible for the function of electrical connection, and the adhesive is responsible for the function of maintaining the pressed state. An insulating coating is applied to the surface of the conductive particles, and when the pressure is applied in a specific direction, the insulating coating is partially destroyed. Resin is often used as the material of the insulating film. There is also one in which the conductive particles are heated and pressed so as to be crushed.
In the case of ACF7, the paste-like or film-like adhesive used in the present invention does not limit the constitution of the conductive particles or the adhesive, etc. ACF is sufficient, and in the case other than ACF, a conductive adhesive (conductive paste) or cream solder may be used.

【0016】半導体素子4の実装に際しては、図2に示
すように、フレキシブル配線基板FCを搬送ステージS
に固定する。搬送ステージSには、予め窓9と同形状で
窓9にはめ込むことができる大きさの固定板10が取り
付けられ、窓9に固定板10がはめ込まれるようにフレ
キシブル配線基板FCが固定される。次いで、実装領域
3にACF7を塗布し、半導体素子4を位置合わせして
上方(半導体素子4の実装面の裏面側)から加熱ツール
8により加熱及び加圧される。これにより、半導体素子
4の接続端子4aと電極端子Pとの間にACF7の導電
粒子が密着し、接続端子4aと電極端子Pが導通する。
具体的には、半導体素子4の実装時、固定板10と半導
体素子4との間には、ACF7の他は、配線2Aによる
電極端子Pとフィルム基板1のみが介されることとな
る。このため、加熱ツール8による圧力は、裏面側の配
線2Bや保護剤6に吸収されることなく、かつ、偏りな
く半導体素子4に圧力が加わる。これにより、偏ること
なく導電粒子に圧力がかかることとなり、導電粒子の絶
縁皮膜が均等に破壊され、あるいは、導電粒子の弾力性
(復元性)が有効に発揮されることとなる。したがっ
て、ACF7の導電粒子は、偏ることなく半導体素子4
の接続端子4aと電極端子Pに密着し、安定した導通が
得られる。
When mounting the semiconductor element 4, as shown in FIG. 2, the flexible wiring substrate FC is moved to the carrying stage S.
Fixed to. A fixed plate 10 having the same shape as the window 9 and having a size that can be fitted into the window 9 is attached to the transport stage S in advance, and the flexible wiring board FC is fixed so that the fixed plate 10 is fitted into the window 9. Next, ACF 7 is applied to the mounting region 3, the semiconductor element 4 is aligned, and heated and pressed by a heating tool 8 from above (on the back surface side of the mounting surface of the semiconductor element 4). As a result, the conductive particles of the ACF 7 are brought into close contact between the connection terminal 4a of the semiconductor element 4 and the electrode terminal P, and the connection terminal 4a and the electrode terminal P are electrically connected.
Specifically, when the semiconductor element 4 is mounted, only the electrode terminal P by the wiring 2A and the film substrate 1 are interposed between the fixing plate 10 and the semiconductor element 4 in addition to the ACF 7. Therefore, the pressure applied by the heating tool 8 is applied to the semiconductor element 4 without being absorbed by the wiring 2B on the back surface side and the protective agent 6 and without being biased. As a result, pressure is applied to the conductive particles without unevenness, the insulating coating of the conductive particles is evenly broken, or the elasticity (restoration) of the conductive particles is effectively exhibited. Therefore, the conductive particles of the ACF 7 are not biased in the semiconductor element 4 and
The connection terminal 4a and the electrode terminal P are in close contact with each other, and stable conduction is obtained.

【0017】加熱ツール8による圧力を有効に得るため
に、固定板10の厚さは、少なくとも窓9の深さより大
きい(厚い)ことが必要である。本実施の形態の固定板
10は、ステンレス製であるが、加熱ツール8による熱
及び圧力に十分耐えられ、また加熱ツール8による圧力
を吸収することのないよう十分な硬さが得られるもので
あれば、他の金属、セラミック、あるいは樹脂等による
ものでもよい。また、固定板10は、窓9の形状にあわ
せて作製するため、従来の搬送ステージSに取り付け及
び取り外すことを可能にすると良い(着脱可能にすると
良い)。なお、固定板10を搬送ステージと一体化させ
た搬送ステージSとして形成することは実施に応じて可
能である。
In order to effectively obtain the pressure from the heating tool 8, the thickness of the fixing plate 10 needs to be at least larger (thicker) than the depth of the window 9. Although the fixing plate 10 of the present embodiment is made of stainless steel, it is sufficiently hard to withstand the heat and pressure of the heating tool 8 and has sufficient hardness so as not to absorb the pressure of the heating tool 8. Any other metal, ceramic, resin or the like may be used. Further, since the fixing plate 10 is manufactured according to the shape of the window 9, it is preferable that the fixing plate 10 can be attached to and detached from the conventional transfer stage S (it is preferable that it can be attached and detached). It should be noted that it is possible to form the fixed plate 10 as the carrying stage S integrated with the carrying stage depending on the implementation.

【0018】以上、本実施の形態ではフレキシブル配線
基板FCに半導体素子4を実装する場合を例に説明した
が、本発明はコンデンサ等の他の電子素子や電子部品を
実装する場合にも適用可能である。
In the above, the case where the semiconductor element 4 is mounted on the flexible wiring board FC has been described as an example in the present embodiment, but the present invention is also applicable to the case where other electronic elements such as capacitors and electronic parts are mounted. Is.

【0019】[0019]

【発明の効果】本発明の多層構造のフレキシブル配線基
板は、半導体素子が実装される実装領域の裏面側に、半
導体素子の底面積と同じか又は大きい面積にて、配線層
等が配されない領域が形成されているため、半導体素子
をペースト状若しくはフィルム状の接着剤を介して加熱
圧着にて実装する際、裏面側の配線層等に圧力が吸収さ
れることなく十分な圧力を加えることができ、接続信頼
性を高めることが可能になる。また、フィルム基板を透
明に近づけることにより、半導体素子の実装後にフィル
ム基板の裏面側から半導体素子の位置、半導体素子の接
続端子の位置等を確認することができる。したがって、
通電による導通試験を行う前に、簡便な外観検査による
接続部の確認を行うことにより、実装状態の良いものを
ある程度選別することが可能となり、実装状態が良好で
ある確率が高いものだけを導通試験にかけることができ
る。
The multilayer flexible wiring board of the present invention is an area in which a wiring layer or the like is not arranged on the back surface side of the mounting area in which the semiconductor element is mounted, in the same area as or larger than the bottom area of the semiconductor element. Therefore, when mounting the semiconductor element by thermocompression bonding via a paste or film adhesive, it is possible to apply sufficient pressure to the wiring layer on the back side without absorbing the pressure. The connection reliability can be improved. Further, by bringing the film substrate close to transparent, the position of the semiconductor element, the position of the connection terminal of the semiconductor element, and the like can be confirmed from the back surface side of the film substrate after mounting the semiconductor element. Therefore,
By conducting a simple visual inspection to check the connection parts before conducting a conduction test by energizing, it is possible to sort out those with a good mounting state to some extent, and only those with a high probability of being in a good conduction state are conducted. You can take the test.

【0020】また、本発明の半導体素子の実装方法によ
れば、配線層及び保護層が配されない領域に固定板をは
め込んで加熱加圧を施すことにより、半導体素子に加え
られる圧力は、すき間を介することなく固定板で確実に
受け止めることができる。したがって、請求項1又は請
求項2記載のフレキシブル配線基板を実装する際に、従
来と同じ形状の搬送ステージに固定して加熱加圧を施す
場合は、裏面側の配線層等の厚さの分だけ搬送ステージ
との間にすき間が生じるのに比べて、本発明の半導体素
子の実装方法によれば、より有効に半導体素子に圧力を
加えることができ、信頼性の高いフレキシブル配線基板
が得られる。
Further, according to the semiconductor element mounting method of the present invention, the fixing plate is fitted into the region where the wiring layer and the protective layer are not provided and the pressure is applied to the semiconductor element, so that the pressure applied to the semiconductor element has a gap. It can be reliably received by the fixing plate without intervention. Therefore, when mounting the flexible wiring board according to claim 1 or 2, when the flexible wiring board is mounted on a carrying stage having the same shape as the conventional one and heat and pressure are applied, the thickness of the wiring layer on the back side is reduced. However, according to the method for mounting a semiconductor element of the present invention, a pressure can be applied to the semiconductor element more effectively, and a flexible wiring board with high reliability can be obtained, compared with the case where a gap is generated between the semiconductor element and the transfer stage. .

【0021】[0021]

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施の形態におけるフレキシブル配線
基板の断面構造図
FIG. 1 is a sectional structural view of a flexible wiring board according to an embodiment of the present invention.

【図2】本発明の実施の形態における半導体素子の実装
構造を示す図
FIG. 2 is a diagram showing a mounting structure of a semiconductor element according to an embodiment of the present invention.

【図3】従来のフレキシブル配線基板の構造を示す図FIG. 3 is a diagram showing a structure of a conventional flexible wiring board.

【図4】従来の形態における半導体素子の実装構造を示
す図
FIG. 4 is a view showing a mounting structure of a semiconductor element in a conventional form.

【符号の説明】[Explanation of symbols]

1 フィルム基板 2A,2B 配線 3 実装領域 4 半導体素子 4a 接続端子 5 スルーホール 5a スルーホールメッキ 6 保護剤 7 ACF 8 加熱ツール 9 窓(配線層及び保護層が配されない領域) 10 固定板 FC フレキシブル配線基板 P 電極端子 S 搬送ステージ 1 film substrate 2A, 2B wiring 3 mounting area 4 Semiconductor element 4a connection terminal 5 through holes 5a through hole plating 6 protectant 7 ACF 8 heating tools 9 windows (area where wiring layer and protective layer are not placed) 10 Fixed plate FC flexible wiring board P electrode terminal S transfer stage

───────────────────────────────────────────────────── フロントページの続き (72)発明者 高野 大樹郎 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5E319 AA03 AA06 AB05 AC03 AC20 BB01 BB16 CC12 GG20 5F044 KK03 LL11    ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Daijuro Takano             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F-term (reference) 5E319 AA03 AA06 AB05 AC03 AC20                       BB01 BB16 CC12 GG20                 5F044 KK03 LL11

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 フィルム基板の表裏両面に、電極端子を
有する配線層を少なくとも有し、フィルム基板上の実装
領域に半導体素子が、ペースト状若しくはフィルム状の
接着剤を用いて加熱圧着されることにより、半導体素子
の接続端子が配線層と電気的に導通している多層構造の
フレキシブル配線基板において、 上記フィルム基板上の実装領域において実装された半導
体素子の裏面側となる部分には、半導体素子の底面積と
同じか又は大きい面積にて配線層が配されない領域が形
成されていることを特徴とするフレキシブル配線基板。
1. A film substrate having at least wiring layers having electrode terminals on both front and back surfaces, and a semiconductor element is thermocompression-bonded to a mounting region on the film substrate by using a paste-like or film-like adhesive. Thus, in the flexible wiring board having a multi-layer structure in which the connection terminals of the semiconductor element are electrically connected to the wiring layer, the semiconductor element is provided on the back surface side of the semiconductor element mounted in the mounting area on the film substrate. A flexible wiring board having a region in which a wiring layer is not arranged is formed in an area equal to or larger than the bottom area of the flexible wiring board.
【請求項2】 前記フィルム基板は、実装される半導体
素子の位置、又は、実装される半導体素子の接続端子の
位置が、前記配線層が配されない領域から確認できるほ
どに透明であることを特徴とする請求項1記載のフレキ
シブル配線基板。
2. The film substrate is so transparent that a position of a semiconductor element to be mounted or a position of a connection terminal of the semiconductor element to be mounted can be confirmed from a region where the wiring layer is not arranged. The flexible wiring board according to claim 1.
【請求項3】 請求項1又は請求項2記載のフレキシブ
ル配線基板に前記半導体素子を加熱圧着により実装する
に際し、前記配線層が配されない領域に、前記領域と同
じ面積かつ同じか又は大きい厚さの固定板をはめ込み、
加熱加圧を施した後に、固定板を外すことを特徴とする
半導体素子の実装方法。
3. When mounting the semiconductor element on the flexible wiring board according to claim 1 or 2 by thermocompression bonding, the area where the wiring layer is not arranged has the same area and the same or large thickness as the area. Fit the fixing plate of
A method for mounting a semiconductor element, comprising: removing a fixing plate after applying heat and pressure.
JP2002004592A 2002-01-11 2002-01-11 Flexible wiring board and semiconductor element mounting method Expired - Fee Related JP3743716B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002004592A JP3743716B2 (en) 2002-01-11 2002-01-11 Flexible wiring board and semiconductor element mounting method

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Publication Number Publication Date
JP2003209141A true JP2003209141A (en) 2003-07-25
JP3743716B2 JP3743716B2 (en) 2006-02-08

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Country Status (1)

Country Link
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