JP2003204025A - Electronic circuit device - Google Patents
Electronic circuit deviceInfo
- Publication number
- JP2003204025A JP2003204025A JP2002002918A JP2002002918A JP2003204025A JP 2003204025 A JP2003204025 A JP 2003204025A JP 2002002918 A JP2002002918 A JP 2002002918A JP 2002002918 A JP2002002918 A JP 2002002918A JP 2003204025 A JP2003204025 A JP 2003204025A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- lead frame
- resin
- electronic circuit
- stress
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、電子回路装置の構
造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of electronic circuit devices.
【０００２】[0002]
【従来の技術】エポキシなどの樹脂で電子回路を封止す
る電子回路装置では樹脂硬化過程で生じる樹脂の硬化収
縮と樹脂と基板やリードフレーム等の部材との熱膨脹係
数差に起因する応力により樹脂モールド工程や温度サイ
クル試験で樹脂にクラックが生じる問題があった。2. Description of the Related Art In an electronic circuit device in which an electronic circuit is sealed with a resin such as epoxy resin, the resin shrinks due to the curing shrinkage of resin during the resin curing process and the stress caused by the difference in thermal expansion coefficient between the resin and a member such as a substrate or a lead frame. There was a problem that the resin cracked in the molding process and the temperature cycle test.
【０００３】例えば、特開平８−５５９３４号を例に取
り、この問題点を説明する。この樹脂封止半導体装置で
はリードフレームと半導体素子が電気絶縁物を介して接
着されている。リードフレームと樹脂は線膨張係数差が
あるために両者の接合面にせん断応力が生じ、この応力
が接合面端部に集中し接合面端部にはく離を引き起こ
す。この樹脂封止半導体装置ではリードフレームと樹脂
の接合面上に剛性の低い電気絶縁物があるため、応力集
中点は電気絶縁物端に位置しこの点からはく離が生じ
る。このはく離を防止するため、電気絶縁物端を半導体
素子の縁から100μmほど内側にすることにより電気絶縁
物端のせん断応力を低減している。また、同時に電気絶
縁物端でリードフレーム段差をつけ、リードフレームと
樹脂界面付近の垂直応力を低減し界面付近からの樹脂の
クラックを防止している。This problem will be described by taking, for example, Japanese Patent Laid-Open No. 8-55934. In this resin-sealed semiconductor device, the lead frame and the semiconductor element are bonded together via an electrical insulator. Since there is a difference in linear expansion coefficient between the lead frame and the resin, shear stress is generated at the joint surface between them, and this stress concentrates at the end portion of the joint surface and causes peeling at the end portion of the joint surface. In this resin-sealed semiconductor device, since there is an electric insulator with low rigidity on the joint surface between the lead frame and the resin, the stress concentration point is located at the end of the electric insulator and peeling occurs from this point. In order to prevent this peeling, the shear stress at the end of the electric insulator is reduced by making the end of the electric insulator 100 μm inward from the edge of the semiconductor element. At the same time, a step of the lead frame is formed at the end of the electrical insulator to reduce the vertical stress near the interface between the lead frame and the resin and prevent the resin from cracking near the interface.
【０００４】樹脂封止半導体装置の応力は装置のサイズ
に関係し、装置が大型化すると応力が増加する。上記の
樹脂封止半導体装置は小型の半導体素子を実装するため
小型であるため、発生応力が小さくこの構造ではく離が
防止できる場合がある。しかし、大型の基板を実装する
ため電子回路装置が大型になる場合には、この構造をそ
のまま適用しようとすると、樹脂のクラックの原因とな
る応力を十分低減できず、樹脂のクラックを防止できな
い場合が生じる。The stress of the resin-sealed semiconductor device is related to the size of the device, and the stress increases as the size of the device increases. Since the above resin-encapsulated semiconductor device is small in size because a small semiconductor element is mounted, the stress generated is small and this structure may prevent peeling. However, if the electronic circuit device becomes large due to the mounting of a large-sized board, the stress that causes the resin crack cannot be sufficiently reduced and the resin crack cannot be prevented if this structure is applied as it is. Occurs.
【０００５】[0005]
【発明が解決しようとする課題】本発明の目的は樹脂モ
ールド工程や温度サイクル試験で生じる樹脂のクラック
を防止した電子回路装置の樹脂封止構造を提供すること
である。SUMMARY OF THE INVENTION It is an object of the present invention to provide a resin sealing structure for an electronic circuit device, which prevents the resin from cracking in a resin molding process or a temperature cycle test.
【０００６】[0006]
【課題を解決するための手段】前記目的を達成するため
に、以下の特徴を有することができる。
（１）本発明の電子回路は、本発明の電子回路を搭載し
た基板と、前記基板に接続部を介して連絡されるリード
フレームと、前記基板と前記リードフレームを封止する
封止樹脂と、を有し、前記基板の端部の方が前記リード
フレームの端部より内側に位置するよう配置されている
領域を有することを特徴とする。
（２）前記（１）の電子回路装置において、前記電子回
路を外部機器と電気的に連絡するための外部端子を備
え、前記基板と前記外部端子とは細線を介して連絡され
ていることを特徴とする。In order to achieve the above object, the following features can be provided. (1) An electronic circuit of the present invention includes a substrate on which the electronic circuit of the present invention is mounted, a lead frame connected to the substrate via a connecting portion, and a sealing resin that seals the substrate and the lead frame. , And a region is arranged so that the end portion of the substrate is located inside the end portion of the lead frame. (2) In the electronic circuit device according to (1), an external terminal for electrically connecting the electronic circuit to an external device is provided, and the board and the external terminal are connected via a thin wire. Characterize.
【０００７】また、、基板上に電子回路を複数備え、主
要な電子回路の構成面と反対側に前記リードフレームが
配置されるよう構成されることができる。
（３）他の電子回路は、電子回路と、前記電子回路を一
主面に搭載した基板と、前記基板の他の主面側に対向し
て配置されるリードフレームと、前記基板及び前記リー
ドフレームの少なくとも一部を封止する封止樹脂と、基
板の端部を通り前記リードフレーム側に垂直な法線を引
いた場合に、この法線が前記リードフレームと交わるよ
う配置されていることを特徴とする。Further, a plurality of electronic circuits may be provided on the substrate, and the lead frame may be arranged on the side opposite to the main electronic circuit forming surface. (3) The other electronic circuit includes an electronic circuit, a substrate on which the electronic circuit is mounted on one main surface, a lead frame arranged to face the other main surface side of the substrate, the substrate and the lead. A sealing resin that seals at least a part of the frame, and a normal line that passes through the edge of the substrate and is perpendicular to the lead frame side, and is arranged so that this normal line intersects with the lead frame. Is characterized by.
【０００８】[0008]
【発明の実施の形態】以下、本発明の実施例を説明す
る。なお、本発明は、以下の実施形態に制限されるので
はなく、実効の範囲で他の形態を採用することもでき
る。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. The present invention is not limited to the following embodiments, and other forms can be adopted within an effective range.
【０００９】本発明の電子回路装置の実施例を図1から3
により説明する。図１は本発明の電子回路装置の一実施
例の正面図、図２は平面図、図3は側面図である。図1と
3では、リードフレーム3と上面2aに電子回路素子1を搭
載した基板2を、基板2の下面2bがリードフレームの上面
3aと対向し両面が平行になる位置に配置し接続部7で基
板とリードフレームを固定し、封止樹脂６でモールド一
体成形した構造を取る。図４は図１の正面図を拡大した
図を示す。図4は基板２の下面２ｂの上の任意の点Cを通
り基板下面２ｂに垂直な法線11を引いた時に、この法線
11が必ずリードフレーム3の上面3aと交わる構造となっ
ていることを示す。この条件は、基板3の端部9がリード
フレーム３の端部8より内側にあることを意味する。な
お、基板の端部のうち一部が上記関係にあることができ
る。また、基板の主辺の各端部が上記関係にあることが
好ましい。またこの条件は、図2で基板2がリードフレー
ム3より小さいことを意味する。図2では基板2と外部接
続端子４とがアルミ細線５により電気的に接続され、外
部からの電気信号は外部接続端子４、アルミ細線５、基
板2上の配線を経由して電子回路素子１に伝わる。An embodiment of the electronic circuit device of the present invention is shown in FIGS.
Will be described. 1 is a front view of an embodiment of the electronic circuit device of the present invention, FIG. 2 is a plan view, and FIG. 3 is a side view. Figure 1 and
In 3, the substrate 2 having the electronic circuit element 1 mounted on the lead frame 3 and the upper surface 2a, the lower surface 2b of the substrate 2 is the upper surface of the lead frame.
The substrate and the lead frame are fixed at a position where both surfaces are parallel to each other and facing the 3a, and the connection portion 7 fixes the substrate and the lead frame, and the resin is integrally molded with the sealing resin 6. FIG. 4 shows an enlarged view of the front view of FIG. FIG. 4 shows that when a normal line 11 passing through an arbitrary point C on the lower surface 2b of the substrate 2 and perpendicular to the lower surface 2b of the substrate is drawn,
11 indicates that the structure 11 always intersects with the upper surface 3a of the lead frame 3. This condition means that the end portion 9 of the substrate 3 is inside the end portion 8 of the lead frame 3. In addition, a part of the end portion of the substrate may have the above relationship. Further, it is preferable that the respective ends of the main side of the substrate have the above relationship. This condition also means that the substrate 2 is smaller than the lead frame 3 in FIG. In FIG. 2, the substrate 2 and the external connection terminal 4 are electrically connected by the aluminum thin wire 5, and an electric signal from the outside passes through the external connection terminal 4, the aluminum thin wire 5, and the wiring on the substrate 2 to make the electronic circuit element 1 Be transmitted to.
【００１０】本発明は図４に示すように基板2の端部9が
リードフレーム３の端部8より内側にある構造を取る
が、本発明の効果を明瞭に説明するために、図６に基板
2の端部9がリードフレーム３の端部8より外側にある比
較品の構造の問題点を説明する。図６のOX軸上の点A、B
はそれぞれリードフレーム３の端部8と基板の端部9のX
座標を示す。図６に示す構造構造に温度サイクル試験を
行うと樹脂にクラック１０が生じる。また、このクラッ
クは樹脂モールド工程で生じる場合もある。このクラッ
クは図９に示すようにリードフレーム端部8を起点と
し、ほぼリードフレームの上面3aに垂直な方向に生じ
る。このクラックが生じ樹脂表面に達すると、長期使用
中にクラックから進入した水分が電子回路素子1に達
し、腐蝕が生じ電子回路素子1が故障するため、クラッ
クを防止することが必要である。The present invention adopts a structure in which the end portion 9 of the substrate 2 is inside the end portion 8 of the lead frame 3 as shown in FIG. 4, but in order to clearly explain the effect of the present invention, FIG. substrate
The problem of the structure of the comparative product in which the second end 9 is outside the end 8 of the lead frame 3 will be described. Points A and B on the OX axis in Fig. 6
Is X of the end 8 of the lead frame 3 and the end 9 of the substrate, respectively.
Indicates coordinates. When the structure shown in FIG. 6 is subjected to a temperature cycle test, cracks 10 occur in the resin. Further, this crack may occur in the resin molding process. As shown in FIG. 9, the crack originates from the end portion 8 of the lead frame and is generated in a direction substantially perpendicular to the upper surface 3a of the lead frame. When this crack occurs and reaches the surface of the resin, moisture that has entered from the crack during long-term use reaches the electronic circuit element 1 and causes corrosion, which causes failure of the electronic circuit element 1. Therefore, it is necessary to prevent the crack.
【００１１】この樹脂のクラックの発生原因を以下に説
明する。図８は基板にセラミックス、樹脂にフィラー入
りエポキシなどの熱硬化性樹脂、リードフレームに銅な
どを用いた場合に温度サイクル試験で各部材の線膨脹係
数により生じる自由熱ひずみと温度の関係を示した模式
図である。通常基板には線膨脹係数の小さいシリコンチ
ップを接続する場合にシリコンチップに熱応力が生じな
いように低線膨脹係数のセラミックを用いる。また、リ
ードフレームは素子の発熱を熱伝導で冷却するため銅な
どの高熱伝導の材料を用いる。銅などの高熱伝導性の材
料は通常線膨脹係数が基板より大きい。樹脂のクラック
の原因となる引っ張り応力を低減するためには、線膨脹
係数が低線膨脹係数の基板と一致した樹脂を選択するこ
とが理想的である。しかし、現状ではそのように低線膨
脹係数の樹脂はフィラーの含有率が高いためモールド時
の流れ性が劣りボイドができ易い、強度が劣るなどの問
題のため、線膨脹係数がリードフレームより小さいが基
板より大きい樹脂が用いられる場合が多い。The cause of the occurrence of cracks in this resin will be described below. Fig. 8 shows the relationship between the free thermal strain and temperature caused by the coefficient of linear expansion of each member in the temperature cycle test when ceramics is used for the substrate, thermosetting resin such as epoxy with filler is used for the resin, and copper is used for the lead frame. It is a schematic diagram. Usually, a ceramic having a low coefficient of linear expansion is used for the substrate so that thermal stress is not generated in the silicon chip when the silicon chip having a small coefficient of linear expansion is connected. Further, the lead frame uses a material having high thermal conductivity such as copper in order to cool the heat generated by the element by thermal conduction. A material having high thermal conductivity such as copper usually has a coefficient of linear expansion larger than that of the substrate. In order to reduce the tensile stress that causes the resin to crack, it is ideal to select a resin whose linear expansion coefficient matches that of the substrate having a low linear expansion coefficient. However, at present, such a resin having a low coefficient of linear expansion has a high coefficient of linear expansion that is smaller than that of the lead frame due to problems such as poor flowability during molding due to high filler content, easy formation of voids, and poor strength. In many cases, a resin larger than the substrate is used.
【００１２】図8でTgは樹脂のガラス転移温度、THは温
度サイクル試験の最高温度、TLは最低温度である。通
常、Tgは100〜130℃、THは150℃、TLは−55℃である。
温度サイクル試験の高温では樹脂の軟化に伴うクリープ
が生じるため、樹脂モールド時に生じた残留応力が開放
されるため、THで応力がほぼ0になる。このため、図８
ではTHで熱ひずみを0とした。また、図を簡単にするた
め、圧縮ひずみを正として示した。温度サイクル試験で
の樹脂の線膨脹係数はTgを境に線膨脹係数が変化し、Tg
以上ではリードフレームに近い大きな値となり、Tg以下
では基板に近い小さな値となる。説明を明瞭にするた
め、以下の説明では樹脂の線膨脹係数がTg以上ではリー
ドフレームに一致し、Tg以下では基板に一致するとして
議論を進める。樹脂の線膨脹係数は樹脂やフィラーの種
類や含有率により変化するため、樹脂の線膨脹係数がリ
ードフレームや基板の線膨脹係数に全く一致するとは言
えない場合も有るが、それらの線膨脹係数差が大きくな
ければ実用的には以下の議論が成り立つ。In FIG. 8, Tg is the glass transition temperature of the resin, T H is the maximum temperature of the temperature cycle test, and T L is the minimum temperature. Usually, Tg is 100 to 130 ° C, T H is 150 ° C, and T L is -55 ° C.
At the high temperature of the temperature cycle test, creep occurs due to softening of the resin, and the residual stress generated during resin molding is released, so the stress becomes almost zero at T H. Therefore, in FIG.
Then, the thermal strain was set to 0 at T H. Also, the compressive strain is shown as positive in order to simplify the figure. The linear expansion coefficient of the resin in the temperature cycle test changes with the Tg as a boundary.
Above, it becomes a large value close to the lead frame, and below Tg, it becomes a small value close to the substrate. In order to make the explanation clear, in the following description, it is assumed that the linear expansion coefficient of the resin is equal to or higher than Tg and the lead frame, and is equal to or lower than Tg and the substrate. The linear expansion coefficient of the resin varies depending on the type and content of the resin and filler, so the linear expansion coefficient of the resin may not be exactly the same as the linear expansion coefficient of the lead frame or substrate. If the difference is not large, the following arguments are practically valid.
【００１３】温度サイクル試験で温度がTHの時は熱ひず
みが0であり、応力も0である。図8より温度サイクル試
験で温度がTHからTgへ変化する時には樹脂の線膨張係数
はリードフレームの線膨張係数と一致し、基板より大き
な値を持つ。この温度変化では基板と樹脂の線膨脹係数
差により基板の上下の樹脂部分にOX軸方向の引っ張り応
力が生じる。この応力分布がリードフレームの下面付近
の軸OXに沿う樹脂領域に生じる応力分布の概略値を図７
に一点鎖線で示す。図7では材料力学の習慣に従い、縦
軸は引っ張り応力は正、圧縮応力は負で表されている。
横軸は点Oからの距離である。この応力は基板と樹脂の
線膨脹係数差により生じたものであるため基板の端部の
点Bより点Oに近い樹脂領域では大きく、点Bより遠い基
板の外の樹脂領域では急激に低下する分布を取る。次に
上記の温度変化に引き続く温度サイクル試験のTgからTL
への温度変化では、図8より樹脂の線膨張係数は基板の
線膨張係数と一致し、リードフレームより小さな値とな
る。この温度変化ではリードフレームと樹脂の線膨脹係
数差が応力の原因であるため、リードフレームの上下で
はX軸方向の圧縮応力が生じ、リードフレームの端部(点
A)付近の樹脂領域では急激に増加する引っ張り応力が生
じる。その結果リードフレームの下面付近の軸OXに沿う
この応力の分布は図７の点線で示されるものになる。温
度サイクル試験のTHからTLへの全温度変化ではTHからTg
への温度変化による応力とTgからTLへの温度変化による
応力の合計の応力が生じる。この応力分布は図７の実線
で示すようにリードフレーム端部の点Aのすぐ外側で過
大な引っ張り応力を持つ分布となる。この過大な引っ張
り応力が図９に示すリードフレーム端部を起点とした樹
脂のクラックを引き起こす。In the temperature cycle test, when the temperature is T H , the thermal strain is 0 and the stress is also 0. From Fig. 8, when the temperature changes from T H to T g in the temperature cycle test, the linear expansion coefficient of the resin matches the linear expansion coefficient of the lead frame and has a larger value than the substrate. This temperature change causes tensile stress in the OX axis direction in the resin portions above and below the substrate due to the difference in linear expansion coefficient between the substrate and the resin. Fig. 7 shows the approximate value of the stress distribution generated in the resin region along the axis OX near the lower surface of the lead frame.
Is indicated by a chain line. In FIG. 7, according to the habit of material mechanics, the vertical axis represents the tensile stress as positive and the compressive stress as negative.
The horizontal axis is the distance from the point O. This stress is caused by the difference in the coefficient of linear expansion between the substrate and the resin, so it is large in the resin region near the point O from the point B at the edge of the substrate, and drops sharply in the resin region outside the substrate far from the point B. Take the distribution. Next, Tg to T L of the temperature cycle test following the above temperature change
8 shows that the linear expansion coefficient of the resin matches the linear expansion coefficient of the substrate, which is smaller than that of the lead frame. In this temperature change, the difference in linear expansion coefficient between the lead frame and the resin causes the stress.Therefore, compressive stress in the X-axis direction is generated above and below the lead frame, and the end of the lead frame (point
In the resin region near A), a tensile stress that increases sharply occurs. As a result, the distribution of this stress along the axis OX near the lower surface of the lead frame is shown by the dotted line in FIG. Tg from T H is the total temperature change from T H of the temperature cycle test to T L
The total stress of the stress due to the temperature change to T and the stress due to the temperature change from Tg to T L occurs. This stress distribution is a distribution having an excessive tensile stress just outside the point A at the end of the lead frame as shown by the solid line in FIG. This excessive tensile stress causes resin cracks starting from the lead frame end shown in FIG.
【００１４】このリードフレーム端部での過大な引っ張
り応力は基板とリードフレームの端部位置を図４に示す
ように基板2の端部9がリードフレーム３の端部8より内
側にある構造を取ることにより低減できる。この応力低
減が生じるメカニズムを以下に説明する。図５に図４の
構造のリードフレームの下面付近の軸OXに沿う応力の分
布を示す。図５に一点鎖線で示した温度サイクル試験の
温度がTHからTgへ変化する時の応力分布、及び図５の応
力分布図に破線で示した温度サイクル試験の温度がTgか
らTLへ変化する時の応力分布は点A、BのX方向の相対位
置については図7に示した分布と同じである。しかし図5
と7では点AとBの位置が逆になっている。これは、図４
は基板2の端部9がリードフレーム３の端部8より内側に
ある構造であり、図6は基板2の端部9がリードフレーム
３の端部8より外側にあることを反映したものである。
温度サイクル試験のTHからTLへの全温度変化ではTHから
Tgへの温度変化による応力とTgからTLへの温度変化によ
る応力の合計の応力が生じる。図5では温度サイクル試
験のTgからTLへの温度変化による応力は急激な引っ張り
応力が生じるリードフレームの端部位置AがTHからTgへ
の温度変化でX軸方向の引っ張り応力が生じる基板端部
の点Bより点Oに近い樹脂領域から外れている。このため
温度サイクル試験のTHからTLへの全温度変化で図7でリ
ードフレームの端部位置の点Aのすぐ外側で生じた過大
な引っ張り応力が低減する。このためこの過大な応力に
より発生した図9に示したリードフレーム端部を起点と
した樹脂のクラックは本発明の図4の電子回路装置では
生じ難い。The excessive tensile stress at the end portions of the lead frame causes the end portions of the substrate and the lead frame to be located inside the end portions 8 of the lead frame 3 as shown in FIG. It can be reduced by taking it. The mechanism by which this stress reduction occurs will be described below. FIG. 5 shows a stress distribution along the axis OX near the lower surface of the lead frame having the structure of FIG. The stress distribution when the temperature of the temperature cycle test shown by the dashed line in Fig. 5 changes from T H to Tg, and the temperature of the temperature cycle test shown by the broken line in the stress distribution diagram of Fig. 5 changes from Tg to T L The stress distribution at the time is the same as the distribution shown in FIG. 7 with respect to the relative position of points A and B in the X direction. But Figure 5
In and 7, the positions of points A and B are reversed. This is shown in Figure 4.
Is a structure in which the end portion 9 of the substrate 2 is inside the end portion 8 of the lead frame 3, and FIG. 6 reflects that the end portion 9 of the substrate 2 is outside the end portion 8 of the lead frame 3. is there.
The total temperature change from T H to T L in the temperature cycle test is from T H to
The total stress of the stress due to the temperature change to Tg and the stress due to the temperature change from Tg to TL occurs. In Fig. 5, the stress due to the temperature change from Tg to T L in the temperature cycle test causes a sudden tensile stress.At the end position A of the lead frame, the temperature change from T H to Tg causes a tensile stress in the X-axis direction on the substrate. It is out of the resin region closer to the point O than the point B at the end. Therefore, the excessive tensile stress generated just outside point A at the end position of the lead frame in Fig. 7 due to the total temperature change from T H to T L in the temperature cycle test is reduced. Therefore, the resin crack originating from the end portion of the lead frame shown in FIG. 9 caused by this excessive stress is unlikely to occur in the electronic circuit device of FIG. 4 of the present invention.
【００１５】なお、以上では説明を簡明にするため温度
サイクル試験の場合の発生応力に限定して述べた。しか
し、樹脂モールド工程で生じる樹脂の硬化収縮を含めた
ひずみを熱ひずみとして扱い、図8のTHを樹脂の硬化温
度、TLを常温とすることにより図8を樹脂モールド工程
での基板、樹脂、リードフレームの各部材の線膨脹係数
により生じる自由熱ひずみと温度の関係を示した模式図
として使用すれば、以上の温度サイクル試験の場合の応
力発生メカニズムを用いて樹脂モールド工程の応力発生
メカニズムを説明することができる。よって、本発明は
樹脂モールド工程で生じるクラック防止にも効果を持つ
ことが分かる。In the above description, the stress generated in the temperature cycle test is limited to simplify the explanation. However, strain including curing shrinkage of the resin that occurs in the resin molding process is treated as thermal strain, and T H in FIG. 8 is the curing temperature of the resin and T L is room temperature, so that FIG. If used as a schematic diagram showing the relationship between free thermal strain and temperature caused by the linear expansion coefficient of each member of resin and lead frame, the stress generation mechanism in the resin molding process will be used by the stress generation mechanism in the above temperature cycle test. Explain the mechanism. Therefore, it can be seen that the present invention is effective in preventing cracks generated in the resin molding process.
【００１６】[0016]
【発明の効果】本発明によれば樹脂モールド工程や温度
サイクル試験で生じる樹脂のクラックを防止した樹脂封
止構造を持つ電子回路装置を提供することができる。According to the present invention, it is possible to provide an electronic circuit device having a resin encapsulation structure in which cracking of the resin caused in the resin molding process or the temperature cycle test is prevented.
【図１】本発明の電子回路装置の一実施例の正面図であ
る。FIG. 1 is a front view of an embodiment of an electronic circuit device of the present invention.
【図２】本発明の電子回路装置の一実施例の平面図であ
る。FIG. 2 is a plan view of an embodiment of the electronic circuit device of the present invention.
【図３】本発明の電子回路装置の一実施例の側面図であ
る。FIG. 3 is a side view of an embodiment of the electronic circuit device of the present invention.
【図４】図１に示す本発明の電子回路装置の正面断面図
である。FIG. 4 is a front sectional view of the electronic circuit device of the present invention shown in FIG.
【図５】図４に示す本発明の電子回路装置の断面図のOX
軸に沿う応力分布図である。5 is an OX of a cross-sectional view of the electronic circuit device of the present invention shown in FIG.
It is a stress distribution diagram along an axis.
【図６】比較品の電子回路装置の正面断面図である。FIG. 6 is a front cross-sectional view of a comparative electronic circuit device.
【図７】図６に示す比較品の電子回路装置の断面図のOX
軸に沿う応力分布図である。7 is an OX of a cross-sectional view of the electronic circuit device of the comparative product shown in FIG.
It is a stress distribution diagram along an axis.
【図８】電子回路装置を構成する基板、樹脂、リードフ
レームの温度サイクル試験での温度と熱ひずみの関係を
示す図である。FIG. 8 is a diagram showing a relationship between temperature and thermal strain in a temperature cycle test of a substrate, a resin, and a lead frame which constitute an electronic circuit device.
【図９】比較品の電子回路装置に生じたクラックを示す
図である。FIG. 9 is a diagram showing cracks generated in a comparative electronic circuit device.
１ 電子回路素子
２ 基板
2a 基板上面
2b 基板下面
３ リードフレーム
3a リードフレーム上面
４ 外部接続端子
５ アルミ細線
６ 樹脂
７ 接続部
８ リードフレーム端部
９ 基板端部
１０ クラック
１１ 基板の下面の上の任意の点Cを通る基板下面に垂
直な法線1 electronic circuit element 2 substrate 2a substrate upper surface 2b substrate lower surface 3 lead frame 3a lead frame upper surface 4 external connection terminal 5 aluminum thin wire 6 resin 7 connection portion 8 lead frame end portion 9 substrate end portion 10 crack 11 arbitrary on the lower surface of the substrate Normal line passing through point C and perpendicular to the bottom surface of the substrate
フロントページの続き (72)発明者 保川 彰夫 茨城県ひたちなか市大字高場2520番地 株 式会社日立製作所自動車機器グループ内 Ｆターム(参考） 5F067 AA07 AB02 BA01 BE00 Continued front page (72) Inventor Akio Hogawa Hitachinaka City, Ibaraki Prefecture 2520 Takaba Ceremony Company Hitachi Ltd. Automotive equipment group F-term (reference) 5F067 AA07 AB02 BA01 BE00
Claims (3)
続部を介して連絡されるリードフレームと、前記基板と
前記リードフレームを封止する封止樹脂と、を有し、前
記基板の端部の方が前記リードフレームの端部より内側
に位置するよう配置されている領域を有することを特徴
とする電子回路装置。1. A substrate having an electronic circuit mounted thereon, a lead frame connected to the substrate via a connecting portion, and a sealing resin for sealing the substrate and the lead frame. An electronic circuit device having an area arranged such that an end portion is located inside an end portion of the lead frame.
子回路を外部機器と電気的に連絡するための外部端子を
備え、前記基板と前記外部端子とは細線を介して連絡さ
れていることを特徴とする電子回路装置。2. The electronic circuit device according to claim 1, further comprising an external terminal for electrically connecting the electronic circuit to an external device, wherein the substrate and the external terminal are connected via a thin wire. An electronic circuit device characterized by:
した基板と、前記基板の他の主面側に対向して配置され
るリードフレームと、前記基板及び前記リードフレーム
の少なくとも一部を封止する封止樹脂と、基板の端部を
通り前記リードフレーム側に垂直な法線を引いた場合
に、この法線が前記リードフレームと交わるよう配置さ
れていることを特徴とする電子回路装置。3. An electronic circuit, a substrate on which the electronic circuit is mounted on one principal surface, a lead frame arranged to face the other principal surface side of the substrate, and at least one of the substrate and the lead frame. And a sealing resin for sealing the portion and a normal line passing through an end portion of the substrate and perpendicular to the lead frame side, the normal line is arranged so as to intersect with the lead frame. Electronic circuit device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002002918A JP2003204025A (en) | 2002-01-10 | 2002-01-10 | Electronic circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002002918A JP2003204025A (en) | 2002-01-10 | 2002-01-10 | Electronic circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003204025A true JP2003204025A (en) | 2003-07-18 |
Family
ID=27642647
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002002918A Withdrawn JP2003204025A (en) | 2002-01-10 | 2002-01-10 | Electronic circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003204025A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109119384A (en) * | 2017-06-23 | 2019-01-01 | 英飞凌科技股份有限公司 | Integrated circuit package body with the communication of more bare dies |
-
2002
- 2002-01-10 JP JP2002002918A patent/JP2003204025A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109119384A (en) * | 2017-06-23 | 2019-01-01 | 英飞凌科技股份有限公司 | Integrated circuit package body with the communication of more bare dies |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102231769B1 (en) | Semiconductor package having exposed heat sink for high thermal conductivity and manufacturing method thereof | |
| US10813229B2 (en) | Electronic module having an electrically insulating structure with material having a low modulus of elasticity | |
| JPH1056093A (en) | Semiconductor device and electronic device where the semiconductor device is incorporated | |
| TW201630149A (en) | Electronic power module and method of making the same | |
| US9006881B2 (en) | Semiconductor device | |
| JP3443313B2 (en) | Semiconductor device and manufacturing method thereof | |
| US10566295B2 (en) | Semiconductor device | |
| JP2003204025A (en) | Electronic circuit device | |
| US7078628B2 (en) | Substrate for circuit wiring | |
| JP2007027261A (en) | Power module | |
| JP2000323628A (en) | Semiconductor device, manufacture thereof and electronic device using the same | |
| US11616024B2 (en) | Storage device including semiconductor chips sealed with resin on metal plate | |
| KR100260045B1 (en) | Heat sink construction for power semiconductor module | |
| JP2022064191A (en) | Semiconductor module | |
| JPH06120626A (en) | Base material for substrate for mounting electronic component | |
| US11764141B2 (en) | Semiconductor device | |
| KR102464477B1 (en) | Dual side cooling power module and manufacturing method of the same | |
| JPH0462948A (en) | Semiconductor device | |
| JPH09331002A (en) | Semiconductor package | |
| JPH10107086A (en) | Electronic circuit device incorporating semiconductor element | |
| JP2004296906A (en) | Resin-sealed semiconductor device | |
| TWM505697U (en) | Semiconductor package structure | |
| JPS63296250A (en) | Semiconductor device | |
| JPH07249714A (en) | Composite semiconductor device | |
| JPH0493052A (en) | Semiconductor integrated circuit device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040312 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20041201 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20041214 |
|
| A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20050128 |