JP2003198817A - Image processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image processing apparatus that applies proper transfer control to each of transfer operations in the case that two images or more are simultaneously transferred between a buffer area of a primary storage section (image memory 42) and a secondary storage section (HDD 48) and that a single image is transferred. <P>SOLUTION: After data compression conversion is applied to a received image by DMA control of a memory control section 43, the image processing apparatus performs a series of processes to transfer converted data to the HDD 48 through the buffer area of the image memory 42. In this case, depending on whether or not a request of a plurality of data transfer (simultaneous transfer) is made, the image processing apparatus selects either of division (number of a plurality of times) transfer and batch (one time) transfer. In the case of transferring one image through division, the capacity equivalent to the division transfer amount to the HDD is reserved for the buffer area, and in the case of batch transfer, the capacity equivalent to the batch transfer amount is reserved for the buffer area so as to optimize (transfer in the shortest time and effective utilization of the storage area) each transfer operation. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image input / output device such as a digital copying machine, a facsimile, a printer, an image scanner, a network file server, or an image processing apparatus such as a digital multi-function peripheral having a plurality of functions. Regarding a device, such as an image storage unit (semiconductor memory) of a relatively small capacity that is mainly equipped for work, which handles input and output digital images, and a hard disk drive (HDD) or the like that enables mutual data transfer with this storage unit. The present invention relates to a control technique of data transfer performed with a large-capacity storage device (for storing image data).

[0002]

2. Description of the Related Art In recent years, with the progress of digitalization of copying machines, processing and editing using image memories have become popular. Among them, by storing image data for multiple read originals in an image memory (usually a semiconductor memory is used), a designated number of copies can be collectively output and a function called electronic sorting that eliminates sorting work There is. In order to store the image data of all originals, in order to store the original image data in the semiconductor memory, a memory equivalent to the data amount for the number of read originals is required, and the memory cost becomes huge. 1. ~ 3. This method is generally used. 1. A semiconductor memory + storage (storage) memory is used, and a secondary storage device such as a hard disk, which is cheaper than a semiconductor memory, is used as the storage memory. 2. With the configuration of semiconductor memory + storage memory, semiconductor memory is used as storage memory, image data is compressed using compression processing, and the total amount of memory is reduced by reducing the amount of data per sheet. 3. In the digital multi-function peripheral, a plurality of image input / output units (image scanner, printer controller, file server, FAX controller, etc.) share the same image memory.

In order to execute input / output of image data to / from various image memories (storage means) as described above, D
Memory controller using MA (Direct Memory Access) data transfer method (hereinafter "DMA controller")
Alternatively, “DMAC” is often used.
The DMA controller transfers data to a specific area of the image memory based on memory area management information called a descriptor. It is also possible to divide the memory area in which one image is stored into multiple descriptors for data transfer. For example, by using the image memory in the form of a ring buffer, the memory capacity is smaller than the image data capacity. It is also possible to input and output image data with. In the memory control using the DMA controller, the progress (start, end) of the data transfer specified by each descriptor and the execution timing control of the data transfer (such as interrupting or restarting the data transfer in the middle of the image memory area) ) Is also possible, the degree of freedom in timing control of data transfer of a semiconductor memory as a primary storage unit connected to a DMA controller and a large-capacity secondary storage device is high, and the application range is wide. When a secondary storage device such as a hard disk, which is cheaper than a semiconductor memory, is used as the storage (storing) memory as described above, in this type of storage device, a plurality of data transfer (data writing) is usually performed to a single device. , Read operation) cannot be performed.
It is common to divide the data transfer unit to the secondary storage device using the descriptor of the DMA controller and execute this in a time-sharing manner so that a plurality of data transfer operations are executed in parallel. Target.

However, when such time division processing is used, the time required for data transfer is not shortened, so that the time required for inputting / outputting image data is minimized as in image forming apparatuses such as copying machines and printers. If the setting affects the productivity of the apparatus, performing the time-sharing process may cause a decrease in productivity. For this reason, image data is compressed to reduce the data transfer amount, or a secondary storage device with a high data transfer rate is installed to shorten the time required for data transfer to the secondary storage device. It had a composition. Further, in the past, for the purpose of simplifying the memory control, the secondary storage device is set substantially synchronously with the image data input / output operation performed by using the image input / output means without actively performing the time division transfer. A means for occupying as a resource and transferring data was used. By the way, in the conventional secondary storage device, the transfer speed of the image data of the semiconductor memory to the secondary storage device is slower than the transfer speed of the image data from the image input / output means to the semiconductor memory. Even if the data processing capacity of the secondary storage device is reduced by compressing the data, there is no difference in the data processing speed between the image input / output unit and the semiconductor memory. The degree of improvement in productivity of the image forming apparatus by controlling the transfer timing of the data transfer processing to the secondary storage device independently and optimally is not so high.

[0005]

However, with the recent technological progress, the data transfer rate of the secondary storage device such as a hard disk and the data compression rate and the processing rate of the data compression means are remarkably improved. In the situation where the image input / output means connected to the forming device is extremely diverse,
With conventional memory control, it is difficult to maximize productivity by making full use of the capabilities of the storage device and data compression means. The present invention has been made in view of such a state of the art, and an object of the present invention is to provide a primary storage unit (for example, a semiconductor memory) mainly used for work, which handles input / output images, and this storage unit to each other. Secondary storage device (eg HD) for storing compressed data (large capacity) that enables data transfer
The memory control method using DMA is applied to the storage unit equipped with D), the acquisition and release of resources to obtain the maximum utilization efficiency is managed according to the processing capacity of the storage device, and the data transfer operation is started. An object of the present invention is to provide an image processing apparatus that includes a transfer control unit capable of improving the utilization rate of a storage area and shortening the transfer time by controlling the timing and ensuring high productivity.

Further, for the above purpose, in the case where the transfer operation of two or more images is simultaneously executed to the storage area of the secondary storage device, or when the transfer operation of the single image is executed, in each case, An object of the present invention is to provide the image processing apparatus including means capable of adaptive transfer control. That is, according to the image transfer operation to the secondary storage device that transfers and stores the input image / intermediate (converted input) image data through the buffer area of the primary conversion unit, transfer of individual images (input / output) The time to occupy the secondary storage device for operation is optimized, and the storage area necessary for the primary conversion unit and the secondary storage device can be secured by setting the occupied time, and at that time, the buffer of the primary conversion unit is secured. By optimally securing and controlling the capacity of the area, it is possible to prevent the redundant storage area from being occupied and to efficiently process a plurality of image signals.

[0007]

According to a first aspect of the present invention, a primary storage means having a function as a buffer for input / output images / intermediate images and an image transferred through a buffer area of the primary storage means are stored. An image processing apparatus having a secondary storage means, a transfer control means for controlling access to the primary storage means and the secondary storage means, and controlling mutual image transfer between the buffer area of the primary storage means and the storage area of the secondary storage means. Therefore, the transfer control means can execute the transfer operation for the unit image once or in a plurality of times when transferring data from the buffer area of the primary storage means to the storage area of the secondary storage means. If multiple images are simultaneously transferred to the storage area of the secondary storage means, the unit image can be transferred by multiple divided transfer operations, and when transferring a single image, the unit image can be transferred by one transfer operation. An image processing apparatus which is characterized in that so as to perform the transfer.

According to a second aspect of the present invention, in the image processing apparatus according to the first aspect, the transfer control means stores the unit image through a buffer area of the primary storage means by a single transfer operation and stores the secondary storage means. When the data is transferred to the area, a capacity corresponding to the amount of data to be transferred to the secondary storage means is secured as a buffer area of the primary storage means.

According to a third aspect of the present invention, in the image processing apparatus according to the first or second aspect, the transfer control means performs a secondary operation through a buffer area of the primary storage means by a transfer operation in which a unit image is divided into a plurality of times. When the data is transferred to the storage area of the storage means, a capacity corresponding to the amount of individual data to be divided and transferred to the secondary storage means is secured as a buffer area for the data-converted image of the primary storage means. To do.

According to a fourth aspect of the invention, in the image processing apparatus according to any one of the first to third aspects, there is provided data conversion means for performing data conversion on the input / output image, and the transfer control means is the data conversion means. The converted image data is converted into a target image for the transfer operation, and the converted image data is transferred from the buffer area of the primary storage means to the storage area of the secondary storage means.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An image processing apparatus of the present invention will be described based on the following embodiments shown with reference to the accompanying drawings. FIG. 1 is a schematic configuration diagram showing an example in which the image processing apparatus of the present invention is applied to a digital copying machine. The reading process of the reading unit 20 and the image forming process of the image forming unit 30 will be described with reference to FIG. In the reading process, an original is scan-exposed by an exposure lamp 22 that is movable along an original table 21, and the reflected light is scanned by a CCD (image sensor) 23.
Photoelectric conversion is performed by using an electric signal according to the intensity of light. IPU (Image Processing Unit) 24
The electrical signal is subjected to processing such as shading correction and A / D conversion to be an 8-bit digital signal, and further image processing such as scaling processing, MTF correction, spatial filter processing, γ correction processing and dither processing is performed. , And sends the image signal together with the image synchronization signal to the image forming unit 30. FIG. 2 is a view of the document table viewed from above. As shown in the scanning direction in the figure,
Main scanning is performed by the CCD 23 and sub-scanning is performed by moving the scanner to read the document in a raster format. The scanner control unit 25 executes the above reading process,
It detects various sensors, controls the scan drive motor, and sets various parameters in the IPU 24.

In the image forming process, the charger 32
The photoconductor 33 that is uniformly charged by
Exposure is performed with laser light modulated by the image data from the writing unit 31. An electrostatic latent image is formed on the photoconductor 33,
By developing it with toner by the developing device 34, it becomes a visualized toner image. The transfer paper previously fed by the paper feed roller 15 from the paper feed tray 16 and waiting by the registration roller 14 is conveyed in time with the photoconductor 33, and is transferred by the transfer charger 35.
The toner on 3 is electrostatically transferred onto the transfer paper, and the transfer paper is separated from the photoconductor 33 by the separation charger 36. After that, the toner image on the transfer paper is heated and fixed by the fixing device 13, and is ejected to the paper ejection tray 11 by the paper ejection roller 12.
On the other hand, the toner image remaining on the photoconductor 33 after electrostatic transfer is
The cleaning device 37 presses and removes the photoconductor 33, and the photoconductor 33 is neutralized by the neutralization charger 38. The plotter control unit 39 detects various sensors and controls a drive motor and the like in order to execute the above process.

Here, referring to FIG. 3 showing the state of the image synchronization signal output from the IPU 24 of the reading section 20,
Each image synchronization signal and its relationship will be described. The frame gate signal (/ FGATE) is a signal indicating an effective image range for an image area in the sub-scanning direction, and image data is valid while this signal is at a low level (low active). This / FGATE is asserted or negated at the falling edge of the line sync signal (/ LSYNC). / LSYNC is
A predetermined number of clocks (8CLK in this example) is asserted at the rising edge of the pixel synchronization signal (PCLK), and a predetermined number of clocks (8CLK in this example) after the rising edge of this signal
After that, the image data in the main scanning direction is validated. The image data sent is one for one cycle of PCLK, and is divided into 400 DPI equivalent from the arrow portion in FIG. The image data is transmitted as raster format data with the arrowhead at the beginning. The effective sub-scanning range of image data is usually determined by the transfer paper size.

The system control unit 1 constitutes a system for controlling the entire copying machine, and an operator operates the operation unit 7.
An input state to the reading unit 20, the storage unit 4, the image forming unit 30, and the FAX unit 9 is set by communication, and a process execution instruction is performed. Further, the state of the entire system is displayed on the operation unit 7. The instruction to the system control unit 1 is made by a key input to the operation unit 7 by the operator. In response to an instruction from the system control unit 1, the FAX unit 9 performs binary compression on the sent image data based on the G3 and G4 FAX data transfer regulations, and transfers the image data to a telephone line.
Further, the data transferred to the FAX unit 9 from the telephone line is restored to binary image data, which is sent to the writing unit 31 of the image forming unit 30 and visualized. In response to an instruction from the system control unit 1, the selector unit 5 changes the state of the selector and determines the source of image data for forming an image by the reading unit 2.
0, the storage unit 4, or the FAX unit 9 is selected. The storage unit 4 is used for copying applications such as repeat copying and rotating copying by storing the image data of the original that is normally input from the IPU 24. It is also used as a buffer memory for temporarily storing the binary image data from the FAX unit 9. These data storage instructions are given by the system control unit 1.

The storage unit 4 will be described in detail with reference to FIG. 4, which shows a block diagram of its configuration. The function of each block shown in FIG. 4 will be described below. <Memory Control Unit 43> The memory control unit 43 includes a CPU and logic, communicates with the system control unit 1 to receive commands, sets operating conditions according to the commands, and stores the state of the storage unit 4. The status information is transmitted to the system control unit 1 in order to inform the user. The operation commands from the system control unit 1 include image input, image output, compression, decompression, etc., commands for image input and image output are sent to the image input / output DMAC 41 (described later), and commands related to compression are sent to the image transfer DMAC 44. (Described later), code transfer DMAC 45
(Described later), and transmitted to the compression / expansion unit 46 (described later). <Image input / output DMAC41> Image input / output DMAC41
Is composed of a CPU and logic, and is a memory control unit 43.
It communicates with (described later) to receive commands, sets operating conditions according to the commands, and also performs image input / output DMA.
The status information for notifying the state of C41 is transmitted to the memory control unit 43. When an image input command is received, the input image data is packed as memory data in units of 8 pixels according to the input image synchronization signal, and is output to the memory control unit 43 together with the memory access signal at any time. When receiving the image output command, the image data from the memory control unit 43 is output in synchronization with the output image synchronization signal. <Image memory 42> The image memory 42 stores image data, and is composed of a semiconductor memory element such as DRAM. The total memory amount is, for example, 600 DPI, A3 size of binary image data, 18 Mbytes for two planes. And the memory for data compression is 9 MB and the total is 27 MB. Reading and writing is controlled from the memory control unit 43.

<Image transfer DMAC 44> Image transfer DMA
The C44 is composed of a CPU and a logic, communicates with the memory control unit 43 to receive a command, sets an operating condition in accordance with the command, and also transfers an image transfer DMAC44.
The status information for notifying the state of is transmitted to the memory control unit 43. When it receives a compression command, it outputs a memory access request signal to the memory control unit 43. When the memory access permission signal is active, it receives image data and transfers it to a compression / expansion unit 46 (described later). It also has a built-in address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating the storage location where the converted image data is temporarily stored. <Code Transfer DMAC 45> The code transfer DMAC 45 is a CP
It is composed of U and logic, communicates with the memory control unit 43 to receive a command, sets an operating condition according to the command, and sends status information to the memory control unit 43 to inform the state of the code transfer DMAC 45. Send. When it receives a decompression command, it outputs a memory access request signal to the memory control unit 43, and when the memory access permission signal is active, it receives image data and transfers it to a compression / decompression unit 46 (described later). It also has a built-in address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating the storage location where the converted image data is temporarily stored. The descriptor access operation of the DMAC will be described later. <Compressor / decompressor 46> Comprised of a CPU and logic, communicates with the memory controller 43 to receive a command, sets an operating condition in accordance with the command, and a status for notifying the state of the compressor / decompressor 46. The information is transmitted to the memory control unit 43. Binary data is converted to MH (Modified Huffma
n) Process by the encoding method. <HDD controller 47> Comprised of a CPU and logic, it communicates with the memory control unit 43 to receive commands, sets operating conditions in accordance with the commands, and H
Status information is transmitted to the memory control unit 43 to notify the state of the DD controller 47. The status information of the HDD 48 is read and the data is transferred. This HDD
The controller 47 can also transmit the code data after compression conversion to the HDD 48 by using the descriptor method. <HDD48> A secondary storage device, which is a hard disk.
The HDD is a large-capacity storage device for storing compression-converted code data (transferred from a buffer area in the image memory 42 for storing conversion data).
According to an instruction from the controller 47, the operation of writing the code (image) data in the internal hard disk (HD) and saving it, and the operation of reading the saved code data and sending it to the HDD controller 47 are performed.

Memory control unit 4 which is a component of the storage unit 4
The internal configuration of No. 3 will be described in detail with reference to FIG. 5, which is a block diagram. The function of each block shown in FIG. 5 will be described below. <Input / output image address counter 435> Image input / output DM
An address counter that counts up in response to an input / output memory access request signal from the AC 41 outputs a 22-bit memory address indicating a storage location where input / output image data is stored. The address is initialized once when the memory access is started. <Transfer image address counter 437> An address counter that counts up in accordance with a transfer memory access permission signal and indicates a storage location where transfer image data is temporarily stored.
Outputs 22-bit memory address. The address is initialized once when the memory access is started. <Line setting unit 431> When the image (semiconductor) memory 42 is used as a buffer at the time of image input, the difference comparison unit 4
At 32 (described later), a value to be compared with the difference result between the input processing line and the transfer line output from the difference calculation unit 430 (described later) is set. An arbitrary value is set by the system control unit 1. <Difference calculation unit 430> At the time of image input, the compression / expansion unit 46
Subtracts the number of input / output processing lines output by the image input / output unit from the number of transfer processing lines output by
Output to 2. <Difference comparison unit 432> At the time of image input, the difference calculation unit 43
The difference line number output by 0 is compared with the set value output by the line setting unit, and if the difference line number = the set value, an error signal is output, and the difference line number is 0. Then, the transfer request mask signal of the comparison result output to the arbiter 434 (described later) is activated. Other than that, or when the input / output image is not in operation, the active is not output.

<Address Selector 436> Arbiter 43
The selector selected by 4 selects either the input / output image address or the transfer image address. <Arbiter 434> It arbitrates the memory access request signal from the image input / output DMAC 41, the image transfer DMAC 44, and the code transfer DMAC 45, and outputs the access permission signal.
A refresh control circuit is built-in, and priority is given to refresh, image input / output DMAC, image transfer DMAC, and code transfer DMAC in this order, and a memory access permission signal is actively output to the permission destination under the condition that memory access is inactive. Further, the permission signal is output and the image memory 42
Address is selected, and a trigger signal indicating the start of memory access is output to the access control circuit 438 (described later). <Request Mask 433> The transfer memory access request signal for access of the compression / expansion unit 46 is masked (set in the disable state) based on the comparison result from the difference comparison unit 432, and the transfer process is stopped. <Access control circuit 438> The input physical address is divided into a row address and a column address corresponding to a semiconductor memory DRAM by a signal from the access control circuit 438 and output to an 11-bit address bus. Also,
According to the access start signal from the arbiter 434, the DRA
It outputs the M control signal (RAS, CAS, WE).

The operation of the entire storage unit 4 includes image input,
When storing data, the memory control unit 43 is initialized in response to an image input instruction from the system control unit 1 and enters a standby state for image data. When the scanner of the reading unit 20 operates, the image data is stored in the storage unit 4. Is entered. The input image data is once written in the image (semiconductor) memory 42. The number of processing lines of the written image data is counted by the image input / output DMAC 41 and input to the memory control unit 43. The compression / expansion unit 46 outputs the transfer memory access request signal in response to the image transfer command, but the request mask unit 4 of the memory control unit 43.
The request signal is masked by 33, and the actual memory access is not performed. Input data from the image input / output unit
When one line is completed, the mask of the transfer memory access request signal is released, the semiconductor memory 42 is read, and the transfer operation of the image data to the compression / expansion unit 46 is started. Further, even during the operation, the difference calculation unit 430 calculates the difference between the two processing line numbers, and when it becomes 0, the transfer memory access request signal is masked so that the address will not be overtaken. Through the above operation, transfer control according to writing / reading to / from the image memory 42 is performed.

Here, the image (video) input DMAC 41
The descriptor access operation and the data transfer operation for the image (semiconductor) memory 42 of FIG. Figure 6
FIG. 6 is a schematic diagram for explaining a descriptor format and a transfer operation by the descriptor. Referring to FIG. 6, the image data in the figure is divided into four bands of bands 1 to 4, and the image data of the number of lines set in each band is transferred according to the instructions of each descriptor 1 to 4. To do. The procedure for adding the total number of transfer lines in one image will be described. First, when the video input DMAC 41 receives a transfer command, the DMA is activated, and the chain destination address (a) set in advance by the CPU in the internal descriptor storage register. Then, the descriptor 1 is read-accessed and the contents of the descriptor 1 in the semiconductor memory 42 are loaded into the descriptor storage register. The loaded content consists of 4 words.The chain destination address that indicates the storage address of the next descriptor, the data storage destination address that indicates the start address of the data to be transferred, and the data amount of the data to be transferred are the number of lines. The number of data transfer lines indicated by and the format information indicating whether or not a CPU interrupt is generated when the transfer of the set number of lines is completed. In the least significant bit of the format information, a bit indicating whether or not to generate a CPU interrupt when the transfer of the set number of lines is completed is arranged. When "1", CPU interrupt is generated, and when "0", CPU interrupt is masked. In the example of FIG. 6, one image is divided into four bands, and the least significant bits of this format information of the four descriptors are “1, 1,
When the image data transfer of each band is completed, a CPU interrupt occurs, and the interrupt occurrence causes the line number set in each descriptor to be added to complete the transfer end timing and the line number. The image is transferred to the image memory 42 as the primary storage means while detecting the.
In addition to the buffer area of the input image transferred by the image (video) input DMAC 41, 2 is also used as a storage area of the converted data compressed by the code transfer DMAC 46 through the compression / expansion unit 46 as described below. To use.

As described above, the image (video) input D
The input image is temporarily stored in the image (semiconductor) memory 42 as the primary storage unit by the MAC 41, and then this image is transferred to be stored in the HDD 48 as the secondary storage device. In this embodiment, the input image is compressed and the compressed data is stored in the secondary storage device. For that purpose, the input image stored in the image memory 42 is sent to the compression / expansion unit 46 by the descriptor set in the image transfer DMAC 44 (with one descriptor by setting the known number of data transfer lines for one image), and compressed there. Processing is performed. The encoded converted data (intermediate image data) after the compression processing is transferred to the buffer area provided in the image memory 42 for storing the converted data by the descriptor set in the code transfer DMAC 45. The data after compression conversion can be recognized by the code amount counted by the code transfer DMAC 45. After that, the data transferred to the buffer area secured for storing the compressed conversion data provided in the image memory 42 is received by the HDD controller 47 with the memory control unit 43 to receive a command, and the data is further transferred from the buffer area. The data is transferred to the HDD 48 and the data is stored there. At this time, the image memory 4
The storage area of the HDD 48 is secured by the amount of data transferred after being compressed in the buffer memory secured in 2.

Next, an embodiment relating to the means for controlling the series of data transfer operations from the image input to the storage in the HDD 48 will be described in detail. First, an embodiment relating to the transfer to the primary storage unit will be described. The transfer to the primary storage unit is a transfer to a buffer area secured for temporarily holding the image data converted by the compression process performed before being stored in the HDD 48 which is the secondary storage device. The size of the buffer area to be secured can basically be set arbitrarily, and for example, it is also possible to acquire an area for one image and continuously transfer it to the continuous area secured in the HDD 48. However, it is also possible to obtain an area for divided transfer and transfer it to the divided area secured in the HDD 48. In order to manage the acquisition and release of the storage area of the primary storage unit (image memory 42), the following three management tables of “image ID table”, “descriptor table” and “block table” are used. First, the "image ID table" will be described. FIG. 7 shows the image memory 4 by the memory control unit 43.
It is a memory map figure which shows the structural example of the image ID table required in order to acquire and release the 2nd storage area. In this image ID table, one table is composed of an image ID and a start descriptor table ID under a table ID consisting of 0 to n. The image ID is a unique ID (identification information) in the image memory (primary storage unit) 42 and the HDD (secondary storage device) 48, and there are duplicate IDs in different image data in each storage unit. Don't The image ID cannot be used as the system reservation ID because 0 (NULL) is set as the initial state on the image ID table. Start descriptor table I
D indicates the ID of the descriptor table acquired first. In the initial state of the image ID table, the image ID is NULL
The start descriptor table ID to EOD (End Of Di
scriptor).

Next, the "descriptor table" will be described. FIG. 8 is a memory map diagram showing a configuration example of the descriptor table necessary for the memory control unit 43 to acquire and release the storage area of the image memory 42. This descriptor table has one table under the table ID consisting of "0 to n" and a start block ID.
, Number of used blocks, and next descriptor table ID
It consists of and. The start block ID indicates the ID of the first acquired block. The number of used blocks means the number of blocks continuously acquired from the start block. The next descriptor table ID has a chain structure when the storage area of the HDD 48 cannot be continuously acquired (used), and the storage area is discontinuously acquired and can be managed. If an EOB (End Of Block) code is inserted as the start block ID,
It can be determined as an unused descriptor. When the EOT (End Of Table) code is inserted, the next descriptor table ID can be determined to be the end of the chain. Similarly, in the initial state of the descriptor table, the start block is set to EO.
The number of used blocks is set to “0” in B, and the next descriptor table ID is set to EOT.

Next, the "block table" will be described. FIG. 9 shows the image memory 4 by the memory control unit 43.
It is a memory map figure which shows the structural example of the block table required in order to acquire and release the 2 accumulation area. In this block table, the storage area of the HDD 48 is subdivided into fixed length sizes (the subdivided unit areas are hereinafter referred to as “blocks”), and the usage state of one block is represented by 1 bit,
“0” is defined as an unused block and “1” is defined as a used block, and the usage state of the compressed image storage area is managed. For example,
As described above, in the image memory 42 of FIG. 4, when the fixed-size block size is 4 KB when 9 MB for data compression is used as the storage area, 9216 (KB) / 4 (KB) = 2304 (block) Since 1 block has 1 bit, a bit table of 2304 bits is required. The initial state of the block table is all set to "0" (unused state). Further, since one image data is a minimum of one image ID table + one descriptor table + one block, it is sufficient to secure the maximum number of each table of the image ID table and the descriptor table by the number of blocks.

Here, the above-mentioned "image ID table"
In the storage area of the image memory 42 managed by the "descriptor table" and the "block table", a continuous area and a divided area are secured, and the input image data (including the converted data after compression) is temporarily stored. An example related to a process of acquiring a storage area for the storage will be described. The setting of whether the data storage area in the image memory 42 may be continuously acquired or discontinuously (partitioned) may be set by a key operation from the operation unit 7. Figure 1
0 to 12 are memory control units 43 according to the setting of continuous / division.
10 is a flowchart related to the acquisition processing of the storage area of the image memory 42 executed by. Next, this embodiment will be described with reference to FIGS. When a storage area acquisition request is issued, this flow is started, and the input value is first set to the image ID.
Since the number of continuous blocks that instruct the continuity of the blocks to be acquired and the number of descriptor tables that enable multiple acquisition of the number of continuous blocks are required, it is evaluated whether there is an abnormality in the parameter indicating this input value (S1002). ).
If the parameter indicating the input value is abnormal (S1002-N
O), "Input parameter error" is returned (S1003),
Exit the process. Next, at the beginning of the processing flow for the image to be stored this time, the variables of the table ID counter (the counter indicating the image ID table) and the acquired block table counter necessary for the image ID table acquisition processing are set to “0”. (S1004) and image ID
Attempt to acquire a table (S1005). In the image ID table acquisition, a table in which the image ID has a null value is loop-searched from the top of the image ID table. If the table ID counter reaches the final table ID value in the loop search, it is checked that the table ID count is FULL because all the table ID counters have been used (S1006).
If it is FULL, it is determined that the image ID table cannot be acquired,
It returns "image ID table FULL", abnormal processing is performed (S1007), and the processing ends. Step S1006
And the table ID count is not FULL (ie image ID
Table ID count becomes a null value, that is, there is a free image ID table (S10).
08-YES), add the table ID counter (S1
009), loop search the image ID table. As a result, if there is an empty image ID table (S100
8-YES), the requested image ID is set to the image ID of the target image ID table (S1010).

Next, the descriptor table acquisition is tried. First, table I required for descriptor acquisition processing
The variable of the D counter (counter for instructing the descriptor table) is set to “0”, and the previous descriptor table I
Initialize with D (variable) set to EOD (S101)
2). To obtain the descriptor table, a loop search is performed from the beginning of the descriptor table for a table whose start block is EOB. Loop search table ID
When the counter reaches the final table ID value, all are used, so it is checked whether or not the table ID count is FULL (S1013). If it is FULL, it is determined that the descriptor table cannot be acquired, It returns "descriptor table FULL", performs abnormal processing (S1014), and exits the processing. Step S1013
If the table ID count is not FULL (that is, the descriptor table ID exists), the start block becomes EOB, that is, the table ID counter is incremented until a free descriptor table exists (S1015-YES) (S1016). , Loop search descriptor table. As a result, if there is a free descriptor table (S1015-YES), the process is divided depending on whether the previous descriptor table ID is EOT or not.
If it is (S1017-YES), it is determined to be the first descriptor table, and the acquired image ID table (S1
The search descriptor table ID (counter value) is set to the start descriptor table ID of (010, reference) (S1018). On the other hand, if a value other than EOT is assigned to the previous descriptor table ID (S10
17-NO), the retrieved descriptor table ID (counter value) is set in the next descriptor table ID of the descriptor table set in the previous descriptor table ID (S1019). Since the descriptor table has been acquired, the table ID counter (counter value) acquired in the previous step is set in the previous descriptor table ID (variable), and the acquired descriptor table counter is incremented (S1020).

Finally, the block table acquisition is tried. First, the variables of the block ID counter, the start block ID, and the unused block counter necessary for the block acquisition processing are set to "0", and initialization is performed (S102).
2). To obtain the block table, a loop search is performed from the beginning of the block table for the bit that is "0" (unused). If the block ID counter reaches the final block ID value in the loop search, all are used, so it is checked whether the table ID count is FULL (S1023). If it is FULL, it is determined that the block cannot be acquired. And returns “block table FULL” (S102
4), exit the process. The target block exists (S102
3-NO), as a result of searching the block table, if the bit of the target block is "1" (used) (S102)
5-YES), since the number of continuous blocks is interrupted, the unused block counter is reset (S1026), and block I
The D counter is incremented (S1027), and step S10
Return to step 23 to continue searching for the next block. If a free block exists as a result of the search (S1025-N
O), the unused block counter has been initialized,
That is, it is determined whether or not it is "0" (S1028), and if it is "0", it is determined as the start block of continuous acquisition because it is the beginning of the continuous block, and the block I is set as the start block ID.
The D counter value (indicating the current target block) is held (S1029). Then set the unused block counter to 1
Add (S1030). If the target block is not the start block for continuous acquisition (S1028-NO), step S1029 is skipped. After adding the unused block counter, it is determined whether or not this counter value has reached the value set as the number of continuous blocks, that is, the requested number of blocks has been acquired, and if not acquired (S103).
1-NO), and the block ID counter is incremented (S102
7) The process returns to step S1023 to continue the search for the next block.

If the requested number of blocks can be acquired (S1031-YES), the start block ID is set to the start block of the descriptor table currently being acquired, and the count value of the unused block counter is set to the used block number. In addition, “1” is instructed to be used for the block acquired this time in the block table (S103).
2). After that, the number of requested descriptor tables set in the input parameter is compared with the count value of the acquired descriptor table counter (S1033),
When they match, it is determined that the acquisition is completed, "acquisition completed" is returned (S1034), and the process ends. On the other hand, if the number of requested descriptor tables and the number of acquired descriptors do not match, the next descriptor table is acquired, so step S10
Returning to step 12, the acquisition sequence of the storage area (block) starting from the acquisition of the descriptor table is performed.

Next, the process of releasing the primary storage unit will be described. In the above, the process of acquiring the storage area of the image data transferred to temporarily store the compressed image data has been described, but the area secured in the primary storage unit (image memory 42) functions as a buffer. When the transfer to the secondary storage device, which is the next transfer destination, is completed, the acquired storage area is released and can be used as a buffer area for the next data. The processing procedure for this is shown. 13 and 14 are flowcharts related to the release processing of the storage area of the image memory 42 executed by the memory control unit 43. As shown in FIGS. 13 and 14, when a storage area release request is issued, this flow is started,
First, since the image ID is required as an input value, it is evaluated whether or not there is an abnormality in the parameter indicating this input value (S130).
2). If the parameter indicating the input value is abnormal (S13
02-NO), and returns "input parameter error" (S130
3), exit the process. At the beginning of the opening process for the target image this time, initialization is performed by setting the variable of the table ID counter (counter indicating the image ID table) necessary for the image ID table search process to "0" (S130).
4) Attempt to search the image ID table (S1305).
The image ID table is searched by searching the image I of the image ID table.
A loop search is performed from the beginning of the image ID table until D matches the target image ID of the input parameter. When the table ID counter reaches the final table ID value in the loop search, it is not possible to search, so it is checked whether or not the table ID count is FULL (S1306), and FULL
If it is, it is determined that the corresponding image ID table cannot be acquired, an ending process of returning “no corresponding image ID table” is performed (S1307), and the process is exited. Step S1306
If the table ID count is not FULL (that is, a search image exists), the table ID counter is incremented until the table ID count reaches a value that matches the target image ID (S1308-YES) (S1309), and the image is displayed. Loop the ID table. As a result, if there is an image ID table that matches the target image ID (S1308).
-YES), move to next step to try to release descriptor table and block table.

In the descriptor table release, the start descriptor table ID of the retrieved image ID table
The final descriptor table used by the image ID to be released is searched based on the. The final descriptor can be determined by the next descriptor table ID of the descriptor table being EOT. The descriptor table release order is a chain structure (see Figure 8).
Above, you have to be free from the last table. Therefore, first, the start descriptor table ID entered in the image ID table is set in the descriptor table ID counter and the previous descriptor table ID is set.
Is set to EOT for initialization (S1311). The descriptor table is loop-searched from the descriptor table ID counter. Even if the descriptor table ID counter reaches the final table ID value (FULL), the target table (checked in S1314 below)
Is not found (S1312-YES), it is determined that some abnormality has occurred in the descriptor management table, and "descriptor table abnormality" is returned (S131).
3), exit the process. As a result of searching the descriptor table, the next descriptor table I described in the descriptor table having the ID of the table ID counter value
If D is other than EOT (S1314-NO), the value indicated by the current table ID counter is set as the previous descriptor table ID, and then the next descriptor table ID is reset in the table ID counter (S1315), and steps S1312 → S1314. Return to.

If the next descriptor table ID described in the descriptor table having the ID of the table ID counter value is EOT in step S1314, the next descriptor table ID described in the descriptor table of the previous descriptor table ID is set to EOT ( S1316). Release target descriptor table ID
Is determined in the above step, the release of the determined block table is executed here (S1317). The release of the block is executed by setting bits corresponding to the start block and the number of used blocks from the start block ID and the number of used blocks shown in the release target descriptor table to “0” indicating unused. This completes the process of releasing the target descriptor table. However, since each table is processed one by one, if multiple tables are connected by a chain, it is necessary to open the next table. For that purpose, refer to the previous descriptor table ID and check whether EOT is set. Check (S1318). If EOT is set as a result of the check, it is determined that the release of the descriptor table and the block table of all the target images is completed, and the process is exited (S1318-YES). On the other hand, if the EOT is not set, the previous descriptor table ID is set in the table ID counter to open the next table (S1319), the process returns to step S1312, the release process is performed, and the EOT is set. The releasing process is continued from the last table in order until the table is reached.

The acquisition / release processing of the storage area performed as a part of the transfer operation to the primary storage section has been described above.
Next, the acquisition / release processing of the storage area in the secondary storage device (HDD 48) will be described. In the HDD 48, the data transferred after being compressed in the data conversion buffer area secured in the image memory 42 is further transferred to the HDD 48 for data storage. Therefore, the storage area reserved in the HDD 48 is determined by the relationship with the buffer area reserved in the image memory 42. For example, it is possible to acquire a buffer area for one image and secure a continuous area in the HDD 48 for continuous transfer, or to acquire a divided buffer area and transfer the divided area to the divided area of the HDD 48. To do. The acquisition and release processing of the storage area of the secondary storage device can be performed according to the same structure as the acquisition and release processing of the primary storage unit. That is, the same data structure as the memory map shown in FIGS. Therefore, FIG.
9 to 9, the description is omitted here. However, since the block table has a larger storage area capacity than the primary storage unit, the unit used when dividing into blocks of a fixed length size is a plurality of consecutive sectors on the logical address (the storage unit in a disk-shaped storage medium is “sector”).
That is, data writing / reading is performed in sector units).

The following example concerns the simultaneous transfer of two or more images. Using the above transfer control means (means for controlling a series of data transfer operations from the image input to the storage of the image after data conversion to the secondary storage via the primary storage), for two or more images at the same time The present invention relates to the transfer of image data for the purpose of enabling the transfer operation and improving the transfer processing efficiency of each image. Here, the storage area of the secondary storage means (HDD 48) is 2
Under the operating conditions where the above image transfer operations are executed at the same time, the transfer operation is divided into multiple times, and under the operating conditions where the single image transfer operation is executed, one transfer operation is performed for the unit image. I'm trying to do.
In FIG. 15, either a division (multiple times) or a batch (one time) transfer operation is selected in accordance with a request for inputting image data and a request for reading out image data stored in the secondary storage device. An operation flow of the present embodiment is shown. The operation of this example will be described with reference to FIG. 15. The system control unit 1 requests the memory control unit 43 for a data transfer operation (input / output) according to the setting of the operation unit 7, and the memory control unit follows the request. 43 starts the transfer process of the image data,
Before or during the transfer process of the received request, there may be a request for a data transfer operation (input / output), that is, a plurality of transfer process requests may be received. Here, since the processing is branched depending on whether or not there are a plurality of transfer requests, it is first checked whether or not a plurality of transfer processing requests are received (S1501).

If a plurality of transfer processing requests are received (S1501-YES), the unit image (1 image) is divided into a plurality of times and the HDD 48 (secondary storage unit) passes through the buffer area of the image memory 42 (primary storage unit). The divided data is transferred to the next storage device (S1502). When multiple transfer processing requests have not been received (S1501-NO), a unit image (1 image)
Data is transferred all at once through the buffer area of the image memory 42 to the HDD 48 (S150).
2). No matter which transfer operation is performed, it is checked at a predetermined timing whether multiple data transfer requests have not been received until the end of data transfer, that is, whether new transfer requests have been received continuously during the transfer process. In order to do so, it is confirmed whether or not the data transfer is completed (S1504). If the data transfer is not completed (S1504-NO), a request for a plurality of data transfer operations (input / output) is received. Whether the data transfer operation is selected again by returning to step S1501 for checking whether there is any data transfer operation. On the other hand, if the data transfer is completed in step S1504 (S1504-YES),
Exit this process.

Here, transfer by each of the divided (multiple times) / collective (one time) transfer operations selected depending on whether or not there are a plurality of data transfer requests shown in the above operation flow (FIG. 15). An example of processing will be described. These processes are the acquisition and release processing of the storage area in each storage unit, which is performed when the image is transferred to the image memory 42 and the HDD 48.
After the data compression (data conversion) is performed on the input image using the acquisition / release processing means described above, the image data after the compression processing is passed through the buffer area of the primary storage unit (image memory 42) to the secondary storage device ( A series of transfer processing for saving in the HDD 48) is performed. According to the acquisition / release processing means described above, the storage area of the transfer destination can be acquired with an arbitrary capacity. Therefore, the data transfer from the image memory 42 to the HDD 48 can be performed in one transfer operation, and the divided transfer can be performed. In this case, each operation can be performed. When dividing and transferring one image, the storage area of the image memory 42 is secured with a fixed capacity, and then the converted data that has been processed through the compression / expansion unit 46 is stored in the buffer area of the image memory 42. HD with the capacity of the converted data size (the maximum value is fixed capacity)
Secure the storage area of D48, and from the buffer area to HDD4
By repeating the operation of transferring the converted data to 8, the divided transfer can be performed. Further, in the transfer processing, by ensuring a continuous storage area at the time of batch transfer, or by optimizing the capacity acquired at the time of divided transfer, the image memory 42 and the HDD 48 are efficiently used. It will be possible.

In the following, the unit image memory 42 → HDD 4
An example relating to the respective transfer control when the data transfer of 8 is performed by one transfer operation and when the divided transfer is performed will be described. FIG. 16 shows a flow of control operation in the case where data is stored in the HDD 48 via the image memory 42 by one transfer operation. The operation will be described with reference to FIG. 16. First, the memory control unit 43 follows a command from the system control unit 1 and has a buffer area having a capacity capable of holding the entire data amount of one image after conversion such as data compression. Is secured in the image memory 42 (S1601). At this time, when there is a possibility that the capacity before data compression will be exceeded due to the characteristics of the compression / expansion unit 46, it is necessary to consider that amount and secure the area. Next, data compression is performed using the compression / expansion device 46 (S1602), and the compressed image data for one image is stored in the buffer area of the image memory 42 secured in step S1601 (S1603). To describe the data transfer processing operation at this time, in this embodiment, first,
Image transfer of the input image held in the image memory 42
It is sent to the compression / expansion unit 46 by the descriptor set in the MAC 44, and compression processing is performed there. Next, the encoded conversion data after being compressed by the compression / expansion unit 46 is transferred to the buffer area provided in the image memory 42 for storing the conversion data by the descriptor set in the code transfer DMAC 45. In addition, D by the descriptor
MA transfer can be performed in the same manner as in the data transfer means described with reference to FIG. After storing the converted data in the buffer area, the HDD controller 47 follows the command from the memory control unit 43,
A capacity for this converted data is secured in the storage area of the HDD 48 (S1604). In this case, the amount of converted data for one image held in the buffer area is counted during compression processing and is known, so this amount is set as the capacity to be secured in the HDD 4 which is the transfer destination by one transfer operation. As a result, the storage area can be secured without excess or deficiency. Since the transfer to the HDD 48 is completed by one operation, the storage area to be acquired in the HDD 48 is secured in a continuous area, and the instruction is given by the setting from the operation unit 7. After the continuous area is secured in the HDD 48, the data in the buffer area of the image memory 42 is transferred to the secured storage area of the HDD 48 (S1605). After the transfer,
The buffer area secured in the image memory 42 is released (S1
606), terminate the flow.

FIG. 17 shows a control operation flow when data is stored in the HDD 48 via the image memory 42 by a plurality of divided transfers. The operation will be described with reference to FIG. 17. First, a fixed capacity is set as the image memory 4 as a buffer area for separately storing data after data conversion such as compression.
2 is secured (S1701). The buffer area of the image memory 42 secured at this time secures a capacity corresponding to the data amount for dividing and transferring one image so as to have an appropriate divided data amount (the number of divisions) that can be determined in advance according to the usage situation. Since it is secured with a fixed capacity, it is determined regardless of the data size after compression conversion. Thereafter, the compression / expansion unit 46 performs data compression (S1702), and the compressed image data is stored in the fixed capacity buffer area of the image memory 42 secured in step S1701 (S170).
3). At this time, the secured fixed capacity buffer area is
It is premised that one image is transferred a plurality of times, that is, data compression may not be completed with only a fixed capacity, so it is determined whether or not the loop processing is repeated depending on the presence or absence of the end response of the compression / expansion unit 46. It is necessary to change the processing procedure. Therefore, first, an area is secured in the HDD 48 with a capacity corresponding to the amount of converted data temporarily stored in the fixed capacity buffer area secured in the image memory 42 (S170).
4), the converted data in the buffer area is transferred to the secured area (S1705). That is, after the storage of the divided conversion data in the buffer area is completed, the HDD controller 47
According to the command from the memory control unit 43, the HDD 48
The capacity for this converted data is secured in the storage area of and the transfer is performed. The data transfer operation at this time can be basically performed in the same manner as in the above embodiment (FIG. 16). After completion of this transfer, in order to judge the completion / non-completion of data compression depending on the presence / absence of the end response of the compression / expansion unit 46,
The presence / absence of an end response is confirmed (S1706), and if the compression is not completed (S1706-NO), the loop process from the compression process of step S1702 is repeated until the data compression is completed. Here, when the incomplete compression processing is continued, the data-compressed next conversion data is overwritten in the buffer area having the same fixed capacity as that used before. After the transfer is completed, the buffer area secured in the image memory 42 is released (S1707), and the flow is ended. In this embodiment, since the data transfer capacity can be estimated from the data transfer rate to the HDD 48, the compression / expansion unit 46 and the image memory 42 can be selected according to the estimated data transfer capacity, or the primary storage unit (image By selecting the occupancy rate of the buffer area of the memory 42) or the storage area of the secondary storage device (HDD 48), it becomes possible to improve the usage efficiency.

As described above, depending on whether the request to execute the transfer operation of two or more images at the same time is made or the request to execute the transfer operation of a single image is made,
Since it is possible to select whether or not to divide the number of transfer operations into multiple times, when simultaneously transferring two or more images, by executing the transfer processing of multiple images in parallel in time division, Secondary storage (HDD4)
It is possible to disperse the occupied time of 8) and efficiently execute a plurality of image signals in parallel. Furthermore, when performing a series of data transfer operations from image input to storage of the image after data conversion to the secondary storage device via the primary storage unit (image memory 42), data transfer to the secondary storage device is performed. It is possible to optimally secure and control the capacity of the buffer area after data conversion according to the capacity of the data, prevent the redundant storage area from being occupied, and efficiently process multiple images. Therefore, optimum control of the storage unit can be realized according to the configuration of the input / output unit connected to the primary storage unit.

[0039]

(1) Effects corresponding to the inventions of claims 1 and 4 Data from the buffer area of the primary storage means for temporarily storing input / output images to the secondary storage means for storing data (compressed data) Transfer process, for example, primary storage means (stores input image data) → compressor / decompressor (data conversion) → primary storage means (stores converted data in a compressed data storage area of the primary storage means) → secondary storage means (secondary storage means When performing a data transfer process of storing compressed conversion data in the storage means), under the operating condition that the transfer operation of two or more images is executed at the same time, the transfer operation is divided into a plurality of times, or a single image is transferred. Under the operating conditions for executing operations, the transfer of one unit image is selected by one transfer operation, so when transferring two or more images at the same time, the transfer processing of multiple images is performed in parallel in time division. Shi By executing the above, the occupation time of the secondary storage means (for example, HDD) for input / output of each image signal is dispersed, the plurality of image signals are efficiently executed in parallel, and the transfer is completed in the shortest time. To enable. (2) Effects corresponding to the inventions of claims 2 and 4 In addition to the effects of (1) above, a buffer area of the primary storage means is provided with a capacity corresponding to the amount of data for transferring one image to the secondary storage means at a time. Since it is ensured, the optimum operation when executing the transfer for the unit image by one transfer operation is enabled. (3) Effects Corresponding to the Inventions of Claims 3 and 4 In addition to the effects of (1) and (2) above, as a buffer area of the primary storage means, the amount of data for dividing and transferring one image to the secondary storage means is increased. Since I tried to secure the equivalent capacity,
It enables an optimum operation when executing transfer for a unit image by a plurality of transfer operations.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram showing a digital copying machine as an embodiment of an image processing apparatus of the present invention.

FIG. 2 is a view of a document table in the digital copying machine of FIG. 1 viewed from above.

FIG. 3 is a diagram showing a state of an image synchronization signal output from an IPU of a reading unit in the digital copying machine of FIG.

4 is a block diagram showing a configuration of a storage unit in the digital copying machine of FIG.

FIG. 5 is a block diagram showing an internal configuration of a memory control unit which is a constituent element of a storage unit.

FIG. 6 is a schematic diagram for explaining a format of a descriptor and a transfer operation by the descriptor.

FIG. 7 is a memory map diagram showing a configuration example of an image ID table necessary for obtaining and releasing a storage area of an HDD.

FIG. 8 is a memory map diagram showing a configuration example of a descriptor table necessary for acquiring and releasing a storage area of the HDD.

FIG. 9 is a memory map diagram showing a configuration example of a block table necessary for acquiring and releasing a storage area of the HDD.

FIG. 10 is a flowchart (part 1) of a storage area acquisition process executed in accordance with continuous / division setting.

FIG. 11 is a flowchart (part 2) of the storage area acquisition processing executed according to the continuous / partition setting.

FIG. 12 is a flowchart (part 3) of the storage area acquisition processing executed according to the continuous / partition setting.

FIG. 13 is a flowchart (No. 1) related to a storage area releasing process executed by the memory control unit.

FIG. 14 is a flow chart (No. 2) relating to a storage area releasing process executed by the memory control unit.

FIG. 15 shows a flowchart of a transfer operation for selecting one of the division / collection transfer operations depending on whether or not a plurality of data transfer requests have been received.

FIG. 16 shows a flow of a control operation when data is stored in the HDD via the image memory by one transfer operation.

FIG. 17 shows a control operation flow when data is stored in the HDD via an image memory by a plurality of divided transfers.

[Explanation of symbols]

1 ... System control part, 4 ... Storage part, 5 ... Selector part, 7 ... Operation part, 9 ... FAX
Section, 20 ... reading section, 21 ... manuscript table, 23 ... CCD, 24 ... image processing section (IPU: image processing unit), 25
... Scanner control unit, 30 ... Image forming unit, 39 ...
Plotter controller, 41 ... Image input / output DMA
C, 42 ... Image memory, 43 ... Memory control unit, 44 ... Image transfer DMAC, 45 ... Code transfer DMAC, 46 ... Compression / expansion unit, 47 ...
HDD controller, 48 ... HDD (hard disk drive).

Continued front page    (72) Inventor Takao Okamura             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Yasumitsu Shimizu             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Kiyotaka Mogi             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh (72) Inventor Yasuhiro Hattori             1-3-3 Nakamagome Stock Market, Ota-ku, Tokyo             Inside Ricoh F term (reference) 5B047 AA01 BB02 CA23 CB25 EA01                       EA09 EB17                 5C073 AB01 AB07 BB09 BD02 CA01

Claims (4)

[Claims] 1. A primary storage means having a function as a buffer for input / output images and intermediate images, a secondary storage means for storing an image transferred through a buffer area of the primary storage means, a primary storage means and a secondary storage means. An image processing apparatus having transfer control means for controlling access to a storage means and controlling mutual image transfer between a buffer area of a primary storage means and a storage area of a secondary storage means, wherein the transfer control means comprises:
When transferring data from the buffer area of the primary storage means to the storage area of the secondary storage means, it is possible to execute the transfer operation for the unit image once or in a plurality of times, and the storage area of the secondary storage means An image processing apparatus characterized in that a unit image is transferred by a plurality of divided transfer operations when simultaneously transferring a plurality of images, and a single transfer operation when a single image is transferred. 2. The image processing apparatus according to claim 1, wherein the transfer control means transfers the unit image to the storage area of the secondary storage means through the buffer area of the primary storage means by one transfer operation. In addition, the image processing apparatus is characterized in that a capacity corresponding to the amount of data to be transferred to the secondary storage means is secured as a buffer area of the primary storage means. 3. The image processing apparatus according to claim 1 or 2, wherein the transfer control means passes through a buffer area of the primary storage means by a transfer operation in which a unit image is divided into a plurality of times, and a storage area of the secondary storage means. An image processing apparatus, wherein a capacity corresponding to the amount of individual data to be divided and transferred to the secondary storage means is secured as a buffer area for the data-converted image of the primary storage means when the data is transferred to the secondary storage means. 4. The image processing apparatus according to claim 1, further comprising a data conversion unit that performs data conversion on the input / output image, and the transfer control unit performs data conversion by the data conversion unit. An image processing apparatus, wherein data of a converted image is transferred from a buffer area of a primary storage means to a storage area of a secondary storage means by using the converted image as a target image of the transfer operation.