JP2003198267A - Amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem, for example, that the resistance becomes high to temperature rise, the voltage drop is increased, the gate bias voltage becomes deep, and hence the gain in an amplifier is decreased when a self bias circuit is composed by applying the amount of voltage drop caused by allowing a current flowing between the drain and source electrodes of an FET to flow to a resistor having a positive temperature coefficient. <P>SOLUTION: In the amplifier comprising an input matching circuit 2, an output matching circuit 11, and an FET 4, a source inductor 5 is loaded to the source electrode of the FET 4, a resistor 13 for self-bias application having a negative temperature coefficient between the source inductor 5 and the ground is loaded to a bias capacitor 6 in parallel, and a circuit composed of an RF choke coil 8 for applying a bias voltage to the drain electrode of the FET 4 and a bias capacitor 9 is provided, thus allowing a drain current to flow in the resistor 13 for self-bias application having the negative temperature coefficient, decreasing the voltage drop as compared with the source electrode, and hence maintaining the same potential between the gate electrode and the ground of the FET 4. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier having a function of self-compensating for characteristic changes due to temperature characteristics.

[0002]

2. Description of the Related Art For example, in a conventional amplifier, a resistance and a capacitor having a positive temperature coefficient are loaded in parallel between a source electrode of a field effect transistor (hereinafter referred to as "FET") and ground as shown in FIG. Achieves power-on operation.

In FIG. 5, an input matching circuit 2 is provided between the input terminal 1 and the FET 4, and the drain electrode of the FET 4 is connected to the output terminal 12 via the output matching circuit 11. Further, one end of the gate bias applying resistor 3 is connected to the gate of the FET 4, and the other end of the gate bias applying resistor 3 is grounded. Furthermore, F
The source electrode of ET4 is loaded on the source inductor 5,
Between the source inductance 5 and the ground, a self-bias applying resistor 7 having a positive temperature coefficient and a bypass capacitor 6 are loaded in parallel. The drain electrode of the FET 4 is further connected to a drain bias terminal 10 via a radio frequency choke coil (hereinafter referred to as “RF choke coil”) 8 and grounded via a bypass capacitor 9. 6A shows the temperature characteristic of the resistor 7 having a positive temperature coefficient, and FIG.
The tendency of the temperature characteristic of the gain of the amplifier shown in is shown.

Next, the operation will be described. The conventional amplifier shown in FIG. 5 has a resistor 7 for applying a self-bias having a positive temperature coefficient and a bypass capacitor 6 which are loaded in parallel between the source inductor 5 of the FET 4 and the ground.
The current flowing between the drain electrode and the source electrode of 4 is
It flows to the self-bias applying resistor 7 and is grounded. As a result, a voltage drop occurs due to the self-bias applying resistor 7 between the source electrode of the FET 4 and the ground, and the voltage at the ground becomes lower than the voltage of the source electrode of the FET 4, and this potential is used for applying the gate bias. F through resistor 3
A self-bias circuit is configured by applying it to the gate of ET4.

[0005]

In the conventional amplifier as described above, the current flowing between the drain electrode and the source electrode of the FET 4 shown in FIG. 5 is applied to the self-bias applying resistor 7 having a positive temperature coefficient. The voltage drop due to flowing,
A self-bias circuit is configured by applying it to the gate of the FET 4 via the gate bias applying resistor 3.

Therefore, as shown in FIG. 6A, the value of the self-bias applying resistor 7 changes due to the temperature change,
For example, as the resistance value increases and the voltage drop increases and the gate bias voltage becomes deeper as the temperature rises, the gain decreases as shown in FIG. 6B. Furthermore, FE
Since T4 has a positive temperature characteristic, there is a problem that the gain is significantly reduced.

The present invention has been made in order to solve the above problems, and an amplifier is provided with a self-bias circuit constituted by a resistor having a negative temperature coefficient, so that a characteristic change due to a temperature characteristic is self-compensated. The purpose is to do.

[0008]

In the amplifier according to the first invention, a bypass capacitor (capacitor) and a self-bias applying resistor having a negative temperature coefficient are provided in parallel between the source inductor and the ground. As a result, the self-bias applying resistor having the negative temperature coefficient changes the voltage drop negatively with respect to the positive temperature change.
Can be controlled so as to compensate the temperature characteristic of the gate bias voltage. By providing such a self-biasing circuit, it is possible to self-compensate for characteristic changes due to temperature characteristics of the amplifier.

Further, in the amplifier according to the second aspect of the present invention, by applying the bias voltage to the drain electrode of the FET via the self-bias applying resistor having a negative temperature coefficient, it is possible to cope with a positive temperature change. The voltage drop can be changed negatively. Thereby, it is possible to control so as to compensate the temperature characteristic of the voltage of the drain electrode of the FET. Thereby, the characteristic change due to the temperature characteristic of the amplifier can be self-compensated.

In the amplifier according to the third aspect of the invention, a circuit in which a self-bias applying resistor having a negative temperature coefficient and a bypass capacitor are connected in series between the gate electrode and the drain electrode of the FET. FET
It is possible to provide a negative feedback circuit by loading it in parallel with and to control so as to compensate the temperature characteristic of the FET by the feedback amount with respect to the positive temperature change. Thereby, the characteristic change due to the temperature characteristic of the amplifier can be self-compensated.

Further, in the amplifier according to the fourth aspect of the present invention, the resistor having the negative temperature coefficient is the metal thin film resistor, so that the amplifier can be easily manufactured at low cost.

Further, in the amplifier according to the fifth aspect of the invention, by using the choke coil as a radio frequency choke coil, a high impedance can be given to a frequency above a specific frequency range, and control becomes easy. .

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. 1 shows an amplifier according to a first embodiment of the present invention. Figure 2
Temperature characteristics of a resistor having a negative temperature coefficient in (a), FIG.
The tendency of the temperature characteristic of the gain of the amplifier shown in FIG. 1 is shown in (b). An input matching circuit 2 is provided between the input terminal 1 and the FET 4, and the drain electrode of the FET 4 is connected to the output terminal 12 via the output matching circuit 11. Further, one end of the gate bias applying resistor 3 is connected to the gate electrode of the FET 4, and the other end of the gate bias applying resistor 3 is grounded. Further, the source electrode of the FET 4 is loaded on the source inductor 5, and the self-bias applying resistor 13 having a negative temperature coefficient and the bypass capacitor 6 are loaded in parallel between the source inductor 5 and the ground. The drain electrode of FET4 is
Further, it is connected to the drain bias terminal 10 via the radio frequency choke coil 8 and grounded via the bypass capacitor 9.

The operation and effect will be described below. In FIG. 1, the high frequency signal input from the input terminal 1 is amplified by the FET 4 matched by the input matching circuit 2 and the output matching circuit 11, and output from the output terminal 12. Further, in order to operate the FET 4 with low noise and low reflection, a source inductor 5 for loading an impedance that minimizes noise and reflection is loaded.
The bias to the FET 4 is applied from a bias circuit composed of an RF choke coil 8 for applying a bias voltage to the drain electrode and a bypass capacitor 9, and a bypass capacitor is applied between the source electrode of the FET 4 and the ground by a drain current. As shown in FIG. 2A, the voltage drop is changed to a negative value with respect to the positive temperature change by the self-bias applying resistor 13 having a negative temperature coefficient, which is loaded in parallel with the gate bias applying resistor 6. The gate bias voltage applied via the resistor 3 is controlled so as to compensate the temperature characteristic of the FET 4. For example, for increasing temperature, FE
With respect to the decrease in the gain of T4, the resistance value of the self-bias applying resistor 13 having a negative temperature coefficient becomes low, the voltage drop decreases, and the gate bias voltage becomes shallow. As a result, FE
By increasing the gain of T4, the gain decrease due to the temperature rise of the amplifier is compensated as shown in FIG. 2 (b).

As described above, the voltage drop of the self-bias circuit for applying the gate bias is controlled by the self-bias applying resistor 13 having a negative temperature coefficient so as to compensate the temperature characteristic of the FET 4. . As a result, the drain current flows through the self-bias applying resistor 13 having a negative temperature coefficient to reduce the voltage drop from the source electrode, so that the gate electrode of the FET 4 and the ground can be kept at the same potential. Therefore, the temperature characteristic of the amplifier is suppressed.

Embodiment 2. FIG. 3 shows the configuration of the second embodiment of the present invention. The same components as those described in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In the amplifier of the second embodiment, the amplifier of the first embodiment is used.
The resistor 13 for applying a self-bias having a negative temperature coefficient and the bypass capacitor 6 which are loaded in parallel between the source inductor 5 of the FET 4 of the amplifier in FIG.
A resistor for self-bias application having a negative temperature coefficient is removed from the RF choke coil 8 of the circuit configured by removing the RF coil coil 8 (described in FIG. 1) and applying a bias voltage to the drain electrode of the FET 4 and the bypass capacitor 9. 1
This is a configuration in which 3 are connected in series. In the present embodiment, the gate bias applying resistor 3 is connected to the source bias terminal 18, and the bypass capacitor 14
Grounded through.

The operation and effect will be described below. In FIG. 3, a bias to the FET 4 is applied by a bias circuit composed of an RF choke coil 8 for applying a bias voltage to the drain electrode, a resistor 15 having a negative temperature coefficient, and a bypass capacitor 9, and a drain current The voltage between the drain and source electrodes of FET4 is
The resistor 15 having a negative temperature coefficient changes the voltage drop negatively with respect to the positive temperature change, and controls so as to compensate the temperature characteristic of the FET 4. For example, for increasing temperature,
With respect to the decrease in the gain of the FET4, the resistance value of the resistor 15 having a negative temperature coefficient decreases, the voltage drop decreases, and the voltage between the drain electrode and the source electrode increases, so that the FET4
Gain is increased, and as a result, the gain decrease with increasing temperature of the amplifier is compensated.

As described above, the temperature characteristic of the amplifier is suppressed by providing the configuration in which the voltage drop of the drain bias application is controlled by the resistor 15 having a negative temperature coefficient so as to compensate the temperature characteristic of the FET 4.

Embodiment 3. FIG. 4 shows the configuration of the third embodiment of the present invention. The same components as those described in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

The amplifier according to the third embodiment includes a self-bias applying resistor 13 having a negative temperature coefficient and connected in parallel between the source inductor 5 of the FET 4 of the amplifier according to the first embodiment and the ground, and a bypass capacitor. 6 (shown in FIG. 1) is removed, and a resistor 17 having a negative temperature coefficient is provided between the gate electrode and the drain electrode of the FET 4.
A circuit in which the capacitor 16 and the capacitor 16 are connected in series is loaded in parallel with the FET 4. In the present embodiment,
The gate bias applying resistor 3 is connected to the source bias terminal 1
8 and is grounded via a bypass capacitor 14.

The operation and effect will be described below. In FIG. 4, the high frequency signal input from the input terminal 1 is input to the gate electrode of the FET 4 via the input matching circuit 2, amplified by the FET 4, and then output from the drain electrode. A part of the signal output from the drain electrode returns to the gate electrode and is input to the gate electrode again by the negative feedback circuit including the resistor 17 and the capacitor 16 having a negative temperature coefficient. The amplitude component of the signal is changed by the resistor 17 having a negative temperature coefficient, and the phase component is FET4.
Therefore, the amplitude of the feedback is changed negatively with respect to the positive temperature change, and the temperature characteristic of the FET 4 is controlled so as to be compensated.

For example, when the temperature rises, the FET 4
The resistance value of the resistor 17 having a negative temperature coefficient becomes low with respect to the decrease of the gain of F.
The ET4 gain increases. This compensates for the gain reduction with increasing temperature of the amplifier.

Fourth Embodiment Self bias applying resistor 13 having a negative temperature coefficient in the first, second and third embodiments,
The resistors 15 and 17 having a negative temperature coefficient are realized by a metal thin film resistor having a negative temperature coefficient. This makes it possible to easily realize the self-bias applying resistor 13 having a negative temperature coefficient and the resistors 15 and 17 having a negative temperature coefficient.

The following operations and effects are realized only by using the metal thin film resistors having a negative temperature coefficient for the resistors 13, 15 and 17 having the negative temperature coefficient,
Since it is the same as the first, second, and third embodiments described above, detailed description thereof will be omitted.

[0026]

According to the first aspect of the present invention, the voltage drop of the self-bias circuit for applying the gate bias so as to compensate the temperature characteristic of the FET can be controlled by the resistor having the negative temperature coefficient. The effect that the temperature characteristic is suppressed is obtained.

According to the second invention, since the voltage drop of the drain bias application can be controlled by the resistor having the negative temperature coefficient so as to compensate the temperature characteristic of the FET, the temperature characteristic of the amplifier can be suppressed. To be

According to the third aspect of the invention, the temperature characteristic of the amplifier can be suppressed because it can be controlled by the resistor having the negative temperature coefficient which constitutes the negative feedback circuit between the gate and drain electrodes so as to supplement the temperature characteristic of the FET. The effect is obtained.

According to the fourth aspect of the invention, the resistor having a negative temperature coefficient is a metal thin film resistor, so that the resistor can be easily manufactured at low cost.

According to the fifth aspect of the invention, the choke coil is a radio frequency choke coil, so that a high impedance can be given to frequencies above a specific frequency range, and control becomes easy.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an amplifier according to the present invention.

FIG. 2 is a diagram showing a temperature characteristic of the first embodiment of the amplifier of the present invention, in which the temperature characteristic of a resistor having a negative temperature coefficient is shown in FIG. 2 (a), and FIG. FIG. 4 is a diagram showing a temperature characteristic of gain in the first embodiment of the amplifier of the present invention.

FIG. 3 is a circuit diagram showing a second embodiment of the amplifier according to the present invention.

FIG. 4 is a circuit diagram showing Embodiment 3 of the amplifier according to the present invention.

FIG. 5 is a circuit diagram showing a conventional amplifier.

6A and 6B are graphs showing temperature characteristics of a conventional amplifier, wherein FIG. 6A shows the temperature characteristics of a resistor having a positive temperature coefficient, and FIG. 6B shows the gain of the conventional amplifier. It is a figure showing the temperature characteristic of.

[Explanation of symbols]

1 input terminal, 2 input matching circuit, 3 gate bias applying resistor, 4 field effect transistor (FET), 5
Source inductor, 6, 9, 14 Bypass capacitor, 7 Self bias applying resistor, 8 RF choke coil, 10 Drain bias terminal, 11 Output matching circuit, 12 Output terminal, 13 Self bias applying resistor with negative temperature coefficient, 15, 17 Negative temperature coefficient resistor, 16 capacitor, 18 Source bias terminal.

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5J090 AA01 CA02 CA87 CN04 FA00                       HA09 HA25 HA29 HA33 HN23                       KA29 TA01 TA02                 5J500 AA01 AC02 AC87 AF00 AH09                       AH25 AH29 AH33 AK29 AT01                       AT02 NC04 NH23

Claims (5)

[Claims] 1. An amplifier having an input / output matching circuit and a field effect transistor, wherein a resistor having a negative temperature coefficient and a capacitor are loaded in parallel between the source electrode of the field effect transistor and ground, and A circuit including a choke coil for applying a bias voltage to the drain electrode of the effect transistor and a bypass capacitor is provided, and the gate electrode of the field effect transistor and the ground are kept at the same potential. And an amplifier. 2. An amplifier having an input / output matching circuit and a field effect transistor, wherein a bias voltage composed of a choke coil for applying a bias voltage to the drain electrode of the field effect transistor and a bypass capacitor is applied. In the amplifier having the circuit described above, a resistor having a negative temperature coefficient is connected in series between the choke coil and the drain electrode of the field effect transistor. 3. An amplifier having an input / output matching circuit and a field effect transistor, wherein a circuit in which a resistor having a negative temperature coefficient and a capacitor are connected in series is connected in parallel between a gate electrode and a drain electrode of the field effect transistor. An amplifier characterized by being loaded into the. 4. The amplifier according to claim 1, wherein the resistor having the negative temperature coefficient is a metal thin film resistor. 5. The amplifier according to claim 1, wherein the choke coil is a radio frequency choke coil.