JP2003186743A5 - - Google Patents
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- Publication number
- JP2003186743A5 JP2003186743A5 JP2002295543A JP2002295543A JP2003186743A5 JP 2003186743 A5 JP2003186743 A5 JP 2003186743A5 JP 2002295543 A JP2002295543 A JP 2002295543A JP 2002295543 A JP2002295543 A JP 2002295543A JP 2003186743 A5 JP2003186743 A5 JP 2003186743A5
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- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/975,764 US8261022B2 (en) | 2001-10-09 | 2001-10-09 | Method and apparatus for adaptive cache frame locking and unlocking |
| US09/975764 | 2001-10-09 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003186743A JP2003186743A (ja) | 2003-07-04 |
| JP2003186743A5 true JP2003186743A5 (enExample) | 2005-12-02 |
| JP4219647B2 JP4219647B2 (ja) | 2009-02-04 |
Family
ID=25523367
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002295543A Expired - Fee Related JP4219647B2 (ja) | 2001-10-09 | 2002-10-09 | 適応的キャッシュフレームのロッキング及びアンロッキングのための方法及び装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US8261022B2 (enExample) |
| JP (1) | JP4219647B2 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6904501B1 (en) * | 2002-06-17 | 2005-06-07 | Silicon Graphics, Inc. | Cache memory for identifying locked and least recently used storage locations |
| US9098943B1 (en) * | 2003-12-31 | 2015-08-04 | Ziilabs Inc., Ltd. | Multiple simultaneous bin sizes |
| US7590803B2 (en) * | 2004-09-23 | 2009-09-15 | Sap Ag | Cache eviction |
| US20060143398A1 (en) * | 2004-12-23 | 2006-06-29 | Stefan Rau | Method and apparatus for least recently used (LRU) software cache |
| US20060143389A1 (en) * | 2004-12-28 | 2006-06-29 | Frank Kilian | Main concept for common cache management |
| US7539821B2 (en) * | 2004-12-28 | 2009-05-26 | Sap Ag | First in first out eviction implementation |
| US20060143256A1 (en) | 2004-12-28 | 2006-06-29 | Galin Galchev | Cache region concept |
| JP4617210B2 (ja) * | 2005-07-13 | 2011-01-19 | 日立ビアメカニクス株式会社 | 描画装置及びそれを搭載した露光装置 |
| US7877537B2 (en) * | 2006-12-15 | 2011-01-25 | Microchip Technology Incorporated | Configurable cache for a microprocessor |
| US9208095B2 (en) * | 2006-12-15 | 2015-12-08 | Microchip Technology Incorporated | Configurable cache for a microprocessor |
| US7966457B2 (en) | 2006-12-15 | 2011-06-21 | Microchip Technology Incorporated | Configurable cache for a microprocessor |
| JP5083757B2 (ja) * | 2007-04-19 | 2012-11-28 | インターナショナル・ビジネス・マシーンズ・コーポレーション | データをキャッシュする技術 |
| EP2664993A1 (en) * | 2011-01-12 | 2013-11-20 | Fujitsu Limited | Cache memory device, cache memory control device, information processing device, cache memory control method, and threshold value determination program for cache memory device |
| CN103885892A (zh) * | 2012-12-20 | 2014-06-25 | 株式会社东芝 | 存储器控制器 |
| US10460411B2 (en) * | 2016-08-30 | 2019-10-29 | Uber Technologies, Inc. | Real-time resource management for on-demand services |
| US10509727B1 (en) * | 2018-09-10 | 2019-12-17 | Mediatek Inc. | Method and apparatus for performing task-level cache management in electronic device |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5715274A (en) | 1980-06-30 | 1982-01-26 | Fujitsu Ltd | Buffer storage control system |
| JPH0266654A (ja) | 1988-08-31 | 1990-03-06 | Nec Corp | キャッシュメモリ制御方式 |
| US5353425A (en) * | 1992-04-29 | 1994-10-04 | Sun Microsystems, Inc. | Methods and apparatus for implementing a pseudo-LRU cache memory replacement scheme with a locking feature |
| JPH07334428A (ja) | 1994-06-14 | 1995-12-22 | Toshiba Corp | キャッシュメモリ |
| GB2345987B (en) * | 1999-01-19 | 2003-08-06 | Advanced Risc Mach Ltd | Memory control within data processing systems |
| JP3438650B2 (ja) * | 1999-05-26 | 2003-08-18 | 日本電気株式会社 | キャッシュメモリ |
| EP1182567B1 (en) * | 2000-08-21 | 2012-03-07 | Texas Instruments France | Software controlled cache configuration |
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2001
- 2001-10-09 US US09/975,764 patent/US8261022B2/en not_active Expired - Fee Related
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2002
- 2002-10-09 JP JP2002295543A patent/JP4219647B2/ja not_active Expired - Fee Related
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2012
- 2012-07-27 US US13/559,858 patent/US8478944B2/en not_active Expired - Fee Related