JP2003169418A - Load protective circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the ON-resistance of a drive circuit while overheat protection is performed. <P>SOLUTION: Self-protection against overheat is performed by an overheat cut-off part 33 in a power device PD3. A charge pump 36 is provided outside the power device PD3, and a large portion of the chip area of the power device PD3 is allotted to a multisource N-channel MOS-FET 32 of a drive device. Thus, regarding the design of the chip, a large area can be allotted to the multisource N-channel MOS-FET 32 and the ON-resistance of the MOS-FET 32 can be reduced, so that the current capacity of the power device PD3 can be set large. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a load protection circuit for protecting a desired load from overcurrent.

[0002]

2. Description of the Related Art In recent years, when driving a plurality of electronic units mounted on an automobile or the like, for example, 24V or 42V,
The number of devices that require a voltage higher than the conventional power supply voltage is increasing, and various proposals have been made for power devices for driving various loads. Especially, the protection function against overcurrent and heating is important. Has become a problem.

{First Prior Art} FIG. 3 shows a first prior art of this type of load protection circuit. The load protection circuit includes an overcurrent protection function and a heating protection function in one power device PD1.
Connected when an overcurrent of a rated value or more flows in the power transistor 1 such as a MOS field effect transistor (MOSFET) used for high power switching or high power amplification for driving the load 2. In order to protect the load 2 and the power transistor 1 itself, a current limiting circuit 3 for detecting an overcurrent and shutting off the drive current is connected, and when the power transistor 1 is overheated, a thermostat or the like is used to the power transistor 1 concerned. The heating cutoff circuit 4 for turning off the drive of is connected.

Reference numeral 5 in FIG. 3 is an oscillating circuit for oscillating a pulse signal having a predetermined period, reference numeral 6 is a charge pump for stepping up a pulse signal provided from the oscillating circuit 5 by using a capacitor and a switching element, and a reference numeral Vcc
Indicate the power sources, respectively. And each circuit element 1,
3, 4, 5 and 6 are integrated and configured in the same chip as the power device PD1.

{Second Prior Art} FIG. 4 shows a second prior art of a load protection circuit. The load protection circuit according to the second conventional technology is one in which a current detection function is included in one power device PD2 so that an overcurrent is detected by an external circuit. The source N-channel MOSFET 11 is used.

This multi-source N-channel MOSFET
Reference numeral 11 denotes a pair of MOSFETs 11a and 11b connected in parallel. One MOSFET 11a drives the load 13 and the other MOSFET 11b.
Is a mirror circuit with current detection function (sense MOS function)
Is in charge of. Specifically, a load 13 is connected to the source terminal 12 on one MOSFET 11a side of the multi-source N-channel MOSFET 11, and the other MOS is also connected.
A pull-down resistor 1 is connected to the mirror terminal 14 on the side of the FET 11b.
5 (Rs) is connected. And this mirror terminal 14
Is compared with the reference voltage Vref by the comparison circuit 16, and when the mirror terminal 14 exceeds the reference voltage Vref, the comparison circuit 16 outputs a cutoff signal to the signal input circuit 18 through the inverting circuit 17. ing. When the cutoff signal is output from the comparison circuit 16 in this manner, one of the inputs of the AND circuit 19 of the signal input circuit 18 is turned off, so that each of the input switching circuits 20 and 21 is turned off. The channel MOSFET 11 is turned off.

Reference numeral 22 in FIG. 4 indicates a charge pump, in which a plurality of power devices (multi-source N-channel MOSFET 11) are connected to a plurality of channels CH1 ,.
When connected in parallel as CH2, CH3 ..., They are commonly connected to each input switching circuit 21 installed for each power device 11.

[0008]

In the first prior art, since the charge pump 6 is included in the same power device PD1, a considerable area in the chip as the power device PD1 is applied to the charge pump 6. There is a need. Then, the area that can be assigned to the power transistor (MOSFET) 1 becomes small in the design of the chip. By the way, in general, the on-resistance of a power transistor (MOSFET) has a characteristic that it is inversely proportional to its area at the same withstand voltage.
There is a drawback in that the on-resistance becomes large, which hinders power saving.

Further, in the second conventional technique, since only the current detection function is built in the power device PD2, the overheat cannot be detected and the protection is insufficient.

Therefore, an object of the present invention is to provide a load protection circuit capable of performing both overcurrent detection and heating detection of a chip and capable of an efficient ON operation with respect to a load, and a technique related thereto. To do.

[0011]

[Means for Solving the Problems] In order to solve the above problems,
The invention according to claim 1 is a drive element having both a drive function for driving a load and a current detection function, and at least an overheat for detecting an overheat state of the drive element and interrupting an input signal to the drive element. A power device in which a shutoff unit is integrated, and an overcurrent state of the drive element is detected based on a current detected by the current detection function of the drive element, which is connected to the outside of the power device, An overcurrent cutoff circuit that cuts off an input signal to the power device when an overcurrent state is detected, and adjusts a voltage from a power supply connected to the outside of the power device to a level suitable for an input signal of the power device. And a charge pump.

According to a second aspect of the present invention, there is provided the load protection circuit according to the first aspect, wherein the drive element includes a first field effect transistor for driving the load according to the input signal. , A mirror circuit that is symmetrically connected in parallel to the first field effect transistor and outputs a current corresponding to the current flowing through the first field effect transistor.

The invention according to claim 3 is the load protection circuit according to claim 1 or 2, wherein the power device and the overcurrent cutoff circuit are provided for each of a plurality of channels. The plurality of channels are provided in parallel with each other, and the charge pump is a single circuit commonly connected between a parallel circuit formed of the plurality of channels and the power supply.

[0014]

1 is a circuit block diagram showing a load protection circuit according to an embodiment of the present invention. As shown in FIG. 1, this load protection circuit is a multi-source N having both a drive function for driving the load 31 and a current detection function as a power device PD3 for driving the load 31.
The temperature near the channel MOSFET (driving element) 32 and the multi-source N-channel MOSFET 32 and the load 31 is measured to detect the multi-source N-channel MOS when overheated.
When the overheat cutoff unit 33 for turning off the FET 32 and the current limiting circuit 34 for limiting the current flowing through the multi-source N-channel MOSFET 32 are integrated, the current flowing through the multi-source N-channel MOSFET 32 is an overcurrent. Power source PD3 multi source N
An overcurrent cutoff circuit 35 for turning off the channel MOSFET 32 is provided outside the power device PD3, and a plurality of channels C having these configurations are provided.
A single charge pump 36 for supplying a current to H1, CH2, CH3 ... Is provided outside the power device PD3.

Multi-source N-channel MOSFET 32
Is formed by connecting a pair of MOSFETs 32a and 32b in parallel.
And the other MOSFET 32b functions as a mirror circuit for the current detection function (sense MOS function). Specifically, this multi-source N-channel MO
The load 31 is connected to the source terminal 37 on one MOSFET 32a side of the SFET 32, and the other MOSFET
An overcurrent interruption circuit 35 is connected to the mirror terminal 38 on the T (mirror circuit) 32b side.

The overheat cutoff unit 33 uses a thermostat or the like to drive the load of the multi-source N-channel MOSFET 32 when the temperature in the vicinity of the multi-source N-channel MOSFET 32 and the load 31 exceeds a predetermined temperature. The MOSFET 32a functions as a short circuit between the gate and the source to switch it off.

As the current limiting circuit 34, for example, a general transistor is used, and a multi-source N-channel MOS is used.
When an overcurrent more than a predetermined current flows in the FET 32
When the potential difference due to the forward voltage between the drains becomes excessively large, the gates of the MOSFETs 32a and 32b are switched off. The current limiting circuit 34
Is a protection circuit provided just in case in addition to the overcurrent interruption circuit 35, and may be omitted if the protection by the overcurrent interruption circuit 35 is sufficient.

An input circuit 43 composed of transistors Tr1 and Tr2 and resistors R1 to R4 is connected to the power device PD3 having such a configuration. In the input circuit 43, when an input signal is applied to the resistors R1 and R2 connected in series, the NPN transistor Tr1 is turned on by the base-emitter voltage generated by the resistor R2, and the NPN transistor Tr1 is turned on. The current from the charge pump 36 flows through the resistors R3 and R4 connected in series to the collector, and the voltage generated by the resistor R4 causes the PNP.
When the mold transistor Tr2 is turned on, the current from the charge pump 36 is supplied to the power device PD3.

The overcurrent cutoff circuit 35 is a MOSFET (mirror circuit) of the multi-source N-channel MOSFET 32.
The pull-down resistor 39 (Rs) for converting the current detected by 32b into the voltage of the mirror terminal 38 and the mirror terminal 3
Comparing circuit 4 for comparing the voltage of 8 with the reference voltage Vref
1, an inverting circuit 42 that inverts the output from the comparison circuit 41, and a cutoff circuit (logical product circuit) 44 that cuts off an input signal given to the input circuit 43 of the power device PD3 according to the output from the inverting circuit 42. Equipped with. When the voltage of the mirror terminal 38 is lower than the reference voltage Vref,
The output from the comparison circuit 41 is in the low state, while the output from the comparison circuit 41 is in the high state when the voltage at the mirror terminal 38 is higher than the reference voltage Vref.

In the charge pump 36, as shown in FIG. 2, four switches S _{1 to} S ₄ are connected in an H shape around a capacitor C _F , and the switches S ₁ and S ₄ are opened to form a switch S.
₂ and S ₃ are closed to charge the capacitor C _F , and the switches S ₁ and S ₄ are closed.
₂ and S ₃ are opened and the transfer phase in which the discharge from the capacitor C _F is performed is alternately switched,
For example, the voltage of the power source Vcc of 12V is boosted to 24V, so that a voltage double the input voltage is output.

The operation of the load protection circuit having the above configuration will be described.

First, multi-source N-channel MOSFE
When the voltage of the mirror terminal 38 of T32 is lower than the reference voltage Vref, the output from the comparison circuit 41 is in a low state, which is inverted by the inverting circuit 42 and input to one input terminal of the AND circuit 44. The AND circuit 44
When an input signal (high signal) is input to the other input terminal of the logical product circuit 44, the AND circuit 44 outputs a high signal (input signal) to the input circuit 43. In the input circuit 43, when a high signal (input signal) is applied to the resistors R1 and R2 connected in series, the NPN transistor Tr1 is turned on by the base-emitter voltage generated by the resistor R2, and this N
A current from the charge pump 36 flows through the resistors R3 and R4 connected in series to the collector of the PN transistor Tr1, and the PNP transistor Tr2 is turned on by the voltage generated by the resistor R4. It is supplied to the power device PD3.

In the power device PD3, the high signal (input signal) given from the input circuit 43 is in a normal state (that is, not in an overheated state and no overcurrent is generated), and the multi-source N-channel MOSFET 32 is supplied. Of the two MOSFETs 32a and 32b connected in parallel with each other.
a and 32b are turned on. And one MOSF
When the ET 32a is turned on, the current from the power supply Vcc is supplied to the load 31, and the other MOSFET (mirror circuit) 32b detects the current (sense MOS function), and the current flowing out from the mirror terminal 38 causes an overcurrent. The cutoff circuit 35 performs overcurrent detection.

Here, the load 31 and one MOSFET
If an overcurrent flows through 32a, the power device PD
Although the current limiting circuit 34 in FIG. 3 limits the current, its description is omitted here and the multi-source N-channel MOSFE is omitted.
Only the current detection function of T32 and the overcurrent cutoff function of the overcurrent cutoff circuit 35 will be described.

When an overcurrent flows through the load 31 and one of the MOSFETs 32a, the boosted voltage causes the overcurrent to also flow through the other MOSFET 32b as a mirror circuit.
Since an overcurrent also flows through the pull-down resistor 39, the mirror terminal 38 steps up. The comparison circuit 41 compares the voltage of the mirror terminal 38 with the reference voltage Vref, detects an overcurrent, and outputs a high signal to the inverting circuit 42. When it is inverted to a low signal by the inverting circuit 42, the AND circuit 44 is turned off and cuts off subsequent input signals to the input circuit 43. As a result, the input signal to the power device PD3 is cut off, so that the multi-source N-channel MOS
Both MOSFETs 32a and 32b of the FET 32 are switched to the off state, whereby the overcurrent can be immediately interrupted and prevented.

Also, multi-source N-channel MOSFE
When T32 or the load 31 is overheated, the overheat cutoff unit 33 detects this and cuts off the input signal to the gates of the MOSFETs 32a and 32b of the multi-source N-channel MOSFET 32. As a result, the overheated state of the power device PD3 and the load 31 can be eliminated.

As described above, the power device PD3 is
In the overheated state, self-protection is performed by the internal overheat cutoff unit 33, and in the case of overcurrent, the MOSFET 32b (sense MO
S) outputs the current to the outside, and the external overcurrent cutoff circuit 35
Since the overcurrent protection is performed by the above, it is sufficient to have one charge pump 36 externally in a multi-channel (CH1, CH2, CH3 ...) Configuration. Therefore, as compared with the first conventional technique in which the charge pump 6 is integrated inside the power device PD1, it is not necessary to allocate the area in the chip as the power device PD3 to the charge pump 36. Therefore, in terms of chip design, the area that can be allocated to the multi-source N-channel MOSFET 32 is increased, and the on-resistance can be reduced. Therefore, the current capacity of the power device PD3 can be set large.

Further, since only one charge pump 36 is required in common for each power device PD3, the cost can be reduced.

Further, as a measure against overheating, the self-protection can be performed by the overheat blocking section 33 in the chip, so that higher protection can be achieved as compared with the second prior art.

The load protection circuit of this embodiment is effective when used in a vehicle-mounted relay box or the like in which a plurality of power devices are put together in one unit.

[0031]

According to the first aspect of the invention, the power device is provided with the drive element for driving the load and the current detection function (specifically, as in claim 2, A first field effect transistor for driving a load in response to an input signal and a mirror circuit symmetrically connected in parallel to the first field effect transistor), and at least detecting an overheated state of the drive element to drive the drive. An overheat cutoff unit that cuts off an input signal to the element is integrated and configured, and since an overcurrent cutoff circuit and a charge pump are provided outside the power device, a charge pump is provided inside the power device. It is not necessary to allocate the area in the chip as a power device to the charge pump, as compared with the integrated first related art. Therefore, in terms of chip design, the area that can be allocated to the drive circuit is increased, and the on-resistance can be reduced. Therefore, the current capacity of the power device can be set large.

Further, as a measure against overheating, since self-protection can be performed by the overheat blocking portion in the chip, a higher degree of protection can be achieved as compared with the second prior art.

According to the third aspect of the present invention, the power device and the overcurrent interruption circuit are provided for each of the plurality of channels, the plurality of channels are provided in parallel with each other, and the charge pump is provided. Since it is a single circuit commonly connected between a parallel circuit composed of a plurality of channels and a power supply, only one charge pump is required in common for each power device. Therefore, the cost can be reduced as a whole.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a load protection circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an internal configuration of a charge pump.

FIG. 3 is a block diagram showing a load protection circuit of a first conventional technique.

FIG. 4 is a diagram showing a load protection circuit of a second conventional technique.

[Explanation of symbols]

PD3 power device 31 load 32 multi-source N-channel MOSFET 32a first MOSFET (first field effect transistor) 32b second MOSFET (second field effect transistor) 33 overheat cutoff section 34 current limiting circuit 35 overcurrent cutoff circuit 36 Charge Pump 37 Source Terminal 38 Mirror Terminal 39 Pulldown Resistor 41 Comparison Circuit 42 Inversion Circuit 43 Input Circuit 44 AND Circuit

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H03K 17/08 H03K 17/08 C (72) Inventor Shuji Mayama 1-7 Kikuzumi, Minami-ku, Nagoya-shi, Aichi No. 10 Auto Network Technology Research Institute Co., Ltd. (72) Inventor Keizo Ikeda 1-7-10 Kikuzumi, Minami-ku, Aichi Prefecture Nagoya City F-Term (Automobile Technology Research Co., Ltd.) 5G004 AA04 AB02 BA03 BA04 DA04 DC04 DC07 EA01 FA01 5G053 AA01 BA01 BA06 CA01 CA04 DA01 EA09 EC03 FA05 5H740 BA12 BC01 BC02 KK01 MM08 MM11 MM14 5J055 AX34 BX16 CX28 DX22 DX53 EX06 EX12 EY01 EY10 EY17 EY21 EZ00 EZ04 EZ10 EZ55 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05 FX02 FX05

Claims (3)

[Claims] 1. A drive element having both a drive function for driving a load and a current detection function, and an overheat cutoff section for detecting an overheated state of at least the drive element and cutting off an input signal to the drive element. An integrated power device, the overcurrent state of the drive element is detected based on the current detected by the current detection function of the drive element connected to the outside of the power device, and the overcurrent state is detected. An overcurrent cutoff circuit that cuts off an input signal to the power device when detected, and a charge pump that is connected to the outside of the power device and adjusts a voltage from a power supply to a level suitable for the input signal of the power device. Load protection circuit equipped. 2. The load protection circuit according to claim 1, wherein the drive element drives a first field effect transistor for driving the load in response to the input signal, and the first field effect transistor. And a mirror circuit that is symmetrically connected in parallel to the transistor and outputs a current corresponding to the current flowing through the first field effect transistor. 3. The load protection circuit according to claim 1, wherein the power device and the overcurrent cutoff circuit are provided for each of a plurality of channels, and the plurality of channels are provided. A load protection circuit provided in parallel with each other, wherein the charge pump is a single circuit commonly connected between a parallel circuit configured of a plurality of the channels and the power supply.