JP2003168867A - Wiring board for manufacturing multilayer wiring board and its manufacturing method as well as multilayer circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board for manufacturing a multilayer wiring board capable of shortening a process by eliminating a fault due to the embedding properties of a circuit or the rugged step of an insulating layer, and to provide a method for manufacturing the same and the multilayer wiring board. <P>SOLUTION: The wiring board for manufacturing the multilayer wiring board comprises a conductor post 107a formed on the surface of the opposite side to the surface brought into contact with the metal layer 103, of a conductor circuit 104 embedded in an insulating layer brought into contact with one surface of a metal layer 103 to pass through the insulating layer 102. The insulating layer is sequentially made from the metal layer side of a first insulating layer 102a made of a photosensitive resin and a second insulating layer 102b. The wiring board for manufacturing the multilayer wiring board comprises a conductor post formed on the surface of the opposite side to the exposed surface of the conductor circuit embedded in an insulating layer so as to expose the one surface from the insulating layer to pass through the insulating layer. The insulating layer is sequentially made from the exposed side of the conductor circuit of a first insulating layer made of a photosensitive resin and a second insulating layer. The method for manufacturing them is provided. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board for manufacturing a multilayer wiring board, a method for manufacturing the wiring board, and a multilayer wiring board.

[0002]

2. Description of the Related Art With the recent demand for higher functionality, lighter, thinner, shorter, and smaller electronic devices, high-density integration and further high-density mounting of electronic components are progressing. Semiconductors used in these electronic devices The packages are becoming smaller and more pins than ever before.

A conventional circuit board is called a printed wiring board, and is formed by laminating a glass fiber fiber cloth impregnated with epoxy resin, patterning a copper foil attached to a glass epoxy board, and then stacking a plurality of layers. The mainstream method is to use a wiring board that is laminated and adhered, a through hole is drilled, copper is plated on the wall surface of the hole to form a via, and electrical connection is made between layers. However, the miniaturization and high densification of mounted components have advanced, and the wiring density is insufficient in the above-described wiring board, which causes a problem in mounting the components.

Under these circumstances, build-up multilayer wiring boards have been adopted in recent years. The build-up multilayer wiring board is formed by stacking an insulating layer composed only of resin and a conductor. As a method for forming vias, instead of conventional drilling, there are various methods such as laser method, plasma method, and photo method, and via holes of small diameter are freely arranged to achieve high density. There are blind vias (Blind Vias), barrier vias (Buried Vias: a structure in which vias are charged with a conductor), etc. as the interlayer connection portion, and the stacked vias that form vias on the vias are particularly noticeable. Has been done. Barry via holes are classified into a method of filling the via holes by plating and a method of filling the via holes with a conductive paste or the like. On the other hand, as a method of forming a wiring pattern, there are a method of etching a copper foil (subtractive method), a method of electrolytic copper plating (additive method), and the like. It is starting to get attention.

[0005]

Problems associated with the build-up multilayer wiring board manufactured by such a manufacturing process include circuit embedding properties in the insulating resin layer and surface irregularities after the insulating resin layer is formed. .

With the miniaturization of circuits, it is necessary to improve fluidity in order to embed an insulating resin between wirings.
This limits the properties of the insulating resin, such as the melt viscosity, and narrows the choice of insulating layer resins. Also,
Even if it is embedded, unevenness remains on the surface of the insulating resin to a large extent, and when further stacking is repeated, it causes deterioration of positional accuracy, warpage of the substrate, variation of each layer, and the like. In order to flatten the insulating resin, for example, a step such as polishing is required, and the manufacturing method is also limited.

It is an object of the present invention to provide a wiring board for manufacturing a multilayer wiring board, a method for manufacturing the same, and a multilayer wiring board, which can eliminate defects due to embedding of a circuit and uneven steps of an insulating layer and shorten the manufacturing process. .

[0008]

Means for Solving the Problems That is, the present invention provides (1)
On the surface of the conductor circuit which is in contact with the metal layer on one surface and is embedded in the insulating layer, on the surface opposite to the surface in contact with the metal layer,
A conductor post penetrating the insulating layer is formed, and the insulating layer is formed of a photosensitive resin in order from the metal layer side.
A wiring board for manufacturing a multilayer wiring board, comprising: an insulating layer of 1) and a second insulating layer; and (2) a conductor embedded in the insulating layer so that one surface is exposed from the insulating layer. A conductor post penetrating the insulating layer is formed on the surface of the circuit opposite to the exposed surface. The insulating layer is formed of a photosensitive resin in order from the exposed side of the conductor circuit. A wiring board for manufacturing a multilayer wiring board, comprising an insulating layer and a second insulating layer, (3) The surface of the second insulating layer and the tip of the conductor post are covered with an adhesive layer. The wiring board for manufacturing a multilayer wiring board according to the above (1) or (2), (4) the height of the first insulating layer and the conductor circuit is
The wiring board for producing a multilayer wiring board according to any one of (1) to (3), which is the same or substantially the same, (5).
A step of forming a first insulating layer having an opening having the same shape as the conductor circuit on the metal layer; a step of forming a conductor circuit by electrolytic plating using the metal layer as a lead for electroplating; Forming a second insulating layer on the surface of the insulating layer and the conductor circuit; opening a via in the second insulating layer to expose a part of the conductor circuit; and electrolyzing the metal layer. A method of manufacturing a wiring board for manufacturing a multilayer wiring board, comprising the step of forming a conductor post by electroplating as a plating lead, (6) Adhering to the surface of the second insulating layer and the tip portion of the conductor post. The method for producing a wiring board for producing a multilayer wiring board according to the item (5), which comprises the step of forming an agent layer, and (7) the item (5) or (6), which comprises the step of removing the metal layer. A method for manufacturing a wiring board for manufacturing a multilayer wiring board according to (8), The insulating layer and the height of the conductor circuit is formed the same or substantially the same first (5) -
(7) A method for manufacturing a wiring board for manufacturing a multilayer wiring board according to any one of (7), (9) A wiring board for manufacturing a multilayer wiring board according to any of (5) to (8) above. A wiring board for manufacturing a multilayer wiring board, which is obtained by the manufacturing method of (1)
0) A multilayer wiring board characterized by being obtained by laminating the wiring boards for manufacturing a multilayer wiring board according to any one of the above items (1) to (4) and (9). is there.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings, but the present invention is not limited thereto.

FIG. 1 is a sectional view for explaining an example of a wiring board for manufacturing a multilayer wiring board and a method for manufacturing the same according to an embodiment of the present invention. The manufacturing process of the wiring board for manufacturing a multilayer wiring board of the present invention will be described in detail below.

First, a patterned first insulating layer 102a is formed on the metal layer 101 (FIG. 1A).
The first insulating layer 102a is formed, for example, by laminating a UV-sensitive resin film on the metal layer 101 by roll laminating, selectively exposing using a negative film, and then developing. You can It is also possible to form a pattern by applying a UV-sensitive resin varnish or the like with a curtain coater or a roll coater, and similarly performing exposure and development.

The first insulating layer 102a functions as a plating resist when the conductor circuit 104 shown in FIG. 1C is formed, and is sealed in the substrate as an insulating film between the conductor circuits 104. It is necessary to satisfy the required characteristics such as reliability, heat resistance reliability, and good electric characteristics. Any resin may be used for forming the first insulating layer 102a as long as it is suitable for this characteristic. Examples of the resin used for the first insulating layer 102a include a photosensitive epoxy resin, a photosensitive epoxy-modified polyimide resin, a photosensitive polyimide resin, a photosensitive phenol resin, and an acrylic resin.

Any material may be used as the material of the metal layer 101 as long as it is suitable for this manufacturing method, but in particular, it is required to have resistance to the chemicals used, and the metal layer 101 is finally etched. It must be removable. Examples of the material of the metal layer 101 include copper, copper alloy, 42 alloy, and nickel. In particular, copper foil, copper plate, and copper alloy are preferable for use as the metal layer 101 because not only electrolytic plated products and rolled products can be selected, but also various thicknesses can be easily obtained.

Next, a resist metal layer 103 is formed by electrolytic plating using the metal layer 101 as an electrolytic plating lead (feeding electrode) (FIG. 1B). By this electrolytic plating, the resist metal layer 103 is formed on the portion of the metal layer 101 where the first insulating layer 102a is not formed. The resist metal layer can be used as part of the conductor circuit. The resist metal layer may be any one as long as it is suitable for this manufacturing method, but in particular, it is necessary that it has resistance to a chemical liquid used when finally removing the metal layer 101 by etching. Is. Examples of the material of the resist metal layer 103 include nickel,
Examples include gold, tin, silver, solder, palladium and the like. In addition,
The purpose of forming the resist metal layer 103 is to form the metal layer 101.
Is to prevent the conductor circuit 104 shown in FIG. 1 (C) from being etched by the chemical solution used for removing by etching. For example, when the metal layer 101 is copper (copper plate, copper foil, or copper alloy plate) and the material of the conductor circuit 104 is copper, the material of the resist metal layer 103 is
Most preferably, gold is selected. Resist metal layer 10
By making the material of No. 3 gold, it has resistance to most etching solutions (generally, cupric chloride solution and ferric chloride solution) used when etching the metal layer 101. However, as will be described later in detail, there is an advantage that solder wettability at the time of interlayer connection can be easily secured. Further, as the material of the resist metal layer 103, nickel,
There is also a method of selecting tin or solder, but it has the drawback that it is necessary to use an alkaline etching solution (ammonium chloride solution) because it dissolves in a normal acid-based etching solution, but compared to gold. There is also the advantage of low cost.

On the other hand, the conductor circuit 1 shown in FIG. 1 (C) is different from the chemical used for etching the metal layer 101.
When 04 is resistant, this resist metal layer 1
03 is unnecessary. Further, the resist metal layer 103 does not have to have the same pattern as the conductor circuit 104, and the metal layer 1
The resist metal layer 103 may be formed on the entire surface of the metal layer 101 before the first insulating layer 102a is formed on the metal layer 01.
In that case, after removing the metal layer 101 by etching, the resist metal layer 103 needs to be removed by etching with a chemical that does not etch the conductor circuit 104.

Next, a conductor circuit 104 is formed by electrolytic plating using the metal layer 101 as an electrolytic plating lead (feeding electrode) (FIG. 1C). By this electrolytic plating,
The conductor circuit 104 is formed on a portion of the metal layer 101 where the first insulating layer 102a is not formed. Conductor circuit 1
As the material of 04, any material may be used as long as it is suitable for this manufacturing method, and examples thereof include copper, nickel, gold, tin, silver and palladium. In particular, when the material of the conductor circuit 104 is copper, the conductor circuit 104 with low resistance and stable can be obtained. Here, the first insulating layer 1
02a and the height (thickness) of the conductor circuit 104 are preferably the same or substantially the same. When there is a difference in height between the first insulating layer 102a and the conductor circuit 104, as shown in FIG.
The second insulating layer 102b shown in FIG.
This is because it is necessary to fill in the step generated in the first insulating layer 102a.

Subsequently, the formed first insulating layer 102a
Then, the second insulating layer 102b is formed over the conductor circuit 104 (FIG. 1D). Thereby, the first insulating layer 102
An insulating layer 102 including a and the second insulating layer 102b is formed. The resin forming the second insulating layer 102b is
Any material may be used as long as it is suitable for this manufacturing method. The method for forming the second insulating layer 102b may be a method suitable for the resin to be used, and a resin varnish may be directly applied by a method such as printing, curtain coating, or barcode,
Examples thereof include a method of laminating a dry film type resin by a method such as vacuum lamination or vacuum pressing. Particularly, the dry film type resin has an advantage that it is not only easy to handle but also excellent in productivity. Where the first
When the heights of the insulating layer 102a and the conductor circuit 104 are the same or about the same, there is no uneven step, so that the second insulating layer 102b can be formed without molding failure even with a resin having a high melt viscosity. You can In addition, the surface of the second insulating layer 102b is not affected by the density of the conductor circuit 104,
Can be very flat.

The resin used for the second insulating layer 102b includes
Both thermoplastic and thermosetting resins can be used. Examples thereof include resins such as polyamide, polyimide, polyamideimide, polyetherimide, polyesterimide, polyetheretherketone, polyphenylene sulfide, polyquinoline, polynorbornene, polybenzoxazole, and polybenzimidazole. The above resins may be used alone or in combination of two or more.

Next, a via 106 is formed in the formed second insulating layer 102b (FIG. 1 (E)). The method for forming the via 106 may be any method as long as it is suitable for this manufacturing method, and examples thereof include laser, dry etching by plasma, and chemical etching. Also,
When the second insulating layer 102b is made of a photosensitive resin,
The via 106 can also be formed by exposing and developing. The opening by the laser is advantageous because the fine via 106 can be easily formed regardless of whether the second insulating layer 102b is photosensitive or non-photosensitive. An excimer laser, a UV laser, a carbon dioxide laser, etc. can be used as the laser.

Next, the post 107a is formed by electrolytic plating using the metal layer 101 as an electrolytic plating lead (feeding electrode) (FIG. 1F). By this electrolytic plating,
A post 107a is formed in a portion of the second insulating layer 102b where the via 106 is formed. When the post 107a is formed by electrolytic plating, the tip shape of the post 107a can be freely controlled from a flat shape to a convex shape by adjusting and selecting a plating current density and an additive to the plating bath. You can Any material may be used as the material of the post 107a as long as it is suitable for this manufacturing method. For example, copper, nickel, gold,
Examples thereof include tin, silver and palladium. Particularly, by using copper, the stable post 107a with low electric resistance can be obtained.

Next, the joining metal material layer 107b is formed on the tip surface of the post 107a (FIG. 1G). As a result, the post 107a and the joining metal material 107b are formed.
The conductor post 107 is formed. Examples of the method of forming the bonding metal material layer 107b include a method of forming by electroless plating or electrolytic plating, and a method of printing a paste containing a bonding metal material. The printing method requires accurate alignment of the printing mask with the post 107a, but the electroless plating method or the electrolytic plating method can easily cope with miniaturization and high density of the post 107a. In particular, in the method by electrolytic plating, there are various kinds of metals that can be plated and the management of chemicals is easier than in the method by electroless plating.
Very suitable.

The material of the joining metal material layer 107b may be any metal as long as it can be metal-joined to the joined portion 201 shown in FIG. 2A, and examples thereof include solder. Among solders, Sn, In, or Sn,
Ag, Cu, Zn, Bi, Pd, Sb, Pd, In, A
It is preferable to use solder composed of at least two kinds of u. More preferably, it is an environment-friendly Pb-free solder.

The tip shape of the joining metal material layer 107b is preferably convex. Bonding metal material layer 10
By making the tip of 7b convex, the adhesive layer 10 existing between the joining metal material layer 107b and the joined portion 201 when thermocompression-bonded to the joined portion 201 shown in FIG.
Since 8 is easily removed, the bonding metal material layer 107b
Since there is no adhesive residue between the bonded part 201 and the bonded part 201, good metal bonding can be achieved.

In FIG. 1G, the post 107 is used.
The conductor post 107 is described by forming the joining metal material layer 107b on the tip surface of a, but the conductor post of the present invention is not limited to this structure. That is, the conductor post 107 may have any configuration as long as the conductor post 107 and the joined portion 201 shown in FIG. For example, if the conductor post 107 itself is formed of a joining metal material, the connection between the joined portion 201 and the conductor post 107 can be easily secured, and the process can be shortened. Further, the bonding metal material layer 107b may not be formed on the tip surface of the post 107a, but may be formed on the surface of the bonded portion 201, or, of course, if the resist metal layer 103 is formed of the bonding metal material. Connection metal material layer 1
07b is unnecessary. As described above, the conductor post 107 may have various configurations.

Next, an adhesive layer 108 is formed so as to cover the surface of the tip end portion of the conductor post 107 and the second insulating layer 102b (FIG. 1 (H)). The adhesive layer 108 may be formed by a method suitable for the resin used, for example, a resin varnish may be directly applied by a method such as printing, curtain coating, or barcode, or a dry film type resin may be vacuum laminated.
A method of loading by a method such as a vacuum press may be used. As a resin used for the adhesive layer 108, a resin having good heat resistance and insulating properties such as epoxy, phenol, polyimide, or polyamide-imide can be used.

Next, the metal layer 101 is removed by etching (FIG. 1 (H ')). Metal layer 101 and conductor circuit 10
4, the resist metal layer 103 is formed between
Since the resist metal layer 103 has resistance to a chemical used when removing the metal layer 101 by etching, even if the metal layer 101 is etched, the resist metal layer 103 is not etched. None, and consequently the conductor circuit 104 is not etched. When the material of the metal layer 101 is copper and the material of the resist is nickel, tin, or solder, a commercially available ammonia-based etching solution can be used. When the material of the metal layer 101 is copper and the material of the resist metal layer 103 is gold, most etching solutions including ferric chloride solution and cupric chloride solution can be used.

FIG. 1A, which has been described in detail so far,
According to the step shown in FIG. 1H, a wiring board for manufacturing a multilayer wiring board, which is a first embodiment of the present invention, has a conductor circuit in contact with one surface of a metal layer and embedded in an insulating layer. 1
09,110 can be obtained. Furthermore, FIG.
(G ′), as shown in FIG. 1 (H ′), the insulating layer, which is the second embodiment of the present invention, is formed by removing the metal layer 101 of the wiring boards 109 and 110 for manufacturing a multilayer wiring board. Wiring board 111, 112 for manufacturing a multilayer wiring board having a conductor circuit embedded in an insulating layer so that one surface of the wiring board is exposed
Can be obtained.

Next, a method for manufacturing a multilayer wiring board (collective laminating method) will be described in detail with reference to FIG. Figure 2 (A)
The process shown in (1) is a diagram for explaining an example of a method for manufacturing a multilayer wiring board using the wiring board 112 for manufacturing a multilayer wiring board of FIG. 1 (H ′), and the structure of the multilayer wiring board obtained by this is described. It is sectional drawing shown.

First, the wiring board 112a for manufacturing a multilayer wiring board.
To 112d and the layer 202 to be bonded are aligned (FIG. 2).
(A)). Wiring board 1 for multilayer wiring board manufacturing
It is possible to use a method of aligning a positioning mark formed in advance on the layers 12a to 112d and the layer 202 to be connected by an image recognition device, or a method of aligning with a pin for alignment or the like. Note that FIG.
In (A), as the layer 202 to be connected, the multilayer wiring board 203
Although a core substrate such as FR-4 used for imparting a rigid property is used, the material and structure of the layer 202 to be connected are not limited at all.

Finally, the wiring board 112a for manufacturing a multilayer wiring board
To 112d and the layer 202 to be connected are collectively heated / pressurized to collectively melt the bonding metal materials of all layers to perform interlayer connection to obtain a multilayer wiring board 203 (FIG. 2B). .
As a method of heating and pressurizing, for example, a vacuum press is used until the bonding metal material layer 107b removes the adhesive layer 108 and the bonded portion 201 and the post 107a are metal bonded by the bonding metal material layer 107b. A method may be mentioned in which the adhesive layer 108 is heated and pressed, and the adhesive layer 108 is cured to bond the wiring boards 112a to 112d for manufacturing a multilayer wiring board and the layer 202 to be connected.

The greatest feature of the present invention is that the first insulating layer 102a, which is a patterned photosensitive resin, functions as an inter-wiring insulating layer, but the advantages are as follows. (1) The insulating layer 102 is flat regardless of the density of the conductor circuit. (2) Since it is not necessary for the second insulating layer 102b to fill the irregularities of the conductor circuit, the choice of resins to be used is expanded. (3) Since there is no need to use a peeling-type plating resist, there is no fear of peeling residues, and it is also possible to reduce manufacturing costs.

[0032]

According to the present invention, by using a photosensitive resin as an inter-wiring insulating layer when forming a conductor circuit, it is not necessary to bury the insulating layer in the conductor circuit, and even if the insulating layer is formed. Since the surface of the insulating layer can be made smooth, the characteristics of the insulating resin and the restrictions on the manufacturing method can be reduced. Further, since it is not necessary to use a peeling type plating resist, it is possible to reduce time and manufacturing cost.

[Brief description of drawings]

FIG. 1 is a cross-sectional view for explaining an example of a method of manufacturing a wiring board for manufacturing a multilayer wiring board that is an embodiment of the present invention.

FIG. 2 is a cross-sectional view for explaining an example of a method for manufacturing a multilayer wiring board (collective stacking method) using the wiring board for manufacturing a multilayer wiring board according to the embodiment of the present invention.

[Explanation of symbols]

101: Metal layer 102a: First insulating layer 102b: Second insulating layer 102: Insulating layer 103: Resist metal layer 104: Conductor circuit 106: Via 107a: Post 107b: Metal material layer for bonding 107: Conductor post 108: Adhesive layers 109, 110, 111, 112, 112a, 112
b, 112c, 112d: wiring board for manufacturing multilayer wiring board 201: bonded portion 202: connected layer 203: multilayer wiring plate

Continued front page    F-term (reference) 5E317 AA24 BB01 BB02 BB03 BB11                       BB12 BB13 BB14 BB15 BB18                       CC33 GG16                 5E346 AA12 AA43 CC09 CC10 CC31                       CC32 CC37 CC38 CC39 FF06                       FF07 FF08 FF09 FF14 HH32                       HH33

Claims (10)

[Claims] 1. A conductor post penetrating the insulating layer is provided on a surface of a conductor circuit which is in contact with the metal layer on one surface and is embedded in the insulating layer, on a surface opposite to the surface in contact with the metal layer. A wiring board for manufacturing a multilayer wiring board, wherein the insulating layer is formed and comprises, in order from the metal layer side, a first insulating layer made of a photosensitive resin and a second insulating layer. 2. The one surface is exposed from the insulating layer,
A conductor post penetrating the insulating layer is formed on a surface opposite to the exposed surface of the conductor circuit embedded in the insulating layer, and the insulating layer is formed in order from the exposed side of the conductor circuit. A wiring board for manufacturing a multilayer wiring board, comprising: a first insulating layer made of a photosensitive resin; and a second insulating layer. 3. The surface of the second insulating layer and the tips of the conductor posts are covered with an adhesive layer.
A wiring board for producing a multilayer wiring board as described above. 4. The wiring board for producing a multilayer wiring board according to claim 1, wherein the first insulating layer and the conductor circuit have the same or substantially the same height. 5. A step of forming a first insulating layer having an opening having the same shape as the conductor circuit on the metal layer, and a step of forming the conductor circuit by electrolytic plating using the metal layer as a lead for electrolytic plating. A step of forming a second insulating layer on the surface of the first insulating layer and the conductor circuit, and a step of opening a via in the second insulating layer so as to expose a part of the conductor circuit. A method of manufacturing a wiring board for manufacturing a multilayer wiring board, comprising the step of forming a conductor post by electrolytic plating using the metal layer as a lead for electrolytic plating. 6. The method of manufacturing a wiring board for manufacturing a multilayer wiring board according to claim 5, including a step of forming an adhesive layer on the surface of the second insulating layer and the tip portions of the conductor posts. 7. The method for manufacturing a wiring board for manufacturing a multilayer wiring board according to claim 5, further comprising a step of removing the metal layer. 8. The method for manufacturing a wiring board for manufacturing a multilayer wiring board according to claim 5, wherein the first insulating layer and the conductor circuit are formed to have the same or substantially the same height. 9. A wiring board for producing a multilayer wiring board, which is obtained by the method for producing a wiring board for producing a multilayer wiring board according to claim 5. 10. A multilayer wiring board obtained by stacking the wiring boards for manufacturing a multilayer wiring board according to any one of claims 1 to 4 and 9.