JP2003168664A - Manufacturing method of semiconductor device, semiconductor wafer, and wafer protection tape - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device for grinding the back of a semiconductor wafer more uniformly in plane, and to provide a semiconductor wafer and a wafer protection tape. <P>SOLUTION: A coating material 14 made of, for example, photosensitive polyimide is applied and formed on a protection film 13 and a pad 12 by a specific thickness to a semiconductor wafer 10 accompanying bump formation. For example, a spin coating speed is controlled, thus making a remnant (accumulation) 141 at the outermost periphery completely without shaking polyimide liquid, and hence setting a portion near the outermost periphery of the semiconductor wafer to be the thickness that is equal to or close to the height of a bump (BMP) to be formed later. When a wafer protection tape 10 is put onto the main surface of the semiconductor wafer 10 for grinding the back of the semiconductor wafer 10 later on, contribution to the in-plane uniformity of grinding pressure is made. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method, and more particularly to a method for manufacturing a semiconductor device, a semiconductor wafer, and a wafer protection tape which require thinning of a semiconductor chip having a bump electrode as an external connecting portion.

[0002]

2. Description of the Related Art The back surface grinding of a semiconductor wafer is an essential process for making IC packages thinner, lighter weight, stacking chips, and mounting thin flip chips. Usually, those having bumps as external connection electrodes are
It is protected by a protective member. That is, after a protective tape is attached to the entire main surface of the semiconductor wafer on which the bumps of each chip area are formed, the main surface of the wafer is held by the wafer holder and the back surface of the wafer is pressed against the grinding member.

A semiconductor wafer having a predetermined thickness obtained by grinding the back surface of such a wafer is separated into chips. After that, for example, it is incorporated into a product with flip-chip mounting. This satisfies the space-saving and lightweight mounting.

[0004]

The backside grinding of the semiconductor wafer described above tends to increase the grinding amount and reduce the final thickness in order to satisfy further space-saving and lightweight mounting.
Then, in the chip region near the wafer outer periphery where no bumps are formed, the tendency to be thinner becomes remarkable as compared with that near the wafer center.

FIG. 9 is a cross-sectional view emphasizing the problem of backside grinding of the semiconductor wafer. Further, FIG. 10 is a cross-sectional view of the IC chip, which emphasizes the problem of backside grinding.
In the back surface grinding of the entire wafer shown in FIG.
The grinding amount in the wafer outer peripheral area A1 where P is not formed is larger than that in the wafer center area A2. As a result, as shown in FIG. 10, I acquired at a location near the wafer outer peripheral area A1.
The C chip may have a non-standard thickness T2 or a thickness variation T, and is treated as a defect.

In particular, when the IC chip is a rectangular chip long in one direction such as a liquid crystal driver, that is, a strip-shaped chip, the difference in thickness (T1-T2) is large in one chip, and a large number of chips exceed the allowable range. It may lead to a situation.
As a result, there was a concern that the number of effective chips would decrease.

The present invention has been made in consideration of the above-mentioned circumstances, and a method of manufacturing a semiconductor device and a semiconductor wafer in which the back surface grinding of a semiconductor wafer can be made more uniform in the surface,
It is intended to provide a wafer protection tape.

[0008]

A method of manufacturing a semiconductor device according to [Claim 1] of the present invention relates to a semiconductor wafer having a bump formed as an external connection terminal connected to an integrated circuit in each chip region on a main surface, A step of spin-coating a coating material as the uppermost layer of the protective film before forming the bumps, and coating the coating material only in the vicinity of the outermost periphery of the semiconductor wafer so as to have a thickness equal to or close to the height of the bumps. Is characterized by.

According to the method for manufacturing a semiconductor device of the present invention as described above, the coating material is devised by spin coating so as to have a thickness equal to or close to the height of the bump. This contributes to uniformizing the pressure in the surface when the back surface of the semiconductor wafer is ground later.

In order to protect the bumps, preferably, the entire main surface of the semiconductor wafer is protected by a protective tape. Further, for the back surface grinding of the semiconductor wafer, the method further comprises a step of holding the main surface side of the semiconductor wafer and pressing the back surface side against a grinding member to perform grinding.

A method of manufacturing a semiconductor device according to [Claim 4] of the present invention relates to a semiconductor wafer having bumps formed as external connection terminals connected to an integrated circuit in each chip region on a main surface, wherein the bumps are formed. Comprising a step of attaching a protective tape to the entire main surface side of the semiconductor wafer, and compensating the portion of the protective tape near the outermost periphery of the semiconductor wafer where bumps are not formed by a thickness equal to or close to the height of the bumps. Is characterized by.

According to the method of manufacturing a semiconductor device of the present invention as described above, the protective tape is compensated in the vicinity of the outermost periphery where no bump is formed by a thickness equal to or close to the height of the bump. This contributes to uniformizing the pressing force within the surface during grinding of the back surface of the semiconductor wafer.

The portion of the protective tape in the vicinity of the outermost periphery of the semiconductor wafer where the bumps are not formed is characterized in that the protective tape is thickened by overlapping. Thickness control is easy and convenient. Further, the method further comprises a step of holding the main surface side of the semiconductor wafer and pressing the back surface side against a grinding member to perform grinding.

A semiconductor wafer according to [Claim 7] of the present invention comprises a bump as an external connection terminal connected to an integrated circuit provided in each chip area on the main surface and a coating as the uppermost layer of a protective film around the bump. The coating material has a thickness equal to or close to the height of the bump in a predetermined region other than the chip region.

According to the above semiconductor wafer of the present invention,
A thick region of the coating material exists in a predetermined region near the outer periphery of the semiconductor wafer, that is, a portion where the bump is not provided, and the bump height is compensated. Uniformity of hold and pressing force during backside grinding is improved.

Each of the chip regions has a strip shape, and the bumps are arranged around the strip shape. The thick region of the coating material contributes to uniform back surface grinding of strip-shaped chips near the outer periphery of the wafer.

The wafer protection tape according to [Claim 9] of the present invention is a tape for the whole area to be attached to the entire surface of the main surface of the semiconductor wafer to protect the bumps on the main surface of the semiconductor wafer, and the bumps are not formed. And a tape for a partial area that compensates for a thickness equal to or close to the height of the bumps arranged below or above the tape for the entire area in a predetermined area other than the chip area.

According to the above-mentioned wafer protection tape of the present invention, the partial area tape forms a thick area as an overlapping portion with the whole area tape, and the thickness is equal to or close to the height of the bump. Preferably, the partial area tape has an annular shape that covers an area near the outermost periphery of the semiconductor wafer.

[0019]

1 (a) and 1 (b) relate to a method of manufacturing a semiconductor device and a semiconductor wafer according to a first embodiment of the present invention, in which an electrode portion for external connection and the outermost periphery of the semiconductor wafer are provided. It is a general-view figure of the principal part which shows.

As shown in FIG. 1A, a pad 12 is formed on a semiconductor wafer 10 together with a predetermined wiring layer related to an integrated circuit. A protective film (passivation film) 13 is patterned and formed on the insulating film 11 and on the periphery of the pad 12 by using a lithography technique.
The protective film 13 is made of, for example, a silicon oxide film. Alternatively, it may be a nitride film. The protective film 13 is a silicon oxide film /
There are various conceivable methods such as a multilayer structure of a silicon nitride film.

Next, a coating material 14 made of, for example, photosensitive polyimide is applied and formed on the protective film 13 and the pad 12 by a predetermined thickness. That is, coating material 1
4 is the uppermost layer of the protective film.

Coating material 1 of the above photosensitive polyimide
4 is a polyimide liquid containing a solvent at the beginning of application. For example, by controlling the spin coating rotation speed, the polyimide solution is not completely shaken off and a residual pool 141 is formed at the outermost circumference. As a result, bumps (BM) to be formed later are formed near the outermost periphery of the semiconductor wafer.
The thickness should be equal to or close to the height of P). It should be noted that the size (thickness) of the residual polyimide residue 141 depends on the concentration and viscosity of the solvent contained in the polyimide liquid.

After that, as shown in FIG. 1B, a predetermined region corresponding to the pad 12 in the protective film 14 is selectively opened by a lithography technique using a predetermined mask. Then, the coating material 14 is cured through a heat treatment (cure) process at about 300 to 400 ° C.

Next, the metal layer 15 including at least a metal layer for diffusion prevention and a metal layer for adhesion and plating is coated on the pad 12 by sputtering. Although not shown, a metal layer for plating is also connected and coated on the coating material 14. Next, a resist for bump formation is formed through resist application and photolithography technology (not shown). After that, the pad 12 is formed by using the metal layer for plating.
Metal plating is performed on the upper surface through the metal stack 15. The resist is removed and bumps BMP are provided on each pad 12.

According to the method of the above embodiment, the coating material 14 is devised by spin coating so as to have a thickness equal to or close to the height of the bump BMP (14).
1). This contributes to the uniformization of the pressure in the surface when the back surface of the semiconductor wafer 10 is ground later.

FIG. 2 is a schematic view showing a structure in which a protective tape is attached to the structure shown in FIG. 1 (b). Protective tape 2
1 is an insulating resin-based electrostatic protection tape, which has bumps BM
It has a uniform thickness that can protect P. Protective tape 21
Has a width equal to or larger than the diameter of the semiconductor wafer 10, and is placed on the semiconductor wafer 10 and then cut in accordance with the semiconductor wafer 10. In addition, it is also possible to use a wafer that has been previously cut into a circle suitable for the semiconductor wafer 10.

According to the configuration of the above embodiment, the coating material 14 which is the uppermost layer of the protective film of the semiconductor wafer 10 is configured to have a thickness equal to or close to the height of the bump BMP only in the vicinity of the outermost periphery of the wafer. (141).
Therefore, the protective tape 21 is in a form in which the thickness equal to or close to the height of the bump BMP is compensated without extremely impairing the flatness even in the portion near the outermost periphery where the bump BMP is not formed.

FIG. 3 is a general view of wafer backside grinding. The semiconductor wafer 1 as described above is attached to the wafer holder 31.
The main surface side of 0 is held and the back surface side is pressed against the grinding member 32 and ground. The grinding member 32 is, for example, a rotary table on which abrasive grains for grinding are arranged. The back surface is ground for a predetermined time to reduce the original wafer thickness to about 50% to 40%.

When the wafer holder 31 is provided with the protective member, the protective tape 21 as shown in FIG. 2 may not be required, and even if it is held by the wafer holder 31 in the form of FIG. 1 (b). Good. When the wafer holder 31 has no protective member, the protective tape 21 of FIG.
And is held by the wafer holder 31.

According to the above structure, the thick region (141) of the coating material 14 is in a predetermined region near the outer periphery of the semiconductor wafer, that is, a portion where no bump is provided, and the bump height is compensated. Thereby, the protective tape 2
Regardless of whether or not 1 is attached, the uniformity of the holding force by the wafer holder 31 and the pressing force on the grinding member 32 at the time of grinding the back surface of the semiconductor wafer 10 is improved. Therefore, it contributes to the improvement of the in-plane uniformity of the wafer back surface grinding.

FIGS. 4A and 4B relate to a semiconductor device manufacturing method and a semiconductor wafer according to a second embodiment of the present invention, and show an electrode portion for external connection in the semiconductor wafer and a main portion showing the vicinity of the outermost periphery. FIG.

As shown in FIG. 4A, a pad 42 is formed on a semiconductor wafer 40 together with a predetermined wiring layer related to an integrated circuit. A protective film (passivation film) 43 is patterned and formed on the insulating film 41 and the peripheral portion on the pad 42 by using a lithography technique.
The protective film 43 is made of, for example, a silicon oxide film. Alternatively, it may be a nitride film. The protective film 43 is a silicon oxide film /
There are various conceivable methods such as a multilayer structure of a silicon nitride film.

Then, a predetermined region corresponding to the pad 42 in the protective film 43 is selectively opened by a lithography technique using a predetermined mask. Next, the metal layer 45 including at least a metal layer for diffusion prevention and a metal layer for adhesion and plating is coated on the pad 42 by a sputtering method. Although not shown, a metal layer for plating is also connected and coated on the protective film 43. Next, a resist for bump formation is formed through resist application and photolithography technology (not shown). Then, the metal layer for plating is used to perform metal plating on the pad 12 via the metal stack 45. The resist is removed and bumps BMP are provided on each pad 42.

Next, as shown in FIG. 4B, a protective tape 46 is attached to the entire main surface of the semiconductor wafer on which the bumps BMP are formed. The protective tape 46 is an insulating resin type electrostatic protective tape. In this embodiment, the portion of the protective tape 46 in the vicinity of the outermost periphery of the semiconductor wafer 40 where the bump BMP is not formed is compensated by a thickness equal to or close to the height of the bump BMP.

More specifically, the partial area tape 461 is disposed below the protective tape 46 in the compensation portion, and the vicinity of the outermost periphery where the bump BMP is not formed has an overlapping structure of the protective tape. The partial area tape 461 is the protective tape 4
The same material as 6 may be used. Alternatively, another material may be used.

According to the method of the above embodiment, the protective tape 46 together with the partial area tape 461 is attached to the semiconductor wafer 40. As a result, in the vicinity of the outermost periphery where the bump BMP is not formed, the partial area tape 461 compensates the thickness equal to or close to the height of the bump BMP. This contributes to the uniformization of the pressure in the surface when the back surface of the semiconductor wafer 10 is ground later.

FIG. 5 is a plan view showing the structure of the protective tape according to the embodiment of the present invention. The protective tape 46 and the partial area tape 461 shown in FIG. 4B are shown. For example, the protective tape 46 has a uniform thickness capable of protecting the bump BMP. The protective tape 46 has, for example, a width equal to or larger than the diameter of the semiconductor wafer 40, and further, the partial area tape 461 is annularly arranged so as to cover the vicinity of the outermost periphery where the bump BMP is not formed. The partial area tape 461 is attached to a predetermined position of the protective tape 46, and also contributes to the positioning of the tape on the semiconductor wafer 40. Both the protective tape 46 and the partial area tape 461 are cut according to the semiconductor wafer 40.

In addition, it is also possible to use one that has been previously cut into a circle suitable for the semiconductor wafer 40. Further, the protection tape 4 in which the partial area tape 461 does not come into contact with the wafer 40
The form formed on the upper part of 6 may be sufficient. The structure is shown in FIG. 6 as a modification of FIG.

According to the configuration of each of the above-described embodiments, the protective tape (46, 461) in the vicinity of the outermost periphery of the semiconductor wafer 40 where the bump BMP is not formed is thick, and the thickness equal to or close to the height of the bump BMP is provided. It will be a compensated form. Therefore, the flatness of the protective tape that can be attached to the entire surface of the wafer can be prevented from being extremely impaired.

FIG. 7 is a schematic view of wafer backside grinding. The protective tape (4
The main surface side of the semiconductor wafer 40 attached with 6, 461) is held and the back surface side is pressed against the grinding member 72 and ground. The grinding member 72 is, for example, a rotary table on which abrasive grains for grinding are arranged. The back surface is ground for a predetermined time to reduce the original wafer thickness to about 50% to 40%.

According to the above construction, the protective tape (46, 4
According to 61), the bump height is compensated. As a result, the uniformity of the pressing force applied to the grinding member 72 by the wafer holder 71 when the back surface of the semiconductor wafer 40 is ground is improved. Therefore, it contributes to the improvement of the in-plane uniformity of the wafer back surface grinding.

According to each of the above-described embodiments and methods, the grinding amount in the wafer outer peripheral region where the bump BMP is not formed is the same as that in the vicinity of the wafer center, and the IC chip obtained near the wafer outer peripheral region is obtained. However, the thickness will be within the standard range, and defects will be less likely to occur.

FIG. 8 is a plan view of a wafer on which strip-shaped chips are formed. Especially, when the IC chip is a rectangular chip that is long in one direction such as a liquid crystal driver, that is, a strip-shaped chip,
The difference in the thickness of one chip is significantly reduced. Even if it is obtained near the wafer outer peripheral region, there is no difference in thickness that exceeds the allowable range, and as a result, it greatly contributes to the improvement of the yield.

[0044]

As described above, according to the present invention, the coating material is devised by spin coating so as to have a thickness equal to or close to the height of the bump. Further, the portion of the protective tape near the outermost periphery where the bumps are not formed on the semiconductor wafer is thickened by overlapping the protective tapes to compensate the height of the bumps. In other words, the protective tape is formed in such a form that the vicinity of the outermost periphery where the bumps are not formed is compensated by a thickness equal to or close to the height of the bumps. As a result, it is possible to provide a method for manufacturing a semiconductor device, a semiconductor wafer, and a wafer protection tape, which allow the back surface of a semiconductor wafer to be ground more uniformly.

[Brief description of drawings]

1A and 1B relate to a method for manufacturing a semiconductor device and a semiconductor wafer according to a first embodiment of the present invention, showing an electrode portion for external connection and a main portion showing the vicinity of an outermost periphery of the semiconductor wafer. FIG.

FIG. 2 is a schematic view showing a structure in which a protective tape is attached to the structure of FIG. 1 (b).

FIG. 3 is a schematic view of wafer backside grinding.

4A and 4B relate to a semiconductor device manufacturing method and a semiconductor wafer according to a second embodiment of the present invention, showing an electrode portion for external connection in the semiconductor wafer and a main portion showing the vicinity of the outermost periphery. FIG.

FIG. 5 is a plan view showing a configuration of a protective tape according to an embodiment of the present invention.

FIG. 6 is a schematic view showing a modified example of FIG. 4 (b).

FIG. 7 is a schematic view of wafer backside grinding.

FIG. 8 is a plan view of a wafer on which strip-shaped chips are formed.

FIG. 9 is a cross-sectional view emphasizing the problem of backside grinding of a wafer.

FIG. 10 is a cross-sectional view of an IC chip showing the problem of backside grinding emphasized.

[Explanation of symbols]

10, 40 ... Semiconductor wafer 11, 41 ... Insulating film 12, 42 ... Pads, 13, 43 ... Protective film 14 ... Coating material (uppermost layer of protective film) 141 ... Residual pool (pool) 15, 45 ... Metal lamination 21,46 ... Protective tape 461 ... Tape for partial area 31, 71 ... Wafer holder 32, 72 ... Grinding member BMP ... bump

Claims (10)

[Claims] 1. A semiconductor wafer having a bump formed as an external connection terminal connected to an integrated circuit in each chip area on a main surface, comprising a step of spin-coating a coating material as an uppermost layer of a protective film before forming the bump, A method of manufacturing a semiconductor device, characterized in that the coating material is applied only near the outermost periphery of a semiconductor wafer so as to have a thickness equal to or close to the height of the bumps. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the entire main surface side of the semiconductor wafer is protected by a protective tape. 3. The manufacturing of a semiconductor device according to claim 1, further comprising a step of holding the main surface side of the semiconductor wafer and pressing the back surface side against a grinding member to perform grinding. Method. 4. A semiconductor wafer having a bump formed as an external connection terminal connected to an integrated circuit in each chip area on the main surface, comprising a step of applying a protective tape to the entire main surface side of the semiconductor wafer on which the bump is formed. A method for manufacturing a semiconductor device, comprising: compensating a portion of the protective tape near the outermost periphery where no bump is formed on the semiconductor wafer by a thickness equal to or close to the height of the bump. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the portion of the protective tape near the outermost periphery where the bumps are not formed on the semiconductor wafer is thickened by overlapping the protective tapes. 6. The method for manufacturing a semiconductor device according to claim 4, further comprising a step of holding the main surface side of the semiconductor wafer and pressing the back surface side against a grinding member to perform grinding. 7. A bump as an external connection terminal connected to an integrated circuit provided in each chip area on a main surface, and a coating material as an uppermost layer of a protective film around the bump, wherein the coating material is A semiconductor wafer having a thickness equal to or close to the height of the bump in a predetermined region other than the chip region. 8. The semiconductor wafer according to claim 7, wherein each of the chip regions has a strip shape, and the bumps are arranged around the strip shape. 9. A tape for whole area which is attached to the whole surface of the main surface of the semiconductor wafer to protect at least bumps on the main surface of the semiconductor wafer, and a tape for whole area in a predetermined area other than the chip area where the bump is not formed. Or a tape for partial area which compensates for a thickness equal to or close to the height of the bumps arranged above, the wafer protection tape. 10. The wafer protection tape according to claim 9, wherein the partial area tape has an annular shape that covers an area near the outermost periphery of the semiconductor wafer.