JP2003163597A - Pipeline a/d converter and its test method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pipeline A/D converter, which can conduct operation tests by selection of only before and after a discontinuity point, which input/ output characteristics of a unit block have, and reduce an operation test time for improvement in productivity. <P>SOLUTION: Unit blocks 11-1 to 11-4 and an A/D converter 12 are provided, and they handle a 14 bit digital signal outputted from an encoder 13, respectively. The unit block 11-1 comprises a sub A/D converter 14, a D/A converter 15, a subtracter 16, an amplifier 17, and a change-over switch 18. The change- over switch 18 inputs an output code of the sub A/D converter 14 and a test code inputted externally during a test into the D/A converter 15, selectively. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pipeline type A / D converter for A / D converting an analog signal into a digital signal, and a test method thereof.

[0002]

2. Description of the Related Art Conventionally, as a pipeline type A / D converter, for example, one shown in FIG. 6 is known. As shown in FIG. 6, this pipeline type A / D converter includes unit blocks 1-1 from the first stage to the fourth stage.
1 to 4 and the A / D converter 2 at the fifth stage, which are connected in cascade in a total of five stages.

In this pipeline type A / D converter, the unit blocks 1-1 to 1-4 and the A / D converter 2 have m ₁ = 3 among the 14-bit digital signals output from the encoder 3. Bit, m ₂ = 3 bit, m ₃
= 3 bits, m ₄ = 3 bits, m ₅ = 2 bits, respectively. Therefore, the encoder 3
From, a digital output signal of m ₁ + m ₂ + m ₃ + m ₄ + m ₅ = 14 bits can be obtained. Here, m ₁ is the uppermost side and m ₅ is the lowermost side.

Since the unit blocks 1-1 to 1-4 have the same structure, the structure of the unit block 1-1 will be described. That is, the unit block 1-1 includes a sub A / D converter 4 and a D / A converter 5 as shown in FIG.
And a subtractor 6 and an amplifier 7. Deputy A
The / D converter 4 converts the analog input signal Vin into (2
A / D conversion is performed into a digital signal of ^{m1 +} 1-1) values. That is, since m ₁ = 3 bits, the signal is converted into a 15-value digital signal. The digital signal is output to the encoder 3 and the D / A converter 5, respectively.

The D / A converter 5 D / A converts the 15-value digital signal from the sub A / D converter 4 into a corresponding analog signal Va and outputs the analog signal Va to the subtractor 6. The subtractor 6 subtracts the analog signal Va from the analog input signal Vin, and outputs the subtracted output signal (Vi
n-Va) is output to the amplifier 7. The amplifier 7 amplifies the output signal from the subtractor 6 by a predetermined factor and outputs it to the unit block 1-2 at the next stage.

Next, the sub-A of the unit block 1-1 of the first stage
Operations of the / D converter 4 and the sub A / D converter (not shown) of the second-stage unit block 1-2 will be described with reference to FIG. 7. In FIG. 7, each vertical axis represents the input range of the analog input signal of the sub A / D converter 4 of the first-stage unit block 1-1 and the sub-A / D converter of the second-stage unit block 1-2. It represents.

Now, as shown in the figure, the analog input signal V
Assuming that the value shown is in, the sub-A /
The conversion value (digital code) of the A / D conversion of the D converter 4 is “5”. The second-stage sub A / D converter is
In order to further A / D convert the range of “5”,
This part will be enlarged (amplified). There is an amplifier 7 for the purpose of this amplification. However, if the amplifier 7 simply amplifies the analog input signal Vin, the output signal of the amplifier 7 exceeds the input range of the second-stage sub A / D converter. Therefore, in order to match the input range, it is necessary to subtract a certain analog value by the subtractor 6 according to the A / D conversion result of the sub A / D converter 4. In this example, when the analog value corresponding to the digital value "4" is subtracted, the output of the amplifier 7 falls within the input range of the second-stage sub A / D converter. For this purpose, D / A
The converter 5 is required.

[0008]

By the way, in the conventional pipeline type A / D converter which operates as described above, the unit blocks 1-1 to 1-1 from the first stage to the fourth stage are provided.
The characteristic of the output signal with respect to the input signal of −4 is as shown in FIG. 8 and has a discontinuity point. That is, as shown in FIG. 8, the transition of the output code of the sub A / D converter 4 of the unit block becomes a discontinuity point.

Here, the numerical values 1, 2, 3, ... In FIG.
The digital code of the sub A / D converter 4 and the D / A converter 5 is shown. In this way, since the input / output characteristics of the unit block have discontinuity points as described above, there is a possibility that a code loss will occur at that discontinuity point, resulting in a defective product. It is necessary to test with a good product selection test. Here, the code lacking means that a particular digital code is missing without being output in the output code of the entire pipeline type A / D converter.

Now, when the analog input signal is exactly the voltage at the discontinuous point, the output signal Vout of the unit block 1-1 of the first stage becomes the upper pole or the lower pole of the sawtooth wave shown in FIG. It is unknown if it will be. However, the same code must be output as the output code of the entire A / D converter (since the inputs are the same, the same code is output if there is no circuit failure.) Therefore, the unit of the first stage Output signal Vo of block 1-1
The width of the discontinuity (the height of the tooth portion of the sawtooth) is designed so that the digital output code of the entire A / D converter is the same regardless of whether ut is the upper pole or the lower pole. There is.

However, if the width of the discontinuity point deviates from the design value due to a circuit failure, the digital output code of the A / D converter as a whole changes between the upper pole and the lower pole, and the digital value is changed by the amount of the change. The output code may not be output or may be output too much, which causes a problem. In addition, the place where the discontinuity point where the code loss may occur varies from product to product due to the random offset of the sub A / D converter or D / A converter,
It is difficult to predict where the discontinuity will be output.

Therefore, in the non-defective selection test of the conventional A / D converter, in order to cover the entire range of the input of the A / D converter, the analog input signal is changed in the entire range, and all codes are changed accordingly. I needed to check if it was output. As a result, conventionally, it took a long time to test the A / D converter. Therefore, in view of the above points, an object of the present invention is to enable an operation test by selecting only before and after the discontinuity point which the input / output characteristics of the unit block have, and shorten the operation test time to improve the productivity. An object of the present invention is to provide a pipeline type A / D converter and a test method therefor.

[0013]

In order to solve the above problems and achieve the object of the present invention, the inventions described in claims 1 to 3 are configured as follows. That is, claim 1
The invention described in [3] converts an analog input signal into a digital signal
Sub A / D converter for D / A conversion and D / A for D / A converting the A / D converted digital signal to an analog signal
An A converter and the D / A from the analog input signal
A unit block includes a subtracter that subtracts an analog signal output from the converter, and an amplifier that amplifies the output of the subtractor. One or more unit blocks are cascade-connected, and output from the final stage of the unit block. In a pipeline type A / D converter which is provided with an A / D converter for A / D converting an analog signal to be converted into a digital signal and is capable of obtaining a digital output of N bits as a whole, at least the unit block of the first stage It is characterized in that the input side of the D / A converter is provided with a selection means for selectively inputting a digital signal from the sub A / D converter of the unit block and an arbitrary digital signal. .

According to a second aspect of the present invention, in the pipeline type A / D converter according to the first aspect, the selecting means uses the digital signal from the sub A / D converter and the arbitrary test. It is characterized in that it comprises a changeover switch for switching between digital signals.
According to the inventions according to claims 1 and 2 having such a configuration, a test code for testing only before and after a discontinuity point in which a code loss is a problem among output signals of a unit block is provided. Can be set from outside. Therefore, it is possible to shorten the test time of the pipeline type A / D converter and improve the productivity.

According to a third aspect of the present invention, a sub A / D converter for A / D converting an analog input signal into a digital signal, and a D / A converter for converting the A / D converted digital signal into an analog signal. / A converter, a subtractor for subtracting the output analog signal of the D / A converter from the analog input signal, and an amplifier for amplifying the output of the subtractor as a unit block, and one or more unit blocks are provided. A pipe that is cascade-connected and that is equipped with an A / D converter that A / D converts an analog signal output from the final stage of the unit block into a digital signal so that an N-bit digital output can be obtained as a whole. Line type A
In the test method for the A / D converter, a predetermined code of the codes that can be taken by the output of the sub A / D converter of the unit block is input as the input of the D / A converter of the unit block at the first stage, and the analog input signal is input. Is changed within the test range corresponding to the predetermined code, and the first step of measuring the output code of the pipeline type A / D converter with respect to the change and the output of the sub A / D converter of the unit block at the first stage are While inputting the possible codes in order, at this time, the values corresponding to the respective codes are sequentially input as the analog input signal,
A second step of measuring the output code of the pipeline type A / D converter with respect to the change of the code.

According to the third aspect of the invention having such a configuration, the test time of the pipeline type A / D converter can be shortened and the productivity can be improved.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION The pipeline type A of the present invention is described below.
The configuration of the first embodiment of the / D converter will be described with reference to FIG. In the first embodiment, as shown in FIG. 1, the unit blocks 11-1 to 11-4 of the first to fourth stages are arranged.
11-4 and the A / D converter 12 of the fifth stage,
These are connected in cascade in five stages as a whole.

Further, in this pipeline type A / D converter, the unit blocks 11-1 to 11-4 and the A / D converter 12 have m ₁ = 3 among 14-bit digital signals output from the encoder 13. Bits, m ₂ = 3 bits, m ₃ bits = 3, m ₄ = 3 bits, m ₅ bits = 2
Are responsible for each. Therefore, from the encoder 13, m ₁ + m ₂ + m ₃ + m ₄ + m ₅ = 1
A 4-bit digital output signal can be obtained. Here, m ₁ is the uppermost side and m ₅ is the lowermost side.

The unit block 11-1 includes a sub A / D converter 14 and a D / A converter 15 as shown in FIG.
, Subtractor 16, amplifier 17, changeover switch 1
8 and. The sub A / D converter 14 is
The analog input signal Vi is A / D converted into a digital signal (digital code) of (2 ^{m1 + 1} +1) value. That is, since m ₁ = 3 bits, the digital signal is converted into a 17-value digital signal (see FIG. 2).

The sub A / D converter 14 is, for example,
A resistor (not shown) that equally divides the input range into 2 ^{m1 + 1} = 16, and 16 comparators (not shown) that determine the center of each of the divided ranges are included.
It outputs a 17-value digital code of "~ 16". A changeover switch 18 is arranged between the sub A / D converter 14 and the D / A converter 15. The changeover switch 18 includes an output digital code D1 of the sub A / D converter 14 and a test digital code D2 input from the outside during a test as described later.
And are selectively input to the D / A converter 15.

Further, the output digital code D1 and the test digital code D2 of the sub A / D converter 14, which are selectively input to the D / A converter 15 by the changeover switch 18, are supplied to the encoder 13. It has become. The D / A converter 15 converts the 17-value digital code D1 from the sub A / D converter 14 or the test digital code D2 input from the outside into an analog signal Va and outputs the analog signal Va to the subtractor 16. ing.

The subtractor 16 subtracts the analog signal Va from the analog input signal Vin and outputs the subtracted output signal (Vin-Va) to the amplifier 17. The amplifier 17 amplifies the output signal from the subtractor 16 by a predetermined factor (8 times) and outputs the amplified signal to the unit block 11-2 at the next stage. Unit blocks 11-2 to 11
-4 has the same configuration, the unit block 11-2 will be described.

As shown in FIG. 1, the unit block 11-2 includes a sub A / D converter 24 and a D / A converter 25.
, A subtractor 26, and an amplifier 27. This configuration is similar to the unit block 1-2 in FIG. That is, the sub-A / D converter 24 operates the analog input signal Vi.
^Is A / D converted into a digital signal of (2 ^{m2 + 1} -1) value. That is, since m ₂ = 3 bits, 15
It is designed to be converted into a digital signal of value. The digital signal is sent to the encoder 13 and the D / A converter 25.
And are output respectively.

The D / A converter 25 D / A converts the 15-value digital signal from the sub A / D converter 24 into a corresponding analog signal and outputs the analog signal to the subtractor 26. The subtracter 26 outputs D from the output signal of the amplifier 17.
The output analog signal of the / A converter 25 is subtracted, and the subtracted output signal is output to the amplifier 27. The amplifier 27 outputs the output signal from the subtractor 26 to 8
The signal is amplified twice and output to the unit block 11-3 at the next stage.

Next, in the first embodiment having such a configuration, normal operation of the unit block 11-1 in the first stage and the unit block 11-2 in the second stage will be described with reference to FIGS.
This will be described with reference to FIG. During this normal operation, the changeover contact of the changeover switch 18 is in the position shown in FIG.
In FIG. 2, each vertical axis represents the unit block 11-1 in the first stage.
Secondary A / D converter 14 and second-stage unit block 1
The input ranges of the analog input signals of the sub-A / D converters 1-2 are shown respectively.

When the analog input signal Vin is input to the sub A / D converter 14 of the unit block 11-1 shown in FIG. 1, the sub A / D converter 14 responds to the magnitude of the analog input signal Vin. And converts it to a digital code D1 of "0 to 16". For example, analog input signal V
When in has a value as shown in FIG. 2, the corresponding digital code D1 is "5". The D / A converter 15 converts the digital code D1 into an analog signal Va represented by the following equation (1).

Va = D1 × (Vref / 8) (1) where Vref in the equation (1) is the D / A converter 15
Is a reference voltage that determines the gain of the. The subtractor 16 subtracts the analog signal Va from the analog input signal Vin,
The subtracted output signal (Vin-Va) is applied to the amplifier 1
Output to 7. The amplifier 17 amplifies the output signal from the subtractor 16 by a factor of 8. Therefore, the output signal Vout of the unit block 11-1 is expressed by the following equation (2).

Vout = 8 × [Vin−D1 × (Vref / 8)] = 8 × Vin−D1 × Vref ... (2) In this embodiment that operates as described above, the unit of the first stage The output signal Vout of the block 11-1 has the characteristics shown in FIG. 3 with respect to the analog input signal Vin. Here, the numerical values 0, 1, 2, 3, ... Show digital codes of the sub A / D converter 14 and the D / A converter 15, which are “0” and “16” as compared with the conventional one. Has been added (see FIG. 8).

As can be seen from FIG. 3, the output signal range of the amplifier 17 is as shown in B, which can be halved compared to the output signal range A in the conventional case.
The output amplitude required for 7 can be halved from the conventional one. Therefore, according to this embodiment, since the power supply voltage of the amplifier 17 can be significantly reduced, it is possible to realize low power consumption. Next, in this embodiment, a test method for an operation test as to whether or not the operation is normal will be described with reference to FIGS. 1 and 4.

FIG. 4 shows the relationship of the above equation (2), in which the output signal V1 at the output digital code D1 (0 to 16) of the sub A / D converter 14 changes.
There is a discontinuity point of out. Before and after this discontinuity,
If there is a difference between the output codes of the 14-bit A / D converter, code loss will occur. Therefore, during the operation test,
The changeover contact of the changeover switch 18 is changed over to the side opposite to that shown in FIG. 1, and the test digital code D2 is inputted to the D / A converter 15 via the changeover switch 18.

In the operation test of the first embodiment, a discontinuity point is arbitrarily generated, and it is confirmed that there is no change in the output code of the 14-bit A / D converter before and after the discontinuity point. Make sure there are no missing codes. Next, a specific test procedure will be described below. (1) The changeover contact of the changeover switch 18 is changed over to the side opposite to that shown in FIG. (2) Check whether the lower 11 bits are operating normally.

The value of the test digital code D2 is set to D2 = 8.
And the analog input signal Vin is the range of the test range Vtest shown in FIG. 4 (the range of the test digital code D2).
Change with. Then, it is confirmed whether or not all the output digital codes of the lower 11 bits are output from the encoder 13 in response to the change. As a result, when all the codes of the lower 11 bits are output from the encoder 13, the unit blocks 11-2 to
11-4 and the operation of the A / D converter 12 are normal.

The same circuit is used for the lower 11 bits not only for the above test range Vtest but also for the analog input signal Vin in other ranges. Therefore, if the test is performed in the test range Vtest, other circuits are used. No range testing is necessary. (3) At the point that the test code D2 changes from D2 = 0 to D2 = 1, it is confirmed whether the output digital codes of the encoder 13 are the same. At this time, the analog input signal Vin is set to Vin≈V1 (see FIG. 4), and D2 = 0
And 1 output from the encoder 13 when D2 = 1
Each output digital code as 4 bits is measured, and it is confirmed whether or not both output digital codes are the same.

In this case, if the two output digital codes do not match, it becomes defective. (4) Furthermore, the test code D2 changes from D2 = 1 to D2.
= 2, D2 = 2 to D2 = 3, ... D2 = 15 to D2
As for (3), whether or not the output digital code of the encoder 13 is the same is also confirmed at the point of change to = 16. At this time, D2 = 1 to D
When 2 = 2, Vin≈V2, and when D2 = 2 to D2 = 3, Vin≈V3.
Must be changed.

By the tests (1) to (4) as described above, it can be confirmed whether all the 14-bit output digital codes to be output from the encoder 13 according to the analog input signal Vin are output. it can. In this case,
Most of the test time is the time required for the operation test of the lower 11 bits in (2). On the other hand, the conventional test method does not require the tests (1), (3), and (4). However, in (2), the analog input signal V
in test range Vtest to the auxiliary A / D converter 14
Is equivalent to confirming that all 14-bit output codes are output from the encoder 13, so that the test range Vtest is about 8 times wider.

Therefore, according to the operation test of the first embodiment, the time required for the operation test can be shortened to 1/8 as compared with the conventional case. Next, the pipeline type A / D of the present invention
The configuration of the second embodiment of the converter will be described with reference to FIG. In the second embodiment, the unit block 11-1 of the first embodiment shown in FIG. 1 is replaced with a unit block 11-1A as shown in FIG.

That is, the unit block 1 of the second embodiment
1-1A is a sub A / D converter 1 as shown in FIG.
4A, a D / A converter 15A, a subtractor 16, an amplifier 17, and a changeover switch 18. The sub A / D converter 14 receives the analog input signal Vi
n is A / D converted into a digital signal (digital code) of (2 ^{m1 + 1} -1) value. That is, m ₁ = 3
Since it is a bit, it is adapted to be converted into a 15-value digital signal.

Further, the sub A / D converter 14A and the D / A
A changeover switch 18 is arranged between the converter 15A and the converter 15A. This changeover switch 18 is a sub A /
The output digital code D1 of the D converter 14A and the test digital code D2 input from the outside during the test are selectively input to the D / A converter 15A. Further, the changeover switch 18 selectively D /
Sub A / D converter 1 input to A converter 15A
The output digital code D1 of 4A and the test digital code D2 are supplied to the encoder 13A.

The D / A converter 15A converts the 15-value digital code D1 from the sub A / D converter 14A or the test digital code D2 input from the outside into an analog signal Va and outputs it to the subtractor 16. It is like this. The subtractor 16 subtracts the analog signal Va from the analog input signal Vin and outputs the subtracted output signal (Vin-Va) to the amplifier 17. The amplifier 17 amplifies the output signal from the subtractor 16 by a factor of 8 and outputs it to the unit block 11-2 at the next stage.

The configuration of the other parts of the second embodiment is the same as that of the first embodiment of FIG. 1, and the description thereof will be omitted. In the second embodiment having the above configuration, the operation test can be performed by the same procedure as in the first embodiment. Therefore, the time required for the operation test can be shortened to about 1/8 that of the conventional case.

[0041]

As described above, according to the pipeline type A / D converter of the present invention, it is possible to test only the output signal of a unit block before and after a discontinuity point where a code loss is a problem. The test code can be entered externally. Therefore, it is possible to shorten the operation test time of the pipeline type A / D converter and improve the productivity.

Further, according to the test method of the present invention, it is possible to shorten the operation test time of the pipeline type A / D converter and improve the productivity.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment of a pipeline type A / D converter of the present invention.

FIG. 2 is an explanatory diagram illustrating an operation of a sub A / D converter or the like of the unit block at the first stage in FIG.

FIG. 3 is a characteristic diagram showing the relationship between the input and output of the unit block in the first stage of FIG.

FIG. 4 is a diagram for explaining a method of an operation test according to the first embodiment.

FIG. 5 is a block diagram showing a configuration of a second embodiment of a pipeline type A / D converter of the present invention.

FIG. 6 is a block diagram showing a configuration of a conventional pipeline type A / D converter.

FIG. 7 is an explanatory diagram illustrating an operation of the sub A / D converter and the like of the unit block at the first stage in FIG.

8 is a characteristic diagram showing the relationship between the input and output of the unit block at the first stage of FIG.

[Explanation of symbols]

11-1 to 11-4 Unit block 12 A / D converter 13,13A encoder 14, 24 Sub A / D converter 15, 25 D / A converter 16,26 Subtractor 17, 18 amplifier

Claims (3)

[Claims] 1. An analog input signal is converted into a digital signal by A / A.
Sub A / D converter for D conversion and D / A for D / A conversion of the A / D converted digital signal into an analog signal
A converter, a subtracter that subtracts the analog output signal of the D / A converter from the analog input signal, and an amplifier that amplifies the output of the subtractor as a unit block,
One or a plurality of the unit blocks are connected in cascade, and an A / D converter for A / D converting an analog signal output from the final stage of the unit block into a digital signal is provided, and an N-bit digital output as a whole. In a pipeline type A / D converter capable of obtaining the following, at least the input side of the D / A converter of the unit block at the first stage and the digital signal from the sub A / D converter of the unit block and an arbitrary digital signal A pipeline type A / D converter characterized in that selection means for selectively inputting a signal and is provided. 2. The pipeline according to claim 1, wherein the selection means includes a changeover switch that switches between the digital signal from the sub A / D converter and the digital signal for the arbitrary test. Type A / D converter. 3. An analog input signal is converted into a digital signal by A / A.
Sub A / D converter for D conversion and D / A for D / A conversion of the A / D converted digital signal into an analog signal
A converter, a subtracter that subtracts the analog output signal of the D / A converter from the analog input signal, and an amplifier that amplifies the output of the subtractor as a unit block,
One or a plurality of the unit blocks are connected in cascade, and an A / D converter for A / D converting an analog signal output from the final stage of the unit block into a digital signal is provided, and an N-bit digital output as a whole. In the method for testing a pipeline type A / D converter, the code of the output of the sub A / D converter of the unit block can be used as the input of the D / A converter of the unit block at the first stage. A first step of inputting a predetermined code, changing the analog input signal within a test range corresponding to the predetermined code, and measuring an output code of the pipeline type A / D converter with respect to the change; The codes that can be taken by the output of the sub A / D converter of the unit block are sequentially input, while the analog code The value corresponding to the respective code as an input signal to be inputted in order, the second to measure the output code of the pipeline type A / D converter with respect to the change of the code
The method for testing a pipeline type A / D converter, which comprises: