JP2003163467A - Printed wiring board and device for aiding design of printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed wiring board allowed to be applied also to a circuit board to be driven at a high speed and capable of suppressing the radiation of electromagnetic waves and preventing the reduction of packaging density and a printed wiring board design aiding device. <P>SOLUTION: The printed wiring board 10 is formed by laminating a 1st signal wiring layer 12, a 1st ground layer 14 having a 1st power supply line 26, a 2nd ground layer 16 having a 2nd power supply line 30, and a 2nd signal wiring layer 18. The 1st and 2nd ground layers 14, 16 are inter-layer connected through many via holes 22. A signal wiring 80 connecting an IC 40 to an IC 42 intersects with the 1st power supply line 26. A return current corresponding to a signal current allowed to flow into the signal line 80 is allowed to flow into the 1st ground layer 14, its route is interrupted on the position of the 1st power supply line 26 but is by-passed and the return current is allowed to flow into the 2nd ground layer 16 through the via holes 22. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a printed wiring board design support device, and more particularly to a printed wiring board and a printed wiring board design support device used in electronic equipment such as information equipment.

[0002]

2. Description of the Related Art Electromagnetic noise radiated from various electronic devices such as information devices, which has been a problem in the past, is mainly caused by a clock signal on a printed wiring board or a signal line of a digital signal synchronized with the clock signal. It has been considered that various electromagnetic radiation preventing measures have been taken for the signal line on the printed wiring board, the wire harness connected to the signal line, and the like.

For example, a damping resistor or a filter is added to the signal output line to smooth the rising and falling edges of the output signal, or a guard pattern having a ground potential is arranged near the signal line to reduce the feedback current loop. Measures such as taking measures are widely performed in general.

The electromagnetic wave observed on the printed wiring board has a frequency distribution different from that predicted from the current distribution on the signal line, and has a sharp peak at a specific frequency regardless of the property of the signal line. There is something. As described in Japanese Patent No. 3036629, the main cause of this electromagnetic wave generation is not in the signal line of the printed wiring board but in the power supply system, and the electrical resonance generated in the opposing power supply layer and ground layer is caused. Known to be.

On the other hand, in Japanese Patent No. 3036629, in order to reduce the reflectance of the resonance current at the end of the printed wiring board, a plurality of first capacitors are arranged at the end of the printed wiring board. A second capacitor for suppressing a loop current flowing between the first capacitor and an active element such as an IC mounted on a printed wiring board at a power supply terminal of the active element or a power supply layer in the vicinity thereof. There is disclosed a technique for connecting between the ground layer and the ground layer.

However, in the technique disclosed in Japanese Patent No. 3036629, since the capacitor itself and the inductance due to the mounting of the capacitor are present, there is no effect on a high frequency resonance current whose frequency exceeds about 1 GHz, for example. Further, there is a problem that the resonance current cannot be completely eliminated even in a low frequency band, and the electromagnetic wave radiated from the end portion of the printed wiring board cannot be completely suppressed.

Further, the radiation source of electromagnetic wave radiation caused by the power supply system of the printed wiring board is a current flowing through the power supply wiring of the digital IC when the digital IC mounted on the printed wiring board is driven. Therefore, Patent No. 27
According to the technique disclosed in Japanese Patent No. 34447, a branch having a zigzag shape or a cross shape is formed so that the high-frequency impedance becomes high for the purpose of separating the power supply surface of the printed wiring board from the digital IC in high frequency. By forming the wiring and forming the insulating material on the upper and lower sides of the power supply surface with a material containing a magnetic material, the high frequency power supply current flowing into the power supply surface is reduced.

As a technique having the same effect as the technique described in Japanese Patent No. 2734447, Japanese Patent Publication No. 7-
In Japanese Patent No. 46748, a printed wiring board is provided with a sub power supply surface that is physically separated from the main power supply surface, the main power supply surface and the sub power supply surface are connected through a filter, and the sub power supply surface is formed by a plurality of capacitors. A technique for decoupling on the ground plane to supply power is disclosed.

However, in the techniques disclosed in Japanese Patent No. 2734447 and Japanese Patent Publication No. 7-46748, high-frequency waves flowing between the power supply surface and the ground surface, like the technology described in Japanese Patent No. 3036629. The current cannot be completely suppressed, and the electromagnetic waves emitted from the end of the printed wiring board cannot be completely suppressed. Also, by providing a decoupling capacitor on the sub power supply surface, the impedance to the ground surface of the main power supply surface, which causes electromagnetic radiation, becomes rather large, so a separate capacitor must be provided on the main power supply surface. There is a secondary problem that the stability of the potential on the ground surface deteriorates as the number of points increases.

That is, by adding a large number of capacitors for connecting the power supply surface and the ground surface, a large number of openings (clearances) are formed in the ground surface for passing via holes connecting the capacitor pads and the power supply surface. Ideally, the ground plane does not have a potential difference at each site on the ground plane, but since multiple openings are provided close to each other, inductance is generated in the area between the openings, and both ends are A potential difference is generated at. Furthermore, since a large number of openings are provided to reduce the metal area of the ground plane, the stability of the potential of the entire ground plane is impaired.

Further, as a factor of electromagnetic wave radiation of the printed wiring board, common mode noise caused by imperfect return current flowing through the signal line and radiation noise caused by loop current are also problems.

Japanese Laid-Open Patent Publication No. 11-233951 discloses that a power supply layer is divided into a main power supply surface and a sub power supply surface, so that a return current path of a current flowing through a signal line is cut off. A technique is disclosed in which a layer is connected to a ground layer with a capacitor, and a high-frequency return current is bypassed to the ground layer.

However, JP-A-11-233951
In the technique disclosed in the publication, the return current is bypassed by connecting the main power supply surface and the sub power supply surface, which are arranged in the same layer, with two capacitors in high frequency, so that the inductance component of the capacitor itself In addition, the inductance component of the via hole for connecting the capacitor between the power supply layer and the ground layer and the pad for connecting the via hole and the wiring is inserted in series in the return current path, and therefore, for example, several GHz. In the above high frequency range, the inductance cannot be sufficiently low.

Further, Japanese Patent Laid-Open No. 11-330703 discloses a printed wiring board in which a plurality of ground layers are sandwiched by a plurality of mixed layers in which signal lines and power supply wirings are arranged in the same layer. A technique for suppressing electromagnetic wave radiation is disclosed by connecting a plurality of via holes, and by making the return current path when a current flows through a plurality of mixed layers continuous so as to reduce the loop formed by the return current. There is.

However, Japanese Patent Laid-Open No. 11-330703
In the technology described in the publication, since the signal line and the power supply wiring are arranged in the same layer, the degree of freedom in design is remarkably reduced, and high-speed operating components and wiring, which have been increasingly demanded in recent years, are densely packed. There was a problem that it would be difficult to place them. Also, when power is supplied by wiring, in recent years,
Place a capacitor for decoupling near the device that serves as the radiation source to decouple and confine transient currents with high-frequency components, and place a filter to prevent high-frequency current from flowing on the power wiring. Generally, it is not necessary to consider the return current on the ground layer.

[0016]

As described above, in a printed wiring board having a structure in which the power supply layer and the ground layer face each other and the facing area is large, the resonance current flowing in the power supply layer and the ground layer is almost symmetrical. Electromagnetic radiation from the edge of the substrate is dominant, but it has no effect on high-frequency resonance currents with frequencies exceeding 1 GHz, and it is completely effective against low-frequency resonance currents. I can't. On the other hand, the operating speed of digital circuits has been increasing more and more in recent years, and the frequency in question has been increasing.

In order to transmit a high frequency signal on the printed wiring board, it is necessary to lower the impedance of the signal wiring and ensure the stability of the potentials of the power supply surface and the ground surface through which the return current for the signal wiring flows. Indispensable.

In order to lower the impedance of the signal wiring in the printed wiring board having a structure in which the power supply layer and the ground layer are opposed to each other and are arranged in the inner layer, the distance between the power supply layer and the ground layer is increased, or It is necessary to provide a plurality of power supply layers and ground layers. In the former case, there is a problem that the electromagnetic wave radiation due to the resonance current is large, and in the latter case, the cost is high.

Further, in recent years, there has been a strong demand for miniaturization of printed wiring boards as well as speeding up of circuits, and wiring layers for wiring signal lines are filled up with signal lines such as bus lines. Therefore, in order to prevent the electromagnetic wave radiation due to the resonance current, if the wiring for supplying the power is provided to the wiring layer without providing the power supply layer in the inner layer, the packaging density must be reduced. was there.

The present invention has been made to solve the above problems, is applicable to a circuit board operating at high speed, can suppress electromagnetic wave radiation, and can prevent a decrease in mounting density. An object of the present invention is to provide a printed wiring board and a printed wiring board design support device that can be used.

[0021]

In order to achieve the above object, a printed wiring board according to the present invention is a signal wiring layer for wiring a signal line, a first ground layer for forming a ground region, and a first ground layer. In a printed wiring board in which two ground layers are laminated with an insulating layer interposed therebetween, the first
A plurality of interlayer connecting members that electrically connect a ground region formed in the ground layer and a ground region formed in the second ground layer, and the first ground layer and the second ground. And a power supply line wired in at least one of the layers.

The printed wiring board has a structure in which a signal wiring layer for wiring a signal line, a first ground layer for forming a ground region, and a second ground layer are laminated via an insulating layer, respectively. The ground region of the first ground layer and the ground region of the second ground layer are electrically connected by a plurality of interlayer connection members so as to have substantially the same potential, for example.

A power supply line is wired in at least one of the first ground layer and the second ground layer independently of the ground region. That is, at least one of the first ground layer and the second ground layer has, for example, a ground region having a relatively large area, and a linear power supply pattern having a smaller area than the ground region and separated from the ground region. ,,.

As described above, since the power supply line is provided in at least one of the first ground layer and the second ground layer, resonance in a substrate having a conventional structure in which the power supply layer and the ground layer are opposed to each other. Electromagnetic radiation due to electric current can be reduced.

Further, for example, in the case of a structure in which a signal wiring layer in which a signal line is wired, a first ground layer having a power supply line, and a second ground layer are laminated in this order, the signal line wired in the signal wiring layer When the signal current flows in the first ground layer, the return current flows in the portion corresponding to the signal line in the first ground layer, that is, on the projection line for the first ground layer. That is, the projection line is the position where the return current should flow.

Here, when the power supply line and the signal line are arranged so that the power supply line provided in the first ground layer and the projection line of the signal line with respect to the first ground layer intersect,
The return current flowing on the first ground layer is interrupted at the position of the power supply line, but since the first ground layer and the second ground layer are connected by a plurality of interlayer connection members, the impedance is low. Since it can be diverted to the second ground layer, electromagnetic wave radiation can be suppressed.

As described above, since the first ground layer and the second ground layer are connected by the plurality of interlayer connecting members, it is possible to secure the path through which the return current of the current flowing through the signal line flows.

It should be noted that the shorter the path through which the return current flows, the more the electromagnetic wave emission can be suppressed.
As also described above, the signal line wiring layer includes a first signal wiring layer and a second signal wiring layer, and the power line includes a first power line and a second power line in the first ground layer. A second power supply line is included in the ground layer, the first signal wiring layer is disposed adjacent to the first ground layer via the insulating layer, and the second signal wiring layer is provided in the second signal wiring layer. It is preferable to be configured to be adjacent to the ground layer via the insulating layer. That is, the first signal wiring layer,
A first ground layer in which the first power supply line is wired, a second ground layer in which the second power supply line is wired, and a second signal wiring layer are laminated with an insulating layer interposed between them. , The first signal wiring layer is arranged adjacent to the first ground layer via the insulating layer, and the second signal wiring layer is arranged adjacent to the second ground layer via the insulating layer. It has a different configuration.

As described above, the first signal wiring layer is arranged adjacent to the first ground layer with the insulating layer interposed therebetween, and
With the configuration in which the second signal wiring layer is disposed adjacent to the second ground layer with the insulating layer interposed therebetween, it is possible to shorten the path through which each return current flows, and further suppress electromagnetic wave radiation. be able to. Moreover, since the first power supply line and the second power supply line are respectively wired in different ground layers, they can be freely wired to each other.
It is also possible to provide wiring in which the projection line of the power supply line for the second ground layer and the second power supply line intersect.

The inter-layer connection members are provided at predetermined intervals, for example, as described in claim 2. For example, a large number are provided at substantially equal intervals. Thereby, the first ground layer and the second ground layer
It is possible to make it closer to the same potential as the ground layer of, and to shorten the return current path,
Electromagnetic radiation can be further suppressed.

As described in claim 3, the predetermined interval is such that the propagation velocity of the standing wave on the ground region is c, the relative dielectric constant of the insulating layer is εr, and the electromagnetic wave of interest is radiated. If the maximum frequency is f, then c / (2 × f × εr
It is preferable to set it to be ^1/2 ) or less. By arranging the interlayer connecting members at such intervals, it is possible to effectively suppress electromagnetic wave radiation for various frequencies.

Further, as described in claim 4, the interlayer connecting member may be further provided along at least one of a peripheral edge portion and an inner edge portion of the ground region.

That is, when a potential difference is generated between the end portion of the ground region and the other ground region, electromagnetic wave radiation is generated from the end portion of the substrate, so that the peripheral portion of the ground region, that is, the outer edge and the inner edge portion of the ground region, that is, the ground region. When the opening exists, an interlayer connecting member is arranged along the peripheral edge of the opening to connect the first ground region and the second ground region to each other. As a result, it is possible to suppress electromagnetic wave emission from the edge of the substrate.

Further, as described in claim 5, it is preferable that the ground region exists at a position of a projection line of the power supply line wired in one ground layer with respect to the other ground layer. . With such a configuration, when the path of the return current flowing through one of the ground layers is interrupted at the position of the power supply line and diverted to the other ground layer, the projection line of the power supply line to the other ground layer is cut off. Since the ground region exists at the position, the return current does not make a detour and flows in the shortest path, so that electromagnetic wave emission can be suppressed.

Further, as described in claim 6, the signal wiring layer may be provided between the first ground layer and the second ground layer. Since the signal wiring layer is sandwiched between the first ground layer and the second ground layer in this manner, the impedance of the signal line wired in the signal wiring layer can be made lower, and thus the speed is higher. A signal can be passed through the signal line. In addition, the signal line is sandwiched between the first ground layer and the second ground layer that are connected by a plurality of interlayer connecting members so that the signal lines have substantially the same potential, so that electromagnetic wave radiation by the signal line is shielded, It is possible to reduce electromagnetic radiation to the.

Further, as described in claim 7, the power supply line and the power supply line provided in the ground layer on the signal line side and the projection line of the signal line with respect to the ground layer intersect each other. The signal lines may be respectively arranged, and the plurality of interlayer connection members may be respectively arranged near both sides of the power supply line. As a result, the return current flowing through one of the ground layers can be diverted to the other ground layer through a shorter path, and the path of the return current can be further shortened, so that electromagnetic wave radiation can be reliably suppressed. .

Further, as described in claim 8, the power supply line and the power supply line provided on the ground layer on the signal line side and the projection line of the signal line on the ground layer do not intersect with each other. The signal lines may be arranged individually. For example, in the case of a configuration in which a signal wiring layer in which a signal line is wired, a first ground layer having a power supply line, and a second ground layer are laminated in this order, a signal current is applied to the signal line wired in the signal wiring layer. When flowing, the first ground layer,
Although the return current flows on the projection line of the signal line, the return current path is not interrupted by wiring the power supply line and the signal line so that the power supply line and the projection line of the signal line do not intersect with each other. For this reason, the return current can flow in the position where the return current should flow, that is, on the projection line of the signal line, so that the return current can flow in the shortest path and electromagnetic wave radiation can be suppressed.

In this case, as described in claim 9,
The signal wiring layer is provided on both the first ground layer side and the second ground layer side, and the power supply line is provided on both the first ground layer and the second ground layer. , At least a part of the first power supply line provided on the first ground layer and at least a projection line of the first signal line formed on the first signal wiring layer with respect to the first ground layer. The first power supply line and the first signal line are arranged so as to be substantially parallel to a part thereof, and at least a part of the second power supply line provided in the second ground layer and the second power supply line are provided. The second formed on the second signal wiring layer
The second power supply line and the second signal line may be arranged such that at least a part of the projection line of the signal line with respect to the second ground layer is substantially parallel.

According to the present invention, the signal wiring layer is provided on both the first ground layer side and the second ground layer side, and the power supply line is provided on both the first ground layer and the second ground layer. It is provided. That is, for example, the first signal wiring layer, the first ground layer having the first power supply line, the second ground layer having the second power supply line, and the second signal wiring layer are laminated. . The first power supply line and the first signal line are arranged such that at least a part of the first power supply line and at least a part of the projection line of the first signal line are substantially parallel to each other, and The second power supply line and the second signal line are arranged so that at least a part of the power supply line and at least a part of the projection line of the second signal line are substantially parallel to each other. That is,
In the relationship between the adjacent signal wiring layer and the ground layer, the power supply line and the signal line are arranged so that at least a part of the power supply line and at least a part of the projection line of the signal line are substantially parallel to each other. Accordingly, it is possible to prevent the power supply line and the projection line of the signal line from intersecting each other more reliably.

The power supply line may be provided on the first ground layer, and the power supply line having a supply voltage different from that of the power supply line provided on the first ground layer may be provided on the second ground layer. .

As described above, by wiring the power supply lines having different supply voltages to the different ground layers, the power supply lines can be freely wired in the respective ground layers, and the degree of freedom in design can be increased.

By the way, when the power supply line is arranged at the end of the substrate, electromagnetic radiation may increase. Therefore, the invention according to claim 11 is characterized in that the power supply line is disposed inside from the end portion of the substrate with the ground region interposed therebetween.

That is, the power supply line is arranged inside so as to be surrounded by the ground region. The larger the distance from the substrate end to the power supply line, the more effectively the electromagnetic radiation can be suppressed.

Further, when a noise current caused by an IC or the like arranged on the substrate propagates through the power supply line, it may be repeatedly reflected at the end of the power supply line, and electromagnetic radiation may occur due to one-dimensional resonance.

Therefore, the invention according to claim 12 is a print in which a signal wiring layer for wiring a signal line, a first ground layer and a second ground layer forming a ground region are laminated with an insulating layer interposed therebetween. In the wiring board, the first
A plurality of interlayer connecting members that electrically connect a ground region formed in the ground layer and a ground region formed in the second ground layer, and the first ground layer and the second ground. A power line wired in at least one of the layers, and near the terminal end of the power line, and between the power line and at least one ground region of the first ground layer and the second ground layer. And a terminating element having impedance matching the characteristic impedance of the power supply line.

That is, for example, between the power supply line and the ground region of the ground layer facing the ground layer in which the power supply line is wired, the ground region of the ground layer in which the power supply line is wired, and the power supply line adjacent to the ground region. , And a terminating element having an impedance matching the characteristic impedance of the power supply line is connected between the ground regions of both ground layers and the power supply line. As a result, it is possible to suppress electromagnetic wave radiation due to reflection that occurs at the end of the power line. Here, it is preferable that the impedance of the terminating element perfectly matches the characteristic impedance of the power supply line and is perfectly matched, but if the effect of suppressing electromagnetic wave radiation is more effective than when there is no terminating element and the impedance is not matched. Is included in the meaning of "matching" even if the matching is incomplete.

The terminating element may be configured to include a resistor and a capacitor connected in series, for example, as described in claim 13.

According to a fourteenth aspect of the present invention, the power supply line is
It is characterized in that it comprises a main power supply line and a branch power supply line branched from the main power supply line, and the terminating element is connected to an end portion of the main power supply line.

Here, the main power supply line is, for example, a main power supply line for supplying power to each component, is a power supply line longer than the branch power supply line, and may be branched into a plurality of lines. The branch power supply line is shorter than the main power supply line, and supplies the power supplied to the main power supply line to each component.

By connecting the terminating element to the main power supply line in this way, it is possible to suppress electromagnetic wave radiation due to reflection that occurs at the end of the main power supply line.

Further, when the branch power supply line is sufficiently shorter than the main power supply line, electromagnetic wave radiation due to reflection generated at the end of the branch power supply line does not pose a problem, but when the branch power supply line becomes long. As described in claim 15, it is preferable that the terminating element is connected to the terminating end of the branch power supply line. Thereby, electromagnetic wave radiation can be effectively suppressed.

The signal wiring layer may be formed in the same layer as at least one of the first ground layer and the second ground layer. That is, the signal wiring layer and at least one of the first ground layer and the second ground layer are shared in the same layer, and the signal line is wired in at least one layer of the first ground layer and the second ground layer. To do. 2 like this
The above invention can be applied to a layered substrate as well.

Further, as described in claim 17, the power supply line comprises a backbone power supply line and a plurality of branch power supply lines branched from the backbone power supply line, and the width of the power supply line is the branch power supply line. It is preferable to set it based on each of the predetermined maximum current values of the devices that are connected to each other and operate by the power source supplied from the main power source line.

The width of the power supply line is set as follows, for example. For example, from the maximum current value of the device connected to each branch power line, that is, the maximum current value required by the device, the current value flowing into the node that is the intersection of the main power line and the branch power line About each.
Then, when the maximum current value among the obtained current values is applied to the power supply line, the temperature rise of the power supply line becomes a predetermined value or less and the potential difference between the nodes becomes a predetermined value or less. Width is determined.

Specifically, for example, from the predetermined correspondence between the width of the power supply line and the current value that can be passed through the power supply line having this width, the maximum current value among the obtained current values is corresponded. It is set by finding the width.

As described above, by setting the width of the power supply line to the width corresponding to the maximum current value of the current flowing into each node, it is possible to stably supply power to each device and to radiate electromagnetic waves. It can be effectively suppressed.

Further, as described in claim 18, the power supply line is composed of a main power supply line and a plurality of branch power supply lines branched from the main power supply line. 1 and a second length from the end of the second branch power supply line to which the device operated by the power supplied from the main power supply line is connected to the end of the first branch power supply line, Where the second length is an odd number n (n = 1,
3,5) divided by an odd number of times m (m = 3, 5, 7;
It is preferable that the length is set to a size excluding the length of m> n).

For example, the first length is n times the wavelength of a predetermined multiple of the wavelength of the target electromagnetic wave radiation frequency, and the second length is not m times the predetermined multiple of the wavelength. Set a length of 1 and a second length. That is, when the first length is L1 and the second length is L2, L2 = (m /
n) × L1 is set so that L1 and L2 are set. The first length and the second length are set so as to satisfy such a relationship.
By setting the length of the electromagnetic wave, it is possible to effectively suppress electromagnetic wave radiation.

When a capacitance exists on the power supply line, a length corresponding to the capacitance is added to at least one of the first length and the second length depending on the power supply line on which the capacitance exists. The first length and the second length may be set according to the above conditions.

A nineteenth aspect of the present invention is a printed wiring board design support device for assisting the design of the printed wiring board according to the first aspect, comprising a storage means for storing design data relating to the printed wiring board. Detecting means for detecting whether or not there are a predetermined number or more of the interlayer connecting members within a predetermined range based on the design data; and the interlayer connecting member within the predetermined range. And a notification means for notifying that it does not exist in a predetermined number or more.

According to the present invention, the storage means stores design data regarding the printed wiring board. The design data is configured to include, for example, shape data of each part (for example, two-dimensional or three-dimensional coordinate data) and attribute data (for example, data of parts, members, etc.). From this design data, for example, the ground area can be extracted, and the wiring pattern of the signal wiring and the power supply line, the arrangement position of the interlayer connection member, and the like can be known.

Based on the design data, the detecting means determines whether or not there are a predetermined number or more of interlayer connecting members within a predetermined range, that is, whether the interlayer connecting members are arranged at a predetermined density or more. Detect whether or not. Here, the predetermined density is set to such an extent that electromagnetic wave radiation can be effectively suppressed.

Then, the notification means gives notification when it detects that there are not more than a predetermined number of interlayer connecting members within a predetermined range. This may be notified by, for example, a display, or may be notified by voice.

Thus, the designer can easily confirm that there are no more than a predetermined number of interlayer connecting members within a predetermined range and a design error can be suppressed.

Further, the notification means may be an electronic notification (electronic data output) for causing the computer to recognize the detection result. In this case, it is possible to automatically design the design data electronically based on the result of the electronic notification. It should be noted that this also applies to other notification means.

The invention according to claim 20 is a printed wiring board design support device for supporting the design of the printed wiring board according to claim 7, wherein the storage means stores design data relating to the printed wiring board. Based on the design data, within the predetermined range from the intersection of the power line provided in the ground layer on the signal line side and the projection line of the signal line to the ground layer, and the power line Detection means for detecting whether or not the interlayer connecting member is present on both sides of the power supply line, and detection means for detecting whether or not the interlayer connecting member is present on both sides of the power source line. And a notifying means for notifying when is detected.

According to the present invention, the detecting means determines, based on the design data, a predetermined predetermined point from the intersection of the power line provided on the ground layer on the signal line side and the projection line of the signal line to the ground layer. It is detected whether or not the interlayer connection member exists within the range and on both sides of the power supply line. Here, the predetermined range is set to such a range that electromagnetic wave radiation can be effectively suppressed.

Then, the notification means gives notification when it detects that the interlayer connecting member does not exist on both sides of the power source line within a predetermined range from the intersection.

As a result, the designer can easily confirm that there is no interlayer connecting member within the predetermined range from the intersection and on both sides of the power supply line, and design errors can be suppressed. it can.

According to a twenty-first aspect of the present invention, there is provided a printed wiring board design support device for supporting the design of the printed wiring board according to the eighth aspect, wherein the storage means stores design data on the printed wiring board. Detecting, based on the design data, whether or not the distance between the power line provided on the ground layer on the signal line side and the projection line of the signal line with respect to the ground layer is more than a predetermined distance. It is characterized by comprising a detection means and an informing means for informing that the distance between the power supply line and the projection line is not more than a predetermined distance.

According to the present invention, the detecting means is arranged such that the distance between the power line provided on the ground layer on the signal line side and the projection line of the signal line to the ground layer is a predetermined distance based on the design data. It is detected whether or not they are separated from each other.
Here, the predetermined distance is set to a distance that can effectively suppress electromagnetic wave radiation.

Then, the notification means gives notification when it detects that the distance between the power source line and the projection line is not more than a predetermined distance.

Thus, the designer can easily confirm that the distance between the power source line and the projection line is not longer than the predetermined distance, and the design error can be suppressed.

The invention described in claim 22 is a printed wiring board design support device for supporting the design of the printed wiring board according to claim 9 or 10, wherein design data relating to the printed wiring board is stored. It is detected whether the first power line and the projection line of the second power line with respect to the first ground layer are apart from each other by a predetermined distance or more based on the storage means and the design data. And a notifying means for notifying when the first power supply line and the projection line are not separated from each other by a predetermined distance or more.

According to the present invention, the detecting means determines whether the projection lines of the first power supply line and the second power supply line to the first ground layer are apart from each other by a predetermined distance or more based on the design data. Detect whether or not. Here, the predetermined distance is set to a distance that can effectively suppress electromagnetic wave radiation.

Then, the notification means gives notification when it is detected that the first power supply line and the projection line are not separated by a predetermined distance or more.

Thus, the designer can easily confirm that the first power supply line and the projection line are not separated by a predetermined distance or more, and the design error can be suppressed.

The invention according to claim 23 is the above-mentioned claim 11.
A printed wiring board design support device for supporting the design of a printed wiring board as described above, wherein the storage means stores design data regarding the printed wiring board, and the power supply line is predetermined based on the design data. Detection means for detecting whether or not the ground area exists within a predetermined distance and around the power supply line, and the ground area exists within a predetermined distance from the power supply line and around the power supply line And a notifying means for notifying that the failure is detected.

According to the present invention, the detecting means detects, based on the design data, whether or not there is a ground region within a predetermined distance from the power supply line and around the power supply line. Here, the predetermined distance is set to a distance that can effectively suppress electromagnetic wave radiation.

Then, the notification means gives notification when it is within a predetermined distance from the power supply line and it is detected that there is no ground area around the power supply line.

As a result, the designer can easily confirm that there is no ground region within a predetermined distance from the power supply line and around the power supply line, and design errors can be suppressed.

The invention according to claim 24 is the same as claim 11
A printed wiring board design support device for supporting the design of a printed wiring board as described above, wherein the storage means stores design data relating to the printed wiring board, and the power supply line is the printed wiring board based on the design data. Detecting means for detecting whether or not the printed wiring board is separated from the end of the board by a predetermined distance or more, and when detecting that the power supply line is not separated from the end of the printed wiring board by a predetermined distance or more. And an informing means for informing.

According to the present invention, the detecting means detects, based on the design data, whether or not the power supply line is separated from the end of the printed wiring board by a predetermined distance or more. Here, the predetermined distance is set to a distance that can effectively suppress electromagnetic wave radiation.

Then, the notification means gives notification when it is detected that the ground area does not exist around the power supply line within a predetermined distance from the power supply line.

Thus, the designer can easily confirm that there is no ground region within a predetermined distance from the power supply line and around the power supply line, and design mistakes can be suppressed.

The invention described in claim 25 is the same as claim 11
A printed wiring board design support device for supporting the design of a printed wiring board according to claim 1, wherein the storage means stores design data relating to the printed wiring board, and based on the design data, the periphery of the power supply line. In addition to detecting whether or not the interlayer connecting member exists within a predetermined distance from the end of the ground region, the interlayer connecting member surrounds the power supply line when the interlayer connecting member exists within the predetermined distance. Detecting means for detecting whether or not the interlayer connecting members are present within the predetermined distance, and when the interlayer connecting members are arranged around the power supply line in advance. And a notifying unit for notifying at least one of the cases where the units are not arranged at the predetermined intervals.

According to the present invention, the detecting means detects, based on the design data, whether or not the interlayer connecting member is present within a predetermined distance from the end of the ground area around the power supply line, and also detects the predetermined distance. When the interlayer connecting member is present within, it is detected whether or not the interlayer connecting members are arranged at predetermined intervals around the power supply line. Here, the predetermined distance and the predetermined interval are set to a distance and an interval that can effectively suppress electromagnetic wave radiation.

The notifying means notifies at least one of the case where the interlayer connecting member does not exist within the predetermined distance and the case where the interlayer connecting member is not arranged at the predetermined predetermined intervals around the power supply line. To do.

Thus, the designer can easily confirm that the interlayer connecting member does not exist within the predetermined distance or that the interlayer connecting member is not arranged at the predetermined predetermined intervals around the power supply line. Therefore, design errors can be suppressed.

The invention according to claim 26 is the above-mentioned claim 12.
A printed wiring board design support device for supporting the design of a printed wiring board according to claim 1, wherein storage means for storing design data relating to the printed wiring board, and a termination portion of the power supply line based on the design data. A detection means for detecting whether or not the termination element is connected, and a notification means for informing that the termination element is not connected to the termination portion of the power supply line. And

According to the present invention, the detection means detects, based on the design data, whether or not the termination element is connected to the termination portion of the power supply line.

Then, the notification means gives a notification when it is detected that the termination element is not connected to the termination portion of the power supply line.

Thus, the designer can easily confirm that the notification is made when it is detected that the terminating element is not connected to the terminating end of the power supply line, and the design error can be suppressed.

The invention according to claim 27 is the same as that according to claim 14.
A printed wiring board design support device for supporting the design of a printed wiring board as described above, comprising: storage means for storing design data relating to the printed wiring board; and a length of the branch power supply line based on the design data. A detection unit that detects whether or not the length is less than or equal to a predetermined length, and an informing unit that notifies when the length of the branch power supply line is not less than or equal to a predetermined length. It is characterized by that.

According to the present invention, the detecting means detects, based on the design data, whether or not the length of the branch power supply line is less than or equal to a predetermined length. Here, the predetermined length is set to a length that can effectively suppress electromagnetic wave radiation.

Then, the notification means gives notification when it detects that the length of the branch power supply line is not less than the predetermined length.

As a result, the designer can easily confirm that the length of the branch power supply line is not less than the predetermined length and the design error can be suppressed.

The invention according to claim 28 is the above-mentioned claim 17.
A printed wiring board design support device for supporting the design of a printed wiring board as described above, comprising: storage means for storing design data relating to the printed wiring board; and connection to each of the branch power supply lines based on the design data. Setting means for setting an allowable range of the width of the power supply line based on each of predetermined maximum current values of the devices operated by the power supply supplied from the main power supply line, and the allowable range of the width of the power supply line. And a notification means for notifying that it is not within the range.

According to the present invention, the setting means is based on each of the predetermined maximum current values of the devices connected to the branch power supply lines and operated by the power source supplied from the main power supply line, based on the design data. To set the allowable range of power line width. Here, the allowable range is that the temperature rise of the power supply line becomes equal to or less than a predetermined value when a current having the maximum current value is applied to the power supply line, and the potential difference between the nodes at the intersections of the main power supply line and the branch power supply line It is set to a range that is less than or equal to a predetermined value.

Then, the notification means gives notification when it is detected that the width of the power supply line is not within the allowable range.

As a result, the designer can easily confirm that the width of the power supply line is not within the allowable range, and design mistakes can be suppressed.

The invention according to claim 29 is the above-mentioned claim 18.
A printed wiring board design support device for supporting the design of the printed wiring board described above, comprising: storage means for storing design data relating to the printed wiring board; and the first predetermined one based on the design data. A first length of the branch power supply line and a first length from the end of the second branch power supply line to which the device operated by the power supplied from the main power supply line is connected to the end of the first branch power supply line. 2 and the second length is an odd number n (n = 1,
3,5) divided by an odd number of times m (m = 3, 5, 7;
m> n), and a detection unit for detecting whether or not the relationship is such that the dimensions are excluded, and the first length,
The second length and the notifying means for notifying when the second length and the second length do not satisfy the relation.

According to the present invention, the detecting means is connected to the first length of the first branch power supply line which is predetermined based on the design data and the device which is operated by the power supply supplied from the main power supply line. Further, it is detected whether or not the second length from the end of the second branch power supply line to the end of the first branch power supply line is set to have a predetermined relationship. Here, the predetermined relationship is that the second length is equal to the first length and is an odd value n.
(N = 1, 3, 5) Divide the length by an odd number m times (m =
3, 5 and 7; m> n).

Then, the notification means gives notification when it is detected that the first length and the second length do not have a predetermined relationship.

Thus, it is possible to easily confirm that the first length and the second length do not have a predetermined relationship, and it is possible to suppress design mistakes.

According to a thirtieth aspect of the present invention, a printed wiring board in which a signal wiring layer for wiring a signal line, a first ground layer for forming a ground region and a second ground layer are laminated with an insulating layer interposed therebetween. And a plurality of interlayer connecting members electrically connecting a ground region formed in the first ground layer and a ground region formed in the second ground layer, and the first ground. Power line wired in at least one of the layer and the second ground layer, the power line, the first ground layer, and the second ground layer.
In a printed wiring board design support device for supporting the design of a printed wiring board having a plurality of capacitors for stabilizing the power supply connected to at least one of the ground layers of the A storage unit that stores a plurality of capacitors, a detection unit that detects whether the plurality of capacitors are provided at intervals of a predetermined distance or more based on the design data, and a predetermined number of the capacitors that are predetermined. Informing means for informing that it is provided at intervals not less than the distance,
It is characterized by having.

According to the present invention, the detecting means detects, based on the design data, whether or not the plurality of capacitors are provided at intervals of a predetermined distance or more. Here, the predetermined distance is set to a distance that can effectively suppress electromagnetic wave radiation.

Then, the notification means gives notification when it is detected that the plurality of capacitors are not provided at intervals of a predetermined distance or more.

As a result, it is possible to easily confirm that the plurality of capacitors are not provided at intervals of a predetermined distance or more, and it is possible to suppress design mistakes.

The inventions of claims 19 to 30 may be arbitrarily combined to form an invention.

[0111]

BEST MODE FOR CARRYING OUT THE INVENTION [First Embodiment] The first embodiment of the present invention will be described below.

FIG. 1A is a schematic sectional view of the printed wiring board 10 according to this embodiment. Figure 1
As shown in (A), the printed wiring board 10 includes the first signal wiring layer 12, the first ground layer 14, the second ground layer 16, and the second signal wiring layer 18 with the insulating material 20 interposed therebetween. It is a laminated four-layer substrate having a multilayer structure.

A plan view of the first ground layer 14 is shown in FIG. Note that FIG.
It is an AA sectional view of (B).

As shown in FIGS. 1A and 1B, the first ground layer 14 and the second ground layer 16 are interconnected by a large number of via holes 22. As shown in FIG. 1B, the via holes 22 are provided at substantially equal intervals over the entire surface including the first ground layer 14.
In this way, the first ground layer 14 and the second ground layer 16 are connected to each other through a large number of via holes 22, so that they can have substantially the same potential.

Further, as shown in FIGS. 1 (A) and 1 (B),
On the first ground layer 14, a ground pattern 24 and a linear first power supply line 26 are formed separately and independently. The ground pattern 28 is formed on the second ground layer 16.
And the linear second power supply line 30 are formed separately.

The power supply line 26 and the power supply line 30 are formed inside from the end of the substrate with the ground pattern 24 interposed therebetween.

The first power supply line 26 and the second power supply line 30 are interconnected by a via hole 32. In the first power supply line 26, for example, the positive terminal of the DC voltage power supply 34 mounted on the first signal wiring layer 12 is provided with the via hole 35.
Connected via. The negative terminal of the DC voltage power supply 34 is connected to the ground pattern 24 via the via hole 37. As a result, a predetermined DC voltage V from the DC voltage power supply 34 is applied to the first power supply line 26 and the second power supply line 30.
cc is applied.

In the first signal wiring layer 12, the operating frequency and the signal frequency are high frequencies (for example, several MHz to several GH).
z) ICs (eg digital ICs) 36, 38, 4
0, 42 are mounted. IC36 power supply terminal 36V
Is connected to the first power supply line 26 via the connection pattern 44 and the via hole 46, and the ground terminal 36G of the IC 36 is connected to the first ground layer 1 via the via hole 48.
It is connected with 4. As a result, at the power supply terminal 36V,
The DC voltage Vcc is supplied from the first power supply line 26, and the IC
36 is operational.

The power supply terminal 38V of the IC 38 is connected to the second power supply line 30 via the connection pattern 50 and the via hole 52, and the ground terminal 38G of the IC 38 is connected to the first ground layer 14 via the via hole 54. It is connected. As a result, the second power supply line 3 is connected to the power supply terminal 38V.
The DC voltage Vcc is supplied from 0, and the IC 38 becomes operable.

The power supply terminal 40V of the IC 40 is connected to the first power supply line 26 via the connection pattern 56 and the via hole 58, and the ground terminal 40G of the IC 40 is connected to the first ground layer 14 via the via hole 60. It is connected. As a result, the first power supply line 2 is connected to the power supply terminal 40V.
The DC voltage Vcc is supplied from 6 to enable the IC 40 to operate.

The power supply terminal 42V of the IC 42 is connected to the second power supply line 30 via the connection pattern 62 and the via hole 64, and the ground terminal 42G of the IC 42 is connected to the first ground layer 14 via the via hole 66. It is connected. As a result, the second power supply line 3 is connected to the power supply terminal 42V.
The DC voltage Vcc is supplied from 0, and the IC 42 becomes operable.

Further, the signal terminal 36S ₁ of the IC 36 is connected to one end of the linear signal wiring 70 formed in the second signal wiring layer 18 via the through hole 68. The other end of the signal wiring 70 is connected to the IC 38 via the through hole 72.
Is connected to the signal terminal 38S ₁ .

The signal terminal 36S ₂ of the IC 36 is connected to one end of the linear signal wiring 76 formed in the second signal wiring layer 18 through the through hole 74. Signal wiring 7
The other end of 6 is connected to the signal terminal 38S _{2 of the} IC 38 through the through hole 78. This makes IC36
Signals can be exchanged between the IC 38 and the IC 38.

Furthermore, the signal terminal 40S ₁ of the IC 40 is
The signal wiring 80 is connected to the signal terminal 42S ₁ of the IC 42, and the signal terminal 40S ₂ of the IC 40 is connected to the signal terminal 42S ₂ of the IC 42 by the signal wiring 82. As a result, it becomes possible to exchange signals between the IC 40 and the IC 42.

As shown in FIG. 1B, the signal wiring 80,
82 and the first power supply line 26 intersect (orthogonal),
The signal wirings 70 and 76 and the second power supply line 30 intersect (orthogonal).

As described above, in the printed wiring board 10, there is no power supply layer facing the first ground layer 14 and the second ground layer 16, and the first power supply line 26 is provided in the first ground layer 14. , The second power line 30 on the second ground layer 16
Therefore, the electromagnetic wave radiation due to the resonance between the power supply layer and the ground layer does not occur, and since the power supply line is provided in the inner layer, the packaging density of the signal wiring layer can be increased.

Next, from the signal terminal 36S _{1 of the} IC 36 to I
A path in which a return current flows when a signal is output to the signal wiring 38S _{1 of} C38, that is, when a signal current flows will be described.

In FIG. 2, the path of the return current when the signal current flows from the signal terminal 40S ₁ of the IC 40 to the signal wiring 42S _{1 of the} IC 42 is shown by an arrow. As shown in FIG. 2, the signal current is the signal terminal 40S _{1 of} the IC 40, the signal wiring 82, the signal terminal 42S _{1 of} the IC 42, the IC 42 body,
The ground terminal 42G of the IC 42, the first ground layer 14
(The ground pattern 24) flows in this order. Then, in the first ground layer 14, a return current flows at a position where the signal wiring 80 is projected in a direction perpendicular to the paper surface of FIG. That is, the return current flows to the position corresponding to the signal wiring 80 of the first ground layer 14 located immediately below the signal wiring 80.

The path of the return current flowing through the first ground layer 14 is, as shown in FIG. 2, the first power supply line 26.
However, in the present embodiment, since a large number of via holes 22 are provided at substantially equal intervals, the return current passes through the via holes 22A arranged in the vicinity of the first power supply line 26 and returns to the first position. Second ground layer 16 (ground pattern 28) and via the first via hole 22B arranged in the vicinity of the first power supply line 26.
To the ground terminal 40G of the IC 40 through the via hole 60.

In FIG. 3, the path of the return current when the signal current flows from the signal terminal 36S ₁ of the IC 36 to the signal wiring 38S _{1 of the} IC 38 is shown by an arrow. As shown in FIG. 3, the signal current is the signal terminal 36S _{1 of} the IC 36, the through hole 68, the signal wiring 70, the through hole 72, and the IC3.
8 signal terminals 38S ₁ , the IC 38 main body, the ground terminal 38G of the IC 38, the first ground layer 14 (the ground pattern 24 thereof), and the second ground layer 16 (the ground pattern 28 thereof). And the second ground layer 1
6, the return current flows to the position where the signal wiring 70 is projected in the direction perpendicular to the paper surface in FIG. That is, the second ground layer 1 located immediately below the signal wiring 70
The return current flows to the position corresponding to the signal wiring 70 of 6.

The path of the return current flowing through the second ground layer 16 is, as shown in FIG. 3, the second power supply line 30.
However, in the present embodiment, since a large number of via holes 22 are provided at substantially equal intervals, the return current passes through the via holes 22C arranged in the vicinity of the second power supply line 30 and returns to the first position. The second ground layer 1 flows to (the ground pattern 24 of) the first ground layer 14 and passes through the via hole 22D arranged in the vicinity of the first power line 26.
6, to the first ground layer 14 via the via hole 22 arranged near the ground terminal 36G of the IC 36, and to the ground terminal 3 of the IC 36 via the via hole 48.
It flows to 6G.

As described above, in the present embodiment, since the via holes 22 are provided in large numbers at substantially equal intervals, the first ground layer 14 and the second ground layer 16 can be made to have substantially the same potential, and the return Even if the current path is cut off by the power supply line, the return current can be diverted with a low impedance and a relatively short path.

In addition, at the position of the projection line of the first power supply line 26 with respect to the second ground layer 14, the ground pattern 2 is formed.
Since 8 is present, the path of the return current is not interrupted at the position of the projection line of the first power supply line 26, so that the return current can flow through the shortest path without making a detour.

In this way, it is possible to prevent the return current path from being lengthened, and it is possible to suppress electromagnetic wave radiation to a minimum.

Further, a large number of via holes 22 are provided at predetermined intervals over the entire ground pattern, and as shown in FIG. 11, the ground pattern 2 of the first ground layer 14 is formed.
4 along with the peripheral edge of the opening 25 provided at the position where the first power supply line 26 is wired.
Are further arranged at a predetermined interval, and although not shown, the second power supply line 30 of the second ground layer 16 is not shown.
The via holes 22 may be further arranged at a predetermined interval along the peripheral edge of the opening provided at the position where the wiring is provided. As a result, it is possible to suppress electromagnetic wave emission from the edge of the substrate.

The arrangement interval of the via holes 22 is determined, for example, as follows from the relationship with the frequency of the standing wave that causes electromagnetic wave radiation.

For example, between the two via holes 22 can be regarded as a transmission line in which the two are short-circuited and the impedance is substantially zero. The standing wave of the minimum frequency that can be generated in this transmission line is a standing wave having a distance of the transmission line, that is, an interval between the via holes 22 as a half wavelength. The propagation velocity c of a standing wave on a general printed wiring board (for example, a relative permittivity εr of about 4.7) is about 140 mm / ns, and therefore, for example, up to a harmonic of 1 GHz (cycle 1 ns) When the electromagnetic wave emission due to standing waves including
The electromagnetic wave emission can be suppressed by setting the arrangement interval of 2 to about 70 mm or less. That is, the maximum placement interval W of the via holes 22 is set to be equal to or less than the distance that satisfies W = c / (2 × f × εr ^1/2 ) with respect to the maximum frequency f in question, thereby suppressing electromagnetic wave radiation. be able to. Where c is the speed of light and εr is the relative permittivity of the printed wiring board.

Further, the following effects can be obtained by using the structure of the printed wiring board 10 according to this embodiment. This will be described below.

Generally, in order to drive a large load (IC, etc.) at high speed, it is required that the characteristic impedance of the wiring is small. In a conventional four-layer structure board in which a power supply layer and a ground layer are arranged to face each other in an inner layer, the characteristic impedance when the signal line wiring is a microstrip wiring is adjacent to the signal wiring layer and the signal wiring layer. The larger the space between the power supply layer and the ground layer, the larger the size. That is, the smaller the distance between the signal wiring layer on the front or back of the printed wiring board and the power supply layer or the ground layer, the more advantageous it is for high-speed driving. In addition, the electromagnetic noise radiated from the end portion of the conventional multi-layer substrate such as a four-layer substrate increases in proportion to the distance between the power supply layer and the ground layer. In addition, the printed wiring board, to ensure the strength to withstand mounting components,
The thickness of the substrate cannot be reduced excessively.

That is, in the conventional multi-layered substrate, if the distance between the signal wiring layer and the power supply layer or the ground layer is reduced to drive at high speed, the power supply layer is required in order to prevent the thickness of the substrate from being unnecessarily reduced. Since there is no choice but to increase the distance between the ground layer and the ground layer, electromagnetic noise cannot be suppressed. Conversely, if the space between the power supply layer and the ground layer is reduced to suppress electromagnetic noise, the space between the signal wiring layer and the power supply layer or the ground layer should be kept in order not to reduce the thickness of the board unnecessarily. Inevitably, it cannot be driven at high speed. As described above, in the conventional multilayer substrate, there is a trade-off relationship between high-speed driving and suppression of electromagnetic wave radiation caused by the power supply layer and the ground layer.

On the other hand, in the printed wiring board according to the present embodiment, the electromagnetic wave radiation does not increase even if the distance between the two ground layers arranged in the inner layer is increased, so that the signal on each of the front side and the back side is reduced. The distance between the wiring layer and the ground layer can be reduced. This makes it possible to achieve both suppression of electromagnetic wave radiation and high-speed driving without making the thickness of the substrate unduly small.

In the present embodiment, the first signal wiring layer 12, the first ground layer 14, the second ground layer 16,
The printed wiring board in which the second signal wiring layer 18 and the second signal wiring layer 18 are stacked in this order has been described, but the present invention is not limited to this, and another third wiring layer may be provided between the first signal wiring layer 12 and the first ground layer 14. A layer, for example, a signal wiring layer may be arranged.
In this case, for example, the wiring of the third layer needs to be such that a return current with respect to the signal current flowing through the signal line wired in the first signal wiring layer 12 does not flow.

For example, when the entire third layer is a conductor,
It is not preferable because the return current flows through the third layer, but if the wiring of the third layer is not arranged at the position corresponding to the signal line arranged in the first signal wiring layer 12,
The return current does not flow through the third layer and the first ground layer 12
There is no effect because it flows to That is, it is sufficient that the first signal wiring layer 12 and the first ground layer are substantially adjacent to each other. The same applies to between the second signal wiring layer 18 and the second ground layer 14.

Next, the effect of reducing the number of parts by wiring the power source and using two ground layers as in the present invention will be described.

FIG. 12A shows a sectional view of a substrate having a conventional structure in which a signal layer S, a ground layer G, a power supply layer V and a signal layer S are laminated. In FIG. 12B, a signal layer S, a first ground layer G1, a second ground layer G2, and a signal layer S are stacked, and a power supply line V is provided on the first ground layer G1 and the second ground layer G2. A cross-sectional view of a substrate according to the present invention in which is wired is shown.

In the substrate having the conventional structure shown in FIG. 12 (A), since the power supply layer V and the ground layer G are arranged so as to face each other, as shown in FIG. 13 (A), electromagnetic wave radiation due to resonance is emitted. To suppress, the capacitor 106 and the resistor 108
It is necessary to provide a large number of series circuits in the peripheral portion of the substrate and also provide a large number of capacitors 106 at predetermined intervals over the entire surface of the substrate. Further, the driving source 1 such as an IC arranged on one of the signal layers
When 10 and the drive source 112 arranged on the other signal layer are connected by the signal line 114, it is necessary to provide the capacitor 116 for ensuring the path of the return current. In addition, a connector 118 for connecting to another board or the like.
It is necessary to provide a capacitor 120 in the vicinity of the connector 118 for blocking the electromagnetic noise to the connector 118. Further, in order to stabilize the ground plane, it is necessary to provide a series circuit of a capacitor 122 and a resistor 124 for preventing diffusion of electromagnetic noise between the signal ground and the frame ground. Further, it is necessary to provide an inductance 126 for preventing the diffusion of electromagnetic noise by the power source of the driving source 112 such as an IC.

On the other hand, in the substrate having the structure according to the present invention shown in FIG. 12B, the power line is wired in the ground layer and the two ground layers are connected at multiple points by via holes, so that the electromagnetic wave Effectively suppress radiation,
Since the path of the return current is also secured, as shown in FIG. 13B, it is possible to significantly reduce the capacitors, resistors, inductances, etc. for suppressing electromagnetic noise, which are required in the substrate having the conventional structure.

[Second Embodiment] Next, a second embodiment of the present invention will be described. The same parts as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 4A is a schematic sectional view of the printed wiring board 11 according to this embodiment.
A plan view of the first ground layer 14 is shown in FIG. Note that FIG. 4A is a cross-sectional view taken along the line AA of FIG.

As shown in FIGS. 4A and 4B, the first power supply line 26 is wired in the first ground layer 14 of the printed wiring board 11, and the second ground layer 16 is wired in the second ground layer 16. The second power supply line 30 is wired. The first power supply line 26 and the second power supply line 30 are interconnected by via holes 31 and 33.

Further, the second power line 30 has, for example, the first
The positive terminal of the DC voltage power supply 34 mounted on the signal wiring layer 12 is connected via the via hole 35. The negative terminal of the DC voltage power supply 34 is connected to the ground pattern 24 via the via hole 37. This makes the first
A predetermined DC voltage Vcc is applied from the DC voltage power supply 34 to the power supply line 26 and the second power supply line 30.

The power supply terminal 38V of the IC 38 is connected to the second power supply line 30 through the via hole 52, and the IC 38
The ground terminal 38G of 38 is connected to the first ground layer 14 through the via hole 54. This allows
DC voltage Vc from the second power supply line 30 to the power supply terminal 38V
c is supplied, and the IC 38 becomes operable.

The power supply terminal 40V of the IC 40 is connected to the first power supply line 26 through the via hole 58, and
The ground terminal 40G of 40 is connected to the first ground layer 14 through the via hole 60. This allows
DC voltage Vc from the second power line 30 to the power supply terminal 40V
c is supplied, and the IC 40 becomes operable.

The power supply terminal 42V of the IC 42 is connected to the first power supply line 26 through the via hole 64, and the IC 42
The ground terminal 42G of 42 is connected to the first ground layer 14 through the via hole 66. This allows
DC voltage Vc from the second power supply line 30 to the power supply terminal 42V
c is supplied, and the IC 42 becomes operable.

A plurality of ICs 38 (8 in FIG. 4B) are used.
Signal terminals 36S are respectively connected to one ends of a plurality of signal wirings 84 forming a high-speed bus, and the other ends of the plurality of signal wirings 84 are connected to the first signal wiring layer 12 and the second signal wirings. A plurality of through holes 8 for connecting layers 18 to each other
6 are each connected to one end.

A plurality of signal terminals 40S of IC40 and IC4
The two signal terminals 42S are connected to each other by a plurality of signal wires 88 that form a high-speed bus. The signal wiring 88 includes the first signal wiring layer 12 and the second signal wiring layer 1
One end of a plurality of through-holes 90 for interlayer connection with 8 is connected.

The other end of the through hole 90 is connected to one end of each of a plurality of signal wirings 92 forming a high speed bus formed in the second signal wiring layer 18, and the other end of the signal wiring 92 is a through hole. Each of them is connected to the other end of the hole 86.
As a result, the signal terminals of the ICs 38, 40, 42 are interconnected by the high-speed bus, and signals can be exchanged with each other.

Further, as shown in FIG. 4B, the signal wiring 88 formed on the first signal wiring layer 12 and the first ground layer 14 arranged on the first signal wiring layer 12 side are formed. The main portion of the wired first power supply line 26 is wired substantially in parallel. In addition, a signal wiring 92 wired on the second signal wiring layer 18 and a main part of the second power supply wire 30 wired on the second ground layer 16 arranged on the second signal wiring layer 18 side. Are wired substantially parallel to each other.

That is, the signal wiring 88 and the first power supply line 2
6 and the signal wiring 92 and the second power supply line 30 do not cross each other.
As a result, the path of the return current on the first ground layer 14 corresponding to the signal current flowing through the signal wiring 88 is not interrupted, and on the second ground layer 16 corresponding to the signal current flowing through the signal wiring 92. There is no break in the return current path at. Therefore, the path through which the return current flows can be minimized, and the electromagnetic wave radiation can be further suppressed.

It should be noted that, as shown in FIG.
Mounted on the signal wiring layer 18 of the signal wiring 88, the signal wiring 9
2 may be arranged between the first ground layer 14 and the second ground layer 16. As described above, by providing the signal wiring in the inner layer, the signal wiring can have a lower impedance as compared with the case where the signal wiring is provided on the surface of the substrate. Further, since the signal wiring is sandwiched between the two ground layers, the electromagnetic radiation due to the signal wiring is shielded, so that the electromagnetic radiation can be further suppressed.

[Third Embodiment] Next, a third embodiment of the present invention will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 5 is a schematic plan view of the first ground layer 14 in the printed wiring board according to this embodiment.

As shown in FIG. 5, the first ground layer 14
The ground pattern 24 and the first power supply line 26 are separately formed. In addition, the second ground layer 16
The ground pattern 28 and the second power supply line 30 are separately formed in the.

To the first power supply line 26, for example, the positive terminal of the DC voltage power supply 34 mounted on the first signal wiring layer 12 is connected via the via hole 35. The negative terminal of the DC voltage power supply 34 is connected to the ground pattern 24 via the via hole 37. As a result, the first DC power supply 26 is connected to the first power supply line 26 by a predetermined DC voltage Vc.
c1 (for example, 5V) is applied. In addition, the first power supply line 26 is connected to the first signal wiring layer 12 via the via hole 94.
Is connected to the power supply terminal 96V of the IC 96 mounted on the.

The second power supply line 30 has, for example, the first
The positive terminal of the DC voltage power supply 41, which is mounted on the signal wiring layer 12 and supplies a voltage different from the supply voltage of the DC voltage power supply 34, is connected via the via hole 43. The negative terminal of the DC voltage power supply 41 is connected to the ground pattern 24 via the via hole 45. This allows the second
Of the DC voltage Vcc1 supplied from the DC voltage power supply 34 to the first power supply line 26.
cc2 (eg 3.3V) is applied. The second power supply line 30 is connected to the power supply terminal 100V of the IC 96 via the via hole 98. A plurality of signal wirings 102 are connected to the plurality of signal terminals 100S of the IC 96, respectively.

In this way, the power supply lines having different supply voltages are arranged on different ground layers. Therefore, the first power supply line 26 and the second power supply line 30 having different supply voltages can cross each other in the region where the IC 96 is mounted as shown in FIG. 5, so that the degree of freedom of the power supply wiring is improved. Can be made.

[Fourth Embodiment] Next, a fourth embodiment of the present invention will be described. This embodiment is a modification of the first embodiment, and the same parts as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 6 is a schematic plan view of the first ground layer 14 in the printed wiring board according to this embodiment. As shown in FIG. 6, the first ground layer 14
, The ground pattern 24 and the first power supply line 26 are formed separately from each other.
The signal lines 102 constituting the bus connected to the six signal terminals 100S intersect with (orthogonal to) each of the projection lines on the first ground layer 14.

The via hole 22 has a first projection line of the plurality of signal wirings 102 on the first ground layer 14 as a first projection line.
A plurality of them are provided in the vicinity of the position intersecting with the power supply line 26. In FIG. 6, via holes 22 are arranged every two signal lines on both sides of the first power supply line 26. By arranging the via holes 22 in this way, the signal wiring 1
The path of the return current corresponding to the signal current flowing through 02 can be minimized, and the quality of signal transfer via the bus can be improved.

Next, the proper positions of the via holes 22 arranged on both sides of the first power supply line 26, that is,
An appropriate distance L from the via hole 22 to the slit between the ground pattern 24 and the first power supply line 26 will be described.

The return current flowing on the ground pattern 24 of the first ground layer 14 is ideally the signal wiring 1
02 has a phase opposite to that of the signal current flowing above 02, but the common mode current increases with the deviation from the opposite phase, and becomes maximum when the phase shifts by half a wavelength. Therefore, it can be concluded that the smaller the detour of the return current is, the better in order to eliminate the common mode current in all frequency bands. Therefore, from the via hole 22 to the ground pattern 2
4 to the slit between the first power supply line 26 and L
Is preferably about λ / 10 (about 7 mm when the frequency is about 1 GHz), where λ is the wavelength of the target signal and the phase difference due to the detour of the return current is sufficiently small.

The inventors have found that if the distance L from the via hole 22 to the slit between the ground pattern 24 and the first power supply line 26 is within about 5 mm, there is no slit, that is, the first power supply line. It was confirmed that the electromagnetic wave emission at a frequency of about 1 GHz or less can be suppressed as in the case where 26 is not wired. It was confirmed that the electromagnetic wave radiation increased by about 2 dB even when the distance L was 10 mm.

As described above, by setting the distance L from the via hole 22 to the slit between the ground pattern 24 and the first power supply line 26 to about λ / 10, high frequency noise of about 1 GHz can be sufficiently suppressed. it can.

In all of the above embodiments, it is preferable to connect a capacitor having a sufficient number and capacity to stabilize the DC potential to the power supply line, and
It is preferable to connect a capacitor for decoupling to the power input terminal. Further, it is preferable that the power supply input terminal and the power supply line of the digital IC operating at high speed are insulated at a high frequency by a filter element such as a ferrite chip inductor and sufficiently decoupled at the tip of the filter element.

(Embodiment) Next, an embodiment of the present invention will be described. FIG. 8 shows a plan view of the first ground layer 14 of the printed wiring board used in the experiment, and FIG. 9 shows a plan view of the first signal wiring layer 12 adjacent to the first ground layer 14. Indicated.

This printed wiring board is of A4 size, and as shown in FIG. 9, the first signal wiring layer 12 has an IC 36 as an arithmetic element, an IC 38 as a receiving element,
40 and 42 are mounted. IC36 and IC38,4
0 and 42 are connected by a 16-bit bus wiring 104.

The ICs 38, 40 and 42 are LVCMOS logic buffers. IC36 has a frequency of 20M
LV each bus wiring 104 in synchronization with the clock signal of Hz
Random driving is performed at the CMOS level. A large number of via holes 22 are arranged at 100 mm intervals.

Further, as shown in FIG.
A direct current voltage is supplied to 8, 40 and 42 by the first power supply line 26. As shown in FIGS. 8 and 9, the bus wiring 104
And a part (projection line) of the first power supply line 26 intersect.

FIG. 10 shows the measurement results of the electromagnetic wave emission spectra of the printed wiring board having such a structure and the conventional printed wiring board.

The printed wiring board of the conventional structure used for the measurement is a four-layer board in which the first signal layer, the power supply layer, the ground layer, and the second signal layer are laminated in this order. A low-inductance chip capacitor (capacity 0.1 μF) is connected to the layer at intervals of about 20 mm,
Further, by providing a snubber circuit in which the chip capacitor and a resistor having a resistance value of approximately 5Ω are connected in series around the substrate, electromagnetic wave emission due to a resonance current between the opposing power source layer and ground layer is suppressed. .

As is clear from FIG. 10, in the printed wiring board to which the present invention shown in FIGS. 8 and 9 is applied, the electromagnetic wave is higher than that of the printed wiring board of the conventional structure in all the frequencies above about 500 MHz. It can be seen that the radiation has been reduced.

As described above, even when the power supply line and the bus wiring intersect and the path through which the return current corresponding to the signal current flowing through the bus wiring should flow is interrupted, a large number of via holes are provided at equal intervals. The return current can be bypassed in the shortest path, and high-frequency electromagnetic wave radiation can be suppressed.

Further, according to the present invention, the structure of the printed wiring board itself does not need to be changed so much as compared with the conventional structure, and the capacitor, snubber circuit and the like required in the printed wiring board of the conventional structure are also provided. Can be reduced. Furthermore, it is not necessary to provide a guard ground at the end of the power supply layer. Therefore, the number of parts can be reduced, the cost can be significantly reduced, and the degree of freedom in design can be significantly improved.

Next, when noise occurs on the power line,
The result of simulating how the electromagnetic wave radiation noise changes depending on the formation position of the power supply line will be described. As a simulation method, the FI method (F
The electromagnetic field simulation by the inite integration method) was used.

14 to 16 show models 1 to 3 used in the simulation. FIG. 14 (A) is a plan view of the model 1 according to the present invention, and FIG. 14 (B) is FIG. 14 (A).
FIG. The model 1 is a model in which the power supply line 26 is formed inside from the end of the substrate with the ground pattern 24 sandwiched therebetween, that is, the periphery of the power supply line 26 is the ground pattern 24.
It is a model surrounded by.

In the model shown in FIG. 14A, the ground pattern 24 and the power supply line 26 are formed on the first ground layer 14 of the substrate having a horizontal length L1 of 180 mm and a vertical length L2 of 100 mm. There is. The length L3 of the power line 26 is 10
The width W1 is 0 mm and the width W1 is 2 mm. A slit having a width W2 of 0.5 mm is formed between the power supply line 26 and the ground pattern 24.

As shown in FIG. 14B, the first ground layer 14 is laminated with the second ground layer 16 via the insulating material 20, and the second ground layer has a ground pattern on the entire surface. Has been formed.

The thickness d2 of the first ground layer 14 and the second ground layer 16 is 0.035 mm, the thickness d3 of the insulating material is 0.8 mm, and the relative permittivity ε thereof is 4.7.
The first ground layer 14 and the second ground layer 16 are connected by a large number of via holes 22.

FIGS. 15A and 15B show a plan view and a sectional view of the model 2 in which the power supply line 26 is arranged without sandwiching the ground pattern 24 from the end of the substrate. In addition,
Other than the point that the power supply line 26 is arranged so as not to sandwich the ground pattern 24 from the end of the substrate, other configurations and sizes are shown in FIG.
Is the same as.

FIG. 16 is a plan view of the model 3 in which the first ground layer 14 does not have the ground pattern 24 and only the power supply line 26 is arranged. Other configurations and sizes are similar to those of the model shown in FIG. That is, this is a model in which the ground layer is only the second ground layer 16.

FIG. 17 shows a result of simulating the electromagnetic wave radiation noise intensity when noise is applied to the end of the power supply line 26 depending on the distance d from the end of the substrate to the power supply line 26 for the models 1 to 3 as described above. Show. The frequency of electromagnetic radiation noise is 600 MHz.

As shown in FIG. 17, it can be seen that the electromagnetic radiation noise is lowest when the power supply line 26 is surrounded by the ground pattern 24. Also, like Model 2,
When one side of the ground pattern 24 is deleted, the electromagnetic radiation noise is larger than that of the model 1, but the ground pattern 24 is provided around the power line 26 as in the model 3.
It can be seen that the electromagnetic radiation noise is smaller than that when no noise exists. That is, it is effective to reduce the noise by forming the power supply line 26 in the ground layer.
It was found that the formation of the ground region all around was most effective for noise reduction.

Further, compared with the intensity of the electromagnetic radiation noise when the power supply line 26 is arranged at the end of the substrate, the power supply line 26 is reduced from the end of the substrate by about 3 mm, and by reducing it by 6 dB from the end of the substrate. It is necessary to separate them by 5 mm, and preferably by separating them by about 10 mm or more, electromagnetic wave radiation noise can be effectively reduced.

Further, as shown in FIG. 17, it can be seen that the electromagnetic radiation noise decreases as the distance d from the substrate end portion to the power supply line 26 increases. The simulation results for other frequencies were similar.

Further, FIG. 18 shows a simulation result of electromagnetic wave radiation noise when noise is applied to the end portion of the power supply line 26 when the distance d is changed for the model 1. As shown in FIG. 18, it was found that the electromagnetic radiation noise decreased in all frequency bands as the distance d increased.

[Fifth Embodiment] The fifth embodiment of the present invention will be described below. In this embodiment, an example in which a snubber circuit is connected to the end of the power supply line will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 19 is a schematic sectional view of the printed wiring board 10 according to this embodiment, and FIG.
Shows a plan view of the first ground layer 14.
Note that FIG. 19A is a cross-sectional view taken along the line AA of FIG.

As shown in FIG. 19B, a snubber circuit 134 in which a capacitor 130 and a resistor 132 are connected in series is connected between the terminal end of the power supply line 26 and the ground pattern 24 (or the ground pattern 28). Has been done. The snubber circuit 134 is provided in the first signal wiring layer 12 or the second signal wiring layer 18. Similarly, the snubber circuit 134 is also connected to the terminal end of the power supply line 30. The ground side of the snubber circuit 134 is preferably directly connected to the ground pattern 24 and the ground pattern 28 by the via hole 22.

The impedance of the snubber circuit 134 is matched with the characteristic impedance of the power supply lines 26 and 30. Here, in the case of a structure in which the power supply line 26 forming a so-called coplanar line and the ground pattern 24 are laminated with the ground pattern 28 via the insulating material 20 which is a dielectric layer, as in the printed wiring board shown in FIG. Brian C.Wadell "Transmission Line
Design Handbook "ARTECH HOUSE, INC, can be obtained by the method described in P. 79 of 1991. That is,
As shown in FIG. 27, the width of the power supply line 26 is a, the distance from the end of the one ground pattern 24 on the power supply line 26 side to the end of the other ground pattern on the power supply line 26 side is b, and the insulating material 20 is used. The characteristic impedance Z ₀ is given by the following equation, where h is the height of the insulating material and ε _r is the relative permittivity of the insulating material 20.

[0200]

[Equation 1]

Here, μ ₀ is the magnetic permeability in the free space of 4π × 10 ⁻⁷ (H / m), ε ₀ is the dielectric constant of the free space of 8.854183 × 10 ⁻¹² (F / m), and η ₀ Is the characteristic impedance in free space 120 πΩ, ε _eff
Is the effective relative permittivity, and K () is a function of the complete elliptic integral of the first kind.

As described above, by connecting the snubber circuit having the impedance matching the characteristic impedance of the power supply line to the terminal end of the power supply line, the reflection at the end of the power supply line is repeated and the electromagnetic wave due to the one-dimensional resonance is generated. Radiation can be prevented from being generated.

20 to 22 conceptually show arrangement examples of the snubber circuit 134 connected to the power supply line 26.

As shown in FIG. 20, the first ground layer 1
4, a power supply line 26 is wired, and a plurality of ICs 36 (12 in FIG. 20 are provided on the first signal wiring layer 12 above the power supply line 26).
It is arranged). The power supply line 26 is a main power supply line 26A.
And a branch power supply line 26B branched from the main power supply line 26, and each IC 36 is supplied with power from the branch power supply line 26B through a via hole.

Further, the main power supply line 26A is the main power supply line 2
6A passes through the vicinity of each IC 36 (see FIG. 20).
Then 3). As a result, the length of the branch power supply line 26B branched from each main power supply line 26A can be shortened as much as possible. Thus, the main power supply line 26A is a main power supply line for supplying power to each IC 36,
The branch power supply line 26B has a shorter length than the main power supply line 26A, and supplies the power supplied from the main power supply line 26A to the IC.
36 is a power supply line for supplying to 36.

A snubber circuit 134 in which a capacitor 130 and a resistor 132 are connected in series is connected to the end of each of the branched main power supply lines 26A. The snubber circuit 134 is disposed on the first signal wiring layer 12, for example,
One end of the snubber circuit 134 is connected to the terminal end portion of the main power supply line 26A via a via hole, and the other end is connected to the ground pattern 24 via a via hole.

As described above, since the snubber circuit is provided at the terminal end of the branched main power supply line 26A, electromagnetic wave radiation due to one-dimensional resonance is generated by repeated reflection at the terminal end of the power supply line. Can be prevented.

Since the branch power supply line 26B is sufficiently short,
There is no particular problem with reflection from the end.

Further, as shown in FIG. 21, the main power supply line 26A is not branched and one main power supply line 26A is used for each IC3.
Wiring may be provided so as to pass in the vicinity of 6. By thus wiring, the branch power supply line 26 connected to each IC 36
B can be made sufficiently short, and the snubber circuit 134 is set to 1
Since it is only necessary to connect to the terminal end of the main power supply line 26A of the book, the number of parts can be reduced.

Further, as shown in FIG. 22, the branch power supply line 26
When B becomes long, it is preferable to provide the snubber circuit 134 also at the terminal end of the branch power supply line 26B.

Next, the substrate having the conventional structure, that is, the substrate having the structure in which the power supply layer and the ground layer are opposed to each other, the substrate having the structure in which the power supply line according to the present invention is wired to the ground layer, and the power supply line according to the present invention are grounded. A simulation result of electromagnetic wave radiation noise in a substrate having a structure in which layers are wired and a snubber circuit is provided at a terminal end of a power supply line will be described.

23 and 24 are perspective views of the model used for the simulation. FIG. 23 shows a substrate having a structure according to the present invention, which has a substrate size of 160 mm × 240 m.
m, the first ground layer 14, and the second ground layer 16 are stacked, and the power supply line 26 is wired to the first ground layer 14. Further, via holes 22 are formed at a pitch of 20 mm in the ground layer, and drive points 140 are provided in the middle of the power supply lines 26. Although not shown in FIG. 23, a decoupling capacitor having a capacitance of 0.1 μF is arranged at a position 4 mm away from the driving point 140.

FIG. 24 shows a substrate having a conventional structure, the substrate size is 160 mm × 240 mm, the power supply layer 142 and the ground layer 144 are opposed to each other, and decoupling capacitors 146 are provided on the entire surface at predetermined intervals. . Further, a driving point 140 is provided at the same position as in FIG.

FIG. 25 shows the simulation result of electromagnetic wave radiation noise in such a model.

FIG. 25 shows a substrate of the conventional structure shown in FIG. 24, a substrate of the structure shown in FIG. 23 in which the power supply line 26 according to the present invention is wired to the first ground layer 14, and FIG. The simulation result of the electromagnetic radiation noise of the substrate in which the power supply line 26 according to the present invention is wired in the first ground layer 14 and the snubber circuit is provided at the terminal end 26E of the power supply line 26 is shown. .

As shown in FIG. 25, it can be seen that the radiation of electromagnetic waves can be suppressed by wiring the power supply line as compared with the substrate having the conventional structure. Also, if the snubber circuit is not provided in the power supply line, the radiation peak at a predetermined frequency of electromagnetic wave radiation due to the resonance of the power supply line remains, but by providing the snubber circuit at the terminal end of the power supply line, all frequency bands are It has been found that the emission peak can be suppressed.

Next, in the substrate having the structure shown in FIG. 23, when there is a stub (branch power supply line) 27 branched from the middle of the power supply line 26, a snubber circuit is provided at the terminal end portion 27E of this stub 27. FIG. 26 shows a simulation result of electromagnetic wave radiation noise in the case where the above is not provided. The length of the stub is 130 mm.

As shown in FIG. 26, when the snubber circuit is not provided in the stub, the specific frequency (about 800 MH
Although the emission peak exists in z), it was found that the emission peak can be suppressed by providing the snubber circuit in the stub.

In the above embodiment, the first signal wiring layer 12, the first ground layer 14 and the second ground layer 1 are used.
6 and the case of the four-layer substrate in which the second signal wiring layer 18 is laminated has been described as an example, but the present invention is not limited to this, and the signal wiring is the first.
The present invention can be applied to the two-layer substrate formed on the ground layer and the second ground layer.

[Sixth Embodiment] Next, a sixth embodiment of the present invention will be described. In the present embodiment, the wiring width of the power supply line will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

The wiring width of the power supply line is determined, for example, from the current capacity, that is, the amount of heat generation, and is determined based on the temperature rise due to Joule heat. However, since this changes depending on the shape of the heat radiator and the flow of the surrounding gas, it is not simply determined only by the structure in reality, but depends largely on the usage conditions and the like.

Further, as described in the above embodiment, regarding the structure in which the two ground layers are sandwiched between the two signal wiring layers which are supposed to be adopted in the high-speed digital circuit, the direct current of the power line is It is necessary to consider the voltage drop due to the resistance component.

Therefore, in the structure in which the power supply line is branched in a plurality of directions and the devices such as ICs are connected to the respective branch destinations as described in the above embodiment, the length of the power supply line becomes long and the device becomes When operating at the maximum current at the same time, there is a possibility that sufficient power cannot be supplied.

Therefore, in this embodiment, for example, FIG.
As shown in, I connected to the branch power supply line 26B branched from the main power supply line 26A and supplied with power from the power supply input terminal V
C36 based on _{1-36 5} maximum current Imax1～Imax5, power line, i.e. to set the minimum The required width of the main power supply line 26A and the branch power line 26B. In addition,
It is sufficient that the width is equal to or larger than the minimum required width, but it is preferable that the width is not unnecessarily large in view of the mounting density and the like.

Specifically, as shown in FIG. 28, first, there is a possibility that the power supply line may flow through the segments S1 to S9 divided by the nodes n _{1 to} n ₄ which are the intersections of the main power supply line 26A and the branch power supply line 26B. Calculate the maximum current value with. In other words, this is similar to calculating the maximum current value that may flow into the nodes n _{1 to} n ₄ .

For example, in segment S9, there is a possibility that a current of Imax5, which is the maximum current value of IC36 ₅ , may flow, and similarly, in segment S8, there is a possibility that a current of Imax4, which is the maximum current value of IC36 ₄ , flows. . Therefore, a current value of Imax5 + Imax4 may flow in the segment S7. In other words, the node n ₄ is likely to flow current value Imax5 + Imax4. In this way, the maximum current value that may flow in each segment is calculated.

Then, when the current having the maximum current value among the calculated current values is passed through the power supply line, the temperature rise of the power supply line becomes the predetermined value or less and the potential difference between the nodes becomes the predetermined value or less. The width of such a power supply line is determined, and this is set as the minimum required power supply line width.

Specifically, for example, from the predetermined correspondence relationship between the width of the power supply line and the current value that can be passed through the power supply line of this width, the maximum current value among the calculated current values is corresponded. It is set by obtaining the width.

As described above, by setting the width of the power supply line to the width corresponding to the maximum current value of the current flowing into each segment, that is, each node, the power can be stably supplied to each IC. Therefore, electromagnetic wave radiation can be effectively suppressed.

[Seventh Embodiment] The seventh embodiment of the present invention will be described below. In this embodiment, the setting of the length of the power supply line will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In this embodiment, as shown in FIG. 29, the length of the first branch power supply line 26B ₁ branched from the main power supply line 26A is L1, and the second branch power supply line 26 to which the IC 36 is connected is connected.
When the length from the end portion of B ₂ (the connection portion with the IC 36) to the end portion of the first branch power supply line 26B ₁ that is not connected to the main power supply line 26A is L2, L1 and L2 L1 and L2 are set so as to have a predetermined relationship that can suppress electromagnetic wave radiation.

In the structure shown in FIG. 29, as shown in FIG. 30, the end portion of the second branch power supply line 26B _{2 on} the IC 36 side is formed.
(Point A in the figure) and the main power supply line 2 of the _first branch power supply line 26B ₁
The end on the 6A side (point B in the figure) becomes a node of the voltage distribution.
When the end portion (point C in the figure) of the branch power supply line 26B _{1 on} the side opposite to the main power supply line 26A forms an antinode of the voltage distribution, resonance occurs and electromagnetic wave radiation occurs.

That is, when L1 and L2 are odd multiples of the wavelength λt that is a predetermined multiple (eg, ¼) of the wavelength λ of the electromagnetic wave radiation frequency of interest, that is, L1 = n × λ.
t, L2 = m × λt (n, m = 1, 3, 5, ..., N <
In the case of m), the electromagnetic wave radiation is likely to occur due to resonance. On the other hand, in other cases, since the resonance currents cancel each other out, electromagnetic wave radiation can be suppressed.

For example, as shown in FIG. 30 (A), L1
Is 1/4 of the wavelength λ, and L2 is
When the length is three times λ / 4, or as shown in FIG. 30B, L1 is three times λ / 4 and L2
However, when the length is 5 times λ / 4, electromagnetic wave radiation is likely to occur due to resonance.

Here, the present inventors actually use the wavelength λ,
It has been confirmed that the upper limits of n and m are limited by the size and loss of the printed wiring board, and it is not necessary to consider higher-order resonances of 9th order or higher. Therefore, in this embodiment, n is 1
L is an odd number of ~ 5 and m is not an odd number of 3 ~ 5
Set 1 and L2.

In this way, L2 changes L1 to an odd number n (n =
1,3,5) divided by m times the odd number (m = 3,5,
7; set L1 and L2 so as to have dimensions excluding the length of m> n), that is, L2 = (m / n) × L1
By setting L1 and L2 so that
Electromagnetic radiation can be effectively suppressed.

By the way, when there is a capacitance on the power supply line, when the capacitance on the power supply line is C and the impedance of the power supply line is Z ₀ , a delay time t _d according to the following equation occurs.

[0238] _{t d = 0.7 × C × Z} 0/2 ... (8) which is the length of the power supply _{line, L d = c × t d} (c is the propagation speed) even longer by the length of the It is equivalent to becoming. Here, the propagation speed c is c = 1 / (Lt × Lc) ^1/2 when the inductance of the power supply line per unit length is Lt and the capacitance of the power supply line per unit length is Ct.
It is represented by.

Therefore, for example, when there is a capacitance on the main power supply line 26A or the branch power supply line 26B ₂ , L _d is added to L2, and when there is a capacitance on the branch power supply line 26B ₁ , L1 and L2 Add L _d to each to set the length of each. This makes it possible to suppress electromagnetic wave radiation with higher accuracy.

[Eighth Embodiment] Next, an eighth embodiment of the present invention will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 31 shows a schematic configuration of the printed wiring board design support device 150 according to the present embodiment.

The design support device 150 is a computer for displaying the structure of the printed wiring board based on the CAD data which is the design data of the printed wiring board and for assisting the designer in designing the printed wiring board.

As shown in FIG. 31, the design support device 150
Are CPU 150A, ROM 150B, RAM 150
C, an input / output port (I / O) 150D, which are connected to each other via a bus such as an address bus, a data bus, and a control bus.

The input / output port 150D has a mouse 1 as a pointing device as various input / output devices.
50F, a keyboard 150G, a display 150H composed of a CRT or an LCD, a recording device (R / W) 150J for reading and / or writing data and commands to and from a storage medium, data such as a processing program and CAD data described later. A storage device 150K such as a hard disk device for storing is connected to each.

A printer 156 for printing various processing results and the like on recording paper is connected to the input / output port 150D.

The storage device 150K stores files 152, C storing processing programs such as processing routines described later.
The AD data 14 is stored.

The CAD data 14 is design data of the printed wiring board, for example, shape data of each part (for example, 2
Dimensional or three-dimensional coordinate data) and attribute data (for example, data of parts, members, etc.). This CA
For example, extracting the ground area from the D data 14,
It is possible to know the wiring pattern of the signal wiring and the power supply line, the arrangement position of the via hole, and the like.

The recording device 150J has a flexible disk unit (FDU) into which a flexible disk as a recording medium can be inserted / removed. It should be noted that the processing routine and the like to be described later can read and write to the flexible disk using the FDU. Therefore, the processing routine described later may be recorded in the flexible disk in advance without being stored in the ROM 150B, and the processing program recorded in the flexible disk may be executed via the FDU.

In the present embodiment, a large-capacity storage device 15 such as a hard disk device equipped in the design support device 150.
The processing program recorded in a storage medium such as a flexible disk is stored (installed) in 0K and the corresponding processing is executed. The recording medium is a CD-RO.
There are disks such as M, MD, MO, and DVD, and magnetic tapes such as DAT, and when these are used, instead of or in addition to the above FDU, a CD-ROM device, MD device, MO
A device, a DVD device, a DAT device or the like may be used.

The CPU 150A corresponds to the detecting means and setting means of the present invention, the display 150H corresponds to the notifying means of the present invention, and the storage device 150K corresponds to the storage means of the present invention.

The design support device 150 is a storage device 150K.
It is detected whether or not the via holes 22 are provided in the first ground layer 14 with a predetermined density based on the CAD data 154 stored in, and if the via holes 22 are not provided with the predetermined density, the fact is notified. . As to whether or not the via holes 22 are provided at a predetermined density, as shown in FIG. 32, the evaluation area 200 is set, and it is detected whether or not there are a predetermined number or more of via holes 22 in the evaluation area 200. By doing.

By sequentially moving the evaluation area 200 and performing the above detection, detection is performed for all areas of the first ground layer 14. To move the evaluation area 200, the first ground layer 14 is divided into a plurality of areas in the vertical and horizontal directions in advance, and the areas are sequentially moved. For example, the evaluation area 200 is sequentially moved from the left side to the right side and from the upper side to the lower side. At this time, the evaluation area before the movement and the evaluation area after the movement may be moved so as to partially overlap each other. For example, the movement amount of the evaluation area 200 is equal to or less than the horizontal length of the evaluation area 200 when moving in the left-right direction, and is equal to or less than the vertical length of the evaluation area when moving in the vertical direction. You may move so that it may become. As a result, the via hole 22 can be accurately detected.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 300, the evaluation area 200 is set. Initially, for example, it is set at the upper left of the first ground layer 14.

Then, in the next step 302, CAD
Based on the data 154, the number of vias N _G of the via holes 22 included in the evaluation area 200 is obtained.

Next, in step 304, it is determined whether or not the calculated number of vias N _G is greater than or equal to a predetermined number (threshold) N _Gmin , that is, whether or not the via holes 22 are present at a predetermined density or greater. Is determined. Then, when the calculated number of vias N _G is equal to or _larger than the predetermined number N _Gmin set in advance, the determination in step 304 is affirmative, and step 30
Go to 6.

On the other hand, if the calculated number of vias N _G is less than the predetermined number N _Gmin set in advance, the determination at step 304 is denied, and the routine goes to step 308.

At step 308, a predetermined number of minimum required via holes 22 in the evaluation area 200, N _Gmin.
The fact that the above does not exist is displayed on the display 150H. For example, the screen shown in FIG.
By displaying it on 50H and changing the color of the frame of the evaluation area 200, it is possible to easily confirm that there is an error. After the display is completed, the process proceeds to step 306. Depending on the number of via holes 22, a stepwise error display such as "prohibition" or "warning" may be displayed. As described above, with respect to the stepwise error display according to the degree of error, it can be performed in all of the following embodiments.

At step 306, it is judged if the detection of the number of vias N _G is completed in all areas. Then, when the detection of the number of vias N _G has not been completed in all areas, the determination in step 306 is negative, the process returns to step 300, the evaluation area is moved in a predetermined order, and the same processing as above is performed. repeat. On the other hand, when the detection of the number of vias N _G is completed in all areas, the determination in step 306 is affirmed and the present routine is ended.

As described above, in this embodiment, it is detected whether or not the via holes 22 are provided in the first ground layer 14 at a predetermined density, and if they are not provided, the fact is displayed. The designer can easily confirm that the via holes 22 are not provided in the first ground layer 14 at a predetermined density. Therefore, the first ground layer 14
In addition, it is possible to prevent the via holes 22 from being designed such that the via holes 22 are not provided with a predetermined density, and it is possible to design a printed wiring board that emits less electromagnetic waves.

In this embodiment, it is detected whether or not the via holes 22 are present in the first ground layer 14 at a predetermined density. However, the present invention is not limited to this, and the interval between the adjacent via holes 22 is predetermined. Alternatively, it may be detected whether or not the distance is a predetermined distance or less.

Further, when the via holes 22 are not present in the first ground layer 14 at a predetermined density, the fact is displayed on the display 150H, but the present invention is not limited to this.
The printer 156 may print it on a recording sheet, or the recording device 150J may record it on a recording medium.

[Ninth Embodiment] Next, a ninth embodiment of the present invention will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
As shown in FIG. 34, the projection line 15 of the power supply line 26 formed on the first ground layer 14 and the signal line 80 formed on the first signal wiring layer 12 on the first ground layer 14
When 8 and 8 intersect with each other, whether or not the via hole 22 exists within a predetermined range from the intersection O, that is, within the distance e _Cmax from the intersection O is determined based on the CAD data 154 stored in the storage device 150K. To detect.

If the via hole 22 does not exist within the predetermined range from the intersection O of the power line 26 and the projection line 158, the fact is notified.

Next, as the operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 310, as shown in FIG. 34, based on the CAD data 154, the power supply line 2
An intersection O between 6 and the projection line 158 is set.

Next, at step 312, it is detected based on the CAD data 154 whether or not there are two or more via holes 22 within the distance e _Cmax from the intersection point O. Then, when there are two or more via holes 22 within the distance e _Cmax from the intersection point O, the determination in step 312 is affirmed, and the process proceeds to step 314. On the other hand, if two or more via holes 22 do not exist within the distance e _Cmax from the intersection O, the determination in step 312 is denied, and step 31
Move to 8.

At step 318, the distance e from the intersection O
_The display 150H displays that there are no more than two via holes 22 within _Cmax . This allows the designer to easily _select the via hole 2 within the distance e _Cmax from the intersection O.
It can be confirmed that two or more 2 do not exist, that is, the return route of the signal wiring 80 cannot be secured.

At step 314, the CAD data 154
Based on the above, it is determined whether the via holes 22 are on both sides of the power supply line 26. If the via holes 22 are on both sides of the power supply line 26, the step 314 is performed.
Is affirmative, the process proceeds to step 316. on the other hand,
If the via holes 22 are not located on both sides of the power supply line 26, the determination in step 314 is denied and step 320 is performed.
Move to.

At step 320, the display 150 indicates that the via holes 22 are not on both sides of the power supply line 26.
Display on H. As a result, the designer can select the via hole 2
It can be easily confirmed that 2 is not on both sides of the power supply line 26, that is, the return route of the signal wiring 80 cannot be secured. Therefore, it is possible to prevent the via hole 22 from being designed not to be on both sides of the power supply line 26.

At step 316, the via hole 22 is
It is determined whether or not they exist on both sides of the projection line 158. Then, if the via holes 22 are present on both sides of the projection line 158, the determination at step 316 is affirmative, and the present routine ends. On the other hand, when the via holes 22 do not exist on both sides of the projection line 158, the determination at step 316 is denied and the process proceeds to step 322.

At step 322, display 150H displays that via hole 22 does not exist on both sides of projection line 158. Thereby, the designer can easily confirm that the via holes 22 do not exist on both sides of the projection line 158.

Even if the via holes 22 do not exist on both sides of the projection line 158, the return route can be secured, so that the steps 316 and 32 are performed.
Although the processing of 2 may be omitted, the canceling effect due to the return current is increased when the via holes 22 are present on both sides of the projection line 158, as compared with the case where the via holes 22 are present on only one side. Therefore, it is more preferable to perform the processes of step 316 and step 322.

The above processing is performed for all power supply lines and signal lines existing on the printed wiring board.

Also, in the above, the predetermined distance e from the intersection point O
_Although the case of detecting whether or not there are two or more via holes 22 within _Cmax has been described, the present invention is not limited to this, and FIG.
4, whether or not the via hole 22 exists within a predetermined distance e _L in the direction orthogonal to the projection line 158 from the projection line 158, and the power supply line 2 including the intersection O
At least one of whether or not the via hole 22 exists within a predetermined distance e _S in the direction parallel to the projection line 158 from the inner edge portion of the ground pattern 24 existing around 6 may be detected.

[Tenth Embodiment] Next, the tenth embodiment of the present invention.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

The power supply line 26 formed on the first ground layer 14 and the signal wiring 80 formed on the first signal wiring layer 12.
If the projection line 158 on the first ground layer 14 is too close to the above, the return current may be adversely affected.

Therefore, in the present embodiment, the design support device 1
Reference numeral 50 detects whether or not the power supply line 26 and the projection line 158 are too close to each other. That is, as shown in FIG. 36, it is detected whether or not the projection line 158 is present within a predetermined warning area H _W , that is, whether or not the projection line 158 is separated by a predetermined distance H _min or more. When 158 exists in the warning area H _W , the length L _{W of the} existing part is present.
Is detected based on the CAD data 154.

Then, the length L _W is a predetermined length L _Wmax
If it exceeds the limit, the fact is notified.

Next, as the operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 330, as shown in FIG. 36, a range within a predetermined distance H _min from both ends of the power supply line 26 is set as a warning area H _W.

Next, at step 332, based on the CAD data 154, it is detected whether or not a part or all of the projection line 158 exists within the warning area H _W. Then, if part or all of the projection line 158 does not exist within the warning area H _W , the determination at step 332 is affirmative, and the present routine ends.

On the other hand, when part or all of the projection line 158 exists within the warning area H _W , the determination at step 332 is affirmative, and the process proceeds to step 334.

In step 334, the length L _W of the projection line 158 existing in the warning area H _W is detected based on the CAD data 154. Then, in the next step 336, it is determined whether or not the length L _W of the projection line 158 existing in the warning area H _W is less than or equal to a predetermined length L _Wmax .

The projection line 1 existing in the warning area H _W
If the length L _{W of} 58 is less than or equal to the predetermined length L _Wmax , the determination at step 336 is affirmed, and this routine is ended. On the other hand, when the length L _W of the projection line 158 existing in the warning area H _W is not less than or equal to the predetermined length L _Wmax , the determination at step 336 is denied and the process proceeds to step 338.

At step 338, the length L _W of the projection line 158 existing in the warning area H _W is the predetermined length L.
_It is displayed on the display 150H that it is not less than _Wmax . Thereby, the designer confirms that the length L _W of the projection line 158 existing in the warning area H _W is not less than the predetermined length L _Wmax , that is, the return current may be adversely affected. It can be easily confirmed, and it is possible to prevent the length L _W of the projection line 158 existing in the warning area H _W from being designed to exceed the predetermined length L _Wmax. .

The above process is performed for all the power supply lines and signal lines existing on the printed wiring board.

The projection line 15 existing in the warning area H _W
If the length L _{W of} 8 is not less than or equal to a predetermined length L _Wmax , as shown in FIG. 34, the via hole 22 is designed so that the projection line 158 intersects with the power supply line 26. The length L _W of the projection line 158 existing in the warning area H _W can be shortened by providing it on both sides with 26 in between. Therefore, such a design may be displayed on the display 150H as advice information.

[Eleventh Embodiment] Next, the eleventh embodiment of the present invention.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

When the power line 26 formed on the first ground layer 14 and the projection line of the power line 30 formed on the second ground layer 16 on the first ground layer 14 are too close to each other, the ground area is It may become unstable.

Therefore, in the present embodiment, the design support device 1
50 is the first ground layer 1 of the power supply line 26 and the power supply line 30.
It is detected whether or not the projection line on 4 is too close. For example, an opening 160 for forming the power supply line 26 of the first ground layer 14 as shown in FIG.
And FIG. 38B shows a case where the opening for forming the power supply line 30 of the second ground layer 16 and the projection opening 162 on the first ground layer 14 are overlapped with each other. As shown in FIG. 38 (C), the opening 1 at the portion where the opening 160 and the projection opening 162 are parallel to each other.
The distance W _g between 60 and the projection opening 162 is the CAD data 1
It detects based on 54.

The distance W _g is a predetermined distance W _gmin
If not, the fact is notified.

Next, as the operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 340, the opening 1
60 or the integrated aperture area 164 formed by the projection aperture 162 is detected based on the CAD data 154.
That is, the cumulative opening area 164 is an area obtained by taking the logical sum of the opening 160 and the projection opening 162.

Next, at step 342, in the cumulative opening area 164, as shown in FIG. 38C, at the location where the opening 160 and the projection opening 162 are substantially parallel, the opening 160 and the projection opening are formed. The distance W _g from the portion 162 is C
It is detected based on the AD data 154.

Then, in step 344, it is determined whether or not the distance W _g between the opening 160 and the projection opening 162 is a predetermined distance W _gmin or more. And the distance W
_{If g} is greater than or equal to the predetermined distance W _gmin , the determination at step 344 is affirmed and this routine is ended.

On the other hand, if the distance W _g between the opening 160 and the projection opening 162 is not greater than or equal to the predetermined distance W _gmin , the determination at step 344 is denied and step 346.
Move to.

In step 346, the display 150H displays that the distance W _g between the opening 160 and the projection opening 162 is not more than the predetermined distance W _gmin . As a result, the designer finds that the distance W _g between the opening 160 and the projection opening 162 is not greater than or _{equal to the} predetermined distance W _gmin , that is, the power supply line 26 and the power supply line 30 are too close to each other,
It can be easily confirmed that the ground region may become unstable, and it is possible to prevent the power supply line 26 and the power supply line 30 from being designed too close to each other.

[Twelfth Embodiment] Next, the twelfth embodiment of the present invention.
An embodiment will be described. In this embodiment, another form of the eleventh embodiment will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
As a method of detecting whether or not the power line 26 and the projection line of the power line 30 on the first ground layer 14 are too close to each other, as shown in FIG. 38C, the opening 160 and the projection opening are provided. The overlapping opening area 166 overlapping 162 is detected, and the length l _h of this overlapping opening area 166 is detected based on the CAD data 154.

If the length l _h of the overlapping area 166 is not less than the predetermined length l _hmax , the fact is notified.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 350, the opening 1
60 or the overlapping opening area 164 formed by the projection opening 162 is detected based on the CAD data 154.
That is, the overlapping opening area 164 is an area obtained by taking the logical product of the opening 160 and the projection opening 162.

Next, in step 352, the length l _h of the overlapping opening area 166 is detected based on the CAD data 154.

Then, in step 354, it is determined whether or not the length l _h of the overlapping opening area 166 is less than or equal to a predetermined length l _hmax . Then, when the length l _h of the overlapping opening region 166 is equal to or _shorter than the predetermined length l _hmax , the determination at step 354 is affirmative and the _{process proceeds} to step 356.

On the other hand, if the length l _h of the overlapping opening area 166 is not less than the predetermined length l _hmax , step 35.
The determination of No. 4 is denied, and the process proceeds to step 360.

At step 360, the overlapping opening area 166 is formed.
The display 150H displays that the length l _h is not less than the predetermined length l _hmax . As a result, the designer determines that the length l _h of the overlapping opening area 166 is the predetermined length l _h.
It is not less than _hmax , that is, the power supply line 26 and the power supply line 30.
It can be easily confirmed that and are too close to each other, and the ground area may become unstable.
It is possible to prevent the power line 30 and the power line 30 from being too close to each other.

At step 356, the overlapping opening area 166 is formed.
It is calculated on the basis of the total area S _h of the CAD data 154.

[0310] Then, in step 358, the total area S _h of the overlapping opening region 166 is equal to or less than a predetermined area S _hmax. When the total area S _h of the overlapping opening region 166 is equal to or less than a predetermined area S _hmax, the determination of step 358 is affirmative, the routine ends.

[0311] On the other hand, when the total area S _h of the overlapping opening region 166 is not less than a predetermined area S _hmax is Step 3
The determination at 58 is denied, and the process proceeds to step 362.

At step 362, the overlapping opening area 166 is formed.
Total area S _h of displays that it is not less than a predetermined area S _{hma x} to display 150H. Thus, the designer can total area S _h of the overlapping opening region 166 is not less than a predetermined area S _hmax, namely, too close a power supply line 26 and the power supply line 30 is a possibility that the ground area is unstable It is possible to easily confirm that there is such a situation, and it is possible to prevent the power supply line 26 and the power supply line 30 from being designed too close to each other.

[13th Embodiment] The 13th embodiment of the present invention will now be described.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In this embodiment, the design support device 150 is
It is detected whether or not the ground pattern 24 exists all around the power supply line 26. For example, as shown in FIG. 42, whether the width W of the power supply line 26 is within a predetermined range, or whether the slit width S between the power supply line 26 and the ground pattern 24 is within a predetermined range. Alternatively, it is detected based on the CAD data 154 whether or not the distance e from the end of the ground pattern 24 to the power supply line 26 is a predetermined distance _emin or more.

If the width W of the power supply line 26 is not within the predetermined range, or if the slit width S between the power supply line 26 and the ground pattern 24 is not within the predetermined range, the end of the ground pattern 24 is From the power line to the power line 26
Is not more than the predetermined distance e _min , the fact is notified.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 370, the power supply line 2
A check position 168 for checking the width of 6 is set.
Next, in step 372, regarding the power supply line 26,
The calculation process of the power line width W shown in FIG. 44 is performed.

In the process of calculating the power line width W shown in FIG. 44,
First, in step 400, the power line width W ₀ at the set check position 168 is calculated based on the CAD data 154.

Then, in the next step 402, it is determined based on the CAD data 154 whether or not there is a discontinuous area within the power line width W ₀ of the power line 26 at the check position 168. That is, for example, in FIG.
As shown in (A), the power line 26 has a clearance (hole).
It is determined whether 170 exists. The clearance 170 is provided, for example, for an IC pin or a connector mounting hole. In such a case, the power supply line width of the power supply line 26 can be equivalent to the width of the power supply line 26 becoming narrower as shown in FIG.

Therefore, if there is a discontinuous area within the power line width W ₀ of the power line 26 at the check position 168, that is, if the clearance 170 exists at the power line 26 at the check position 168, the step is performed. The determination at 402 is denied, and the process proceeds to step 406.

At step 406, the calculated power line width W
For example, the diameter α of the clearance 170 is subtracted from ₀ , and this is set as the power line width W.

On the other hand, when the clearance 170 does not exist on the power supply line 26, the determination at step 402 is affirmative and the routine proceeds to step 404. In step 404,
The power supply line width W ₀ is set as the power supply line width W, and this routine ends.

Since the power supply line width W is calculated in this way, when the clearance 170 is provided in the power supply line 26, as shown in FIG.
It is necessary to design as shown in FIG. With this design, the power line 26 has a clearance 1
Even when 70 is present, stable power supply can be performed.

When the calculation of the power line width W is completed,
In step 374 of FIG. 43, it is determined whether or not the power line width W is equal to or greater than the predetermined minimum width W _min and equal to or less than the predetermined maximum width W _max . Power line width W is minimum width W
If it is greater than or equal to _{min and} less than or equal to the maximum width W _max , the determination at step 374 is affirmative and the process proceeds to step 376.

On the other hand, when the power line width W is the minimum width W _min or more,
If it is not less than the maximum width W _max , step 374.
Is denied, the process moves to step 386.

At step 386, it is displayed on the display 150H that the power line width W is not less than the minimum width W _min and not less than the maximum width W _max . This allows the designer to
It is possible to easily confirm that the power supply line width W is not less than the minimum width W _{min and not} more than the maximum width W _max , that is, there is a possibility that stable power supply may not be performed, and the power supply line width W is narrow. It is possible to prevent the design from becoming too thick or unnecessarily thick.

At step 376, check position 168
It is detected based on the CAD data 154 whether or not the positions facing each other across the slit are the ground pattern.
If the check pattern 168 is located on the ground pattern at the positions facing each other across the slit, step 3
The determination at 76 is affirmative, and the process proceeds to step 378. On the other hand, if the check positions 168 facing each other across the slit are not the ground pattern, step 376 is performed.
Is denied, the process moves to step 388.

At step 388, the check position 168 is detected.
The display 150H displays that the positions facing each other across the slit are not the ground pattern. As a result, the designer can effectively suppress electromagnetic wave radiation because the positions facing each other across the slit at the check position 168 are not the ground pattern, that is, there is a region without the ground pattern around the power supply line 26. It is possible to easily confirm that there is a possibility that the power line 26
It is possible to prevent a design in which there is a region having no ground pattern around the.

At step 378, the slit width S of the slit between the power supply line 26 and the ground pattern 24 is set to CA.
It is calculated based on the D data 154.

Next, at step 380, it is judged if the slit width S is not less than the predetermined minimum width S _{min and not} more than the predetermined maximum width S _max . And
If the slit width S is greater than or equal to the minimum width S _min and less than or equal to the maximum width S _max , the determination at step 380 is affirmed,
Control goes to step 382.

On the other hand, if the slit width S is greater than or equal to the minimum width S _min and less than or equal to the maximum width S _max , then step 3
The determination of 80 is denied, and the routine goes to Step 390.

In step 390, it is displayed on the display 150H that the slit width S is not less than the minimum width S _{min and not} more than the maximum width S _max . As a result, the designer finds that the slit width S is the minimum width S _min or more and the maximum width S
It can be easily confirmed that it is not less than _max , that is, there is a possibility that effective electromagnetic radiation cannot be suppressed, and it is possible to prevent the slit width S from being designed to be too thin or too thick.

At step 390, the check position 168
The distance e from the facing position across the slit of to the end of the ground pattern 24 in the width direction of the power supply line is CAD.
It is calculated based on the data 154.

Next, at step 384, it is judged whether or not the calculated distance e is _{equal to} or more than a predetermined minimum distance _emin . Then, the distance e is a predetermined minimum distance e _min
In the case of the above, the determination in step 384 is affirmed, and the process proceeds to step 385. On the other hand, the calculated distance e
There If not minimum distance e _min or more predetermined, the determination in step 384 is negative, the process proceeds to step 392.

[0335] At step 392, a display that distance e is not minimum distance e _min or more a predetermined 150H
To display. As a result, the designer finds that the distance e is not greater than or equal to the predetermined minimum distance _emin , that is, the power supply line 2
It is possible to easily confirm that the distance from 6 to the edge of the substrate is short and the electromagnetic wave radiation may not be effectively suppressed, and the distance from the power supply line 26 to the edge of the substrate becomes short. It can be prevented from being designed.

At step 385, the check position 168
It is determined whether or not has made one round around the power supply line 26. Then, when the check position 168 makes one round around the power supply line 26, the determination in step 385 is affirmed, and the present routine ends. On the other hand, the check position 168 is the power line 2
If it has not made one round around 6, the determination in step 385 is negative, the process returns to step 370, the check position 168 is moved by a predetermined distance in the arrow direction in FIG. 42, and the same processing as above is repeated. . The above process is performed for all the power supply lines existing on the printed wiring board.

As described above, whether or not the width W of the power supply line 26 is within a predetermined range, whether or not a ground pattern exists around the power supply line 26, and between the power supply line 26 and the ground pattern 24. In order to detect and warn whether the slit width S is within a predetermined range, whether the distance e from the end of the ground pattern 24 to the power supply line 26 is a predetermined distance _emin or more, and the like, It is possible to easily design a printed wiring board that can stably supply power and suppress electromagnetic wave radiation.

[Fourteenth Embodiment] The fourteenth embodiment of the present invention will now be described.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
Whether or not the via hole 22 exists around the power supply line 26,
It is detected whether or not the distance between the adjacent via holes 22 is within a predetermined distance. For example, as shown in FIG. 46, whether or not the distance e _v from the end of the ground pattern 24 around the power supply line 26 to the via hole 22 is within a predetermined distance e _vmax exists around the power supply line 26. Whether the distance p _v between the adjacent via holes 22 is within a predetermined distance p _vmax determined in advance, that is, whether the via holes 22 are present around the power supply line 26 within a predetermined distance p _vmax, etc. It is detected based on the CAD data 154.

When the distance e _v from the end of the ground pattern 24 around the power supply line 26 to the via hole 22 is not within the predetermined distance e _vmax , the via hole 22 is provided around the power supply line 26 by a predetermined distance p _vmax. If it does not exist within the interval, the fact is notified.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 410, the power supply line 2
6, the via holes 22 existing around 6, that is, the via holes 22 existing near the inner edge of the ground pattern 24.
Is detected based on the CAD data 154.

Next, in step 412, for each via hole 22, the distance e _v from the inner edge side end of the ground pattern 24 to the via hole 22 is CA.
It is calculated based on the D data 154.

In the next step 414, it is determined whether or not the distance e _v from the inner edge side end of the ground pattern 24 to the via hole 22 is less than or equal to a predetermined distance e _vmax for each of the detected via holes 22. To do. Then, if the distance e _v from the inner edge side end of the ground pattern 24 to the via hole 22 is _all less than or equal to the predetermined distance e _vmax , the determination in step 414 is affirmed.
Control goes to step 416.

On the other hand, if some of the distances e _v from the inner edge side end of the ground pattern 24 to the via holes 22 are not less than or equal to the predetermined distance e _vmax ,
The determination in step 414 is denied, and the process proceeds to step 420.

At step 414, the ground pattern 2
Distance e _v from the inner edge side end of 4 to the via hole 22
Is displayed on the display 150H to indicate that there is a distance that is not less than or equal to the predetermined distance e _vmax . As a result, the designer may not be able to properly secure the return route if the distance e _v from the inner edge side end of the ground pattern 24 to the via hole 22 is not equal to or less than the predetermined distance e _vmax. This can be easily confirmed, and design mistakes can be prevented.

At step 416, for each detected via hole 22, the interval p _v between the adjacent via holes 22 is calculated based on the CAD data 154.

At the next step 418, the calculated interval p
For each _v , it is determined whether or not it is less than or equal to a predetermined interval p _vmax . Then, if all the intervals p _v are _{equal to} or less than the predetermined interval p _vmax set in advance, the determination at step 418 is affirmed, and this routine is ended.

On the other hand, the interval p _v is a predetermined interval p
If some of them are not less than _vmax , the determination at step 418 is denied, and the _{routine proceeds} to step 422.

At step 422, it is displayed on the display 150H that there are some whose interval p _v is not less than a predetermined interval p _vmax . With this, the designer can easily confirm that there is a gap in which the spacing p _v is not less than or equal to the predetermined spacing p _vmax , that is, there is a possibility that the return path cannot be properly secured. Design mistakes can be prevented.

[Fifteenth Embodiment] The fifteenth embodiment of the present invention will now be described.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
It is detected whether or not a termination element such as a snubber circuit exists at the end of the power supply line 26. For example, as shown in FIG. 48, the end portion 26A of the power supply line 26 is detected based on the CAD data 154.

Then, a termination element (for example, a snubber circuit) is located within a predetermined distance t _max from the end 26A of the power supply line 26.
If it does not exist, the fact is notified.

Next, as the operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 430, the power supply line 2
The end portion 26A of 6 is detected based on the CAD data 154. For this, for example, a range of a length equal to or shorter than a predetermined value from the end of the power supply line 26 is detected as an end.

At the next step 432, the detected end 2
For each of 6A, it is detected based on the CAD data 154 whether or not the termination element exists within the predetermined distance t _max . Then, when the terminating element exists within the predetermined distance t _max for all of the detected ends 26A, the determination in step 432 is affirmed, and this routine is ended.

On the other hand, if even a part of the termination element does not exist within the predetermined distance t _max from the end portion 26A, the determination at step 432 is denied and the routine proceeds to step 434.

At step 434, the display 150H is made to display that there is a portion where the terminating element does not exist within the predetermined distance t _max from the end portion 26A. Thereby, the designer can easily confirm that there is a portion where the terminating element does not exist within the predetermined distance t _max from the end portion 26A, that is, there is a possibility that the electromagnetic wave radiation cannot be suppressed. , Can prevent design mistakes.

A routine for calculating the characteristic impedance of the power supply line 26 may be further provided to determine the constant of the terminating element based on the calculated characteristic impedance.

[Sixteenth Embodiment] Next, the sixteenth embodiment of the present invention.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
For example, as shown in FIG. 50, the stub length Ls that is the length of the branch power supply line (stub) 26A of the power supply line 26 is calculated based on the CAD data 154.

The stub length L _s is the predetermined length L
If it is not less than or equal to _smax , the fact is notified.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 440, the stub length L _S of the branch power supply line 26A is set for all the branch power supply lines 26B.
Is detected based on the CAD data 154.

At the next step 442, it is determined whether or not each of the detected stub lengths L _s is less than or equal to a predetermined length L _smax . And all branch power lines 26
When A is present, the stub length L _s is a predetermined length L _smax
In the case of the following, the determination in step 442 is affirmed, and this routine is ended.

On the other hand, the stub length L _s is the predetermined length L
_When there is the branch power supply line 26A that is not less than or equal to _smax , the determination at step 442 is denied and the _{process proceeds} to step 444.

At step 444, the display 150H displays that there is the branch power supply line 26A whose stub length L _s is not less than the predetermined length L _smax . Thereby, the designer can easily confirm that there is the branch power supply line 26A whose stub length L _s is not less than or equal to the predetermined length L _smax , and can prevent a design mistake.

[Seventeenth Embodiment] The seventeenth embodiment of the present invention will now be described.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
For example, in the case of a printed wiring board as shown in FIG. 28, as described in the sixth embodiment, the power supply lines are the nodes n ₁ to n which are the intersections of the main power supply line 26A and the branch power supply line 26B.
calculating a maximum current value that might flow through a segment S1~S9 divided by n _4. That is, the nodes n _{1 to} n ₄
The maximum current value that may flow into the CAD data 15
Calculate based on 4. In this case, the CAD data 154
Includes data such as the maximum current value of each IC.

Then, for each of the segments, it is detected whether or not the width of the power supply line of each segment is within a predetermined range that can withstand a current of maximum current value I _max . Here, the predetermined range is, for example, a range of the width of the power supply line in which the temperature rise of the power supply line is equal to or lower than a predetermined value and the potential difference between the nodes is equal to or lower than the predetermined value.

The width of the power supply line of the segment is the maximum current value I
If there is a width that is not within a predetermined range that can withstand a _maximum current, the fact is notified.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG. In addition,
Here, a case of a printed wiring board as shown in FIG. 28 will be described.

First, in step 450, the power supply line is divided at nodes n _{1 to} n ₄ which are the intersections of the main power supply line 26A and the branch power supply line 26B and set as segments S1 to S9.

At step 452, the maximum current value I _max that may flow through each segment is calculated.

At the next step 454, the maximum current value I
_maxMinimum width W corresponding to_min, Maximum width W _maxSeeking each
It This is, for example, the width of the power line and the minimum width W_minAnd up
Greatly W_maxLook-up table
It is stored in the storage device 150K as a bull.
It can be obtained from the look-up table.

At step 456, it is determined for each segment whether or not the width W of the power supply line of the segment is equal to or greater than the corresponding minimum width W _min and equal to or less than the maximum width W _max .

When the width W of the power supply line of each segment is equal to or larger than the corresponding minimum width W _min and equal to or smaller than the maximum width W _max for all the segments, the determination at step 456 is affirmed and this routine is ended. To do.

[0378] On the other hand, the width W of the power line segment, if the corresponding not less than the minimum width W _min or more and the maximum width W _{m ax} segment is present, the determination in step 456 is negative, the process proceeds to step 458 .

At step 458, the display 15 indicates that there is a segment in which the width W of the power line of the segment is not more than the corresponding minimum width W _min and not more than the maximum width W _max.
Display at 0H. Thereby, the designer can easily confirm that there is a segment in which the width W of the power line of the segment is not less than the corresponding minimum width W _min and not more than the maximum width W _max , and a design error can be prevented. it can.

[Eighteenth Embodiment] Next, the eighteenth embodiment of the present invention.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
As shown in FIG. 29, the length of the first branch power supply line 26B ₁ branched from the main power supply line 26A is L1, and the end portion of the _second branch power supply line 26B ₂ to which the IC 36 is connected (the connection portion with the IC 36). ) To the main power supply line 26A of the _first branch power supply line 26B ₁
When the length up to the end not connected to is L2, it is detected based on the CAD data whether L1 and L2 have a predetermined relationship.

Here, as described in the seventh embodiment,
L1 and L2 are the wavelength λ of the target electromagnetic wave radiation frequency
A predetermined multiple (for example, 1/4) of the wavelength λt, that is, L1 = n × λt, L2 = m × λt (n =
In the case of 1,3,5, m = 3,5,7, n <m), electromagnetic wave radiation is likely to occur due to resonance. On the other hand, in other cases, since the resonance currents cancel each other out, electromagnetic wave radiation can be suppressed.

That is, the predetermined relationship means that L2 is an odd value m times the length obtained by dividing L1 by an odd value n (n = 1, 3, 5) (m = 3, 5, 7; m> n). It is a relationship that does not become the length, that is, a relationship that does not become L2 = (m / n) × L1.

If it is detected that L1 and L2 do not have the predetermined relationship, the fact is notified.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, at step 460, as shown in FIG. 29, the length L1 of the _first branch power supply line 26B ₁ branched from the main power supply line 26A is calculated based on the CAD data 154.

Next, in step 462, the IC 36
Second branch power line 26B connected to ₂From the end of the first
Branch power line 26B₁Not connected to the main power supply line 26A of
Based on the CAD data 154, the length L2 up to the other end
Calculate.

At step 464, the calculated L1 and L2 are calculated.
Whether and have a predetermined relationship, that is, L1 and L2
Is not determined to be L2 = (m / n) × L1.

If the calculated L1 and L2 have a predetermined relationship, the determination at step 464 is affirmative, and this routine ends. On the other hand, when the calculated L1 and L2 do not have the predetermined relationship, the determination at step 464 is denied, and the process proceeds to step 466.

At step 466, the calculated L1 and L2 are calculated.
Is not a predetermined relation, that is, L1 and L2 are
The display 150H displays that L2 = (m / n) × L1. This allows the designer to
It can be easily confirmed that L1 and L2 are not in a predetermined relationship, and design mistakes can be prevented.

By the way, as described in the seventh embodiment, when the capacitance exists on the power supply line, the delay time t _d according to the above equation (8) may occur. Therefore, for example, the main power supply line 26A or the branch line is used. If there is capacitance on the power supply line 26B ₂ , add L _d to L2, and if there is capacitance on the branch power supply line 26B ₁ ,
L _d may be added to each of L1 and L2 to set their respective lengths. This makes it possible to prevent design mistakes with higher accuracy.

[19th Embodiment] The 19th embodiment of the present invention will now be described.
An embodiment will be described. In this embodiment, a printed wiring board design support device will be described. The same parts as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the design support device 150 is
As shown in FIG. 54, whether or not the tank capacitor 172 for suppressing electromagnetic wave radiation is provided on the power supply line 26 at a predetermined distance p _Cmax or less, and whether the tank capacitor 172 is within a predetermined distance p _CEmax from the end of the power supply line 26. It detects whether or not the capacitor 172 is present.

If the tank capacitor 172 is not provided on the power supply line 26 at the predetermined interval p _Cmax , and if the tank capacitor 172 does not exist within the predetermined distance p _CEmax from the end of the power supply line 26, that effect is given. To inform.

Next, as an operation of this embodiment, the CPU 1
The processing program executed in 50A will be described with reference to the flowchart shown in FIG.

First, in step 470, the power supply line 2
The tank capacitor 172 connected to 6 is detected based on the CAD data 154.

Next, at step 472, the interval p _C between the tank capacitors 172 is calculated based on the CAD data 154.

[0398] In the next step 474, the interval p _C of each reservoir capacitor 172 which is detected, it is determined whether the interval p _C is less than a predetermined distance p _Cmax a predetermined. If all the intervals p _C are equal to or less than the predetermined interval p _Cmax , the determination at step 474 is affirmative and the process proceeds to step 476.

On the other hand, the interval p _C is a predetermined interval p
If there is something less than _Cmax , step 47.
The determination of No. 4 is denied, and the process proceeds to step 480.

At step 480, the display 150H is made to indicate that there is a distance p _C that is not less than a predetermined distance p _Cmax . This allows the designer to easily confirm that there is a gap p _C that is not less than or equal to the predetermined gap p _Cmax , that is, electromagnetic radiation may not be effectively suppressed. , Can prevent design mistakes.

At step 476, the distance p _CE from the end of the power supply line 26 to the nearest tank capacitor 172 is set to C.
It is calculated based on the AD data 154.

At the next step 478, the calculated distance p
For each _CE , it is determined whether or not it is equal to or less than a predetermined distance p _CEmax . Then, if all the distances p _CE are less than or equal to the predetermined distance p _CEmax , the determination at step 478 is affirmed, and this routine is ended.

On the other hand, the distance p _C is a predetermined distance p
If there is something that is not less than _CEmax , step 4
The determination of 78 is denied, and the routine goes to Step 482.

At step 482, it is displayed on the display 150H that the distance p _C is not less than the predetermined distance p _CEmax . This allows the designer to easily confirm that there is a distance p _C that is not less than or equal to the predetermined distance p _CEmax , that is, electromagnetic radiation may not be effectively suppressed. , Can prevent design mistakes.

It should be noted that an error may be displayed if the type or capacity of the capacitor is not a predetermined value.

Further, the processes described in the eighth to nineteenth embodiments may be arbitrarily combined to check a plurality of design items.

[0407]

As described above, according to the present invention,
The present invention has effects that it can be applied to a circuit board that operates at high speed, electromagnetic wave radiation can be suppressed, and reduction in mounting density can be prevented.

[Brief description of drawings]

1A is a cross-sectional view taken along the line AA of the printed wiring board according to the first embodiment shown in FIG. 1B, and FIG.
It is a schematic plan view of (A).

FIG. 2 is a schematic cross-sectional view of the printed wiring board according to the first embodiment.

FIG. 3 is a schematic cross-sectional view of the printed wiring board according to the first embodiment.

4A is a cross-sectional view taken along the line AA of the printed wiring board according to the second embodiment shown in FIG. 4B, and FIG.
It is a schematic plan view of (A).

FIG. 5 is a first printed wiring board according to a third embodiment.
3 is a schematic plan view of the ground layer of FIG.

FIG. 6 is a first printed wiring board according to a fourth embodiment.
3 is a schematic plan view of the ground layer of FIG.

FIG. 7 is a schematic cross-sectional view showing a modified example of the printed wiring board according to the first embodiment.

FIG. 8 is a schematic plan view of a first ground layer of a printed wiring board according to an example of the present invention.

FIG. 9 is a schematic plan view of a first signal wiring layer of a printed wiring board according to an example of the present invention.

FIG. 10 is a printed wiring board according to an embodiment of the present invention,
It is a diagram which shows the measurement result of the electromagnetic radiation spectrum in the printed wiring board of a conventional structure.

FIG. 11 is a schematic plan view of a first ground layer of the printed wiring board according to the present invention.

12A is a sectional view of a conventional printed wiring board, and FIG. 12B is a sectional view of a printed wiring board according to the present invention.

13A is a plan view of a conventional printed wiring board, and FIG. 13B is a plan view of a printed wiring board according to the present invention.

14A is a plan view of a substrate model used for simulation, and FIG. 14B is a cross-sectional view of FIG. 14A.

15A is a plan view of a substrate model used for simulation, and FIG. 15B is a sectional view of FIG.

FIG. 16 is a plan view of a substrate model used for simulation.

FIG. 17 is a diagram showing the relationship between the distance from the substrate end to the power supply line and the intensity of electromagnetic wave radiation noise.

FIG. 18 is a diagram showing a relationship between frequency and intensity of electromagnetic wave radiation noise.

FIG. 19 (A) is a cross-sectional view taken along the line AA of the printed wiring board according to the fifth embodiment shown in FIG. 19 (B), and FIG.
It is a schematic plan view of (A).

FIG. 20 is a plan view showing an arrangement example of snubber circuits of a printed wiring board according to a fifth embodiment.

FIG. 21 is a plan view showing an arrangement example of snubber circuits on a printed wiring board according to a fifth embodiment.

FIG. 22 is a plan view showing an arrangement example of snubber circuits on a printed wiring board according to a fifth embodiment.

FIG. 23 is a perspective view of a substrate model of the present invention used for simulation.

FIG. 24 is a perspective view of a conventional board model used for simulation.

FIG. 25 is a diagram showing a relationship between frequency and intensity of electromagnetic wave radiation noise. .

FIG. 26 is a diagram showing the relationship between frequency and intensity of electromagnetic wave radiation noise. .

FIG. 27 is a cross-sectional view of a substrate using a coplanar line.

FIG. 28 is a diagram for explaining setting of the width of the power supply line.

FIG. 29 is a diagram for explaining the length of the power supply line.

FIG. 30 is a diagram for explaining the length of a power supply line.

FIG. 31 is a schematic block diagram of a design support device.

FIG. 32 is a plan view of a first ground layer according to the eighth embodiment.

FIG. 33 is a flowchart of a control routine according to the eighth embodiment.

FIG. 34 is a plan view of a first ground layer according to the ninth embodiment.

FIG. 35 is a flowchart of a control routine according to the ninth embodiment.

FIG. 36 is a plan view of a first ground layer according to the tenth embodiment.

FIG. 37 is a flowchart of a control routine according to the tenth embodiment.

FIG. 38 is a plan view of a first ground layer according to the eleventh embodiment.

FIG. 39 is a flowchart of a control routine according to the eleventh embodiment.

FIG. 40 is a plan view of a first ground layer according to the twelfth embodiment.

FIG. 41 is a flowchart of a control routine according to the twelfth embodiment.

FIG. 42 is a plan view of a first ground layer according to the thirteenth embodiment.

FIG. 43 is a flowchart of a control routine according to the thirteenth embodiment.

FIG. 44 is a flowchart of a power supply width calculation processing routine according to the thirteenth embodiment.

FIG. 45 is a plan view of a first ground layer according to the thirteenth embodiment.

FIG. 46 is a plan view of a first ground layer according to the fourteenth embodiment.

FIG. 47 is a flowchart of a control routine according to the 14th embodiment.

FIG. 48 is a plan view of a first ground layer according to the fifteenth embodiment.

FIG. 49 is a flowchart of a control routine according to the fifteenth embodiment.

FIG. 50 is a plan view of the first ground layer according to the sixteenth embodiment.

FIG. 51 is a flowchart of a control routine according to the 16th embodiment.

FIG. 52 is a flowchart of a control routine according to the 17th embodiment.

FIG. 53 is a flowchart of a control routine according to the 18th embodiment.

FIG. 54 is a plan view of the first ground layer according to the nineteenth embodiment.

FIG. 55 is a flowchart of a control routine according to the nineteenth embodiment.

[Explanation of symbols]

10 printed wiring board 12 First signal wiring layer 14 First ground layer 16 Second ground layer 18 Second signal wiring layer 20 insulation 22 Via hole (interlayer connection member) 24, 28 ground pattern 26 First power line 30 Second power line 34 DC voltage power supply 68, 72, 74, 78 Through hole 76, 80, 82, 84 Signal wiring 134 Snubber circuit (termination element)

Front page continuation (51) Int.Cl. ⁷ Identification code FI theme code (reference) H05K 3/00 H05K 3/00 D (72) Inventor Kazumi Ikeda 2274 Hongo, Ebina City, Kanagawa Prefecture Fuji Xerox Co., Ltd. Ebina Business In-house (72) Inventor Osamu Ueno 2274 Hongo, Ebina-shi, Kanagawa Fuji Xerox Co., Ltd. Ebina F-Term (Reference) 5B046 AA07 BA06 JA02 5E338 AA03 BB02 BB13 BB25 BB75 CC02 CC04 CC06 CD01 CD12 CD23 EE13 EE31 5A346 AA01 AA23 AA35 AA43 BB02 BB03 BB04 BB07 BB12 BB15 CC01 CC31 FF01 FF45 GG12 GG31 HH01 HH21 HH31

Claims (30)

[Claims] 1. A printed wiring board in which a signal wiring layer for wiring a signal line, a first ground layer for forming a ground region, and a second ground layer are laminated with an insulating layer interposed therebetween, respectively. A plurality of interlayer connecting members that electrically connect a ground region formed in a ground layer and a ground region formed in the second ground layer, the first ground layer and the second ground layer And a power supply line wired in at least one of the layers, and a printed wiring board. 2. The printed wiring board according to claim 1, wherein the interlayer connection members are provided at a predetermined interval. 3. The predetermined spacing is such that the propagation velocity of a standing wave on the ground region is c and the relative permittivity of the insulating layer is ε.
3. The printed wiring board according to claim 2, wherein r is set to be c / (2 × f × εr ^1/2 ) or less, where r is a maximum frequency of electromagnetic wave radiation to be targeted. . 4. The inter-layer connection member is further provided along at least one of a peripheral edge portion and an inner edge portion of the ground region, and the interlayer connection member according to claim 1. Printed wiring board. 5. The ground region is present at a position of a projection line of the power supply line wired in one ground layer with respect to the other ground layer. The printed wiring board according to. 6. The signal wiring layer according to claim 1, wherein the signal wiring layer is provided between the first ground layer and the second ground layer. Printed wiring board. 7. The power supply line and the signal line are respectively arranged such that a power supply line provided on the ground layer on the signal line side and a projection line of the signal line with respect to the ground layer intersect, and The printed wiring board according to any one of claims 1 to 6, wherein a plurality of interlayer connection members are arranged near both sides of the power supply line. 8. The power supply line and the signal line are arranged so that a power supply line provided on the ground layer on the signal line side and a projection line of the signal line with respect to the ground layer do not intersect with each other. The printed wiring board according to any one of claims 1 to 6. 9. The signal wiring layer is provided on both the first ground layer side and the second ground layer side, and the power supply line is provided on the first ground layer and the second ground layer.
A first power supply line provided on both the ground layers and at least a part of the first power supply line provided on the first ground layer and the first signal wiring layer.
The first power supply line and the first signal line are arranged so that at least a part of the projection line of the signal line with respect to the first ground layer is substantially parallel to the second ground layer. At least a part of the provided second power supply line and at least a part of a projection line of the second signal line formed on the second signal wiring layer with respect to the second ground layer are substantially parallel to each other. 9. The printed wiring board according to claim 8, wherein the second power supply line and the second signal line are arranged as described above. 10. The signal line wiring layer includes a first signal wiring layer and a second signal wiring layer, and the power supply line includes a first power supply line and a second ground layer in the first ground layer. A second power supply line, the first signal wiring layer is arranged adjacent to the first ground layer via the insulating layer, and the second signal wiring layer is arranged in the second ground layer. The printed wiring board according to any one of claims 1 to 8, wherein the printed wiring board is disposed adjacent to each other via the insulating layer. 11. The printed wiring board according to claim 1, wherein the power supply line is disposed inside from an end portion of the board with the ground region interposed therebetween. 12. A printed wiring board in which a signal wiring layer for wiring a signal line, a first ground layer for forming a ground region, and a second ground layer are laminated with an insulating layer interposed therebetween, respectively. A plurality of interlayer connecting members that electrically connect a ground region formed in a ground layer and a ground region formed in the second ground layer, the first ground layer and the second ground layer A power line wired in at least one layer of the power line, near the terminal end of the power line, and the power line and the first line.
And a termination element connected between at least one ground region of the second ground layer and having a matching impedance with the characteristic impedance of the power supply line. . 13. The printed wiring board according to claim 12, wherein the terminating element includes a resistor and a capacitor connected in series. 14. The power supply line comprises a backbone power supply line and a branch power supply line branched from the backbone power supply line, and the terminating element is connected to an end portion of the backbone power supply line. The printed wiring board according to claim 12 or claim 13. 15. The printed wiring board according to claim 14, wherein the termination element is connected to a termination portion of the branch power supply line. 16. The signal wiring layer according to claim 12, wherein the signal wiring layer is formed in the same layer as at least one of the first ground layer and the second ground layer. The printed wiring board according to item 1. 17. The power supply line is composed of a main power supply line and a plurality of branch power supply lines branched from the main power supply line, and the width of the power supply line is respectively connected to the branch power supply line and the main power supply line. The printed wiring board according to any one of claims 1 to 16, wherein the printed wiring board is set on the basis of each of predetermined maximum current values of devices which are operated by a power source supplied from the device. 18. The power supply line comprises a backbone power supply line and a plurality of branch power supply lines branched from the backbone power supply line, and a predetermined first length of the first branch power supply line and the backbone power supply line. A second length from the end of the second branch power line to which the device operated by the power source supplied from the second branch power line is connected to the end of the first branch power line, and the second length is the second length. Odd value m of the length obtained by dividing the first length by the odd value n (n = 1, 3, 5)
The printed wiring according to any one of claims 1 to 17, wherein the printed wiring is set to have a dimension excluding a length that is doubled (m = 3, 5, 7; m> n). substrate. 19. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 1, wherein the storage means stores design data regarding the printed wiring board, and based on the design data. Detecting means for detecting whether or not the interlayer connecting members are present in a predetermined range within a predetermined number, and a predetermined number of the interlayer connecting members within a predetermined range. A printed wiring board design support device comprising: a notifying unit for notifying the absence of the above. 20. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 7, wherein the storage means stores design data regarding the printed wiring board, and based on the design data. The power line provided on the ground layer on the signal line side and the projection line of the signal line intersecting the ground layer within a predetermined predetermined range from the intersection, and on both sides sandwiching the power line. A detection unit that detects whether or not an interlayer connecting member is present, and informs when it is detected that the interlayer connecting member does not exist within a predetermined range from the intersection and on both sides of the power supply line. A printed wiring board design support device, comprising: 21. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 8, wherein the storage means stores design data relating to the printed wiring board, and based on the design data. Detecting means for detecting whether or not the distance between the power supply line provided in the ground layer on the signal line side and the projection line of the signal line with respect to the ground layer is more than a predetermined distance. A printed wiring board design support apparatus comprising: a notification unit that notifies when a distance between a line and the projection line is not longer than a predetermined distance. 22. A printed wiring board design support device for supporting the design of the printed wiring board according to claim 9 or 10, wherein the storage means stores design data regarding the printed wiring board. Detection means for detecting whether or not the first power line and the projection line of the second power line with respect to the first ground layer are separated by a predetermined distance or more based on design data; A printed wiring board design support device comprising: a notification unit that notifies when the first power line and the projection line are not separated by a predetermined distance or more. 23. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 11, wherein the storage means stores design data regarding the printed wiring board, and based on the design data. Detecting means for detecting whether or not the ground region is present around the power supply line within a predetermined distance from the power supply line, and within a predetermined distance from the power supply line and within the power supply. A printed wiring board design support device comprising: a notifying unit for notifying when the ground area does not exist around the line. 24. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 11, wherein the storage means stores design data relating to the printed wiring board, and based on the design data. Detecting means for detecting whether or not the power supply line is separated from the end of the printed wiring board by a predetermined distance or more, and the power supply line is separated from the end of the printed wiring board by a predetermined distance or more. A printed wiring board design support device comprising: a notifying means for notifying that the user is not separated. 25. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 11, wherein the storage means stores design data on the printed wiring board, and based on the design data. And detecting whether the interlayer connecting member is present within a predetermined distance from the end of the ground region around the power supply line, and when the interlayer connecting member is present within the predetermined distance, A detection means for detecting whether or not the interlayer connecting member is arranged at a predetermined interval around the power supply line, and when the interlayer connecting member does not exist within the predetermined distance, and the interlayer connecting member is A notifying means for notifying at least one of the case where the power lines are not arranged at a predetermined interval around the power line, Printed circuit board design support apparatus. 26. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 12, wherein the storage means stores design data regarding the printed wiring board, and based on the design data. Detecting means for detecting whether or not the terminating element is connected to the terminating end of the power supply line, and notification for notifying when the terminating element is not connected to the terminating end of the power supply line A printed wiring board design support apparatus comprising: 27. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 14, wherein the storage means stores design data relating to the printed wiring board, and based on the design data. Detecting means for detecting whether or not the length of the branch power supply line is less than or equal to a predetermined length, and detecting that the length of the branch power supply line is not less than or equal to the predetermined length. A printed wiring board design support device comprising: 28. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 17, comprising: storage means for storing design data relating to the printed wiring board, and based on the design data. And setting means for setting an allowable range of the width of the power source line based on each of predetermined maximum current values of devices which are connected to the branch power source line and operate by a power source supplied from the main power source line. A printed wiring board design support device comprising: a notifying unit for notifying when the width of the power supply line is not within an allowable range. 29. A printed wiring board design support device for supporting the design of a printed wiring board according to claim 18, wherein the storage means stores design data regarding the printed wiring board, and based on the design data. The first length of the predetermined first branch power supply line and the end of the second branch power supply line to which the device operated by the power supplied from the main power supply line is connected. A second length up to the end of the branch power supply line, where the second length is an odd number n (n
= 1, 3, 5) divided by an odd number of times m (m = 3,
5, 7; m> n), and a detecting unit that detects whether or not the relationship is set to a dimension other than the length, and the first length and the second length have the relationship. A printed wiring board design support device comprising: a notifying means for notifying that it does not happen. 30. A printed wiring board in which a signal wiring layer for wiring a signal line, a first ground layer for forming a ground region, and a second ground layer are laminated with an insulating layer interposed therebetween, respectively. A plurality of interlayer connection members that electrically connect a ground region formed in one ground layer and a ground region formed in the second ground layer;
Between a power supply line wired in at least one of the first ground layer and the second ground layer, and between the power supply line and at least one of the first ground layer and the second ground layer In a printed wiring board design support device for supporting the design of a printed wiring board having a plurality of capacitors for stabilizing power supply connected, a storage unit storing design data relating to the printed wiring board, and the design data. And a detecting means for detecting whether or not the plurality of capacitors are provided at intervals of a predetermined distance or more, and the plurality of capacitors are not provided at intervals of a predetermined distance or more. A printed wiring board design support device comprising: a notifying unit for notifying when is detected.