JPH07321429A - Printed-wiring board and designing method - Google Patents

Abstract

PURPOSE:To suppress a radiation noise with high efficiency by a method wherein power-supply lines or grounding lines are formed at prescribed intervals in respectively different directions in a plurality of conductor layers. CONSTITUTION:A plurality of power-supply lines 14a, 15a lie at prescribed intervals on the surface A of a double-sided printed-wiring board 11 in a state that they are arranged in parallel with grounding lines 12a, 13a. Then as a whole, the grounding lines 12a, 13a and the power-supply lines 14a, 15a remain alternate at prescribed intervals. In addition, a plurality of grounding lines 12b, 13b and a plurality of power-supply lines 14b, 15b remain extended and installed also on the rear B so as to be parallel with each other. The lines remain extended and installed on the rear B in such a way that they are at right angles to the lines on the surface A. Then, they remain connected by through holes on their intersections. Thereby, the inductance of conductor layers is made uniform, and a capacitance between a power-supply pattern and a grounding pattern is increased.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board designing method for efficiently suppressing radiation noise that may occur in a printed wiring board and a printed wiring board in which such radiation noise is less likely to occur.

[0002]

2. Description of the Related Art When forming a power supply pattern or a ground pattern on a printed wiring board, a multilayer structure is often used. In a multilayer printed wiring board, a power supply pattern and a ground pattern are formed on the inner layer side, while a signal pattern is formed on the surface layer side on which mounting components and the like are mounted. on the other hand,
In a double-sided printed wiring board or a single-sided printed wiring board, an empty space without a signal pattern is generally formed as a power supply pattern or a ground pattern.

Conventionally, the power supply pattern and the ground pattern formed on the printed wiring board are not particularly considered in relation to the signal frequency which is a problem as a radiation noise source. For this reason, the inductance of the layer on which the power supply pattern is formed and the layer on which the ground pattern is formed vary greatly, and the inductance of one part is significantly higher than that of the other part. When a current flows, potential fluctuations occur, which causes a high level of radiation noise. In particular, when signals are exchanged between ICs on the printed wiring board and active elements such as oscillators, a current flows in the wiring pattern, and a magnetic field is generated around this current. Further, if the conductor through which the current flows has impedance, a potential difference occurs due to the difference in the position of the conductor, and an electric field is generated. The generated magnetic field or electric field becomes a plane wave in the process of radiating diffuse radiation to a distant place. This radiated noise affects other signals, and appears as a problem with reflected noise, crosstalk, or delay in other signals.

Conventionally, in order to prevent the adverse effects of radiation noise, resistors have been placed on the pattern, and inductors and capacitors having frequency characteristics have been placed to cut high frequency components. However, such preventive measures by retrofitting the parts lead to design changes and cost increase. For example, in Japanese Examined Patent Publication No. 1-47032, as shown in FIG. 1, a plurality of parallel ground lines 121, 121 and a plurality of parallel power supply (for example, V _CC ) lines 122, 122 ... Are provided on the back surface of the printed circuit board. , The back side ground lines 121, 121 ... and the power line 1
A plurality of power lines 1 parallel to the plurality of ground lines 131, 131 ...
32, 132 ... Are provided. As shown in FIG. 2, each ground line 121 on the back surface is electrically connected to the ground line 131 on the front surface by a through hole 136 at an intersection. Similarly, each power supply line 122 on the back surface is electrically connected by a through hole 134 at an intersection with the ground line 132 on the front surface. Further, the power supply line and the ground line are connected to each other at a plurality of predetermined positions via a noise prevention capacitor. As is apparent from FIG. 1, this wiring board is provided with a plurality of through holes 150, 150, ... For inserting lead pins of the IC for the purpose of arranging the IC elements on the board. When an IC is inserted, if the IC is a DIP (dual in-line package) type with 14 pins,
The power supply pin (14th pin) is inserted into the through hole 110 as shown in FIG. The ground pin (7th pin) of the adjacent IC is inserted into the through hole 111.

[0005]

However, when the inventors of the present invention tested this printed circuit board of the prior art, the above-mentioned printed circuit board was provided with a capacitor for preventing corner noise, even though the printed circuit board of the prior art was provided. It was found that the level of radiated noise was not reduced. This is because the noise prevention capacitor does not connect the power supply pin and the ground pin of the same IC, but connects the power supply pin and the ground pin of different ICs. Therefore, the effect of suppressing noise is low.

As a result of investigating this cause, the following conclusion was reached. That is, in this conventional technique, the ground lines and the power supply lines are arranged in a grid pattern so as to be orthogonal to each other as shown in FIG. 1 in order to make the grid spacing correspond to the length of the IC package. Depending on the correspondence, I
This is because the C power pin and the ground pin (these pins are at both ends in the longitudinal direction in the DIP type IC) are intended to be inserted into the through hole 110 and the through hole 111, respectively. However, recent ICs have a high operating frequency, and when the power supply line and the ground line are arranged at an interval of about the length of the IC, the level of radiated electromagnetic waves radiated from the signal line or the power supply line is considerably high. Of. The inventors have found that the presence of this high level electromagnetic wave affects the own circuit or another circuit and causes a malfunction.

[0007]

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of designing a printed wiring board capable of efficiently suppressing radiation noise or a printed wiring board having the same suppressed.
The designing method of the present invention for achieving the above object is a method of designing a printed wiring board in which a plurality of power supply lines extended in parallel and signal lines running between the power supply lines are mixed, a: determining a frequency in question, and b: determining a space to be opened between the power supply lines based on this frequency.

The designing method of the present invention for achieving the same object is a method of designing a printed wiring board in which a plurality of power lines extending in parallel and signal lines running between the power lines are mixed. A: determine the frequency in question, b: determine the cross-sectional area formed by two adjacent power supply lines based on this frequency, c: open in the adjacent power supply lines based on this cross-sectional area It is characterized by determining the power interval.

According to the designing method and the wiring board having the above-mentioned configurations,
Power lines (eg positive and negative power lines)
Electromagnetic radiation noise is suppressed because the distance between them is determined according to the frequency in question. According to a preferred aspect of the present invention, the problematic frequency is corrected by a dielectric constant of a material forming the wiring board.

According to a preferred aspect of the present invention, the frequency of high-order harmonics that may be contained in the signal supposed to flow through the wiring board is defined as the frequency of interest. According to a preferred aspect of the present invention, the rising characteristic t _r or the falling characteristic t _{f of the} IC element mounted on this wiring board is
The frequency of interest is determined based on According to a preferred aspect of the present invention, the interval is defined as a length of about 1/20 or less of the wavelength corresponding to the frequency in question.

Another object of the present invention is to provide a method of designing a printed wiring board or a printed wiring board, in which a space between a power supply line and a ground line or a signal line is appropriately set in order to efficiently suppress radiation noise. To do. In order to achieve this object, in the method of the present invention, the wiring board has a plurality of power supply lines and a plurality of power return lines as the power supply line, and the interval is a power supply line and a power supply line adjacent to each other. It is characterized in that it is determined as the interval of the return line.

A printed wiring board according to the present invention for achieving the same object is a printed wiring board having a plurality of power supply lines and a plurality of power return lines formed on a first layer. The supply line and the plurality of power return lines are alternately arranged in parallel with each other on the first layer, and the spacing between the adjacent power supply lines and power return lines becomes a problem in this wiring board. It is characterized in that it is determined based on the frequency.

Another object of the present invention is to provide a method for designing a printed wiring board or a printed wiring board in which a through hole is skillfully provided between a power supply line and a ground line in order to efficiently suppress radiation noise. It is in.
The designing method of the present invention for achieving this object includes a first conductive layer in which a first plurality of power supply lines are extended in parallel, and an insulating layer for a predetermined distance from the first conductive layer. Second conductive layer in which a plurality of second power supply lines extend in parallel while being spaced apart from each other, the first plurality of power supply lines of the first conductive layer, and the second conductive layer. A method of designing a printed wiring board having a plurality of through holes for electrically connecting two intersecting power supply lines at respective positions where the second plurality of power supply lines intersect with each other, wherein: It is characterized in that: the frequency in question is determined, and b: the interval between two through holes connecting arbitrary power supply lines is determined based on this frequency.

Another object of the present invention is to provide a printed wiring board in which both a large power supply line and a thin power supply line are combined with each other to ensure both current capacity and optimum inductance. A printed wiring board according to the present invention for achieving this object is a printed wiring board in which a plurality of power supply lines and a plurality of power return lines are formed on a first layer, and the plurality of power supply lines are provided. The plurality of electric power return lines are alternately arranged in parallel with each other on the first layer, and the plurality of electric power supply lines are provided for every n (≧ 2) thin lines. A plurality of power return lines, each of the plurality of power return lines having a pattern of one thick line for every m (≧ 2) thin lines lined up, and adjacent power supply lines. The distance to the power return line is characterized in that it is determined based on a frequency that causes a problem in this wiring board.

[0015]

Embodiments of the method for designing a printed wiring board according to the present invention will be described below with reference to the accompanying drawings, and then the structure of a board designed by the design method will be described. <Principle of Design> As will be described later, in the substrate designed by the design method of the embodiment, if one surface of the substrate is focused, a plurality of parallel lines are extended in one direction, and in other surfaces, A plurality of parallel lines are installed in one direction. As a result, the lines extended on both sides have a lattice structure or a three-dimensional double girder structure as a whole.
Therefore, the spacing of this lattice or double girder is important. The design method described below illustrates the principle of determining the spacing of the lattice or double girder from two different perspectives. Which design principle is selected depends on the “characteristics of the circuit” realized on the target substrate. In the present specification, "characteristics of the circuit"
Are the output characteristics of the IC (t _r , t _f ), 2: the highest frequency in the signals used on the substrate, and Therefore, these two "characteristics of the circuit"
The design principle will be described in order.

In a designed digital circuit based on t _r and t _f , the operating frequency of the system and the permissible rise time / fall time characteristics of signals flowing through the system (hereinafter, referred to as simple to be called t _r and t _f) and there is. Figure 3,
FIG. 4 shows the intensity of the radiation noise level when the IC devices of 74AC240 and 74HC240 operate, respectively. 74 AC240 has t _r and t _f of 1.4, and 74
Those on the HC 240 are 2.0. As is apparent from these figures, t _r, the intensity of the radiated electromagnetic wave as t _f is small is maintained high levels remain until the higher frequency band. That is, the smaller t _r and t _f (the higher the high-frequency component in the signal), the higher the level of electromagnetic waves radiated over a wide frequency band.

The electromagnetic waves include a traveling wave and a standing wave, but the inventors have noticed that the latter standing wave has the greatest effect as radiation noise. In a standing wave, f = C / λ (C
Is the speed of light). Many standing waves are generated from the line of the circuit pattern having a length equal to the wavelength (λ) or 1 / 2λ. That is, a circuit pattern having such a length is suitable for an antenna that radiates a standing wave of wavelength λ. On the contrary, when the length of the circuit pattern is 1 / 20λ or less, the potential difference on the pattern is experimentally found to be smaller than 1/2 of the amplitude. That is, in a circuit system in which malfunction does not occur if the potential difference due to the influence of the radiated electromagnetic wave is 1/2 or less of the amplitude, the line length of the circuit may be suppressed to 1 / 20λ or less. Figure 5
Shows the relationship between the wavelength λ of the standing wave of the frequency f and the length of the pattern.

[0018] or a standing wave of how much frequency becomes a problem in practical circuit system, according to t _r, t _fn of device used in the actual circuit system in the circuit system. The t _r and t _f of recent ICs are about 1 ns or less. Figure 3,
As shown in Fig. 4, the reduction level of the noise level is 20 dB / o.
The frequency of the change point changing from ct to 40 dB / oct should be considered as the frequency f _{T at} which noise is a problem. This frequency f _T is given by f _T = 1 / (πt _r ) ... (1) On the other hand, normally, the signal from the IC contains a frequency component that is about 2 to 3 times higher than this frequency f _T.
Therefore, in this embodiment, f _T = 3 / (πt _r ) ... (F _t ) on the assumption that the frequency f _T , which is a problem causing noise, is approximately three times as high as the frequency component in the signal. 2) is defined. Therefore, t _r, t _f is about 1ns is recently often used
For the following IC, the frequency in question is f _T = 3 / (π × 1 × 10 ⁻⁹ ) ≈1 (GHz) (3) The dielectric constant ε _r of a printed circuit board is 3.0 if the board has two layers and 4.8 if the board has two or more layers.
Considering the wavelength shortening effect of this dielectric substrate, 3
The wavelength λ of the 1 GHz signal given by the equation is about 150 mm. As described above, if the line length of the pattern is set to 1/20 or less of the wavelength λ of the electromagnetic wave emitted by the line, the intensity of the electromagnetic wave sharply decreases, so that t _r and t _f are about 1
It can be seen that in a circuit system using an IC of ns or less, the line length of the pattern on the substrate may be suppressed to 7.5 mm (= 150 mm / 20) or less. That is, assuming that the shortening rate of the circuit board is α, if the length l of the signal line on the circuit board is suppressed to l ≦ α · (1 / f _T ) · (1/20) (4) or less, Good. By substituting the two equations into the four equations, l ≦ α · {(π · C · _{tr (f)} ) / (3 · 20)} is obtained. However, reducing the length of the signal line more than necessary may increase the cost. Therefore, the length of most of the circuit pattern lines on the circuit board should be within the length given by 4 equations. It should be suppressed to.

In the design of the circuit board, the package arrangement of the IC device has priority, so that it is often difficult to control the length of the signal line. Therefore, in this embodiment, the distance between the power supply line and the ground line is controlled within a certain range, and the signal line is laid between the power supply lines, between the ground lines, or between the power supply line and the ground line. Control the length of. Furthermore,
The power supply line pattern and the ground line pattern are laid out on the front surface of the board, and the power supply line pattern and the ground line pattern are laid out on the back surface of the board. , Are arranged so as to be orthogonal to the power supply line pattern and the ground line pattern provided on the back surface. Then, the two should be conducted through the through hole at the intersection of the front side power line and the back side power line, and the both should be conducted through the through hole at the intersection point of the front side ground line and the back side ground line. Thus, the distance between the signal line and the power supply / ground pattern is substantially controlled. Examples of wiring of such a power supply line and a ground line are shown in FIGS.

6 and 7 explain the significance of concretely controlling the length of the signal line in the designing method of the embodiment. FIG. 6 illustrates how the current i flows through the loop-shaped signal line extended on the front surface (or the back surface) of the substrate.
Similarly, FIG. 7 shows how two signal lines extended on the front surface and the back surface of the substrate are connected by a through hole to form a loop, and a current i flows through the loop. In both figures, assuming that the cross-sectional area of the loop is S, the magnetic flux Φ generated by the current i flowing in this loop is Φ = k · i · S (k is a constant). Since the radiated electromagnetic wave generated by this loop is governed by the magnitude of the magnetic flux Φ, the strength of the electromagnetic wave can be reduced by reducing the magnetic flux Φ. Conventionally, as described above, the current value i is reduced in order to reduce the magnetic flux Φ in designing the substrate, but in the present embodiment, consideration will be given to reducing the area S. That is, in the design method according to the embodiment, the spacing between the power supply line on the front surface or the back surface and the ground line on the front surface or the back surface, the spacing between the power supply lines, or the spacing between the ground lines is determined according to the above-mentioned four expressions. It is defined distance.

FIG. 8 shows a power supply line V extended on the substrate.
_CC2 and ground line G_NDIC1 mounted between 1 and
And a signal line 200 connecting the IC2 and the IC2. Current is
Source line V_CCFlow from 2 to both ICs, then ground light
G_NDFlow into 1. Some of the current goes through signal line 200
Will flow. Power line V_CCIn the vicinity of 2
Source line V_CCSuppose that 1 was installed. Normally, the power source
In has a low impedance, so the power supply line V_CC2 and electric
Source line V_CCIt is considered that there is no potential difference between 1
High density circuit boards have impedance. Gran
Drain G_ND1 and ground line G_NDPotential difference between 2
Is occurring. Therefore, some of the current is the power line V_CC1
Partial ground line G_NDIt flows to 2. On the IC
The power line V_CC1 is also the ground line G_ND2 also power
Line V_CC2 and ground line G _NDFar from each one
Power supply line V_CCFrom 1
Current flowing in and ground line G_NDCurrent flowing into 2
The fact that there are many
This means increasing the cross-sectional area of the flow loop.

Therefore, the power supply line V _CC 1 and the power supply line V _CC
The through hole 201 is connected to _CC 2 to bring the power supply line V _CC 1 and the power supply line V _CC 2 close to the equipotential near the IC 1. Also, it is to close the ground line G _ND 1 and the ground line in the vicinity of the ground line G _ND IC 2 is provided a through hole 202 between 2 G _ND 1 and a ground line G _ND 2 equipotential. This way, the IC
1, IC2, and most of the current flowing through the signal line 200 is supplied from the power supply line V _CC 2 and the ground line _GND.
Reflux to 1. That is, the current flows through the power supply line and the ground line closest to the signal line 200. In addition, by forming a narrow pitch wiring on the front and back sides, the coupling is strengthened in combination with the effect of connecting the V _CC line and the _GND line by the through hole described above, and the high-frequency current is increased. Will concentrate on the IC and signal lines. By doing so, the cross-sectional area of the loop of the signal current can be reduced, and as a result, the intensity of the radiated electromagnetic wave can be weakened.

That is, if the power supply line or the ground line is arranged near the signal line, the mutual inductance between the signal line and the power supply line or the ground line becomes larger, and the impedance is lowered. This is because the effective inductance of the entire system is reduced when currents flowing in opposite directions such as a signal line and a ground line flow. In addition, the inductance L, the capacitance C,
The relationship of the impedance Z ₀ is Z ₀ = {(R + jωL) / (G + jωC)} ^1/2 . However, R: resistance and G: conductance.

If the circuit board is a multi-layer board, if a solid ground pattern is formed on the inner layer, ideally the length of the pattern times the thickness of the layers will be the area of the loop. However, if the pattern is solid, the return current flows through an arbitrary route in the solid pattern, which is not preferable. Therefore, as described above, the method of connecting the front surface and the back surface line by the through hole, that is, the method of forming the front surface line and the back surface line in the double beam structure is adopted.

As for the removal of the noise mainly caused by the magnetic field, the above description has been made about reducing the distance between the power supply lines (or the ground lines) in order to reduce the cross-sectional area S. Next, the position of the signal line is described. A method of suppressing the electric field generated due to the potential difference due to the difference in the above will be described. The fluctuation (voltage) of the potential is determined by the amount of change in the current and the inductance of the line through which the current flows. That is, the potential fluctuation V is V = L · (di / dt). If the inductance L can be reduced, the potential fluctuation V generated between the signal lines at different positions can be reduced, and as a result, the electric field that causes noise can be suppressed. Figure 9,
As will be described later, in the double-girder structure substrate of FIG.
Since the impedances of the ground line and the power supply line are lowered, the potential fluctuation can be suppressed and the generated electric field can be suppressed.

That is, the designing method of this embodiment suppresses radiation noise by reducing the cross-sectional area of the current loop and the potential difference by reducing the inductance. Design based on the highest frequency in a signal Normally, for a high-speed repetitive signal such as a clock signal, the higher the frequency is, the faster the signals t _r and t _f are required, and the rectangular wave that can be used is used. To obtain the above, it is usually necessary to include harmonics up to the 50th order of the original frequency. Therefore, the spacing of the girder or lattice is
The design must be based on 50 times the frequency of the highest repetitive signal in the circuit. That is, if the operating clock of the circuit or the highest frequency signal in the circuit is 30 MHz, its 50th harmonic is 1.5 GHz.
Then, the wavelength is 10 considering the shortening of the wavelength on the printed circuit board.
The length is about 0 mm. Therefore, in order not to generate a radiated electromagnetic wave having a wavelength of about 100 mm, the length of the signal line or the lattice spacing is set to be the same as in the first design method.
1/20 or less of that wavelength (that is, 5 mm or less in this example)
It is necessary to keep

<Example of Designed Circuit Board> The specific designing method of the designing method of the present invention has been described above. An example of a circuit board specifically designed by this design method will be described below with reference to FIGS. 9 and 10. FIG. 9 is a perspective view of the surface of the circuit board 11 designed by the design method described above.
Shows an enlarged view of the surface. In FIGS. 9 and 10, in the reference numerals, those marked with "a" indicate those on the front side, and those marked with "b" indicate those on the back side.

In FIG. 9, a thick line 12a is a ground line, a thick line 14a is a power line, a thin line 13a is a ground line, and a thin line 15a is a power line. That is, FIG.
In the front surface A of the rectangular double-sided printed wiring board 11, a plurality of ground lines 13a are arranged at intervals of about 3 mm from one end side in the width direction thereof in the longitudinal direction of the wiring board 11 (upper and lower sides in FIG. 10). Direction), and the plurality of ground lines 13a are formed in parallel with each other. The width of these ground lines 13a is 1
It may be less than mm, preferably about 0.3 mm. One power supply line 15a extends in the above direction between two thin ground lines 13a. That is, thin ground line 1
3a and thin power supply line 15a are extended on the substrate 11 so as to appear alternately.

Three ground lines 12a and three power lines 1
The ground line 12a and the power supply line 14a are arranged on the substrate 11 so that one thick ground line 12a and one thick power supply line 14a sandwich 5a. As shown in FIG. 9, two thick power supply lines 14a and two thick ground lines 12a are extended on the substrate 11. That is, the thick power supply lines 14a and the thick ground lines are arranged on the substrate 11 so as to alternately appear. The thick power line (or ground line) has a line width of 1 mm or more,
It is preferably about 2 mm.

Similarly, on the surface A of the double-sided printed wiring board 11, 3 mm from the other end in the line direction (the left end in FIG. 10).
A plurality of power supply lines 14a and 15a are formed in parallel with the ground lines 12a and 13a at regular intervals. These are a thick power line 14a having a line width of 1 mm or more, about 2 mm in this embodiment, and a thin power line 15a having a line width of less than 1 mm, about 0.3 mm in this embodiment.
And a plurality of (six in the illustrated example) thin power supply lines 15a between two adjacent thick power supply lines 14a.
Are arranged, and as a whole, the ground lines 12a and 13a and the power supply lines 14a and 15a are alternately arranged at intervals of about 1.5 mm. Therefore, as shown in FIG. 11, the distance between the center of the ground line (12a or 13a) and the center of the power supply line (14a or 15a) is about 1.5 mm.

Also on the back surface B of the double-sided printed wiring board 11, a plurality of thick ground lines 12b and a plurality of thin grounds 13b, a plurality of thick power supply lines 14b and a plurality of thin power supply lines 15b are parallel to each other. Has been extended. Except that these lines extend on the back surface B so as to be orthogonal to the lines on the front surface A,
The arrangement pattern on the back surface B is the same as A. FIG. 12 shows the arrangement pattern on the back surface.

The power supply line on the front surface A (whether thick line or thin line) and the power supply line on the back surface B (whether thick line or thin line) are connected by through holes at their intersections, The ground line on A (whether thick or thin) and the ground line on the back surface B (whether thick or thin) are connected by through holes at their intersections. FIG. 10 shows a connection state of these lines by through holes. In FIG. 10, small circles and large circles indicate through holes. A small circle indicates a through hole for connecting a thin line and a thin line or a thick line of the same potential, and a large circle indicates a through hole for connecting a thick line and a thick line of the same potential. Show. In FIG. 10, for convenience of illustration, a solid line indicates a front side line, and a broken line indicates a back side line. Further, a solid line hatched portion indicates a thick power source or ground line on the front surface side, and a broken line hatched portion indicates a thick power source or ground line on the rear surface side.

FIG. 13 three-dimensionally shows the connection by through holes. As is clear from FIG. 11, according to the wiring method of the embodiment, in all the ground lines (or all the power supply lines), the length in the longitudinal direction of the line defined by the two through holes adjacent in the longitudinal direction. Is 3 mm. Further, as is clear from FIG. 12, in all the ground lines (or all the power supply lines), the length in the horizontal direction of the line divided by the two through holes adjacent in the horizontal direction is also 3 mm.

9 and 10, reference numeral 20a denotes a signal line provided on the front surface A, and 20b denotes a signal line provided on the back surface. These two signal lines are electrically connected by the through hole 21. It is connected. As described above, the substrate 1
In both the front surface A and the back surface B of No. 1, the distance between the adjacent power line and ground line is 1.5 mm. If the line width of the signal line is, for example, about 0.15 mm, a maximum of about 4 to 5 signal lines can be formed. Therefore, for any signal line on the front or back, there is a set of power and ground lines at a distance of 1.5 mm or less. Also,
If an IC 160 as shown in FIG. 14 is provided on the substrate 11, any broken line portion on the two signal lines 160 and 161 from this IC 160 is 1.5 m
There is a set of power and ground lines that are less than or equal to m.

Therefore, in the substrate 11 configured as shown in FIGS. 10 to 14, the area of the loop formed between the signal line and the ground line or the power supply line is reduced, so that the magnetic flux passing through the loop is reduced. The intensity of the radiated electromagnetic wave is weakened. Further, since the impedance formed by the line is also reduced, the electric field strength generated on the substrate is weakened.

FIGS. 15, 16, 17, and 18 respectively show
The distance between two adjacent through holes that connect power lines or ground lines should be approximately 0 mm, 3 mm,
The outline of the power supply and ground line girders on the board when changed to 9mm and 15mm is shown below. Test result FIG. 19 shows that the distance between the two through holes is about 0 mm,
The change in the inductance of the ground line of the wiring board 11 when changed to 3 mm, 9 mm, and 15 mm is shown. Also, FIG.
Is the distance between the above two through holes is approximately 0mm, 3mm,
The relationship between the capacitance between the ground line and the power line when changing to 9mm and 15mm is shown. In addition, FIG.
Is the distance between the above two through holes is approximately 0mm, 3mm,
The figure shows the change in radiation noise that occurs when a signal is passed through the ground line when changing to 9 mm and 15 mm.

As is apparent from FIGS. 19 to 21, it is equivalent to a so-called solid ground pattern in which the distance between the plated through holes 16 and 17 is set to 0 when the distance between the through holes is narrowed to some extent, that is, about 3 mm. It can be understood that various characteristics can be obtained. In the example shown in FIG. 9, the ground lines 12a and 12b and the power supply lines 14a and 14b.
The line width is set to about 2 mm, but if it is 1 mm or more, it is effective in securing these current capacities, and the inductance at low frequencies can be reduced. On the contrary, the ground lines 13a and 13b and the power supply lines 15a and 15b
The inductance at high frequency can be reduced by setting the interval of 5 mm or less, especially about 3 mm. Further, in the above example, the line widths of the ground lines 13a and 13b and the power supply lines 15a and 15b are set to about 0.3 mm, but if the width is less than 1 mm, there is less possibility of impairing the layout of signal lines described later.

Use of Thick Line and Thin Line Overlapping In the design example of FIG. 9, a thick line width line and a thin line width line are applied to both the ground line and the power supply line. This is for the following reason. The thick line width line has the effect of ensuring a DC-like current capacity and lowering the inductance at low frequencies. On the other hand, a thin line lowers the inductance at high frequencies, and because it is thin, it is possible to sew between the signal lines to form a small-sized grid lattice, which is effective in suppressing radiated noise. is there.

As described above, in the example of FIG. 9, by using the lines of two different thicknesses together, the effect of complementing each other can be obtained at the same time. <Other effects of the embodiment>: The conventional normal multilayer substrate has one ground layer. As the current becomes higher in frequency, the skin effect causes the current to flow only on the surface of the ground layer. Therefore, no matter how thick the copper foil on the ground surface of the one layer is, the high frequency impedance does not decrease. However, in the substrate of the above example, in a multilayer substrate, a planar or lattice-shaped ground pattern is formed in a plurality of layers. For this reason, the structure is such that many parallel paths of the ground return current with respect to the signal current are formed, so that the high frequency impedance of the ground in the entire substrate is lowered. : Normally, the ground on the board is not an ideal ground, so there is always an inductance in the ground. Therefore, on the actual substrate, the return current flowing through the ground with respect to the signal current flowing between the ICs induces a voltage spike due to the presence of this inductance, and as a result, a ground vance is generated. However, in the substrate of the above example, by forming a planar or lattice-shaped ground pattern on a portion other than the ground layer, the inductance of the ground is reduced and the voltage spike is naturally reduced. As a result, the ground bounce is reduced. : The voltage waveform of a digital signal is usually a pulse trapezoidal wave. When the output impedance of the output IC is lower than the characteristic impedance of the signal line, an uneven amplitude occurs in the flat portion of the trapezoidal wave, which is usually called ringing. To reduce this ringing, the characteristic impedance of the signal line may be reduced. However, in the substrate of the above example, the capacitive coupling between the signal line and the ground is increased and the characteristic impedance of the signal line is lowered by forming the planar or lattice-shaped ground pattern on the portion other than the ground layer. As a result, the ringing generated in the transmitted wave is reduced. : When some adjacent signal lines are present close to each other on the substrate, crosstalk occurs due to capacitive coupling or inductive coupling between the signal lines. In order to weaken the capacitive coupling between the signal lines, it is necessary to make the distance between the signal line and the ground as short as possible. In the substrate of the above example, the distance between the signal line on the surface layer or the inner layer and the ground is naturally shorter than that of the conventional multilayer board, the capacitive coupling between the signal lines is weakened, and crosstalk is reduced.

The inductive coupling is proportional to the current loop formed by the signal line and the return ground. That is, the larger the current loop, the stronger the inductive coupling. Naturally, in order to reduce this current loop, it is necessary to shorten the distance between the signal line and ground. As in the case of the capacitive coupling described above, in the substrate of the above example, the distance between the signal line and the ground is shorter than that of the conventional multilayer board, the inductive coupling is weakened, and crosstalk is reduced. : The intensity of electromagnetic wave radiation noise generated from the substrate is proportional to the size of the loop area of the current formed by the return current of the signal line and the ground. Therefore, in a board having a structure in which a ground layer exists, such as a multi-layer board, the above-mentioned current loop becomes small because the ground layer exists immediately below the signal line. However, in a normal multilayer substrate, even if a ground layer is provided on one surface of the internal layer, it is not an ideal ground, and therefore inductance will always exist. Due to the presence of this inductance, the return current of the ground flows not only directly under the signal line but also while spreading over the entire substrate. To reduce the spread of this return current, that is, to reduce the radiation noise of electromagnetic waves.

However, in the substrate of the above-mentioned example, the ground line exists in addition to the ground layer, the distance between the signal line and the ground is shortened, and at the same time, the inductance is also reduced and the radiation noise of the electromagnetic wave is reduced. Normally, as an electrostatic test, a high voltage pulse is externally applied to a printed circuit board (for example, to an I / O connector) as electrostatic discharge to test whether or not the board on which the component is mounted malfunctions.

When the substrate structure as in the above embodiment is adopted, the ground pattern is formed in addition to the ground layer, so that the coupling capacitance between the signal line and the ground becomes large. Therefore, in the formula of V = Q / C, if the C (capacitance) of the substrate increases, the voltage (V) naturally induced also decreases if the high voltage pulse from the outside has a constant Q. The voltage fluctuation is reduced and the malfunction of the board is reduced. In addition, in the substrate of the above-mentioned embodiment, a stable printed wiring board having a low power supply inductance distribution or a ground inductance distribution can be obtained by forming a signal pattern between the power supply pattern and the ground pattern without breaking them. The time and cost spent for radiation noise countermeasures and circuit malfunction analysis can be greatly reduced.

Particularly when components are mounted at high density in a limited space, there is no space for mounting additional components for suppressing noise. Further, in the portable computer, there is a problem that the area for the power / ground pattern cannot be secured in order to reduce the total number of substrates. Also,
In a copying machine, there are conditions peculiar to the product such that a plurality of boards in the apparatus are connected by cables and the cables are likely to be antennas. By reducing the number, high-density mounting was possible.

In this embodiment, the double-sided printed wiring board 11 is used as the printed wiring board, but it goes without saying that the present invention can be applied to a multilayer printed wiring board.

[0045]

As described above, according to the printed wiring board designing method of the present invention and the printed wiring board designed by this designing method, the radiation noise can be efficiently suppressed. Specifically, according to the printed wiring board of the present invention, power supply lines or ground lines are formed in a plurality of conductor layers in different directions at predetermined intervals, and these intersecting portions are connected to each other through plated through holes. Therefore, the inductance of the conductive layer on which the power supply pattern is formed and the conductive layer on which the ground pattern is formed are made uniform, and the capacitance of the capacitor between the power supply pattern and the ground pattern rises, resulting in suppression of radiation noise from these. can do.

Further, specifically, these power supply lines or ground lines are constituted by thin line widths and thick line widths arranged through a plurality of power line or ground lines of these thin line widths. Therefore, the problem of insufficient current capacity does not occur, the low-frequency inductance and the high-frequency inductance can be efficiently suppressed, and the printed wiring having excellent radiation noise characteristics can be obtained.

More specifically, by forming a signal pattern between the power supply pattern and the ground pattern without breaking the power supply pattern and the ground pattern, a stable printed wiring board having a low power supply inductance distribution and a ground inductance distribution can be obtained. Therefore, it is possible to significantly reduce the time and cost spent for radiation noise countermeasures and circuit malfunction analysis.

More specifically, there is no space for mounting extra components for suppressing noise, especially when components are mounted in high density in a limited space. Also,
In the portable computer, there is a problem that the area for the power / ground pattern cannot be secured in order to reduce the total number of substrates. Further, in a copying machine, there are conditions peculiar to the product such as a plurality of boards in the apparatus being connected by a cable, and the cable is likely to be an antenna. However, in the high-density mounting of the present invention, radiation noise is reduced. This enabled high-density mounting.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a printed board according to a conventional example.

FIG. 2 is a diagram showing a configuration of a printed board according to a conventional example.

FIG. 3 is a diagram illustrating that a rise time and a fall time are problems in the design method according to the embodiment of the present invention.

FIG. 4 is a diagram explaining that a rise time and a fall time are problems in the design method according to the embodiment of the present invention.

FIG. 5 is a diagram illustrating the principle of the design method according to the embodiment of this invention.

FIG. 6 is a diagram illustrating the principle of the designing method according to the embodiment of this invention.

FIG. 7 is a diagram illustrating the principle of the design method according to the embodiment of this invention.

FIG. 8 is a diagram illustrating the principle of the design method according to the embodiment of this invention.

FIG. 9 is a perspective view schematically showing an appearance of an embodiment in which the printed wiring board according to the present invention is applied to a double-sided printed wiring board.

FIG. 10 is an enlarged plan cutaway view of the double-sided printed wiring board in the example shown in FIG.

FIG. 11 is a diagram showing the shape of the surface of the wiring board according to the example of FIG. 8;

FIG. 12 is a diagram showing the shape of the back surface of the wiring board according to the embodiment of FIG. 8;

FIG. 13 is a diagram showing how through holes are connected in the wiring board of the embodiment.

FIG. 14 is a diagram showing how power supply lines and signal lines are connected by through holes in the wiring board of the embodiment.

FIG. 15 is a diagram showing an example of a pattern of power supply lines.

FIG. 16 is a diagram showing an example of a pattern of power supply lines.

FIG. 17 is a diagram showing an example of a pattern of power supply lines.

FIG. 18 is a diagram showing an example of a pattern of power supply lines.

FIG. 19 is a flag showing the relationship between the spacing of plated through holes and the inductance of the ground pattern.

FIG. 20 is a graph showing the relationship between the spacing of plated through holes and the capacitance between power supply patterns and ground patterns.

FIG. 21 is a graph showing the relationship between the spacing of plated through holes and radiation noise.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yasushi Takeuchi 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Toru Osaka, 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Incorporated (72) Inventor Yoshimi Terayama 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc.

Claims (24)

[Claims] 1. A plurality of power supply lines extending in parallel,
A method of designing a printed wiring board in which signal lines running between power lines are mixed, a: determining a problem frequency, and b: determining an interval to be opened between power lines based on this frequency. A method for designing a printed wiring board, comprising: 2. The method for designing a printed wiring board according to claim 1, wherein the problematic frequency determined in step a is corrected by the dielectric constant of the material forming the wiring board. 3. The printed wiring according to claim 1, wherein, in the step a, a frequency of a high-order harmonic that may be included in a signal supposed to flow through the wiring board is determined as a frequency of interest. How to design a board. 4. The frequency in question is determined in the step a based on the rising characteristic t _r or the falling characteristic t _f of the IC element mounted on the wiring board. How to design a printed wiring board. 5. The step b is characterized in that the interval is defined as a length equal to or less than about 1/20 of a wavelength corresponding to the frequency of interest determined in the step a. The printed wiring board design method described. 6. The wiring board has a plurality of power supply lines and a plurality of power return lines as the power supply lines, and in the step b, the interval is a space between adjacent power supply lines and power return lines. The method for designing a printed wiring board according to claim 1, wherein: 7. The plurality of power supply lines and the plurality of power return lines are repeatedly arranged such that the power supply lines and the power return lines are alternately arranged in parallel. A method for designing a printed wiring board according to. 8. A first conductive layer having a plurality of first power supply lines extending in parallel, and a second conductive layer separated from the first conductive layer by a predetermined distance via an insulating layer. A second conductive layer in which a plurality of power supply lines extend in parallel; the first plurality of power supply lines in the first conductive layer and the second plurality of power supply lines in the second conductive layer A method of designing a printed wiring board having a plurality of through holes for electrically connecting two intersecting power supply lines at respective positions where and intersect, a: determining a frequency in question, b: A method for designing a printed wiring board, characterized in that the interval between two through holes connecting arbitrary power supply lines is determined based on this frequency. 9. The method for designing a printed wiring board according to claim 8, wherein the problematic frequency determined in step a is corrected by a dielectric constant of a material forming the wiring board. 10. The printed wiring according to claim 8, wherein in the step a, a frequency of a high-order harmonic that is likely to be included in a signal supposed to flow through the wiring board is determined as a frequency of interest. How to design a board. 11. The process according to claim 8, wherein in the step a, the frequency in question is determined based on a rising characteristic t _r or a falling characteristic t _f of an IC element mounted on the wiring board. How to design a printed wiring board. 12. In the step b, the distance between the through holes is set to be about 1/20 or less of the wavelength corresponding to the frequency in question determined in the step a. Item 9. A printed wiring board design method according to Item 8. 13. The method for designing a printed wiring board according to claim 8, wherein the two through holes are adjacent to each other. 14. In the step b, any two power supply lines having a separation distance equal to or smaller than the determined distance are selected on the first conductive layer, and the two power supply lines and the two power supplies are selected. The method for designing a printed wiring board according to claim 8, wherein the two power supply lines on the second conductive layer that intersect the lines are connected by through holes. 15. The wiring board has a first plurality of power supply lines parallel to each other and a first plurality of power return lines parallel to each other in the first conductive layer, and second parallel lines. A plurality of power supply lines and a plurality of second power return lines parallel to each other in the second conductive layer, and c: in the first conductive layer, the first plurality of power supplies. A line and the first plurality of power return lines are repeatedly arranged so that the power supply lines and the power return lines are alternately arranged in parallel, and the second plurality of layers are arranged in the second conductive layer. 9. The print according to claim 8, wherein the power supply line and the second plurality of power return lines are repeatedly arranged so that the power supply line and the power return line are alternately arranged in parallel. Distribution Design method of the plate. 16. A method for designing a printed wiring board in which a plurality of power supply lines extending in parallel and signal lines running between the power supply lines coexist, comprising: a: determining a problem frequency; , B: the cross-sectional area formed by two adjacent power supply lines is determined based on this frequency, and c: the spacing to be opened in the adjacent power supply lines is determined based on this cross-sectional area. How to design a board. 17. A printed wiring board having a plurality of power supply lines and a plurality of power return lines formed on a first layer, wherein the plurality of power supply lines and the plurality of power return lines are mutually adjacent. Prints characterized in that they are arranged in parallel and alternately on the first layer, and the interval between adjacent power supply lines and power return lines is determined based on a frequency that is a problem in this wiring board. Wiring board. 18. The printed wiring board further includes a plurality of power supply lines and a plurality of power return lines on a second layer that is separated from the first layer by a predetermined distance, and the power supply line of the first layer. And the power supply line of the second layer are connected by a through hole at their intersection, and the power return line of the first layer and the second power supply line of the second layer are connected.
The printed wiring board according to claim 17, wherein the power return lines of the layers are connected by through holes at their intersections. 19. The printed wiring board according to claim 17, wherein a signal line is arranged between the power supply line and the power return line which are alternately arranged in the one layer. 20. The printed wiring according to claim 17, wherein the frequency in question is determined based on a rising characteristic t _r or a falling characteristic t _f of an IC element mounted on the wiring board. Board. 21. When the wavelength shortening rate of the wiring board is α, the interval between the adjacent power supply line and power return line is α · (π × C × t) / (3 × 2 × 20). The printed wiring board according to claim 20, wherein the printed wiring board is provided. 22. The interval is set to 7.5 mm or less when the rise characteristic t _r or the fall characteristic t _{f of the} IC element mounted on the wiring board is about 1 ns. 21. The printed wiring board described in 21. 23. A printed wiring board having a plurality of power supply lines and a plurality of power return lines formed on a first layer, wherein the plurality of power supply lines and the plurality of power return lines are mutually adjacent. The plurality of power supply lines are alternately arranged in parallel on the first layer, and each of the plurality of power supply lines has a pattern including one thick line for every n (≧ 2) thin lines arranged, The plurality of power return lines have a pattern of m (≧ 2) thin lines arranged for each thin line, and the distance between adjacent power supply lines and power return lines is set to this wiring. A printed wiring board characterized in that it is determined based on a frequency that is a problem in the board. 24. The printed wiring board according to claim 23, wherein the thick line has a line width of 1 mm or more and the thin line has a line width of less than 1 mm.