JP2003163406A - Optical module - Google Patents
Optical moduleInfo
- Publication number
- JP2003163406A JP2003163406A JP2001362387A JP2001362387A JP2003163406A JP 2003163406 A JP2003163406 A JP 2003163406A JP 2001362387 A JP2001362387 A JP 2001362387A JP 2001362387 A JP2001362387 A JP 2001362387A JP 2003163406 A JP2003163406 A JP 2003163406A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- optical
- optical semiconductor
- optical module
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は基体に発光素子や受
光素子などの光半導体素子を配設して成る光モジュール
に関し、特に高速光通信用の光モジュールに関するもの
である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical module in which an optical semiconductor element such as a light emitting element or a light receiving element is provided on a substrate, and more particularly to an optical module for high speed optical communication.
【０００２】[0002]
【従来の技術】現在、低速な電話中心の通信事業から、
デジタルマルチメディアサービスなどに代表される広帯
域の通信事業へと移行し始めている。このように広帯域
への通信需要に従い、通信方式も従来のメタリック方式
から光通信方式に移行し始めている。2. Description of the Related Art Currently, from the low-speed telephone-centered communications business,
It is beginning to shift to a broadband communication business represented by digital multimedia services. As described above, in response to the demand for communication over a wide band, the communication system has begun to shift from the conventional metallic system to the optical communication system.
【０００３】また、光通信方式においても、従来は幹線
系とよばれるバックボーンが中心であったが、最近では
メトロ系やアクセス系に至るまで光通信化が進んでい
る。さらに、企業の事業所などにおけるＬＡＮなどでも
光通信化が進んでいる。Also in the optical communication system, the backbone called the trunk line system has been mainly used in the past, but recently, the optical communication system has been advanced to the metro system and the access system. Further, optical communication is being advanced even in LANs of business establishments of companies.
【０００４】このように、光通信方式が末端の系にまで
進むに従い、光通信に用いられる光コンポーネントの需
要が見こまれる。その光コンポーネントの一つに光送受
信をつかさどる光モジュールがある。この種の光モジュ
ールにおいて、発光素子（レーザーダイオード（ＬＤ）
や発光ダイオード（ＬＥＤ））や受光素子（ＰＤ）の光
半導体素子２１を実装するとき、例えば図４（ａ），
（ｂ）に示すように、誘電体からなるキャリア２０上に
マウントし、キャリア２０上に形成され光半導体素子２
１に接続される線路２２と、光半導体素子２１とをボン
ディングワイヤ２５にて接続することが一般に行われて
いた。As described above, as the optical communication system progresses to the terminal system, the demand for optical components used for optical communication is expected. One of the optical components is an optical module that controls optical transmission and reception. In this type of optical module, a light emitting device (laser diode (LD))
When mounting the optical semiconductor element 21 such as a light emitting diode (LED) or a light receiving element (PD), for example, as shown in FIG.
As shown in (b), the optical semiconductor element 2 is mounted on a carrier 20 made of a dielectric material and formed on the carrier 20.
It has been common practice to connect the line 22 connected to 1 and the optical semiconductor element 21 with a bonding wire 25.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、前述し
たように光モジュールの広帯域（＝高速化）に伴い、光
半導体素子による光／電気変換、あるいは電気／光変換
に用いられる電気信号も高周波化する。このような高周
波信号をボンディングワイヤなどの配線にて伝送するの
はリターン損失などあり、高周波における伝送損失を与
え好ましくない。However, as described above, with the wide band (= higher speed) of the optical module, the optical / electrical conversion by the optical semiconductor element or the electric signal used for the electric / optical conversion is also increased in frequency. . Transmission of such a high-frequency signal through wiring such as a bonding wire is not preferable because it causes a return loss and causes a transmission loss at a high frequency.
【０００６】また、高速化が進むことにより、光半導体
素子の電極形状をコプレーナ線路にすることが考えら
れ、このような光半導体素子を前述したボンディングワ
イヤによる配線で実装するときは、製造工程が増えると
いうコストデメリットが生じる。In addition, it is conceivable that the electrode shape of the optical semiconductor element will be a coplanar line as the speed increases, and when such an optical semiconductor element is mounted by the above-mentioned wiring by the bonding wire, the manufacturing process is There is a cost disadvantage of increasing.
【０００７】そこで、本発明は叙上に鑑みて完成された
ものであり、その目的は発光素子や受光素子などの光半
導体素子を誘電体の基体に実装するとき、高周波信号の
伝送損失を極力低減可能な優れた光モジュールを提供す
ることにある。Therefore, the present invention has been completed in view of the above, and its object is to minimize transmission loss of high frequency signals when an optical semiconductor element such as a light emitting element or a light receiving element is mounted on a dielectric substrate. It is to provide an excellent optical module that can be reduced.
【０００８】また本発明の他の目的は、簡単な製造が行
なえ、製造コストを低減し、その結果、安価な光モジュ
ールを提供することにある。Another object of the present invention is to provide an optical module which can be manufactured easily, which reduces the manufacturing cost and, as a result, is inexpensive.
【０００９】[0009]
【課題を解決するための手段】上述の目的を達成するた
めに、本発明の光モジュールは、基体に形成した凹部内
に、上面に電極及び光機能部が形成された光半導体素子
を配設して、前記基体の表面と前記光半導体素子の上面
を略同一高さにするとともに、前記凹部と前記光半導体
素子の側面との間に絶縁性樹脂を介在させて成り、且つ
前記基体の表面及び前記絶縁性樹脂の表面上に前記光半
導体素子の電極に接続される導体が形成されていること
を特徴とする。In order to achieve the above object, the optical module of the present invention has an optical semiconductor element having an electrode and an optical functional portion formed on the upper surface in a recess formed in a base. The surface of the base and the upper surface of the optical semiconductor element are substantially flush with each other, and an insulating resin is interposed between the recess and the side surface of the optical semiconductor element, and the surface of the base is And a conductor connected to an electrode of the optical semiconductor element is formed on the surface of the insulating resin.
【００１０】ここで、前記導体はコプレーナ型の線路か
ら成ることを特徴とする。さらに、前記光半導体素子が
面発光レーザーであることを特徴とする。Here, the conductor is a coplanar line. Further, the optical semiconductor element is a surface emitting laser.
【００１１】[0011]
【発明の実施の形態】以下に、本発明の実施形態につい
て模式的に図示した図面に基づき詳細に説明する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings schematically showing.
【００１２】図１（ａ）に本発明に係る光モジュールＭ
１の断面図を、図１（ｂ）に光モジュールＭ１の平面図
をそれぞれ示す。この実施形態では光半導体素子１１と
してＰＤ（フォトダイオード）を用いた受信用光モジュ
ールを例に説明する。FIG. 1A shows an optical module M according to the present invention.
1 is a cross-sectional view, and FIG. 1B is a plan view of the optical module M1. In this embodiment, a receiving optical module using a PD (photodiode) as the optical semiconductor element 11 will be described as an example.
【００１３】誘電体から成る基体１０には凹部１０ａが
形成されており、この凹部１０ａ内に上面に電極１３及
び光機能部が形成された光半導体素子１１を配設し、凹
部１０ａと光半導体素子１１側面との間に絶縁性の樹脂
１４を介在させて光半導体素子１１を凹部１０ａ内で固
定している。また、樹脂１４の表面に形成される後記す
る導体１２が断線しないように、基体１０の表面と光半
導体素子１１の上面を略同一高さにしている。さらに、
基体１０及び樹脂１４上に光半導体素子１１に接続され
る導体であるコプレーナ線路１２が形成されている。A concave portion 10a is formed in a substrate 10 made of a dielectric material, and an optical semiconductor element 11 having an electrode 13 and an optical functional portion formed on an upper surface thereof is arranged in the concave portion 10a to form the concave portion 10a and the optical semiconductor. The optical semiconductor element 11 is fixed in the recess 10a with an insulating resin 14 interposed between the optical semiconductor element 11 and the side surface of the element 11. Further, the surface of the substrate 10 and the upper surface of the optical semiconductor element 11 are made substantially flush with each other so that the conductor 12 to be described later formed on the surface of the resin 14 is not broken. further,
A coplanar line 12, which is a conductor connected to the optical semiconductor element 11, is formed on the base 10 and the resin 14.
【００１４】ここで、基体１０は、例えばアルミナが使
用可能である。また、光半導体素子１１は、例えば光機
能部を構成する光活性層としてＩｎＧａＡｓ層を備えた
ＰＩＮ型のＰＤとし、コプレーナ形状を成す電極１３を
備えたものとする。Here, for the substrate 10, for example, alumina can be used. Further, the optical semiconductor element 11 is, for example, a PIN PD having an InGaAs layer as a photoactive layer forming an optical function section, and is provided with an electrode 13 having a coplanar shape.
【００１５】樹脂１４には電気的絶縁性があり、耐熱性
かつ非熱可塑性を備えたものとし、例えばポリイミド樹
脂やガラス布基材エポキシ樹脂（ガラス繊維エポキシ樹
脂）などが好適に用いられ、基体１０に形成された凹部
１０ａと基体１０にマウントした光半導体素子１１との
隙間を埋めている。The resin 14 has electrical insulation, heat resistance and non-thermoplasticity. For example, a polyimide resin or a glass cloth base epoxy resin (glass fiber epoxy resin) is preferably used. A gap between the recess 10 a formed in the optical disk 10 and the optical semiconductor element 11 mounted on the base 10 is filled.
【００１６】光半導体素子１１の電極１３に接続される
コプレーナ線路１２は金から形成され、基体１０の表面
及び樹脂１４の表面上に形成されている。このコプレー
ナ線路１２の設計の詳細は、例えば、Ｒ．Ｈ． Ｈｏｆ
ｆｍａｎ著作の「Ｈａｎｄｂｏｏｋ ｏｆ Ｍｉｃｒｏ
ｗａｖｅ Ｉｎｔｅｇｒａｔｅｄ Ｃｉｒｃｕｉｔ
ｓ」， Ａｒｔｅｃｈ Ｈｏｕｓｅ（１９８７）に記載
されており、線路幅、線路間隔、キャリアの誘電率から
実効的誘電率を求め、インピーダンスの整合がとれるよ
うにする。The coplanar line 12 connected to the electrode 13 of the optical semiconductor element 11 is made of gold and is formed on the surface of the base 10 and the surface of the resin 14. For details of the design of the coplanar line 12, see, for example, R.M. H. Hof
"Handbook of Micro" written by fman
wave Integrated Circuit
S., Artech House (1987), the effective permittivity is obtained from the line width, the line interval, and the permittivity of the carrier so that the impedance can be matched.
【００１７】また、基体１０の表面と光半導体素子１１
の上面を略同一高さにしている。すなわち、導体１２の
厚さをｄ０とし、光半導体素子１１の上面と樹脂１４の
表面との段差をｄ１、樹脂１４の表面と基体１０の表面
との段差をｄ２とした場合にｄ０＞ｄ１、ｄ０＞ｄ２と
の関係にある。この関係は、それぞれ光半導体１１の上
面、樹脂１４の表面１４ａ、基体１０の表面にわたる凹
凸により、胴体１２が断線しないための条件である。The surface of the substrate 10 and the optical semiconductor element 11 are also provided.
The upper surface of the is almost the same height. That is, when the thickness of the conductor 12 is d0, the step between the upper surface of the optical semiconductor element 11 and the surface of the resin 14 is d1, and the step between the surface of the resin 14 and the surface of the substrate 10 is d2, d0> d1, There is a relationship of d0> d2. This relationship is a condition for preventing the body 12 from being broken due to unevenness on the upper surface of the optical semiconductor 11, the surface 14a of the resin 14, and the surface of the base body 10, respectively.
【００１８】さらに、光半導体素子１１と基体１０との
間Ｔの距離は、高周波信号がコプレーナ線路１２により
光半導体素子１１に伝送するためには、短くて自己イン
ダクタンスを短くして、リターン損失を小さくしなけれ
ばならない。Further, the distance T between the optical semiconductor element 11 and the base body 10 is short so that a high frequency signal can be transmitted to the optical semiconductor element 11 through the coplanar line 12, and the self-inductance is shortened to cause a return loss. Must be small.
【００１９】かくして、上記構成の光モジュールＭ１に
よれば、基体１０の凹部１０ａに光半導体素子１１を埋
め込み、光半導体素子１１の電極１３とコプレーナ線路
１２がオーバーラップするように形成することにより、
ボンディングワイヤによる配線を用いなくてよく、さら
に、高周波における伝送損失を極力低減できる。Thus, according to the optical module M1 having the above structure, the optical semiconductor element 11 is embedded in the recess 10a of the base 10 and the electrode 13 of the optical semiconductor element 11 and the coplanar line 12 are formed so as to overlap each other.
It is not necessary to use wiring by a bonding wire, and the transmission loss at high frequency can be reduced as much as possible.
【００２０】また、このようにワイヤーボンディングに
よる接続方式を用いないので、製造工程が簡略化でき、
製造コストを下げ、その結果、低コストな光モジュール
を提供することができる。Further, since the connection method by wire bonding is not used, the manufacturing process can be simplified,
The manufacturing cost can be reduced, and as a result, a low-cost optical module can be provided.
【００２１】また、図３に示すように、前述のＰＤの代
わりに面発光レーザーを用いるとよい。すなわち、光半
導体素子１１としてFabry-PerotレーザーやDFBレーザー
などの面発光レーザーは、光半導体素子１１の端面から
発光する端面発光レーザーとは異なり、光半導体素子１
１の表面(あるいは裏面)から発光するものであり、発光
面方向において素子を容易に実装できるという利点があ
る。この利点は、特にアレイ状になった面発光レーザー
において、ワイヤーボンディングの数を低減できるとい
う顕著な効果が期待できる。Further, as shown in FIG. 3, a surface emitting laser may be used in place of the above PD. That is, a surface emitting laser such as a Fabry-Perot laser or a DFB laser as the optical semiconductor element 11 is different from an edge emitting laser emitting light from an end surface of the optical semiconductor element 11.
Since the light is emitted from the front surface (or the back surface) of No. 1, there is an advantage that the element can be easily mounted in the light emitting surface direction. This advantage can be expected to have a remarkable effect that the number of wire bondings can be reduced particularly in an arrayed surface emitting laser.
【００２２】[0022]
【実施例】以下に、本発明に係る光モジュールを具体的
にした実施例について説明する。EXAMPLES Examples in which the optical module according to the present invention is embodied will be described below.
【００２３】アルミナ（Ａｌ2Ｏ3）から成る基体１０の
凹部１０ａの大きさは、マウントするＩｎＧａＡｓ系の
ＰＩＮ型ＰＤ１１の大きさ（６００μｍ角、厚さ３５５
μｍ）に略等しい形状に形成した。The size of the recess 10a of the substrate 10 made of alumina (Al 2 O 3 ) is the same as the size of the InGaAs PIN type PD 11 to be mounted (square of 600 μm, thickness 355).
(μm).
【００２４】次に、基体１０の凹部１０ａにＰＤ１１を
マウントした。このとき、ＰＤ１１の電極部１３が基体
１０のコプレーナ線路１２を形成する方向にマウントし
た。マウントしたＰＤ１１と基体１０の凹部１０ａの隙
間には、ガラス布基材エポキシ樹脂１４を注入すること
により、ＰＤ１１を固定すると同時に、サブキャリア１
０とＰＤ１１の電気的絶縁性を確保した。Next, the PD 11 was mounted in the recess 10a of the substrate 10. At this time, the electrode portion 13 of the PD 11 was mounted in the direction in which the coplanar line 12 of the substrate 10 was formed. A glass cloth base epoxy resin 14 is injected into the gap between the mounted PD 11 and the recess 10a of the base 10 to fix the PD 11 and at the same time, to subcarrier 1
0 and PD11 were electrically insulated.
【００２５】次に、コプレーナ線路１２は、グランドラ
イン幅１５０mｍ、シグナルライン幅１２０mｍ、ライン
間隔６０mｍに形成した。また、フォトリソグラフィ技
術によりＰＤ１１がマウントされたキャリア１０にフォ
トレジストを塗布し、コプレーナ線路１２とＰＤ１１の
電極１３の一部分がクロスオーバーするようにマスクパ
ターンを用い、露光・現像を行う。その後、抵抗加熱蒸
着（電子銃蒸着などでもよい）によりＡｕの蒸着を行
い、剥離液などでフォトレジストを剥離し、コプレーナ
線路１２を形成した。Next, the coplanar line 12 was formed with a ground line width of 150 mm, a signal line width of 120 mm and a line interval of 60 mm. Further, a photoresist is applied to the carrier 10 on which the PD 11 is mounted by the photolithography technique, and exposure / development is performed using a mask pattern so that the coplanar line 12 and a part of the electrode 13 of the PD 11 cross over. After that, Au was vapor-deposited by resistance heating vapor deposition (or electron gun vapor deposition, etc.), and the photoresist was stripped with a stripping solution or the like to form the coplanar line 12.
【００２６】かくして、この実施例によれば、高周波信
号をボンディングワイヤなどによる高周波信号の伝送損
失を極力低減した光モジュールを提供することができ
た。またワイヤーボンドを用いずに、簡単な製造工程に
することで、製造コストを低減した光モジュールを提供
する効果を確認することができた。Thus, according to this embodiment, it is possible to provide the optical module in which the transmission loss of the high frequency signal due to the bonding wire or the like is reduced as much as possible. In addition, it was possible to confirm the effect of providing an optical module with reduced manufacturing cost by using a simple manufacturing process without using wire bonds.
【００２７】また、光半導体素子１１をPDの代わりに、
図３に示すようなアレイ状の面発光レーザーを適用した
とき、上記の実施例と同様な工程を行うことにより、特
に発光面方向に対して素子等を容易に実装でき、かつ、
ワイヤーボンディングの数を低減した、低コストな光モ
ジュールを提供することができた。Also, instead of the PD, the optical semiconductor element 11 is used.
When the arrayed surface emitting laser as shown in FIG. 3 is applied, by performing the same steps as those in the above-mentioned embodiment, the element or the like can be easily mounted especially in the light emitting surface direction, and
It was possible to provide a low-cost optical module with a reduced number of wire bonds.
【００２８】[0028]
【発明の効果】以上のとおり、本発明の光モジュールで
は、基体に形成した凹部内に、上面に電極及び光機能部
が形成された光半導体素子を配設して、基体の表面と光
半導体素子の上面を略同一高さにするとともに、凹部と
光半導体素子の側面との間に絶縁性樹脂を介在させ、基
体の表面及び前記絶縁性樹脂の表面上に光半導体素子の
電極に接続される導体が形成されている。また特に導体
をコプレーナ型の線路とした。これにより、ワイヤーボ
ンディング配線を用いなくてよく、高周波の伝送損失を
極力低減できる。As described above, in the optical module of the present invention, the optical semiconductor element having the electrode and the optical functional portion formed on the upper surface is disposed in the recess formed in the base, and the surface of the base and the optical semiconductor are disposed. The upper surface of the element is made substantially the same height, and an insulating resin is interposed between the recess and the side surface of the optical semiconductor element, and is connected to the electrode of the optical semiconductor element on the surface of the base and the surface of the insulating resin. Conductor is formed. In addition, the conductor is a coplanar line. As a result, it is not necessary to use wire bonding wiring, and high frequency transmission loss can be reduced as much as possible.
【００２９】また、このようにワイヤーボンディング配
線を用いないので、製造工程が簡略化でき、製造コスト
を下げ、その結果、低コストな光モジュールを提供する
ことができる。Further, since the wire bonding wiring is not used, the manufacturing process can be simplified, the manufacturing cost can be reduced, and as a result, a low cost optical module can be provided.
【図１】本発明に係る光モジュールの実施形態を模式的
に説明する図であり、（ａ）は断面図、（ｂ）は平面図
である。FIG. 1 is a diagram schematically illustrating an embodiment of an optical module according to the present invention, in which (a) is a sectional view and (b) is a plan view.
【図２】コプレーナ形状の電極と光機能部を上面に有す
る光半導体素子を模式的に説明する平面図である。FIG. 2 is a plan view schematically illustrating an optical semiconductor element having a coplanar electrode and an optical function section on the upper surface.
【図３】アレイ状の面発光レーザーを模式的に説明する
平面図である。FIG. 3 is a plan view schematically illustrating an array of surface emitting lasers.
【図４】従来の光モジュールの一例を説明する図であ
り、（ａ）は側面図、（ｂ）は平面図である。FIG. 4 is a diagram illustrating an example of a conventional optical module, (a) is a side view and (b) is a plan view.
１０：基体 １０ａ：凹部 １１：受光素子 １２：コプレーナ線路 １３：受光素子の電極 １４：樹脂 Ｍ１：光モジュール 10: Base 10a: concave portion 11: Light receiving element 12: Coplanar railway 13: Electrode of light receiving element 14: Resin M1: Optical module
Claims (3)
び光機能部が形成された光半導体素子を配設して、前記
基体の表面と前記光半導体素子の上面を略同一高さにす
るとともに、前記凹部と前記光半導体素子の側面との間
に絶縁性樹脂を介在させて成り、且つ前記基体の表面及
び前記絶縁性樹脂の表面上に前記光半導体素子の電極に
接続される導体が形成されていることを特徴とする光モ
ジュール。1. An optical semiconductor element having an electrode and an optical function section formed on the upper surface is disposed in a recess formed in the base body, and the surface of the base body and the upper surface of the optical semiconductor element are arranged at substantially the same height. And a conductor formed by interposing an insulating resin between the recess and the side surface of the optical semiconductor element, and being connected to the electrode of the optical semiconductor element on the surface of the base and the surface of the insulating resin. An optical module characterized by being formed.
体はコプレーナ型の線路から成ることを特徴とする請求
項１に記載の光モジュール。2. The optical module according to claim 1, wherein the base body is made of a dielectric material, and the conductor is made of a coplanar line.
ることを特徴とする請求項１に記載の光モジュール。3. The optical module according to claim 1, wherein the optical semiconductor element is a surface emitting laser.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001362387A JP2003163406A (en) | 2001-11-28 | 2001-11-28 | Optical module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001362387A JP2003163406A (en) | 2001-11-28 | 2001-11-28 | Optical module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003163406A true JP2003163406A (en) | 2003-06-06 |
Family
ID=19172892
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001362387A Pending JP2003163406A (en) | 2001-11-28 | 2001-11-28 | Optical module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003163406A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7911686B2 (en) | 2003-08-14 | 2011-03-22 | Fibest, Ltd. | Optical module and optical communication system |
-
2001
- 2001-11-28 JP JP2001362387A patent/JP2003163406A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7911686B2 (en) | 2003-08-14 | 2011-03-22 | Fibest, Ltd. | Optical module and optical communication system |
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