JP2003152126A - Package substrate and integrated circuit device employing it, and method for manufacturing integrated circuit device - Google Patents

Package substrate and integrated circuit device employing it, and method for manufacturing integrated circuit device

Info

Publication number
JP2003152126A
JP2003152126A JP2001352449A JP2001352449A JP2003152126A JP 2003152126 A JP2003152126 A JP 2003152126A JP 2001352449 A JP2001352449 A JP 2001352449A JP 2001352449 A JP2001352449 A JP 2001352449A JP 2003152126 A JP2003152126 A JP 2003152126A
Authority
JP
Japan
Prior art keywords
integrated circuit
package substrate
acoustic wave
surface acoustic
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001352449A
Other languages
Japanese (ja)
Other versions
JP3647796B2 (en
Inventor
Masahiro Nakano
正洋 中野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP2001352449A priority Critical patent/JP3647796B2/en
Priority to EP02025815.8A priority patent/EP1313214B1/en
Priority to US10/298,228 priority patent/US20030137039A1/en
Publication of JP2003152126A publication Critical patent/JP2003152126A/en
Priority to US10/813,393 priority patent/US7015556B2/en
Application granted granted Critical
Publication of JP3647796B2 publication Critical patent/JP3647796B2/en
Priority to US11/333,316 priority patent/US7132310B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]

Abstract

PROBLEM TO BE SOLVED: To obtain a method for manufacturing a surface acoustic wave device in which the shear strength of a surface acoustic wave element mounted on a package substrate in flip-chip system can be enhanced. SOLUTION: A surface acoustic wave element 11 having a specified conductive pattern and bump electrodes 13 formed on a piezoelectric substrate is prepared, and a package substrate 12 having external connection terminals 12a formed on the terminal forming plane opposite to the element mounting plane for mounting the surface acoustic wave element 11 while being connected electrically with a mounting substrate and a supporting layer 12b thicker than the height of the external connection terminal 12a formed at least in a region corresponding to the mounting position of the surface acoustic wave element 11 is prepared. The package substrate 12 is set on a stage 21 while directing the element mounting plane outward and the supporting layer 12b is touched to the stage 21. Subsequently, ultrasonic vibration is imparted while pressing the surface acoustic wave element 11 in the direction of the supporting layer 12b thus bonding the surface acoustic wave element 11 to the element mounting plane of the package substrate 12.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、パッケージ基板お
よびそれを用いた集積回路装置、ならびに集積回路装置
の製造方法に関し、特に、集積回路素子とパッケージ基
板とが超音波接合された集積回路装置のシェア強度の向
上に適用して有効な技術に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package substrate, an integrated circuit device using the same, and a method for manufacturing the integrated circuit device, and more particularly, to an integrated circuit device in which an integrated circuit element and a package substrate are ultrasonically bonded. The present invention relates to a technology effectively applied to improve the shear strength.

【0002】[0002]

【従来の技術】今日、目覚ましい普及を見せている携帯
電話に代表される移動体通信機器は、小型化が急速に進
められている。それに伴って、移動体通信機器に使用さ
れる部品には、小型化および高性能化が要求されてい
る。
2. Description of the Related Art Today, mobile communication devices represented by mobile phones, which have been remarkably popularized, are rapidly miniaturized. Along with this, miniaturization and higher performance are required for parts used in mobile communication devices.

【0003】ここで、移動体通信機器における信号の分
岐、生成を行うために、分波器が用いられている。分波
器は、帯域通過フィルタ、帯域阻止フィルタ、あるいは
これらの組み合わせにより構成されたものがあるが、一
層の小型化および高性能化を達成するために、相互に異
なる帯域中心周波数を有する2つの弾性表面波素子が搭
載された弾性表面波装置の用いられたものがある。
Here, a demultiplexer is used for branching and generating signals in mobile communication equipment. The duplexer includes a band pass filter, a band stop filter, or a combination thereof, but in order to achieve further miniaturization and higher performance, two duplexers having different band center frequencies from each other are used. There is one in which a surface acoustic wave device equipped with a surface acoustic wave element is used.

【0004】そして、弾性表面波装置では、弾性表面波
素子がフリップチップ方式で搭載されるパッケージ基板
は、樹脂製ではなく、アルミナやLTCC等のように樹
脂よりも硬いセラミック製が主流となっている。
In the surface acoustic wave device, the package substrate on which the surface acoustic wave element is mounted by the flip chip method is not made of resin, but is made of ceramic such as alumina or LTCC which is harder than resin. There is.

【0005】[0005]

【発明が解決しようとする課題】ここで、小型、軽量、
低コストを実現するためには、パッケージ基板は樹脂製
とするのが望ましい。
SUMMARY OF THE INVENTION Here, small size, light weight,
In order to realize low cost, it is desirable that the package substrate is made of resin.

【0006】しかしながら、パッケージ基板をセラミッ
クよりも軟らかな樹脂製にすると、フリップチップ実装
における超音波加振時にパッケージ基板がたわんで超音
波パワーが十分に突起電極とパッケージ基板との接触面
に加わらず、必要なシェア強度を確保することが困難に
なる。
However, if the package substrate is made of a resin softer than that of ceramic, the package substrate is deflected during ultrasonic vibration in flip chip mounting, and the ultrasonic power is not sufficiently applied to the contact surface between the protruding electrode and the package substrate. , It becomes difficult to secure the necessary share strength.

【0007】そして、このような問題は、弾性表面波装
置のみならず、パッケージ基板上に集積回路素子がフリ
ップチップ方式で搭載された集積回路装置全般に当ては
まる問題である。
Such a problem applies not only to the surface acoustic wave device but also to all integrated circuit devices in which integrated circuit elements are mounted on the package substrate by the flip chip method.

【0008】そこで、本発明は、フリップチップ方式で
パッケージ基板に搭載された集積回路素子のシェア強度
の向上を図ることのできるパッケージ基板およびそれを
用いた集積回路装置、ならびに集積回路装置の製造方法
を提供することを目的とする。
Therefore, the present invention provides a package substrate capable of improving the share strength of an integrated circuit element mounted on the package substrate by a flip chip method, an integrated circuit device using the same, and a method of manufacturing the integrated circuit device. The purpose is to provide.

【0009】[0009]

【課題を解決するための手段】上記課題を解決するた
め、本発明に係るパッケージ基板は、素子基板上に所定
の導電パターンおよび突起電極が形成された集積回路素
子を素子搭載面に搭載し得るパッケージ基板であって、
素子搭載面の反対面である端子形成面には、実装基板と
電気的に接続される外部接続端子と、少なくとも集積回
路素子の搭載位置に相当する領域に外部接続端子の高さ
以上の厚みを有する支持層とが形成されていることを特
徴とする。
In order to solve the above-mentioned problems, the package substrate according to the present invention can mount an integrated circuit device having a predetermined conductive pattern and projecting electrodes on the device substrate on the device mounting surface. A package substrate,
On the terminal formation surface, which is the surface opposite to the element mounting surface, an external connection terminal that is electrically connected to the mounting board and a thickness equal to or higher than the height of the external connection terminal should be provided in the area corresponding to at least the mounting position of the integrated circuit element. And a supporting layer having the same are formed.

【0010】また、上記課題を解決するため、本発明に
係る集積回路装置の製造方法は、素子基板上に所定の導
電パターンおよび突起電極が形成された集積回路素子を
用意し、集積回路素子が搭載される素子搭載面との反対
面である端子形成面に、実装基板と電気的に接続される
外部接続端子、および少なくとも集積回路素子の搭載位
置に相当する領域に外部接続端子の高さ以上の厚みを有
する支持層が形成されたパッケージ基板を用意し、素子
搭載面を外側に向けてパッケージ基板をステージ上にセ
ットして支持層とステージとを接触させ、集積回路素子
を支持層方向に押圧しながら超音波振動を与えて当該集
積回路素子をパッケージ基板の素子搭載面に接合するこ
とを特徴とする。
In order to solve the above-mentioned problems, the method of manufacturing an integrated circuit device according to the present invention prepares an integrated circuit element having a predetermined conductive pattern and projecting electrodes formed on an element substrate, and the integrated circuit element is An external connection terminal that is electrically connected to the mounting substrate on the terminal formation surface that is the surface opposite to the element mounting surface to be mounted, and at least the height of the external connection terminal in the area corresponding to the mounting position of the integrated circuit element. A package substrate having a support layer having a thickness of 1 is prepared, the package substrate is set on the stage with the element mounting surface facing outward, and the support layer is brought into contact with the stage to move the integrated circuit element in the support layer direction. It is characterized in that ultrasonic vibration is applied while being pressed to bond the integrated circuit element to the element mounting surface of the package substrate.

【0011】さらに、上記課題を解決するため、本発明
に係る集積回路装置の製造方法は、素子基板上に所定の
導電パターンおよび突起電極が形成された集積回路素子
を用意し、集積回路素子が搭載される素子搭載面との反
対面である端子形成面に実装基板と電気的に接続される
外部接続端子が形成されたパッケージ基板を用意し、記
端子形成面における外部接続端子の形成領域を除いた少
なくとも集積回路素子の搭載位置に相当する領域が当接
可能な支持突起を有するステージを用意し、素子搭載面
を外側に向けてパッケージ基板をステージの支持突起上
にセットし、集積回路素子を支持突起方向に押圧しなが
ら超音波振動を与えて当該集積回路素子をパッケージ基
板の素子搭載面に接合することを特徴とする。
Further, in order to solve the above-mentioned problems, the method for manufacturing an integrated circuit device according to the present invention provides an integrated circuit device having a predetermined conductive pattern and projecting electrodes formed on an element substrate, Prepare a package board with external connection terminals that are electrically connected to the mounting board formed on the terminal formation surface that is the surface opposite to the element mounting surface and mount the external connection terminal formation area on the terminal formation surface. Prepare a stage having a supporting protrusion that can contact at least the area corresponding to the mounting position of the integrated circuit element, and set the package substrate on the supporting protrusion of the stage with the element mounting surface facing outward. Is applied in the direction of the support protrusion to apply ultrasonic vibration to bond the integrated circuit element to the element mounting surface of the package substrate.

【0012】このような発明によれば、超音波接合時に
パッケージ基板がたわむことがないので、フリップチッ
プ方式でパッケージ基板に搭載された集積回路素子のシ
ェア強度を大幅に向上させることが可能になる。
According to this invention, since the package substrate does not bend during ultrasonic bonding, it is possible to greatly improve the shear strength of the integrated circuit element mounted on the package substrate by the flip chip method. .

【0013】[0013]

【発明の実施の形態】以下、本発明の実施の形態を、図
面を参照しつつさらに具体的に説明する。ここで、添付
図面において同一の部材には同一の符号を付しており、
また、重複した説明は省略されている。なお、発明の実
施の形態は、本発明が実施される特に有用な形態として
のものであり、本発明がその実施の形態に限定されるも
のではない。
BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described more specifically with reference to the drawings. Here, in the accompanying drawings, the same reference numerals are given to the same members,
Moreover, the duplicate description is omitted. It should be noted that the embodiment of the present invention is a particularly useful embodiment for carrying out the present invention, and the present invention is not limited to the embodiment.

【0014】図1は本発明の一実施の形態である弾性表
面波素子がパッケージ化された弾性表面波装置を示す断
面図、図2は図1の弾性表面波装置のパッケージ基板を
端子形成面から示す平面図、図3は図1の弾性表面波素
子の回路を示す概略図、図4は図3の弾性表面波素子の
一部を示す平面図、図5は図1の弾性表面波装置におけ
る超音波実装時の状態を示す説明図、図6は図1の弾性
表面波装置における超音波パワーとシェア強度との関係
を比較例とともに示すグラフ、図7は本発明の他の実施
の形態である弾性表面波装置における超音波実装時の状
態を示す説明図である。
FIG. 1 is a cross-sectional view showing a surface acoustic wave device in which a surface acoustic wave element according to an embodiment of the present invention is packaged, and FIG. 2 shows a package substrate of the surface acoustic wave device of FIG. 3 is a schematic view showing a circuit of the surface acoustic wave element of FIG. 1, FIG. 4 is a plan view showing a part of the surface acoustic wave element of FIG. 3, and FIG. 5 is a surface acoustic wave device of FIG. 6 is an explanatory view showing a state at the time of mounting an ultrasonic wave in FIG. 6, FIG. 6 is a graph showing a relationship between ultrasonic power and shear strength in the surface acoustic wave device of FIG. 1 together with a comparative example, and FIG. 7 is another embodiment of the present invention. FIG. 3 is an explanatory diagram showing a state when ultrasonic waves are mounted in the surface acoustic wave device.

【0015】図1に示す弾性表面波装置10は、圧電基
板(素子基板)上に所定の導電パターンおよび突起電極
13が形成された弾性表面波素子(集積回路素子)11
が、単層あるいは複数層からなり所定の配線パターンや
回路パターンの形成された樹脂製のパッケージ基板12
に搭載されたものである。
A surface acoustic wave device 10 shown in FIG. 1 has a surface acoustic wave element (integrated circuit element) 11 in which a predetermined conductive pattern and projecting electrodes 13 are formed on a piezoelectric substrate (element substrate).
Is a resin-made package substrate 12 formed of a single layer or a plurality of layers and having predetermined wiring patterns and circuit patterns formed thereon.
It was installed in.

【0016】そして、弾性表面波素子11における導電
パターンの形成された面はパッケージ基板12と対向配
置されており、図示するように、弾性表面波素子11は
パッケージ基板12の素子搭載面に突起電極13を介し
てフリップチップ接続される。
The surface of the surface acoustic wave device 11 on which the conductive pattern is formed is disposed so as to face the package substrate 12. As shown in the figure, the surface acoustic wave device 11 is provided with a protruding electrode on the device mounting surface of the package substrate 12. Flip-chip connection is made via 13.

【0017】パッケージ基板12には、素子搭載面との
反対面である端子形成面に、図示しないマザーボード
(実装基板)と電気的に接続される外部接続端子12a
が形成されている。さらに、図2に示すように、外部接
続端子12aの形成領域以外には、外部接続端子12a
の高さHよりも厚い厚みTを有する支持層12bが形成
されている。
The package substrate 12 has an external connection terminal 12a electrically connected to a mother board (mounting substrate) (not shown) on a terminal forming surface opposite to the element mounting surface.
Are formed. Further, as shown in FIG. 2, the external connection terminals 12a are provided except in the region where the external connection terminals 12a are formed.
The support layer 12b having a thickness T that is larger than the height H is formed.

【0018】なお、支持層12bは弾性表面波素子11
の搭載位置に相当する領域に形成されていれば足り、本
実施の形態のように、外部接続端子12aの形成領域を
除いた全面に形成されていなくてもよい。但し、支持層
12bは外部接続端子12aを避けて形成されるのは勿
論であり、支持層12bが外部接続端子12aを覆って
形成されることはない。
The support layer 12b is the surface acoustic wave device 11
It suffices that it is formed in a region corresponding to the mounting position of, and it may not be formed over the entire surface except the region where the external connection terminal 12a is formed as in the present embodiment. However, it goes without saying that the support layer 12b is formed avoiding the external connection terminals 12a, and the support layer 12b is not formed so as to cover the external connection terminals 12a.

【0019】ここで、支持層12bによりパッケージ基
板12の端子形成面に形成された外部接続端子12aや
導電パターン間が導通されてしまうことを防止する観点
から、支持層12bは絶縁性を有する部材、たとえばソ
ルダーレジストなどで構成されている。但し、支持層1
2bが外部接続端子12aや導電パターンと非接触で形
成されている場合には、支持層12bは絶縁性を有する
必要はない。
Here, from the viewpoint of preventing conduction between the external connection terminals 12a formed on the terminal formation surface of the package substrate 12 and the conductive patterns by the support layer 12b, the support layer 12b is an insulating member. , A solder resist or the like, for example. However, the support layer 1
When 2b is formed in non-contact with the external connection terminal 12a and the conductive pattern, the support layer 12b does not need to have insulating properties.

【0020】また、支持層12bの厚みTは外部接続端
子12aの高さH以上であればよい。したがって、支持
層12bの厚みTは外部接続端子12aの高さHと同等
でもよく、これより高くてもよい。
The thickness T of the support layer 12b may be equal to or higher than the height H of the external connection terminal 12a. Therefore, the thickness T of the support layer 12b may be equal to or higher than the height H of the external connection terminal 12a.

【0021】ここで、圧電基板は、LiNbO3 、Li
TaO3 や水晶などの圧電単結晶、あるいはチタン酸ジ
ルコン酸鉛系圧電セラミックスのような圧電性セラミッ
クスにより形成されている。但し、絶縁基板上にZnO
薄膜などの圧電薄膜を形成したものを圧電基板として用
いてもよい。
Here, the piezoelectric substrate is LiNbO3, Li
It is formed of a piezoelectric single crystal such as TaO3 or quartz, or a piezoelectric ceramic such as lead zirconate titanate piezoelectric ceramics. However, ZnO on the insulating substrate
A piezoelectric substrate on which a piezoelectric thin film such as a thin film is formed may be used.

【0022】そして、パッケージ基板12には、弾性表
面波素子11を気密封止するキャップ(封止部材)14
が接着されており、弾性表面波素子11を塵埃や機械的
衝撃などから保護している。なお、弾性表面波素子11
は樹脂封止してもよい。
A cap (sealing member) 14 for hermetically sealing the surface acoustic wave element 11 is provided on the package substrate 12.
Are bonded to protect the surface acoustic wave element 11 from dust and mechanical shock. The surface acoustic wave element 11
May be resin-sealed.

【0023】このような弾性表面波装置10に実装され
た弾性表面波素子11の圧電基板上には、図3に示すよ
うに、所定周波数の弾性表面波に共振する励振電極部1
5が形成されている。この励振電極部15には、励振電
極部15とパッケージ基板12とを電気的に接続し、励
振電極部15に対する電気信号が入出力される入力電極
16、出力電極17および接地電極18が配線部19を
介して電気的に接続されている。そして、配線部19は
励振電極部15と電極16,17,18、および励振電
極部15相互間を電気的に接続する。そして、励振電極
部15および配線部19はアルミニウムまたはアルミニ
ウム合金で形成されている。但し、アルミニウムまたは
アルミニウム合金以外の部材が含まれていてもよい。
On the piezoelectric substrate of the surface acoustic wave element 11 mounted on the surface acoustic wave device 10 as described above, as shown in FIG. 3, the excitation electrode portion 1 resonating with the surface acoustic wave of a predetermined frequency is formed.
5 is formed. The excitation electrode portion 15 is electrically connected to the excitation electrode portion 15 and the package substrate 12, and an input electrode 16, an output electrode 17, and a ground electrode 18 for inputting and outputting an electric signal to and from the excitation electrode portion 15 are provided in the wiring portion. It is electrically connected via 19. The wiring portion 19 electrically connects the excitation electrode portion 15 and the electrodes 16, 17, 18 and the excitation electrode portion 15 to each other. The excitation electrode portion 15 and the wiring portion 19 are formed of aluminum or aluminum alloy. However, members other than aluminum or aluminum alloy may be included.

【0024】なお、電極16,17,18とパッケージ
基板12とは、これらに図1に示す突起電極13を形成
し、超音波によりバンプ接続される。
The electrodes 16, 17 and 18 and the package substrate 12 are bump-connected by ultrasonic waves by forming the protruding electrodes 13 shown in FIG. 1 on them.

【0025】ここで、励振電極部15は、図4に示すよ
うに、相互に入り組んだ一対の櫛の歯状に形成されてい
る。そして、入力側の励振電極部15に電圧を印加して
電界をかけると、圧電基板には圧電効果により弾性表面
波が発生する。また、このようにして生成された弾性表
面波による機械的歪みが電界を生じさせ、出力側の励振
電極部15で電気信号に変換される。励振電極部15の
両側には、弾性表面波を反射する反射器20が配置され
ている。
Here, the excitation electrode portion 15 is formed in the shape of a pair of interdigitated comb teeth, as shown in FIG. When a voltage is applied to the excitation electrode section 15 on the input side to apply an electric field, a surface acoustic wave is generated on the piezoelectric substrate due to the piezoelectric effect. Further, the mechanical distortion due to the surface acoustic waves generated in this way causes an electric field, and is converted into an electric signal at the excitation electrode section 15 on the output side. Reflectors 20 for reflecting surface acoustic waves are arranged on both sides of the excitation electrode portion 15.

【0026】なお、本実施の形態は、入力電極16と出
力電極17との間の配線部19を直列腕とし、この直列
腕と接地電極18との間に複数の配線部19である並列
腕を構成し、直列腕および並列腕に励振電極部15を配
置したラダー型回路を構成しているが、ラダー型回路以
外であってもよい。
In this embodiment, the wiring portion 19 between the input electrode 16 and the output electrode 17 is used as a serial arm, and the parallel arm having a plurality of wiring portions 19 is provided between the series arm and the ground electrode 18. , And a ladder type circuit in which the excitation electrode portions 15 are arranged on the series arm and the parallel arm is configured, but the ladder type circuit may be other than the ladder type circuit.

【0027】次に、このような構成を有する弾性表面波
装置の製造方法について、図5を用いて説明する。
Next, a method of manufacturing the surface acoustic wave device having such a structure will be described with reference to FIG.

【0028】先ず、前述した弾性表面波素子11および
パッケージ基板12を用意する。
First, the surface acoustic wave device 11 and the package substrate 12 described above are prepared.

【0029】次に、素子搭載面を外側に向けてパッケー
ジ基板12をステージ21上にセットし、支持層12b
とステージ21とを接触させる。
Next, the package substrate 12 is set on the stage 21 with the element mounting surface facing outward, and the support layer 12b is formed.
And the stage 21 are brought into contact with each other.

【0030】そして、保持部材22に保持された弾性表
面波素子11を支持層12bの方向に押圧しながら超音
波振動を与え、この弾性表面波素子11をパッケージ基
板12の素子搭載面に接合する。
Then, ultrasonic vibration is applied while pressing the surface acoustic wave element 11 held by the holding member 22 toward the support layer 12b, and the surface acoustic wave element 11 is bonded to the element mounting surface of the package substrate 12. .

【0031】なお、弾性表面波素子11をパッケージ基
板12の素子搭載面に接合した後は、弾性表面波素子1
1を包囲するようにしてキャップ14をパッケージ基板
12に接着する。
After the surface acoustic wave element 11 is bonded to the element mounting surface of the package substrate 12, the surface acoustic wave element 1 is
The cap 14 is adhered to the package substrate 12 so as to surround the package substrate 1.

【0032】ここで、パッケージ基板12とステージ2
2との間に位置する支持層12bにより超音波接合時に
おける樹脂製のパッケージ基板12のたわみが阻止され
るので、突起電極13とパッケージ基板12との接触面
には十分な超音波パワーが加わるようになる。
Here, the package substrate 12 and the stage 2
Since the support layer 12b located between the substrate 2 and the substrate 2 prevents the package substrate 12 made of resin from being bent during ultrasonic bonding, sufficient ultrasonic power is applied to the contact surface between the protruding electrode 13 and the package substrate 12. Like

【0033】ここで、超音波パワーとシェア強度との関
係を図6に示す。
FIG. 6 shows the relationship between ultrasonic power and shear strength.

【0034】図6に示すように、パッケージ基板12に
支持層12bを形成することにより、支持層がない場合
に比べて、フリップチップ方式でパッケージ基板12に
搭載された弾性表面波素子11のシェア強度が大幅に向
上する。なお、図6において、支持層がない場合に6W
以上で急激にシェア強度が低下しているのは、6W以上
ではパッケージ基板12の振動により圧電基板(ここで
はLiTaO3 )が割れてしまったためである。
As shown in FIG. 6, by forming the support layer 12b on the package substrate 12, the share of the surface acoustic wave element 11 mounted on the package substrate 12 by the flip chip method is increased as compared with the case where the support layer is not provided. Strength is greatly improved. In addition, in FIG. 6, 6 W is obtained when there is no support layer.
The sharp decrease in shear strength is due to the vibration of the package substrate 12 at 6 W or more because the piezoelectric substrate (here, LiTaO3) is cracked.

【0035】そして、このようにシェア強度が大幅に向
上することから、弾性表面波素子11の接合不良を減少
することができる。
Since the shear strength is greatly improved in this way, the bonding failure of the surface acoustic wave element 11 can be reduced.

【0036】また、これにより、より低い超音波パワー
で十分な接合強度を得ることができることから、弾性表
面波素子11を効率よくパッケージ基板12に接合する
ことが可能になる。
Further, as a result, sufficient bonding strength can be obtained with a lower ultrasonic power, so that the surface acoustic wave element 11 can be bonded to the package substrate 12 efficiently.

【0037】ここで、支持層12は、超音波実装におい
て樹脂製のパッケージ基板12がたわんでシェア強度が
低下することを防止するためのものである。
Here, the support layer 12 is for preventing the resin package substrate 12 from flexing and lowering the shear strength during ultrasonic mounting.

【0038】以上の説明においては、パッケージ基板1
2に支持層12bを形成して超音波実装時におけるパッ
ケージ基板12のたわみを防止しているが、図7に示す
ようにすれば、支持層12bを形成することなくパッケ
ージ基板12のたわみを防止することができる。
In the above description, the package substrate 1
The support layer 12b is formed on the substrate 2 to prevent the package substrate 12 from bending during ultrasonic mounting. However, as shown in FIG. 7, the package substrate 12 is prevented from bending without forming the support layer 12b. can do.

【0039】すなわち、弾性表面波素子11は前述した
ものを、パッケージ基板12は支持層12bの形成され
ていないものを用意する。また、ステージ21は、パッ
ケージ基板12の端子形成面における外部接続端子12
aの形成領域を除いた領域が当接可能な支持突起21a
を有するものを用意する。なお、支持突起21aは少な
くとも弾性表面波素子11の搭載位置に相当する領域が
当接可能であればよく、外部接続端子12aの形成領域
を除いた全ての領域が当接可能になっていなくてもよ
い。
That is, the surface acoustic wave device 11 is prepared as described above, and the package substrate 12 is prepared without the support layer 12b. In addition, the stage 21 includes the external connection terminals 12 on the terminal formation surface of the package substrate 12.
A support protrusion 21a capable of contacting a region other than the region where a is formed
Prepare the one that has. It is sufficient that at least the area corresponding to the mounting position of the surface acoustic wave element 11 can contact the support protrusion 21a, and all the areas except the area where the external connection terminal 12a is formed cannot contact. Good.

【0040】次に、素子搭載面を外側に向けてパッケー
ジ基板12をステージ21の支持突起21a上にセット
する。
Next, the package substrate 12 is set on the support protrusion 21a of the stage 21 with the element mounting surface facing outward.

【0041】そして、保持部材22に保持された弾性表
面波素子11を支持突起21a方向に押圧しながら超音
波振動を与え、この弾性表面波素子11をパッケージ基
板12の素子搭載面に接合する。
Then, ultrasonic vibration is applied while pressing the surface acoustic wave element 11 held by the holding member 22 in the direction of the support protrusion 21a, and the surface acoustic wave element 11 is bonded to the element mounting surface of the package substrate 12.

【0042】これによれば、ステージ22の支持突起2
1aにより超音波接合時における樹脂製のパッケージ基
板12のたわみが阻止されるので、突起電極13とパッ
ケージ基板12との接触面には十分な超音波パワーが加
わるようになる。したがって、フリップチップ方式でパ
ッケージ基板12に搭載された弾性表面波素子11のシ
ェア強度を大幅に向上させることが可能になり、弾性表
面波素子11の接合不良を減少することができる。
According to this, the support projection 2 of the stage 22
Deflection of the resin-made package substrate 12 at the time of ultrasonic bonding is prevented by 1a, so that sufficient ultrasonic power is applied to the contact surface between the protruding electrode 13 and the package substrate 12. Therefore, the shear strength of the surface acoustic wave element 11 mounted on the package substrate 12 by the flip chip method can be significantly improved, and the bonding failure of the surface acoustic wave element 11 can be reduced.

【0043】また、より低い超音波パワーで十分な接合
強度を得ることができることから、弾性表面波素子11
を効率よくパッケージ基板12に接合することが可能に
なる。
Further, since the sufficient bonding strength can be obtained with a lower ultrasonic power, the surface acoustic wave element 11
Can be efficiently bonded to the package substrate 12.

【0044】以上の説明では、弾性表面波素子11が一
個搭載された弾性表面波装置10が示されているが、た
とえば相互に異なる帯域中心周波数を有する2つの弾性
表面波素子を搭載して分波器とするなど、本発明の弾性
表面波素子は種々の形態の弾性表面波装置に適用するこ
とが可能である。
In the above description, the surface acoustic wave device 10 in which one surface acoustic wave element 11 is mounted is shown. However, for example, two surface acoustic wave elements having different band center frequencies are mounted and separated. The surface acoustic wave element of the present invention, such as a wave device, can be applied to various types of surface acoustic wave devices.

【0045】また、本実施の形態において、パッケージ
基板12には、超音波加振時にたわみやすく本願の作用
効果が顕著に現れる樹脂製を適用しているが、セラミッ
ク製であってもよい。
Further, in the present embodiment, the package substrate 12 is made of resin, which easily bends when ultrasonic waves are applied, and the function and effect of the present invention remarkably appear. However, it may be made of ceramic.

【0046】さらに、本発明は、このような弾性表面波
装置に限定されるものではなく、圧電基板やシリコン基
板などの素子基板上に所定の回路パターンが形成された
集積回路素子がパッケージ基板上に搭載された種々の集
積回路装置に適用することができる。
Further, the present invention is not limited to such a surface acoustic wave device, and an integrated circuit element having a predetermined circuit pattern formed on an element substrate such as a piezoelectric substrate or a silicon substrate is provided on a package substrate. The present invention can be applied to various integrated circuit devices mounted in.

【0047】[0047]

【発明の効果】以上の説明から明らかなように、本発明
によれば以下の効果を奏することができる。 (1).超音波接合時におけるパッケージ基板のたわみが阻
止されるので、突起電極とパッケージ基板との接触面に
は十分な超音波パワーが加わるようになり、フリップチ
ップ方式でパッケージ基板に搭載された集積回路素子の
シェア強度を大幅に向上させることが可能になる。 (2).このようにフリップチップ方式でパッケージ基板に
搭載された集積回路素子のシェア強度を大幅に向上させ
ることが可能になることから、集積回路素子の接合不良
を減少することができる。 (3).より低い超音波パワーで十分な接合強度を得ること
ができることから、集積回路素子を効率よくパッケージ
基板に接合することが可能になる。
As is apparent from the above description, according to the present invention, the following effects can be obtained. (1) As the flexure of the package substrate during ultrasonic bonding is prevented, sufficient ultrasonic power is applied to the contact surface between the protruding electrode and the package substrate, and it is mounted on the package substrate by the flip chip method. It is possible to significantly improve the shear strength of the integrated circuit device. (2) Since the shear strength of the integrated circuit device mounted on the package substrate by the flip-chip method can be significantly improved as described above, the bonding failure of the integrated circuit device can be reduced. (3). Since sufficient bonding strength can be obtained with lower ultrasonic power, it becomes possible to efficiently bond the integrated circuit element to the package substrate.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施の形態である弾性表面波素子が
パッケージ化された弾性表面波装置を示す断面図であ
る。
FIG. 1 is a sectional view showing a surface acoustic wave device in which a surface acoustic wave element according to an embodiment of the present invention is packaged.

【図2】図1の弾性表面波装置のパッケージ基板を端子
形成面から示す平面図である。
FIG. 2 is a plan view showing a package substrate of the surface acoustic wave device of FIG. 1 from a terminal formation surface.

【図3】図1の弾性表面波素子の回路を示す概略図であ
る。
FIG. 3 is a schematic diagram showing a circuit of the surface acoustic wave device of FIG.

【図4】図3の弾性表面波素子の一部を示す平面図であ
る。
FIG. 4 is a plan view showing a part of the surface acoustic wave element of FIG.

【図5】図1の弾性表面波装置における超音波実装時の
状態を示す説明図である。
5 is an explanatory diagram showing a state of the surface acoustic wave device of FIG. 1 when ultrasonic waves are mounted.

【図6】図1の弾性表面波装置における超音波パワーと
シェア強度との関係を比較例とともに示すグラフであ
る。
6 is a graph showing the relationship between ultrasonic power and shear strength in the surface acoustic wave device of FIG. 1 together with a comparative example.

【図7】本発明の他の実施の形態である弾性表面波装置
における超音波実装時の状態を示す説明図である。
FIG. 7 is an explanatory diagram showing a state of the surface acoustic wave device according to another embodiment of the present invention at the time of ultrasonic mounting.

【符号の説明】[Explanation of symbols]

10 弾性表面波装置(集積回路装置) 11 弾性表面波素子(集積回路素子) 12 パッケージ基板 12a 外部接続端子 12b 支持層 13 突起電極 14 キャップ 15 励振電極部 16 入力電極 17 出力電極 18 接地電極 19 配線部 20 反射器 21 ステージ 21a 支持突起 10 Surface acoustic wave device (integrated circuit device) 11 Surface acoustic wave device (integrated circuit device) 12 Package substrate 12a External connection terminal 12b support layer 13 Projection electrode 14 cap 15 Excitation electrode part 16 input electrodes 17 Output electrode 18 Ground electrode 19 Wiring part 20 reflector 21 stages 21a Support protrusion

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 素子基板上に所定の導電パターンおよび
突起電極が形成された集積回路素子を素子搭載面に搭載
し得るパッケージ基板であって、 前記素子搭載面の反対面である端子形成面には、 実装基板と電気的に接続される外部接続端子と、 少なくとも前記集積回路素子の搭載位置に相当する領域
に前記外部接続端子の高さ以上の厚みを有する支持層と
が形成されていることを特徴とするパッケージ基板。
1. A package substrate on which an integrated circuit device having a predetermined conductive pattern and projecting electrodes formed on the device substrate can be mounted on a device mounting surface, and the package substrate is provided on a terminal formation surface opposite to the device mounting surface. Is formed with an external connection terminal electrically connected to the mounting substrate, and a support layer having a thickness equal to or greater than the height of the external connection terminal in at least a region corresponding to a mounting position of the integrated circuit element. A package substrate.
【請求項2】 請求項1記載のパッケージ基板と、 素子基板上に所定の導電パターンおよび突起電極が形成
され、前記パッケージ基板の素子搭載面に搭載された集
積回路素子と、 前記集積回路素子を封止する封止部材とを有することを
特徴とする集積回路装置。
2. The package substrate according to claim 1, an integrated circuit element having a predetermined conductive pattern and a protruding electrode formed on the element substrate and mounted on an element mounting surface of the package substrate, and the integrated circuit element. An integrated circuit device having a sealing member for sealing.
【請求項3】 素子基板上に所定の導電パターンおよび
突起電極が形成された集積回路素子を用意し、 前記集積回路素子が搭載される素子搭載面との反対面で
ある端子形成面に、実装基板と電気的に接続される外部
接続端子、および少なくとも前記集積回路素子の搭載位
置に相当する領域に前記外部接続端子の高さ以上の厚み
を有する支持層が形成されたパッケージ基板を用意し、 前記素子搭載面を外側に向けて前記パッケージ基板をス
テージ上にセットして前記支持層と前記ステージとを接
触させ、 前記集積回路素子を前記支持層方向に押圧しながら超音
波振動を与えて当該集積回路素子を前記パッケージ基板
の素子搭載面に接合することを特徴とする集積回路装置
の製造方法。
3. An integrated circuit element having a predetermined conductive pattern and projecting electrodes formed on an element substrate is prepared, and mounted on a terminal forming surface opposite to an element mounting surface on which the integrated circuit element is mounted. An external connection terminal that is electrically connected to the substrate, and a package substrate in which a support layer having a thickness equal to or higher than the height of the external connection terminal is formed in a region corresponding to at least the mounting position of the integrated circuit element, The package substrate is set on the stage with the element mounting surface facing outward, the supporting layer and the stage are brought into contact with each other, and ultrasonic vibration is applied while pressing the integrated circuit element toward the supporting layer. A method of manufacturing an integrated circuit device, comprising bonding an integrated circuit device to a device mounting surface of the package substrate.
【請求項4】 前記支持層は絶縁性を有していることを
特徴とする請求項3記載の集積回路装置の製造方法。
4. The method of manufacturing an integrated circuit device according to claim 3, wherein the support layer has an insulating property.
【請求項5】 素子基板上に所定の導電パターンおよび
突起電極が形成された集積回路素子を用意し、 前記集積回路素子が搭載される素子搭載面との反対面で
ある端子形成面に実装基板と電気的に接続される外部接
続端子が形成されたパッケージ基板を用意し、 前記端子形成面における前記外部接続端子の形成領域を
除いた少なくとも前記集積回路素子の搭載位置に相当す
る領域が当接可能な支持突起を有するステージを用意
し、 前記素子搭載面を外側に向けて前記パッケージ基板を前
記ステージの前記支持突起上にセットし、 前記集積回路素子を前記支持突起方向に押圧しながら超
音波振動を与えて当該集積回路素子を前記パッケージ基
板の素子搭載面に接合することを特徴とする集積回路装
置の製造方法。
5. An integrated circuit element having a predetermined conductive pattern and projecting electrodes formed on an element substrate is prepared, and a mounting substrate is provided on a terminal forming surface opposite to an element mounting surface on which the integrated circuit element is mounted. A package substrate having external connection terminals electrically connected to is prepared, and at least a region corresponding to a mounting position of the integrated circuit element except for a region where the external connection terminals are formed is abutted on the terminal formation surface. A stage having a possible supporting protrusion is prepared, the package substrate is set on the supporting protrusion of the stage with the element mounting surface facing outward, and ultrasonic waves are applied while pressing the integrated circuit element in the supporting protrusion direction. A method of manufacturing an integrated circuit device, which comprises applying vibration to bond the integrated circuit element to an element mounting surface of the package substrate.
【請求項6】 前記パッケージ基板は樹脂製であること
を特徴とする請求項3〜5の何れか一項に記載の集積回
路装置の製造方法。
6. The method of manufacturing an integrated circuit device according to claim 3, wherein the package substrate is made of resin.
【請求項7】 前記集積回路素子は所定の帯域中心周波
数を有する弾性表面波素子であり、前記集積回路装置は
この弾性表面波素子が搭載された弾性表面波装置である
ことを特徴とする請求項3〜6の何れか一項に記載の集
積回路装置の製造方法。
7. The integrated circuit device is a surface acoustic wave device having a predetermined band center frequency, and the integrated circuit device is a surface acoustic wave device on which the surface acoustic wave device is mounted. Item 7. A method for manufacturing an integrated circuit device according to any one of Items 3 to 6.
【請求項8】 前記パッケージ基板には、相互に異なる
帯域中心周波数を有する2つの前記弾性表面波素子が搭
載されていることを特徴とする請求項7記載の集積回路
装置の製造方法。
8. The method of manufacturing an integrated circuit device according to claim 7, wherein the surface acoustic wave device having two band center frequencies different from each other is mounted on the package substrate.
JP2001352449A 2001-11-16 2001-11-16 Package substrate, integrated circuit device using the same, and method of manufacturing integrated circuit device Expired - Fee Related JP3647796B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001352449A JP3647796B2 (en) 2001-11-16 2001-11-16 Package substrate, integrated circuit device using the same, and method of manufacturing integrated circuit device
EP02025815.8A EP1313214B1 (en) 2001-11-16 2002-11-18 Packaging substrate and manufacturing method thereof, integrated circuit device and manufacturing method thereof, and saw device
US10/298,228 US20030137039A1 (en) 2001-11-16 2002-11-18 Packaging substrate and manufacturing method thereof, integrated circuit device and manufacturing method thereof, and saw device
US10/813,393 US7015556B2 (en) 2001-11-16 2004-03-31 Packaging substrate and manufacturing method thereof, integrated circuit device and manufacturing method thereof, and saw device
US11/333,316 US7132310B2 (en) 2001-11-16 2006-01-18 Packaging substrate and manufacturing method thereof, integrated circuit device and manufacturing method thereof, and SAW device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001352449A JP3647796B2 (en) 2001-11-16 2001-11-16 Package substrate, integrated circuit device using the same, and method of manufacturing integrated circuit device

Publications (2)

Publication Number Publication Date
JP2003152126A true JP2003152126A (en) 2003-05-23
JP3647796B2 JP3647796B2 (en) 2005-05-18

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109545730A (en) * 2017-09-21 2019-03-29 三星电子株式会社 Supporting substrate, electronic device manufacturing method, semiconductor package part and manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109545730A (en) * 2017-09-21 2019-03-29 三星电子株式会社 Supporting substrate, electronic device manufacturing method, semiconductor package part and manufacturing method
US11908727B2 (en) 2017-09-21 2024-02-20 Samsung Electronics Co., Ltd. Support substrates, methods of fabricating semiconductor packages using the same, and methods of fabricating electronic devices using the same

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