JP2003151917A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem wherein on-resistance cannot be reduced easily, by increasing the impurity concentration of a channel layer, since a wiring layer is continuously formed in a barrier metal layer, after an element region is formed in a trench-type power MOSFET, a hydrogen alloy is made, and a threshold voltage drops in an n-channel type due to the storage characteristics of the barrier metal layer. SOLUTION: After a barrier metal layer is formed, a hydrogen alloy is made at a high temperature for increasing the amount of hydrogen that reaches a substrate surface. Additionally, a wiring layer is formed after that, and further alloying heat treatment is carried out under a reduced pressure atmosphere after a surface protection film is formed, thus making hydrogen that is stored in the barrier metal layer discharged, further increasing the amount of hydrogen that reaches a substrate, and restraining reduction in a threshold voltage. Since the impurity concentration in a channel layer can be reduced, the on-resistance is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and particularly when a metal having a hydrogen storage property is used as a barrier metal layer, the charge on the substrate surface is suppressed by hydrogen treatment to improve the characteristics. The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art Aluminum-based metal materials such as aluminum alloys are generally used for wiring of semiconductor devices on silicon substrates. In this case, however, silicon is mixed in the aluminum alloy in order to suppress mutual diffusion between aluminum and silicon, which is called a spike, and there is a problem that contact defects due to silicon grains (silicon nodules) increase. there were. Therefore, a titanium-based metal (for example, Ti, T
A barrier metal layer made of iN, TiON, TiW, etc.) is formed to suppress Si nodules and prevent mutual diffusion at the contact portion between the wiring layer and the semiconductor substrate surface.

With reference to FIGS. 8 to 10, a conventional method for manufacturing a semiconductor device, a power MOSF having a trench structure, will be described.
ET is shown as an example.

In FIG. 8, an N ⁺ type silicon semiconductor substrate 21 is shown.
N ⁻ type epitaxial layer is stacked on the drain region 2
Form 2. After forming the oxide film on the surface, the oxide film in the portion of the planned channel layer 24 is etched. Using this oxide film as a mask, boron is implanted into the entire surface at a dose of 1.0 × 10 ¹³ and then diffused to form a P-type channel layer 24.

Next, a trench is formed. CVD on the entire surface
Method by NSG (Non-doped Silicat)
e glass) CVD oxide film is formed, a mask made of a resist film is applied except a portion which becomes the trench opening, and the CVD oxide film is partially removed by dry etching to expose the channel region 24. To form a part.

Further, using the CVD oxide film as a mask, the silicon semiconductor substrate in the trench opening is dry-etched with CF-based gas and HBr-based gas to form a trench 27 penetrating the channel layer 24 and reaching the drain region 22.

In FIG. 9, a gate oxide film 31 and a gate electrode 33 are formed. First, dummy oxidation is performed to form a dummy oxide film on the inner wall of the trench 27 and the surface of the channel layer 24 to remove etching damage during dry etching. By removing the dummy oxide film and the CVD oxide film formed by the dummy oxidation at the same time with an oxide film etchant such as hydrofluoric acid, a stable gate oxide film can be formed. Further, there is an effect that the opening portion of the trench 27 is rounded by thermal oxidation at a high temperature to avoid electric field concentration in the opening portion of the trench 27. Then, the gate oxide film 31 is formed. That is, the entire surface is thermally oxidized to form the gate oxide film 3
1 is formed to have a thickness of about 700 Å according to the threshold value.

Thereafter, a non-doped polysilicon layer is deposited on the entire surface, phosphorus is injected / diffused at a high concentration to increase the conductivity, and the polysilicon layer deposited on the entire surface is dry-etched without a mask to form a trench. The gate electrode 33 buried in 27 is left.

A body contact region 34 for stabilizing the potential of the substrate and a source region 35 are formed. First, boron ions are selectively ion-implanted using a mask of a resist film to form a P ⁺ type body contact region 34, and then the resist film is removed. Further, masking a predetermined source region 35 and gate electrode 33 with a new resist film, arsenic is ion-implanted to form an N ⁺ -type source region 35 on the surface of the channel layer 24 adjacent to the trench 27. After that, the resist film is removed. After that, BPSG (Boron Phosphorus Sil
An iCate Glass) layer is deposited by the CVD method to form an interlayer insulating film 36, and the interlayer insulating film 36 is left at least on the gate electrode 33 using the resist film as a mask.

In FIG. 10, a barrier metal layer 37 is first provided to form a wiring layer. This is because the silicon substrate is exposed in a portion other than the interlayer insulating film 36, and when the aluminum alloy to be the wiring layer 38 is sputtered, the silicon grains (silicon nodules) contained in the aluminum alloy are fine regions. The contact region 34 may be blocked. A barrier metal layer 37 made of a titanium-based material (for example, Ti / TiN) is provided in order to suppress the silicon nodules and prevent mutual diffusion between a metal called a spike and the silicon substrate.

A barrier metal layer 37 is formed on the entire surface by sputtering Ti / TiN or the like, and subsequently, the wiring layer 3 is formed.
An aluminum alloy to be 8 is sputtered on the entire surface. Then, alloying heat treatment is performed to stabilize the surfaces of the metal and silicon. This heat treatment is performed in a hydrogen-containing gas at a temperature of 300 to 500 ° C. (for example, about 400 ° C.) that does not exceed the melting point of the aluminum alloy for about 30 minutes to remove crystal strain in the metal film and stabilize the interface. .

After that, a passivation film made of SiN or the like is formed as a surface protection film. After that, heat treatment is further performed at 300 to 500 ° C. (for example, 400 ° C.) for about 30 minutes to remove damage, and the previous step is completed.

Referring to FIG. 10, trench type power MO
The structure of SFET is shown. N ⁺ type silicon semiconductor substrate 2
1 is provided with a drain region 22 made of an N ⁻ type epitaxial layer, and a P type channel layer 24 is provided on the surface thereof. A trench 27 penetrating the channel layer 24 and reaching the drain region 22 is provided, an inner wall of the trench 27 is covered with a gate oxide film 31, and a gate electrode 33 made of polysilicon filling the trench 27 is provided. Trench 2
7 is formed with an N ⁺ type source region 35 on the surface of the channel layer 24 adjacent to the source region 3 of the two adjacent cell regions.
The P ⁺ type body region 34 is formed on the surface of the channel layer 24 between
To provide. Further, when the gate electrode 33 is applied, a channel region (not shown) is formed from the source region 35 along the trench 27. An interlayer insulating film 36 is formed on the gate electrode 33
Then, a barrier metal layer 37 that contacts the source region 35 and the body region 34 is formed, and a wiring layer 38 made of an aluminum alloy or the like is provided.

[0014]

SUMMARY OF THE INVENTION Such a conventional MOSF
In ET, the barrier metal layer 37 and the wiring layer 38 are continuously formed in the step of forming the wiring layer after the formation of the element region, and then heat treatment is performed in a hydrogen-containing gas to alloy them to stabilize the surface. . When a metal such as aluminum (Al) is deposited on silicon (Si), Schottky junction is ideally formed at the interface. But actually Si
Since a natural oxide film exists on the upper surface, it does not exhibit ideal rectifying characteristics. Therefore, heat treatment (hereinafter referred to as hydrogen alloy) in a hydrogen-containing gas to make the Ai / Si interface have ohmic characteristics is performed. Need to be alloyed. However, since the diffusion rate of Si in Al is high, a phenomenon called a spike occurs in which Al and Si interdiffuse and Al diffuses into Si to destroy the pn junction. In order to avoid this, Al contains Si in advance.

However, due to this hydrogen alloy, Si contained in Al diffuses and grains grow, and Si is formed at the contact interface with the substrate.
May precipitate as nodules. This Si nodule blocks a fine body contact region to cause a contact failure, and since the Si nodule itself has high resistance, it causes unstable or increased contact resistance.

Therefore, in order to prevent mutual diffusion in the hydrogen alloying process and suppress contact failure due to Si nodules, a barrier metal layer made of a titanium-based metal is formed before Al film formation.

Further, the Si surface may be present with the Si connectors broken due to oxidation or the like in the element region forming step. In this case, it is considered that the surface is charged with negative charges. Therefore, an electric potential is generated, and the state is the same as when an electric field is applied to the surface, so that the threshold voltage varies. Therefore, in the hydrogen alloy process, hydrogen is added to the M
By reaching the OSFET interface or the like, Si and hydrogen are bonded to each other, and the electric charge at the Si interface is removed, thereby improving the characteristics (for example, reducing the dark current) or stabilizing the characteristics (for example, stabilizing the threshold voltage). ing.

However, in the conventional manufacturing method, it has been found that even if hydrogen alloying is performed, it is difficult to sufficiently eliminate the charge at the interface, and V _GSOFF (threshold voltage) shifts.

FIG. 11 shows V _GS -ID curves with and without a barrier metal layer (dotted line).
When the barrier metal layer is formed, V _GS is increased especially in the N-channel MOSFET due to the storage property of the barrier metal layer.
Is shifted to the lower side (the threshold voltage is lowered), it is necessary to increase the impurity concentration to be injected into the channel layer in order to match the threshold, which causes a problem that the on-resistance is increased.

The cause of this is that the titanium-based metal, which is the barrier metal layer, has a hydrogen storage property, so that, for example, in the hydrogen alloy process, before the hydrogen reaches the interface between the semiconductor substrate and the gate oxide film, the barrier metal layer is formed. It was found that the amount of hydrogen stored in Si contributes to the disappearance of the electric charge generated at the Si interface.

Further, according to the experiment, if there is no aluminum alloy wiring layer, V is obtained even under a hydrogen alloying condition of about 400.degree.
It is known that _GSOFF does not shift, and in this case it is considered that hydrogen has fully reached the substrate surface due to the hydrogen alloy. On the other hand, in the case where there is an aluminum alloy wiring layer, it was found that V _GSOFF becomes a predetermined value by increasing the temperature of the hydrogen alloy. However, as a matter of course, heat treatment exceeding the melting point of aluminum cannot be performed, and increasing the temperature of the hydrogen alloy increases the amount of Si nodules in the aluminum alloy deposited on the substrate surface. The deposited S
There was also a problem that the device was destroyed by the i-nodules.

[0022]

The present invention has been made in view of the above problems, and firstly, a step of forming a desired element region on a silicon semiconductor substrate, and a barrier metal layer made of a metal having a hydrogen storage property. The problem is solved by including a step of introducing hydrogen to the surface of the substrate after the formation, a step of forming a wiring layer on the barrier metal layer, and a step of performing a heat treatment after forming a surface protective film on the wiring layer. It is a thing.

Second, a step of forming a desired element region on a silicon semiconductor substrate, a step of forming a barrier metal layer of a titanium-based metal having a hydrogen storage property, and then introducing hydrogen to the surface of the substrate, This is solved by including a step of forming a wiring layer on the barrier metal layer and a step of performing heat treatment after forming a surface protective film on the wiring layer.

After the barrier metal is formed, hydrogen is introduced into the substrate by heating at 300 to 800 ° C. in a hydrogen or hydrogen-containing gas atmosphere.

Further, after the barrier metal layer is formed, hydrogen is ion-implanted into the entire surface, heated at 300 to 800 ° C. and diffused to introduce hydrogen into the substrate.

The heat treatment is characterized by heating at 300 to 500 ° C. in a reduced pressure atmosphere of nitrogen, hydrogen or a gas containing hydrogen.

Further, the heat treatment is performed under a pressure of 0.2 to 760 Torr.

That is, hydrogen is introduced into the substrate before the aluminum alloy film is formed, and the first heat treatment is performed at a high temperature to supply hydrogen to the silicon surface, and after the aluminum alloy is formed, the alloying heat treatment is also performed under reduced pressure. By performing the second heat treatment at a normal temperature, it is possible to provide a method for manufacturing a semiconductor device in which hydrogen is allowed to reach the silicon surface efficiently while suppressing the deposition of Si nodules.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail with reference to FIGS. 1 to 7 by taking a trench type power MOSFET as an example.

FIG. 1 shows a trench type power MO of the present invention.
The structure of SFET is shown. N ⁺ type silicon semiconductor substrate 1
A drain region 2 made of an N ⁻ type epitaxial layer is provided on the above, and a P type channel layer 4 is provided on the surface thereof. A trench 7 that penetrates the channel layer 4 and reaches the drain region 2 is provided, the inner wall of the trench 7 is covered with a gate oxide film 11, and a gate electrode 13 made of polysilicon filling the trench 7 is provided. An N ⁺ type source region 15 is formed on the surface of the channel layer 4 adjacent to the trench 7, and a P ⁺ type body contact region 14 is provided on the surface of the channel layer 4 between the source regions 15 of two adjacent cells. Further, when the gate electrode 13 is applied, a channel region (not shown) is formed from the source region 15 along the trench 7. The gate electrode 13 is covered with an interlayer insulating film 16, a barrier metal layer 17 that contacts the source region 15 and the body contact region 14 is formed, and a wiring layer 18 made of an aluminum alloy or the like is provided.

2 to 5 show a method of manufacturing the trench type power MOSFET of the present invention. A method of manufacturing a trench type power MOSFET of the present invention comprises a step of forming a desired element region on a silicon semiconductor substrate, a step of forming a barrier metal layer of a metal having a hydrogen storage property, and a step of introducing hydrogen to the surface of the substrate. , A step of forming a wiring layer on the barrier metal layer, and a step of performing a heat treatment after forming a surface protective film on the wiring layer.

The first step of the present invention is to form a desired element region on a silicon semiconductor substrate, as shown in FIGS.

In FIG. 2, an N ⁻ type epitaxial layer is laminated on an N ⁺ type silicon semiconductor substrate 1 to form a drain region 2. After forming the oxide film on the surface, the oxide film in the planned channel layer 4 is etched. Using this oxide film as a mask, boron is implanted into the entire surface at a dose of 1.0 × 10 ¹³ and then diffused to form a P-type channel layer 4.

Next, a trench is formed. NSG (Non-doped Silicate) is formed on the entire surface by the CVD method.
A CVD oxide film of (Glass) is formed, and a mask of a resist film is applied to remove the CV
The D oxide film is partially removed by dry etching to form a trench opening in which the channel region 4 is exposed.

Further, using the CVD oxide film as a mask, the silicon semiconductor substrate in the trench opening is dry-etched with CF-based gas and HBr-based gas to form a trench 7 penetrating the channel layer 4 and reaching the drain region 2.

In FIG. 3, the gate oxide film 11 and the gate electrode 13 are formed. First, dummy oxidation is performed to form a dummy oxide film on the inner wall of the trench 7 and the surface of the channel layer 4 to remove etching damage during dry etching.
By removing the dummy oxide film and the CVD oxide film formed by the dummy oxidation at the same time with an oxide film etchant such as hydrofluoric acid, a stable gate oxide film can be formed. Further, there is an effect that the opening portion of the trench 7 is rounded by thermal oxidation at a high temperature to avoid electric field concentration at the opening portion of the trench 7. Then, the gate oxide film 11 is formed. That is, the entire surface is thermally oxidized to form the gate oxide film 11 with a thickness of, for example, about 700 Å according to the threshold value.

Further, a non-doped polysilicon layer is deposited on the entire surface, phosphorus is injected / diffused at a high concentration to increase the conductivity, and the polysilicon layer deposited on the entire surface is dry-etched without a mask to form a trench. Gate electrode 13 embedded in 7
Leave.

Further, a body contact region 14 for stabilizing the potential of the substrate and a source region 15 are formed. First, boron is selectively ion-implanted by a mask made of a resist film to form a P ⁺ type body contact region 14, and then the resist film is removed. Further, masking a predetermined source region 15 and gate electrode 13 with a new resist film, arsenic is ion-implanted to form an N ⁺ type source region 15 on the surface of the channel layer 4 adjacent to the trench 7. After that, the resist film is removed. After that, BP on the entire surface
SG (Boron Phosphorus Silic
An ate glass) layer is deposited by the CVD method to form the interlayer insulating film 16, and the interlayer insulating film 16 is left on at least the gate electrode 13 using the resist film as a mask.

The second step of the present invention is as shown in FIG.
This is to introduce hydrogen to the surface of the substrate after forming the barrier metal layer with a metal having a hydrogen storage property.

This step is a characteristic step of the present invention,
First, the barrier metal layer 17 is provided. The silicon substrate is exposed in a portion other than the interlayer insulating film 16, and silicon particles (silicon nodules) contained in the aluminum alloy when the aluminum alloy to be the wiring layer 18 is sputtered.
However, it may block the body contact region 14, which is a fine region. In order to suppress the silicon nodules and prevent mutual diffusion of metal called spikes and the silicon substrate, a barrier metal layer 17 made of a titanium-based material (such as Ti / TiN) is formed before the wiring layer 18 is formed. Form.

A barrier metal layer 17 is formed on the entire surface by sputtering Ti / TiN or the like, and subsequently, the barrier metal layer 17 is transferred to a furnace for hydrogen alloying. That is, 30 at 300 to 800 ° C. (eg 700 ° C.) in hydrogen gas or hydrogen-containing gas.
Heat treatment for about a minute.

Further, here, after the barrier metal layer 17 is formed, hydrogen is ion-implanted into the entire surface, and then 300 to 800 are formed.
The heat treatment may be performed at a temperature of 700 ° C. (for example, 700 ° C.).

By this step, hydrogen is introduced into the surface of the silicon substrate. When hydrogen alloying is carried out after sputtering an aluminum alloy as in the conventional case, hydrogen cannot sufficiently reach the silicon surface by hydrogen alloying at about 400 ° C., for example. Further, if the heat treatment is performed at a high temperature, the amount of hydrogen reaching the silicon surface increases, but naturally, the heating cannot be performed at a high temperature exceeding the melting point (about 600 ° C.) of the aluminum alloy. Further, when the temperature is raised to a high temperature, the amount of Si nodules deposited is increased, and there is a problem that contact failure or device destruction during wire bonding increases.

However, according to the present invention, hydrogen alloying can be performed at a high temperature exceeding the melting point of the aluminum alloy before forming the aluminum alloy. As a result, hydrogen is sufficiently supplied to the barrier metal layer 17, and since there is no aluminum alloy layer even at high temperature, naturally there is no problem of precipitation of Si nodules contained in the aluminum layer. At this time, the barrier metal layer 17 occludes hydrogen, but when the occluded amount becomes saturated, more hydrogen reaches the surface of the silicon substrate, and the hydrogen suppresses the charge. This is also clear from the fact that a predetermined V _GSOFF can be obtained with a hydrogen alloy at about 400 ° C. without the aluminum alloy, as described above.

The third step of the present invention is as shown in FIG.
A wiring layer is formed on the barrier metal layer, a surface protective film is formed on the wiring layer, and then heat treatment is performed.

This step is also a characteristic step of the present invention. First. An aluminum alloy to be the wiring layer 18 is sputtered on the entire surface. After that, although not shown, SiN or the like serving as a surface protective film is provided, and then heat treatment is performed in a reduced pressure atmosphere of nitrogen gas, hydrogen gas, or hydrogen-containing gas. Specifically, in a reduced pressure atmosphere of 0.2 to 760 Torr, 300 to
Heat treatment is performed at 500 ° C. (for example, about 400 ° C.) for about 30 minutes. This enables alloying of aluminum and removal of damage after the formation of the surface protective film, and further, hydrogen absorbed in the barrier metal layer 17 in the previous step is released to the silicon surface.

Here, the hydrogen storage characteristics will be described with reference to FIG. This is a PCT curve diagram showing the relationship between the pressure P at which the barrier metal layer made of Ti / TiN is placed and the hydrogen concentration C thereof, using the temperature T as a parameter. From this figure, it can be seen that the lower the pressure P, the lower the concentration of hydrogen stored in the barrier metal. Specifically, temperature 40
Focusing on the case of 0 ° C, the hydrogen concentration is 10 ^{19 at} normal pressure.
Although it is about cm ⁻³ , when the pressure is reduced to about 10 ⁻² to 10 ⁻⁴ Torr, it becomes about 10 ¹⁵ cm ⁻³ , and this tendency does not change even when the temperature is lowered. That is, when the heat treatment is performed in such a reduced pressure atmosphere, the barrier metal layer releases hydrogen, and inevitably reaches the interface between the semiconductor substrate and the gate oxide film,
There will be an increase in hydrogen that eliminates the charges on the silicon surface.

That is, in this step, by performing heat treatment in a reduced pressure atmosphere, hydrogen occluded in the barrier metal layer in the previous step can be released to further increase the amount of hydrogen reaching the surface of the semiconductor substrate. it can.

FIG. 7 shows V _GS -I with and without heat treatment (solid line) after forming the barrier metal layer.
The D curve is shown. According to this, it can be seen that the threshold voltage is further improved and a predetermined value is obtained by the heat treatment after the formation of the barrier metal layer. That is, by the hydrogen reaching the silicon surface by the hydrogen alloy in the second step of the embodiment of the present invention and the hydrogen released from the barrier metal layer and reaching the silicon surface by the heat treatment under reduced pressure in the third step,
The charges on the surface of the silicon substrate can be sufficiently eliminated, and the threshold voltage can be stabilized as shown in the figure.

[0050]

According to the manufacturing method of the present invention, it is possible to provide a method of manufacturing a semiconductor device in which there is no variation in threshold voltage and the on-resistance can be further reduced.

That is, first, after the barrier metal layer is formed and before the aluminum alloy film is formed, hydrogen alloy can be formed at a high temperature. Can be increased. In the conventional manufacturing method, it is usually (400
Approximately (° C) hydrogen alloy conditions do not provide the prescribed threshold voltage, and heat treatment at high temperature increases the amount of hydrogen reaching the substrate surface, and the prescribed threshold voltage can be obtained. In addition, there is a problem that the amount of Si nodules deposited increases, which leads to contact failure and element destruction during wire bonding, and of course, heating above the melting point of the aluminum alloy cannot be performed. In the manufacturing method of the present invention, paying attention to the fact that a predetermined threshold voltage can be obtained with a hydrogen alloy at about 400 ° C. before forming an aluminum alloy film, and after forming the barrier metal layer, the hydrogen alloy at a high temperature exceeding the melting point of the aluminum alloy. By doing so, the amount of hydrogen reaching the silicon surface can be increased as compared with the conventional manufacturing method.

Secondly, the amount of hydrogen reaching the silicon substrate can be further increased by the heat treatment after forming the surface protective film. In other words, under reduced pressure, the barrier metal layer, which is a hydrogen storage alloy, has a characteristic of releasing hydrogen. Therefore, by performing heat treatment under reduced pressure, the hydrogen stored in the barrier metal layer in the alloying heat treatment step of the aluminum alloy is Since it can be released and the amount of hydrogen reaching the Si surface can be further increased, the electric charge on the substrate surface can be sufficiently eliminated and a stable threshold voltage can be obtained.

Thirdly, if the threshold voltage is stable, it is not necessary to increase the impurity concentration to be injected into the channel layer more than necessary, so that there is an advantage that an increase in ON resistance can be suppressed.

[Brief description of drawings]

FIG. 1 is a cross-sectional view illustrating a semiconductor device of the present invention.

FIG. 2 is a cross-sectional view illustrating the method of manufacturing a semiconductor device of the present invention.

FIG. 3 is a cross-sectional view illustrating the method of manufacturing the semiconductor device of the present invention.

FIG. 4 is a cross-sectional view illustrating the method for manufacturing a semiconductor device of the present invention.

FIG. 5 is a cross-sectional view illustrating the method for manufacturing the semiconductor device of the present invention.

FIG. 6 is a characteristic diagram illustrating hydrogen storage characteristics.

FIG. 7 is a characteristic diagram illustrating a semiconductor device of the present invention.

FIG. 8 is a cross-sectional view illustrating a method for manufacturing a conventional semiconductor device.

FIG. 9 is a cross-sectional view illustrating the conventional method for manufacturing a semiconductor device.

FIG. 10 is a cross-sectional view illustrating a conventional method for manufacturing a semiconductor device.

FIG. 11 is a characteristic diagram illustrating a conventional semiconductor device.

Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/78 653 H01L 29/78 658F 21/90 CF term (reference) 4M104 AA01 BB01 BB30 DD26 DD37 DD65 DD79 DD81 DD91 EE06 EE17 FF13 GG09 GG18 HH06 HH16 5F033 HH04 HH08 HH18 HH33 MM08 MM13 PP15 QQ08 QQ11 QQ58 QQ59 QQ61 QQ73 RR06 VV06 XX09 XX28

Claims (6)

[Claims] 1. A step of forming a desired element region on a silicon semiconductor substrate, a step of forming a barrier metal layer from a metal having a hydrogen absorbing property, and then introducing hydrogen to the surface of the substrate, and a step of forming a barrier metal layer on the barrier metal layer. A method of manufacturing a semiconductor device, comprising: a step of forming a wiring layer on the wiring layer; and a step of performing a heat treatment after forming a surface protective film on the wiring layer. 2. A step of forming a desired element region on a silicon semiconductor substrate; a step of forming a barrier metal layer of a titanium-based metal having a hydrogen storage property, and then introducing hydrogen to the surface of the substrate; A method of manufacturing a semiconductor device, comprising: a step of forming a wiring layer on a metal layer; and a step of performing a heat treatment after forming a surface protective film on the wiring layer. 3. The hydrogen is introduced into the substrate by heating at 300 to 800 ° C. in an atmosphere of hydrogen or a hydrogen-containing gas after forming the barrier metal layer. Of manufacturing a semiconductor device of. 4. After the formation of the barrier metal layer, hydrogen is ion-implanted into the entire surface and heated and diffused at 300 to 800 ° C. to introduce the hydrogen into the substrate.
Alternatively, the method for manufacturing the semiconductor device according to claim 2. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment is heating at 300 to 500 ° C. in a reduced pressure atmosphere of nitrogen, hydrogen, or a hydrogen-containing gas. 6. The method of manufacturing a semiconductor device according to claim 5, wherein the heat treatment is performed under a pressure of 0.2 to 760 Torr.