JP2003139608A - Photocurrent/voltage conversion circuit - Google Patents
Photocurrent/voltage conversion circuitInfo
- Publication number
- JP2003139608A JP2003139608A JP2001333651A JP2001333651A JP2003139608A JP 2003139608 A JP2003139608 A JP 2003139608A JP 2001333651 A JP2001333651 A JP 2001333651A JP 2001333651 A JP2001333651 A JP 2001333651A JP 2003139608 A JP2003139608 A JP 2003139608A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- input
- photocurrent
- mos transistor
- light receiving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
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- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Amplifiers (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、受光素子により発
生する光電流を電圧に変換する光電流・電圧変換回路に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photocurrent / voltage conversion circuit for converting a photocurrent generated by a light receiving element into a voltage.
【０００２】[0002]
【従来の技術】入出力間を電気的に絶縁することを目的
として、図３に基本構成を示すように、入力側の発光素
子１に電気信号を供給すると、発光素子１から出力側の
受光素子２へ光で信号が伝わり、受光素子２から電気信
号が出力されるフォトカプラが従来から用いられてい
る。最近では、受光素子２の具体的構成として、受光素
子により発生する光電流を電圧に変換する光電流・電圧
変換回路をＩＣ化した受光ＩＣを設けたフォトカプラ
（以下、ＩＣカプラと記す）がＦＡ関連やホームエレク
トロニクス関連等多くの分野で使用されてきている。2. Description of the Related Art For the purpose of electrically insulating input and output, as shown in the basic configuration of FIG. 3, when an electric signal is supplied to a light emitting element 1 on the input side, the light receiving element on the output side receives light from the light emitting element 1. A photocoupler in which a signal is transmitted to the element 2 by light and an electric signal is output from the light receiving element 2 has been conventionally used. Recently, as a specific configuration of the light receiving element 2, a photocoupler (hereinafter referred to as an IC coupler) provided with a light receiving IC in which a photocurrent / voltage conversion circuit for converting a photocurrent generated by the light receiving element into a voltage is provided. It has been used in many fields such as FA and home electronics.
【０００３】以下にＩＣカプラに設けられる受光ＩＣの
一例について、図４を参照して説明する。図において、
３は受光素子としてのフォトダイオードで、フォトダイ
オード３は、アノードが接地電位ＧＮＤに接続され、カ
ソードが増幅器４の入力端に接続されている。増幅器４
は、入出力間に帰還抵抗５が接続され、出力端がコンパ
レータ６の２入力のうちの一方の入力端に接続されてい
る。コンパレータ６の他方の入力端は、コンパレータ６
の閾値電圧となる基準電圧Ｖrefを生成する基準電圧回
路７の出力端に接続されている。この受光ＩＣの場合、
一般的に、フォトダイオード３のアノードがＰ型半導体
基板で形成され、カソードが半導体基板上にＮ型エピタ
キシャル層で形成されるプロセスのものに適用される。An example of the light receiving IC provided in the IC coupler will be described below with reference to FIG. In the figure,
Reference numeral 3 denotes a photodiode as a light receiving element. The photodiode 3 has an anode connected to the ground potential GND and a cathode connected to the input end of the amplifier 4. Amplifier 4
Has a feedback resistor 5 connected between its input and output, and its output end connected to one of the two inputs of the comparator 6. The other input end of the comparator 6 is the comparator 6
It is connected to the output terminal of the reference voltage circuit 7 that generates the reference voltage Vref that is the threshold voltage of. In the case of this light receiving IC,
In general, the photodiode 3 is applied to a process in which the anode is formed of a P-type semiconductor substrate and the cathode is formed of an N-type epitaxial layer on the semiconductor substrate.
【０００４】次に、増幅器４として用いられる従来の増
幅器１０４について図５を参照して説明する。増幅器１
０４は、Ｎｃｈ型ＭＯＳトランジスタ１１のソースが接
地電位ＧＮＤに接続されドレインと電源電圧端子ＶＤＤ
との間に定電流源１２が接続され、ドレインと定電流源
１２との接続点が次段への出力端となり、Ｎｃｈ型ＭＯ
Ｓトランジスタ１１のゲートが入力端となって初段の増
幅段が構成されている。以下、Ｎｃｈ型ＭＯＳトランジ
スタ１３、定電流源１４、Ｎｃｈ型ＭＯＳトランジスタ
１５、定電流源１６により同様の構成で複数の増幅段が
直流結合され、初段の入力端が増幅器１０４の入力端１
７となり、最終段の出力端が増幅器１０４の出力端１８
となっている。フォトダイオード３は入力端１７に接続
され、帰還抵抗５の一端は入力端１７に、他端は出力端
１８に接続されている。尚、Ｎｃｈ型ＭＯＳトランジス
タ１１、１３、１５および定電流源１２、１４、１６は
それぞれ同一形状、同一サイズの素子で構成される。Next, a conventional amplifier 104 used as the amplifier 4 will be described with reference to FIG. Amplifier 1
In 04, the source of the Nch type MOS transistor 11 is connected to the ground potential GND and the drain and the power supply voltage terminal V DD
Is connected to the constant current source 12, and the connection point between the drain and the constant current source 12 serves as an output terminal to the next stage.
The gate of the S-transistor 11 serves as an input terminal to form an initial amplification stage. Hereinafter, a plurality of amplification stages are DC-coupled by the Nch type MOS transistor 13, the constant current source 14, the Nch type MOS transistor 15, and the constant current source 16 in the same configuration, and the input end of the first stage is the input end 1 of the amplifier 104.
7, and the output end of the final stage is the output end 18 of the amplifier 104.
Has become. The photodiode 3 is connected to the input end 17, one end of the feedback resistor 5 is connected to the input end 17, and the other end is connected to the output end 18. The Nch-type MOS transistors 11, 13, 15 and the constant current sources 12, 14, 16 are composed of elements having the same shape and the same size.
【０００５】上記構成の受光ＩＣの動作を説明する。フ
ォトダイオード３に光入力が無い場合は、光電流Ｉpdは
流れず、初段のＮｃｈ型ＭＯＳトランジスタ１１のゲー
トには定電流源１２から供給される電流に応じた電位が
発生する。さらに次段のＮｃｈ型ＭＯＳトランジスタ１
３のゲートにも定電流源１４から供給される電流に応じ
た電位が発生する。さらに次段も同様であり、それぞれ
のＮｃｈ型ＭＯＳトランジスタ１１、１３、１５および
定電流源１２、１４、１６は同一形状、同一サイズの素
子となっているため、各ゲートに発生する電位は同じで
ある。すなわち、増幅器１０４の入力端１７と出力端１
８は同一電位Ｖ０となる。この電位Ｖ０が増幅器１０４
の出力端１８からコンパレータ６に出力されると、コン
パレータ６において、基準電圧回路７からの基準電位Ｖ
ref（＞Ｖ０）と比較され、基準電位Ｖrefより低いの
で、信号が入っていないものとみなし、論理に応じたＬ
ｏｗまたはｈｉｇｈのレベルの２値信号を出力する。The operation of the light receiving IC having the above structure will be described. When there is no light input to the photodiode 3, the photocurrent Ipd does not flow, and a potential corresponding to the current supplied from the constant current source 12 is generated at the gate of the first-stage Nch-type MOS transistor 11. Further Nch type MOS transistor 1 in the next stage
A potential corresponding to the current supplied from the constant current source 14 is also generated in the gate of No. 3. The same applies to the next stage. Since the Nch type MOS transistors 11, 13, 15 and the constant current sources 12, 14, 16 have the same shape and the same size, the potentials generated at the respective gates are the same. Is. That is, the input end 17 and the output end 1 of the amplifier 104
8 has the same potential V 0 . This potential V 0 is the amplifier 104
When it is output from the output terminal 18 to the comparator 6, the reference potential V from the reference voltage circuit 7
It is compared with ref (> V 0 ), and is lower than the reference potential Vref, so it is considered that no signal is input, and L corresponding to the logic is applied.
It outputs a binary signal of ow or high level.
【０００６】フォトダイオード３が光入力されると、そ
の光量に応じた光電流Ｉpdが発生し、この光電流Ｉpdが
帰還抵抗５に増幅器１０４の出力端１８から入力端１７
の方向に流れ、帰還抵抗５の両端にＶｒ＝Ｉpd×Ｒｆ
（Ｒｆ：帰還抵抗５の抵抗値）の電圧が発生することに
より電圧変換され、出力端１８の電位ＶａはＶａ＝Ｖ０
＋Ｖｒとなる。この電位Ｖａが増幅器１０４の出力端１
８からコンパレータ６に出力されると、コンパレータ６
において、基準電圧回路７からの基準電位Ｖrefと比較
され、フォトダイオード３への光入力が、ある一定レベ
ル以上であれば、Ｖａ＞Ｖrefとなり、信号が入ったも
のとみなし、前述の光入力が無い場合とは逆のレベルを
出力する。また、フォトダイオード３への光入力が、あ
る一定レベル以下であれば、Ｖａ＜Ｖrefとなり、信号
が入っていないものとみなし、前述の光入力が無い場合
と同じレベルを出力する。When the photodiode 3 is optically input, a photocurrent Ipd corresponding to the amount of light is generated, and this photocurrent Ipd is fed to the feedback resistor 5 from the output end 18 to the input end 17 of the amplifier 104.
Flowing in the direction of Vr = Ipd × Rf across the feedback resistor 5.
A voltage of (Rf: resistance value of the feedback resistor 5) is generated and converted into a voltage, and the potential Va of the output end 18 is Va = V 0.
It becomes + Vr. This potential Va is the output terminal 1 of the amplifier 104.
When output from 8 to the comparator 6, the comparator 6
In comparison with the reference potential Vref from the reference voltage circuit 7 and if the light input to the photodiode 3 is above a certain level, Va> Vref, and it is considered that a signal has been input, and the above-mentioned light input is Outputs the opposite level to the case without it. If the light input to the photodiode 3 is below a certain level, Va <Vref, and it is considered that no signal is input, and the same level as that when there is no light input is output.
【０００７】図４に示す受光ＩＣに増幅器１０４を用い
てフォトカプラを構成した場合、例えば、ＩＣ論理素子
から２値信号としてｈｉｇｈのレベルの信号が発光素子
に供給されると、発光素子から受光ＩＣへ光で信号が伝
わり、受光ＩＣから論理に応じたＬｏｗまたはｈｉｇｈ
のレベルの信号が出力される。また、Ｌｏｗのレベルの
信号が発光素子に供給されると、発光素子から光が出力
されず、受光ＩＣは光入力が無いので、受光ＩＣからは
ｈｉｇｈのレベルの信号が発光素子に供給される場合と
逆のレベルを出力する。このようにして、ＩＣ論理素子
からの２値信号が入出力間を電気的に絶縁して伝達され
る。When a photocoupler is constructed using the amplifier 104 in the light receiving IC shown in FIG. 4, for example, when a high level signal as a binary signal is supplied to the light emitting element from the IC logic element, the light receiving element receives the light. A signal is transmitted to the IC by light, and Low or high depending on the logic from the light-receiving IC
The signal of the level is output. When a low level signal is supplied to the light emitting element, no light is output from the light emitting element and the light receiving IC has no light input, so a high level signal is supplied from the light receiving IC to the light emitting element. Outputs the opposite level. In this way, the binary signal from the IC logic element is transmitted while electrically insulating between the input and the output.
【０００８】受光ＩＣの他の例について、図６を参照し
て説明する。図において、２３は受光素子としてのフォ
トダイオードで、フォトダイオード２３は、カソードが
電源電圧端子ＶＤＤに接続され、アノードが増幅器２４
の入力端に接続されている。増幅器２４は、入出力間に
帰還抵抗２５が接続され、出力端がコンパレータ２６の
２入力のうちの一方の入力端に接続されている。コンパ
レータ２６の他方の入力端は、コンパレータ２６の閾値
電圧となる基準電圧Ｖrefを生成する基準電圧回路２７
の出力端に接続されている。この受光ＩＣの場合、一般
的に、フォトダイオード２３のカソードがＮ型エピタキ
シャル層で形成され、アノードがエピタキシャル層にＰ
型ベース層で形成されるプロセスのものに適用される。Another example of the light receiving IC will be described with reference to FIG. In the figure, reference numeral 23 is a photodiode as a light receiving element. The photodiode 23 has a cathode connected to a power supply voltage terminal V DD and an anode connected to an amplifier 24.
Is connected to the input end of. The feedback resistor 25 is connected between the input and the output of the amplifier 24, and the output end thereof is connected to one of the two inputs of the comparator 26. The other input terminal of the comparator 26 has a reference voltage circuit 27 that generates a reference voltage Vref that is a threshold voltage of the comparator 26.
Is connected to the output end of. In the case of this light receiving IC, generally, the cathode of the photodiode 23 is formed of an N-type epitaxial layer, and the anode of the photodiode 23 is formed in the epitaxial layer.
It applies to those of the process formed by the mold base layer.
【０００９】次に、増幅器２４として用いられる従来の
増幅器２０４について図７を参照して説明する。増幅器
２０４は、Ｐｃｈ型ＭＯＳトランジスタ３１のソースが
電源電圧端子ＶＤＤに接続されドレインと接地電位ＧＮ
Ｄとの間に定電流源３２が接続され、ドレインと定電流
源３２との接続点が次段への出力端となり、Ｐｃｈ型Ｍ
ＯＳトランジスタ３１のゲートが入力端となって初段の
増幅段が構成されている。以下、Ｐｃｈ型ＭＯＳトラン
ジスタ３３、定電流源３４、Ｐｃｈ型ＭＯＳトランジス
タ３５、定電流源３６により同様の構成で複数の増幅段
が直流結合され、初段の入力端が増幅器２０４の入力端
３７となり、最終段の出力端が増幅器２０４の出力端３
８となっている。フォトダイオード２３は入力端３７に
接続され、帰還抵抗２５の一端は入力端３７に、他端は
出力端３８に接続されている。尚、Ｐｃｈ型ＭＯＳトラ
ンジスタ３１、３３、３５および定電流源３２、３４、
３６はそれぞれ同一形状、同一サイズの素子で構成され
る。Next, a conventional amplifier 204 used as the amplifier 24 will be described with reference to FIG. In the amplifier 204, the source of the Pch-type MOS transistor 31 is connected to the power supply voltage terminal V DD and the drain and the ground potential GN.
A constant current source 32 is connected between D and D, and a connection point between the drain and the constant current source 32 serves as an output end to the next stage, and a Pch type M
The gate of the OS transistor 31 serves as an input terminal to form an initial amplification stage. Hereinafter, the Pch-type MOS transistor 33, the constant current source 34, the Pch-type MOS transistor 35, and the constant current source 36 couple a plurality of amplification stages in the same configuration by direct current, and the input end of the first stage becomes the input end 37 of the amplifier 204. The output end of the final stage is the output end 3 of the amplifier 204.
It is 8. The photodiode 23 is connected to the input end 37, one end of the feedback resistor 25 is connected to the input end 37, and the other end is connected to the output end 38. The Pch type MOS transistors 31, 33, 35 and the constant current sources 32, 34,
Each of the elements 36 has the same shape and the same size.
【００１０】上記構成の受光ＩＣの動作を説明する。フ
ォトダイオード２３に光入力が無い場合は、光電流Ｉpd
は流れず、初段のＰｃｈ型ＭＯＳトランジスタ３１のゲ
ートには定電流源３２へ流れる電流に応じた電位が発生
する。さらに次段のＰｃｈ型ＭＯＳトランジスタ３３の
ゲートにも定電流源３４へ流れる電流に応じた電位が発
生する。さらに次段も同様であり、それぞれのＰｃｈ型
ＭＯＳトランジスタ３１、３３、３５と定電流源３２、
３４、３６は同一形状、同一サイズの素子となっている
ため、各ゲートに発生する電位は同じである。すなわ
ち、増幅器２０４の入力端子３７と出力端子３８は同一
電位ＶＤＤ−Ｖ０となる。この電位ＶＤＤ−Ｖ０が増幅
器２０４の出力端３８からコンパレータ２６に出力され
ると、コンパレータ２６において、基準電圧回路２７の
基準電位Ｖref（＜ＶＤＤ−Ｖ０）と比較され、基準電
位Ｖrefより高いので、信号が入っていないものとみな
し、論理に応じたＬｏｗまたはｈｉｇｈのレベルを出力
する。The operation of the light receiving IC having the above structure will be described. If there is no light input to the photodiode 23, the photocurrent Ipd
Does not flow, and a potential corresponding to the current flowing to the constant current source 32 is generated at the gate of the first-stage Pch-type MOS transistor 31. Further, a potential corresponding to the current flowing to the constant current source 34 is also generated at the gate of the Pch-type MOS transistor 33 at the next stage. The same applies to the next stage, in which the Pch-type MOS transistors 31, 33, 35 and the constant current source 32,
Since 34 and 36 have the same shape and the same size, the potentials generated at the respective gates are the same. That is, the input terminal 37 and the output terminal 38 of the amplifier 204 have the same potential V DD −V 0 . When this potential V DD −V 0 is output from the output end 38 of the amplifier 204 to the comparator 26, it is compared with the reference potential Vref (<V DD −V 0 ) of the reference voltage circuit 27 in the comparator 26, and the reference potential Vref. Since it is higher, it is considered that no signal is input, and a Low or high level corresponding to the logic is output.
【００１１】フォトダイオード２３が光入力されると、
その光量に応じた光電流Ｉpdが発生し、この光電流が帰
還抵抗２５に増幅器２０４の入力端３７から出力端３８
の方向に流れ、帰還抵抗２５の両端にＶｒ＝−Ｉpd×Ｒ
ｆ（Ｒｆ：帰還抵抗２５の抵抗値）の電圧が発生するこ
とにより電圧変換され、出力端３８の電位ＶａはＶａ＝
ＶＤＤ−Ｖ０＋Ｖｒとなる。この電位Ｖａが増幅器２０
４の出力端３８からコンパレータ２６に出力されると、
コンパレータ２６において、基準電圧回路２７からの基
準電位Ｖrefと比較され、フォトダイオード２３への光
入力が、ある一定レベル以上であれば、Ｖａ＜Ｖrefと
なり、信号が入ったものとみなし、前述の光入力が無い
場合とは逆のレベルを出力する。また、フォトダイオー
ド２３への光入力が、ある一定レベル以下であれば、Ｖ
ａ＞Ｖrefとなり、信号が入っていないものとみなし、
前述の光入力が無い場合と同じレベルを出力する。When the photodiode 23 is optically input,
A photocurrent Ipd corresponding to the amount of light is generated, and this photocurrent is applied to the feedback resistor 25 from the input end 37 to the output end 38 of the amplifier 204.
And Vr = −Ipd × R across the feedback resistor 25.
A voltage of f (Rf: resistance value of the feedback resistor 25) is generated and converted into a voltage, and the potential Va of the output end 38 is Va =
It becomes V DD −V 0 + Vr. This potential Va is the amplifier 20
When output from the output terminal 38 of 4 to the comparator 26,
In the comparator 26, it is compared with the reference potential Vref from the reference voltage circuit 27, and if the light input to the photodiode 23 is a certain level or more, Va <Vref, and it is considered that a signal has been input, and the above-mentioned light is input. Outputs the opposite level to when there is no input. If the light input to the photodiode 23 is below a certain level, V
Since a> Vref, it is assumed that no signal is input,
It outputs the same level as when there is no light input.
【００１２】図６に示す受光ＩＣに増幅器２０４を用い
てフォトカプラを構成した場合、例えば、ＩＣ論理素子
から２値信号としてｈｉｇｈのレベルの信号が発光素子
に供給されると、発光素子から受光ＩＣへ光で信号が伝
わり、受光ＩＣから論理に応じたＬｏｗまたはｈｉｇｈ
のレベルの信号が出力される。また、Ｌｏｗのレベルの
信号が発光素子に供給されると、発光素子から光が出力
されず、受光ＩＣは光入力が無いので、受光ＩＣからは
ｈｉｇｈのレベルの信号が発光素子に供給される場合と
逆のレベルを出力する。このようにして、ＩＣ論理素子
からの２値信号が入出力間を電気的に絶縁して伝達され
る。When a photocoupler is constructed by using the amplifier 204 in the light receiving IC shown in FIG. 6, for example, when a high level signal as a binary signal is supplied to the light emitting element from the IC logic element, the light receiving element receives the light. A signal is transmitted to the IC by light, and Low or high depending on the logic from the light-receiving IC
The signal of the level is output. When a low level signal is supplied to the light emitting element, no light is output from the light emitting element and the light receiving IC has no light input, so a high level signal is supplied from the light receiving IC to the light emitting element. Outputs the opposite level. In this way, the binary signal from the IC logic element is transmitted while electrically insulating between the input and the output.
【００１３】[0013]
【発明が解決しようとする課題】ところで、図５および
図７に示した増幅器１０４、２０４において、フォトダ
イオード３、２３への光入力が過大な場合それに応じて
発生する光電流Ｉpdも過大となる。図５に示す回路にお
いて、光電流Ｉpdが過大となれば、定電流源１６からの
電流の多くが光電流Ｉpdとして供給されてしまい、Ｎｃ
ｈ型ＭＯＳトランジスタ１５への供給電流が減少してし
まい、Ｎｃｈ型ＭＯＳトランジスタ１５がカットオフし
てしまう。同時に帰還抵抗５で接続されている初段のＮ
ｃｈ型ＭＯＳトランジスタ１１のゲート・ソース間電圧
も低下し、Ｎｃｈ型ＭＯＳトランジスタ１１もカットオ
フとなってしまう。同様に、図７に示す回路において
も、光電流Ｉpdが過大となれば、定電流３６への電流の
多くが光電流Ｉpdから供給されてしまい、Ｐｃｈ型ＭＯ
Ｓトランジスタ３５の動作電流が減少してしまい、Ｐｃ
ｈ型ＭＯＳトランジスタ３５がカットオフしてしまう。
同時に帰還抵抗２５で接続されている初段のＰｃｈ型Ｍ
ＯＳトランジスタ３１のゲート・ソース間電圧も低下
し、Ｐｃｈ型ＭＯＳトランジスタ３１もカットオフとな
ってしまう。すなわち過大な光入力があると、増幅器内
のＭＯＳトランジスタがカットオフし、光入力があるに
もかかわらず、光入力が無い状態と同様の動作となって
しまう。本発明は上記問題点に鑑み、過大な光入力にお
いても増幅器内のＭＯＳトランジスタがカットオフせず
増幅器が動作できる光入力レベルの範囲を改善をするこ
とのできる光電流・電圧変換回路を提供することを目的
とする。By the way, in the amplifiers 104 and 204 shown in FIGS. 5 and 7, when the light input to the photodiodes 3 and 23 is excessive, the photocurrent Ipd generated in response thereto is also excessive. . In the circuit shown in FIG. 5, if the photocurrent Ipd becomes excessive, most of the current from the constant current source 16 is supplied as the photocurrent Ipd, and Nc
The supply current to the h-type MOS transistor 15 is reduced, and the Nch-type MOS transistor 15 is cut off. At the same time, the first stage N connected by the feedback resistor 5
The gate-source voltage of the ch-type MOS transistor 11 also drops, and the Nch-type MOS transistor 11 is also cut off. Similarly, also in the circuit shown in FIG. 7, if the photocurrent Ipd becomes excessive, most of the current to the constant current 36 is supplied from the photocurrent Ipd, and the Pch-type MO
The operating current of the S-transistor 35 decreases and Pc
The h-type MOS transistor 35 is cut off.
At the same time, the first stage Pch type M connected by the feedback resistor 25
The gate-source voltage of the OS transistor 31 is also reduced, and the Pch-type MOS transistor 31 is also cut off. That is, when there is an excessive optical input, the MOS transistor in the amplifier is cut off, and the operation is the same as when there is no optical input despite the optical input. In view of the above problems, the present invention provides a photocurrent / voltage conversion circuit capable of improving the range of the light input level in which the MOS transistor in the amplifier is not cut off even when the light input is excessive and the amplifier can operate. The purpose is to
【００１４】[0014]
【課題を解決するための手段】本発明の光電流・電圧変
換回路は、受光素子により発生する光電流を複数の増幅
段からなる増幅器により電圧変換する光電流・電圧変換
回路において、増幅器は、さらに、受光素子と初段の増
幅段との接続点に、１段分の増幅段が入出力端で接続さ
れたことを特徴とする。また、本発明の光電流・電圧変
換回路は、ソース接地のＭＯＳトランジスタからなる増
幅段を複数段で構成した増幅器の入力端に受光素子によ
り発生する光電流を入力して、光電流を電圧変換する光
電流・電圧変換回路において、増幅器は、さらに、受光
素子と増幅器の入力端との接続点に、ソース接地のＭＯ
Ｓトランジスタからなる１段分の増幅段が入出力端で接
続されたことを特徴とする。また、本発明の光電流・電
圧変換回路は、受光素子と、ソース接地のＭＯＳトラン
ジスタと定電流源とからなる直列回路のＭＯＳトランジ
スタのゲートを入力端とするとともに直列接続点を出力
端とする複数の増幅段が直流結合され、受光素子への光
入力により発生する光電流を電圧変換する増幅器と、増
幅器の出力を２値信号に変換するコンパレータとを具備
した光電流・電圧変換回路において、増幅器が、さら
に、その入力端に直列接続点が接続されたゲート・ドレ
イン間ショートのＭＯＳトランジスタと定電流源とから
なる直列回路を有することを特徴とする。The photocurrent-voltage conversion circuit of the present invention is a photocurrent-voltage conversion circuit in which a photocurrent generated by a light-receiving element is voltage-converted by an amplifier composed of a plurality of amplification stages. Further, one amplification stage is connected at an input / output terminal to a connection point between the light receiving element and the first amplification stage. Further, in the photocurrent / voltage conversion circuit of the present invention, the photocurrent generated by the light receiving element is input to the input terminal of the amplifier having a plurality of amplification stages composed of source-grounded MOS transistors to convert the photocurrent into a voltage. In the photocurrent / voltage conversion circuit, the amplifier further includes a source-grounded MO at the connection point between the light receiving element and the input end of the amplifier.
It is characterized in that one amplification stage composed of S transistors is connected at the input and output ends. Further, in the photocurrent / voltage conversion circuit of the present invention, the gate of the MOS transistor of the series circuit including the light receiving element, the source-grounded MOS transistor, and the constant current source serves as the input end, and the series connection point serves as the output end. In a photocurrent / voltage conversion circuit comprising a plurality of amplification stages, which are DC-coupled, and which includes an amplifier for converting a photocurrent generated by an optical input to a light receiving element into a voltage, and a comparator for converting an output of the amplifier into a binary signal, The amplifier is further characterized by having a series circuit including a gate-drain shorted MOS transistor having a series connection point connected to its input terminal, and a constant current source.
【００１５】[0015]
【発明の実施の形態】以下、本発明の第１実施例の、図
４に示す受光ＩＣの増幅器４として用いられる増幅器３
０４を図１を参照して説明する。尚、図５に示す増幅器
１０４と同一のものについては同一符号を付してその説
明を省略する。図５に示す増幅器１０４と異なるのは、
増幅器３０４の入力端１７にゲート・ドレイン間ショー
トのＮｃｈ型ＭＯＳトランジスタ４１のドレインが接続
され、そのソースが接地電位ＧＮＤに接続され、さらに
入力端１７と電源電圧端子ＶＤＤとの間に定電流源４２
が接続されている点である。尚、Ｎｃｈ型ＭＯＳトラン
ジスタ４２の閾値電圧Ｖｔを他の３つのＮｃｈ型ＭＯＳ
トランジスタと同一かそれより少し高く設定する以外
は、Ｎｃｈ型ＭＯＳトランジスタ４１および定電流源４
２は他のＮｃｈ型ＭＯＳトランジスタ１１、１３、１５
および定電流源１２、１４、１６とそれぞれ同一形状、
同一サイズの素子となっている。BEST MODE FOR CARRYING OUT THE INVENTION An amplifier 3 used as an amplifier 4 of the light receiving IC shown in FIG. 4 according to the first embodiment of the present invention will be described below.
04 will be described with reference to FIG. The same parts as those of the amplifier 104 shown in FIG. 5 are designated by the same reference numerals, and the description thereof will be omitted. The difference from the amplifier 104 shown in FIG.
The drain of the gate-drain shorted Nch type MOS transistor 41 is connected to the input terminal 17 of the amplifier 304, the source thereof is connected to the ground potential GND, and a constant current is supplied between the input terminal 17 and the power supply voltage terminal V DD. Source 42
Is connected. The threshold voltage Vt of the Nch-type MOS transistor 42 is set to the other three Nch-type MOS transistors.
Nch type MOS transistor 41 and constant current source 4 except that the transistor is set to be the same as or slightly higher than the transistor.
2 is another Nch type MOS transistor 11, 13, 15
And the same shape as the constant current sources 12, 14, 16 respectively,
The elements have the same size.
【００１６】上記構成の受光ＩＣの光入力がある場合の
動作を説明する。フォトダイオード３の光入力が、図５
に示す増幅器１０４が動作するレベル範囲であると、増
幅器１０４のときとほぼ同様に、受光ＩＣからの出力を
得る。The operation when there is a light input to the light receiving IC having the above configuration will be described. The optical input of the photodiode 3 is as shown in FIG.
In the level range in which the amplifier 104 shown in (1) operates, the output from the light receiving IC is obtained almost in the same manner as in the case of the amplifier 104.
【００１７】フォトダイオード３の光入力が、さらに増
加し、Ｎｃｈ型ＭＯＳトランジスタ１１のゲート電位が
低下しようとすると、定電流源４２からの電流のうち、
Ｎｃｈ型ＭＯＳトランジスタ４１に必要な電流が減少
し、その分、定電流源４２から光電流Ｉｐｄとして供給
される電流が増加する。その結果、帰還抵抗５に流れる
光電流Ｉpdが減少し、定電流源１６からＮｃｈ型ＭＯＳ
トランジスタ１５に供給される電流量は、Ｎｃｈ型ＭＯ
Ｓトランジスタ１５がカットオフされないレベルに維持
され、また、Ｎｃｈ型ＭＯＳトランジスタ１１のゲート
電位もＮｃｈ型ＭＯＳトランジスタ１１がカットオフさ
れないレベルに維持される。When the light input of the photodiode 3 further increases and the gate potential of the Nch type MOS transistor 11 is about to decrease, of the current from the constant current source 42,
The current required for the Nch-type MOS transistor 41 decreases, and the current supplied from the constant current source 42 as the photocurrent Ipd increases correspondingly. As a result, the photocurrent Ipd flowing through the feedback resistor 5 decreases, and the constant current source 16 causes the Nch-type MOS
The amount of current supplied to the transistor 15 is Nch type MO.
The S transistor 15 is maintained at a level where it is not cut off, and the gate potential of the Nch type MOS transistor 11 is also maintained at a level where the Nch type MOS transistor 11 is not cut off.
【００１８】尚、Ｎｃｈ型ＭＯＳトランジスタ４１の閾
値電圧Ｖｔが何らかのバラツキによってＮｃｈ型ＭＯＳ
トランジスタ１１の閾値電圧Ｖｔよりも低くなり過ぎる
と、フォトダイオード３に光入力が無く、光電流Ｉpdが
発生しない場合においても、Ｎｃｈ型ＭＯＳトランジス
タ１１の閾値電圧Ｖｔに見合う電圧をＮｃｈ型ＭＯＳト
ランジスタ４１に発生させるために、Ｎｃｈ型ＭＯＳト
ランジスタ４１に定電流源４２からの電流より大きい電
流を供給する必要がある。そのため、Ｎｃｈ型ＭＯＳト
ランジスタ４１に対して帰還抵抗５を通して定電流源１
６から電流が流れてしまい、受光ＩＣに出力を発生させ
てしまう虞がある。また、逆にＮｃｈ型ＭＯＳトランジ
スタ４１の閾値電圧ＶｔがＮｃｈ型ＭＯＳトランジスタ
１１の閾値電圧Ｖｔよりも高くなり過ぎると、Ｎｃｈ型
ＭＯＳトランジスタ１１の閾値電圧Ｖｔに見合う電圧を
Ｎｃｈ型ＭＯＳトランジスタ４１に発生させるために、
Ｎｃｈ型ＭＯＳトランジスタ４１に定電流源４２からの
電流より小さい電流を供給する必要がある。そのため、
定電流源４２からの余分の電流が光電流Ｉpdとして流
れ、帰還抵抗５に流れる電流は光電流Ｉpdより少ない電
流しか流れないため、フォトダイオード３に対する光入
力が微小で、光電流Ｉpdが少ない場合においては、光入
力があっても受光ＩＣに出力を発生させない虞がある。
これを防止するため、Ｎｃｈ型ＭＯＳトランジスタ４１
の閾値電圧Ｖｔは、Ｎｃｈ型ＭＯＳトランジスタ１１の
閾値電圧Ｖｔに対して同一かそれより少しだけ高く設定
する。The threshold voltage Vt of the Nch-type MOS transistor 41 may vary depending on the Nch-type MOS transistor 41.
When the voltage becomes lower than the threshold voltage Vt of the transistor 11, the voltage corresponding to the threshold voltage Vt of the Nch-type MOS transistor 11 is set to a voltage corresponding to the threshold voltage Vt of the Nch-type MOS transistor 11 even when there is no light input to the photodiode 3 and no photocurrent Ipd is generated. In order to generate the above, it is necessary to supply a current larger than the current from the constant current source 42 to the Nch type MOS transistor 41. Therefore, the constant current source 1 is connected to the Nch-type MOS transistor 41 through the feedback resistor 5.
There is a risk that current will flow from 6 and an output will be generated in the light receiving IC. On the contrary, when the threshold voltage Vt of the Nch-type MOS transistor 41 becomes too higher than the threshold voltage Vt of the Nch-type MOS transistor 11, a voltage matching the threshold voltage Vt of the Nch-type MOS transistor 11 is generated in the Nch-type MOS transistor 41. To let
It is necessary to supply a current smaller than the current from the constant current source 42 to the Nch type MOS transistor 41. for that reason,
When the excess current from the constant current source 42 flows as the photocurrent Ipd and the current flowing through the feedback resistor 5 is less than the photocurrent Ipd, the light input to the photodiode 3 is very small and the photocurrent Ipd is small. In the above, there is a possibility that even if there is an optical input, no output is generated in the light receiving IC.
In order to prevent this, the Nch type MOS transistor 41
The threshold voltage Vt is set to be equal to or slightly higher than the threshold voltage Vt of the Nch-type MOS transistor 11.
【００１９】増幅器３０４を以上の構成とすることによ
り、少なくとも、定電流源４２からの電流で光電流Ｉpd
の一部を供給して、Ｎｃｈ型ＭＯＳトランジスタ１５が
カットオフしてしまうのを防止すると同時に、帰還抵抗
５で接続されている初段のＮｃｈ型ＭＯＳトランジスタ
１１のゲート・ソース間電圧が低下するのを防止するこ
とで、その過大な光入力においても増幅器３０４の動作
が可能である。従って、広範囲の光電流Ｉpdに対して動
作が可能であり、受光ＩＣの光入力に対する動作範囲を
改善することができる。By configuring the amplifier 304 as described above, at least the current from the constant current source 42 is used as the photocurrent Ipd.
Is supplied to prevent the Nch-type MOS transistor 15 from being cut off, and at the same time, the gate-source voltage of the first-stage Nch-type MOS transistor 11 connected by the feedback resistor 5 decreases. By preventing this, the amplifier 304 can operate even with the excessive optical input. Therefore, it is possible to operate over a wide range of photocurrent Ipd, and it is possible to improve the operation range for the light input of the light receiving IC.
【００２０】次に、本発明の第２実施例の、図６に示す
受光ＩＣの増幅器２４として用いられる増幅器４０４を
図２を参照して説明する。尚、図７に示す増幅器２０４
と同一のものについては同一符号を付してその説明を省
略する。図７に示す増幅器２０４と異なるのは、増幅器
４０４の入力端３７にゲート・ドレイン間ショートのＰ
ｃｈ型ＭＯＳトランジスタ５１のドレインが接続され、
そのソースが電源電圧端子ＶＤＤに接続され、さらに入
力端３７と接地電位ＧＮＤとの間に定電流源４２が接続
されている点である。尚、Ｐｃｈ型ＭＯＳトランジスタ
５２の閾値電圧Ｖｔを他の３つのＰｃｈ型ＭＯＳトラン
ジスタと同一かそれ以上に設定する以外は、Ｐｃｈ型Ｍ
ＯＳトランジスタ５１および定電流源５２は他のＰｃｈ
型ＭＯＳトランジスタ３１、３３、３５および定電流源
３２、３４、３６とそれぞれ同一形状、同一サイズの素
子となっている。An amplifier 404 used as the amplifier 24 of the light receiving IC shown in FIG. 6 according to the second embodiment of the present invention will be described with reference to FIG. The amplifier 204 shown in FIG.
The same symbols are attached to the same components and the description thereof is omitted. The difference from the amplifier 204 shown in FIG. 7 is that a gate-drain short P
The drain of the ch-type MOS transistor 51 is connected,
The point is that the source is connected to the power supply voltage terminal V DD , and the constant current source 42 is connected between the input end 37 and the ground potential GND. It should be noted that, except that the threshold voltage Vt of the Pch-type MOS transistor 52 is set to be equal to or higher than that of the other three Pch-type MOS transistors, it is a Pch-type M transistor.
The OS transistor 51 and the constant current source 52 are other Pch
The MOS transistors 31, 33 and 35 and the constant current sources 32, 34 and 36 have the same shape and size, respectively.
【００２１】上記構成の受光ＩＣの光入力がある場合の
動作を説明する。フォトダイオード２３の光入力が、図
７に示す増幅器２０４が動作するレベル範囲であると、
増幅器２０４のときとほぼ同様に、受光ＩＣからの出力
を得る。The operation when there is a light input to the light receiving IC having the above configuration will be described. When the optical input of the photodiode 23 is in the level range in which the amplifier 204 shown in FIG. 7 operates,
The output from the light receiving IC is obtained almost in the same manner as in the case of the amplifier 204.
【００２２】フォトダイオード２３の光入力が、さらに
増加し、Ｐｃｈ型ＭＯＳトランジスタ３１のゲート電位
が上昇しようとすると、定電流源５２に流れこむ電流の
うち、Ｐｃｈ型ＭＯＳトランジスタ５１からの電流が減
少し、その分、定電流源５２に光電流Ｉｐｄとして流れ
込む電流が増加する。その結果、帰還抵抗２５に流れる
光電流Ｉpdが減少し、Ｎｃｈ型ＭＯＳトランジスタ３５
から定電流源３６に流れこむ電流量は、Ｐｃｈ型ＭＯＳ
トランジスタ３５がカットオフされないレベルに維持さ
れ、また、Ｐｃｈ型ＭＯＳトランジスタ３１のゲート電
位もＰｃｈ型ＭＯＳトランジスタ３１がカットオフされ
ないレベルに維持される。When the light input of the photodiode 23 further increases and the gate potential of the Pch-type MOS transistor 31 tries to rise, the current from the Pch-type MOS transistor 51 among the current flowing into the constant current source 52 decreases. However, the current flowing into the constant current source 52 as the photocurrent Ipd increases by that amount. As a result, the photocurrent Ipd flowing through the feedback resistor 25 decreases, and the Nch-type MOS transistor 35
The amount of current flowing from the constant current source 36 to the constant current source 36 is Pch type MOS.
The transistor 35 is maintained at a level where it is not cut off, and the gate potential of the Pch-type MOS transistor 31 is also maintained at a level where the Pch-type MOS transistor 31 is not cut off.
【００２３】尚、Ｐｃｈ型ＭＯＳトランジスタ５１の閾
値電圧Ｖｔが何らかのバラツキによってＰｃｈ型ＭＯＳ
トランジスタ３１の閾値電圧Ｖｔよりも低くなり過ぎる
と、フォトダイオード２３に光入力が無く、光電流Ｉpd
が発生しない場合においても、Ｐｃｈ型ＭＯＳトランジ
スタ３１の閾値電圧Ｖｔに見合う電圧をＰｃｈ型ＭＯＳ
トランジスタ５１に発生させるために、Ｐｃｈ型ＭＯＳ
トランジスタ５１に定電流源５２の電流より大きい電流
を供給する必要がある。そのため、Ｐｃｈ型ＭＯＳトラ
ンジスタ５１から帰還抵抗２５を通して定電流源３６に
電流が流れてしまい、受光ＩＣに出力を発生させてしま
う虞がある。また、逆にＰｃｈ型ＭＯＳトランジスタ５
１の閾値電圧ＶｔがＰｃｈ型ＭＯＳトランジスタ３１の
閾値電圧Ｖｔよりも高くなり過ぎると、Ｐｃｈ型ＭＯＳ
トランジスタ３１の閾値電圧Ｖｔに見合う電圧をＰｃｈ
型ＭＯＳトランジスタ５１に発生させるために、Ｐｃｈ
型ＭＯＳトランジスタ５１に定電流源４２の電流より小
さい電流を供給する必要がある。そのため、定電流源４
２に流れ込む電流は、Ｐｃｈ型ＭＯＳトランジスタ５１
からの電流だけでは不足し、その不足分を補充するため
に光電流Ｉpdの一部が流れ、帰還抵抗２５に流れる光電
流Ｉpdは減少し、フォトダイオード２３に対する光入力
が微小で、光電流Ｉpdが少ない場合においては、光入力
があっても受光ＩＣに出力を発生させない虞がある。こ
れを防止するため、Ｐｃｈ型ＭＯＳトランジスタ５１の
閾値電圧Ｖｔは、Ｐｃｈ型ＭＯＳトランジスタ３１の閾
値電圧Ｖｔに対して同一かそれより少しだけ高く設定す
る。The threshold voltage Vt of the Pch-type MOS transistor 51 may change due to some variation.
If the threshold voltage Vt of the transistor 31 becomes too low, there is no light input to the photodiode 23 and the photocurrent Ipd
Even when the voltage does not occur, the voltage corresponding to the threshold voltage Vt of the Pch-type MOS transistor 31 is set to the Pch-type MOS transistor 31.
In order to generate in transistor 51, Pch type MOS
It is necessary to supply a current larger than the current of the constant current source 52 to the transistor 51. Therefore, a current may flow from the Pch-type MOS transistor 51 to the constant current source 36 through the feedback resistor 25, which may cause an output to the light receiving IC. On the contrary, the Pch type MOS transistor 5
If the threshold voltage Vt of 1 becomes higher than the threshold voltage Vt of the Pch type MOS transistor 31, the Pch type MOS transistor 31
The voltage corresponding to the threshold voltage Vt of the transistor 31 is Pch.
Type MOS transistor 51 to generate Pch
It is necessary to supply the type MOS transistor 51 with a current smaller than the current of the constant current source 42. Therefore, the constant current source 4
The current flowing into 2 is the Pch type MOS transistor 51.
Is insufficient by itself, and a part of the photocurrent Ipd flows to replenish the shortage. The photocurrent Ipd flowing through the feedback resistor 25 decreases, and the light input to the photodiode 23 is very small. When there is a small amount of light, there is a possibility that no output will be generated in the light receiving IC even if there is an optical input. In order to prevent this, the threshold voltage Vt of the Pch-type MOS transistor 51 is set equal to or slightly higher than the threshold voltage Vt of the Pch-type MOS transistor 31.
【００２４】増幅器４０４を以上の構成とすることによ
り、少なくとも、定電流源５２に光電流Ｉpdの一部が流
れ込んで、Ｐｃｈ型ＭＯＳトランジスタ３５がカットオ
フしてしまうのを防止すると同時に、帰還抵抗２５で接
続されている初段のＰｃｈ型ＭＯＳトランジスタ３１の
ゲート・ソース間電圧が低下するのを防止することで、
その過大な光入力においても増幅器４０４の動作が可能
である。従って、広範囲の光電流Ｉpdに対して動作が可
能であり、受光ＩＣの光入力に対する動作範囲を改善す
ることができる。By configuring the amplifier 404 as described above, at least a part of the photocurrent Ipd flows into the constant current source 52 to prevent the Pch-type MOS transistor 35 from being cut off, and at the same time, the feedback resistor is provided. By preventing the gate-source voltage of the first-stage Pch-type MOS transistor 31 connected by 25 from decreasing,
The amplifier 404 can operate even with the excessive optical input. Therefore, it is possible to operate over a wide range of photocurrent Ipd, and it is possible to improve the operation range for the light input of the light receiving IC.
【００２５】尚、上記実施例では、光電流・電圧変換回
路としての受光ＩＣをＩＣカプラに用いることで説明し
たが、これに限定されることなく、例えば、パソコン間
通信等に用いられる赤外線通信（ＩｒＤＡ）の受信側回
路等、光信号をＬｏｗ、Ｈｉｇｈのデジタル信号に変換
する回路に広く用いることができる。In the above embodiment, the light receiving IC as the photocurrent / voltage conversion circuit is used for the IC coupler, but the invention is not limited to this, and for example, infrared communication used for personal computer communication or the like. It can be widely used for a circuit for converting an optical signal into a Low and High digital signal such as a (IrDA) receiving side circuit.
【００２６】[0026]
【発明の効果】以上説明したように、本発明の光電流・
電圧変換回路によれば、増幅器において、さらに、受光
素子と初段の増幅段との接続点に、１段分の増幅段が入
出力端で接続されることによって、過大な光入力によっ
ても増幅器が動作でき、光電流・電圧変換回路の光入力
に対する動作範囲を改善することができる。As described above, the photocurrent of the present invention
According to the voltage conversion circuit, in the amplifier, the amplifier stage for one stage is connected to the connection point between the light receiving element and the first stage amplifier stage at the input / output terminal, so that the amplifier can be operated even if the optical input is excessive. It can operate and can improve the operation range for the optical input of the photocurrent / voltage conversion circuit.
【図１】 本発明の第１実施例の図４の受光ＩＣに用い
られる増幅器の回路図。FIG. 1 is a circuit diagram of an amplifier used in the light receiving IC of FIG. 4 according to the first embodiment of the present invention.
【図２】 本発明の第２実施例の図６の受光ＩＣに用い
られる増幅器の回路図。FIG. 2 is a circuit diagram of an amplifier used in the light receiving IC of FIG. 6 according to the second embodiment of the present invention.
【図３】 フォトカプラの基本構成を示す図。FIG. 3 is a diagram showing a basic configuration of a photocoupler.
【図４】 受光ＩＣの一例を示すブロック図。FIG. 4 is a block diagram showing an example of a light receiving IC.
【図５】 図４の受光ＩＣに用いられる従来の増幅器の
回路図。5 is a circuit diagram of a conventional amplifier used in the light receiving IC of FIG.
【図６】 受光ＩＣの他の例を示すブロック図。FIG. 6 is a block diagram showing another example of a light receiving IC.
【図７】 図４の受光ＩＣに用いられる従来の増幅器の
回路図。7 is a circuit diagram of a conventional amplifier used in the light receiving IC of FIG.
３、２３ フォトダイオード ４、２４ 増幅器 ５、２５ 帰還抵抗 ６、２６ コンパレータ １１、１３、１５、４１ Ｎｃｈ型ＭＯＳトランジスタ ３１、３３、３５、５１ Ｐｃｈ型ＭＯＳトランジスタ １２、１４、１６、４２ 定電流源 ３２、３４、３６、５２ 定電流源 3,23 Photodiode 4, 24 amplifier 5,25 Feedback resistor 6, 26 comparator 11, 13, 15, 41 Nch type MOS transistor 31, 33, 35, 51 Pch type MOS transistor 12, 14, 16, 42 Constant current source 32, 34, 36, 52 Constant current source
───────────────────────────────────────────────────── フロントページの続き Ｆターム(参考） 2G065 AA04 AB28 BA09 BC03 BC14 BE05 CA30 DA20 5J092 AA01 AA56 CA32 FA04 HA10 HA19 HA25 HA44 HA45 KA05 KA11 KA17 MA08 MA11 MA21 SA13 TA01 UL02 UL07 5J500 AA01 AA56 AC32 AF04 AH10 AH19 AH25 AH44 AH45 AK05 AK11 AK17 AM08 AM11 AM21 AS13 AT01 LU02 LU07 ─────────────────────────────────────────────────── ─── Continued front page F term (reference) 2G065 AA04 AB28 BA09 BC03 BC14 BE05 CA30 DA20 5J092 AA01 AA56 CA32 FA04 HA10 HA19 HA25 HA44 HA45 KA05 KA11 KA17 MA08 MA11 MA21 SA13 TA01 UL02 UL07 5J500 AA01 AA56 AC32 AF04 AH10 AH19 AH25 AH44 AH45 AK05 AK11 AK17 AM08 AM11 AM21 AS13 AT01 LU02 LU07
Claims (5)
幅段からなる増幅器により電圧変換する光電流・電圧変
換回路において、 前記増幅器は、さらに、前記受光素子と初段の増幅段と
の接続点に、１段分の増幅段が入出力端で接続されたこ
とを特徴とする光電流・電圧変換回路。1. A photocurrent / voltage conversion circuit in which a photocurrent generated by a light receiving element is converted into a voltage by an amplifier including a plurality of amplification stages, wherein the amplifier further comprises a connection point between the light receiving element and the first amplification stage. In addition, a photocurrent-voltage conversion circuit characterized in that one amplification stage is connected at the input and output ends.
増幅段を複数段で構成した増幅器の入力端に受光素子に
より発生する光電流を入力して、光電流を電圧変換する
光電流・電圧変換回路において、 前記増幅器は、さらに、前記受光素子と増幅器の入力端
との接続点に、ソース接地のＭＯＳトランジスタからな
る１段分の増幅段が入出力端で接続されたことを特徴と
する光電流・電圧変換回路。2. A photocurrent / voltage conversion circuit for converting a photocurrent into a voltage by inputting a photocurrent generated by a light receiving element to an input terminal of an amplifier having a plurality of amplification stages composed of source-grounded MOS transistors. The amplifier is further characterized in that, at the connection point between the light receiving element and the input end of the amplifier, an amplification stage for one stage composed of a source-grounded MOS transistor is connected at the input / output end. Voltage conversion circuit.
り、前記受光素子のアノード端子が接地され、カソード
端子が前記増幅器の入力端に接続されたことを特徴とす
る請求項２記載の光電流・電圧変換回路。3. The photocurrent according to claim 2, wherein each of the MOS transistors is an Nch type, an anode terminal of the light receiving element is grounded, and a cathode terminal is connected to an input terminal of the amplifier. Voltage conversion circuit.
り、前記受光素子のカソード端子が電源電圧に接続さ
れ、アノード端子が前記増幅器の入力端に接続されたこ
とを特徴とする請求項２記載の光電流・電圧変換回路。4. Each of the MOS transistors is a Pch type, a cathode terminal of the light receiving element is connected to a power supply voltage, and an anode terminal is connected to an input terminal of the amplifier. Photocurrent / voltage conversion circuit.
直列回路のＭＯＳトランジスタのゲートを入力端とする
とともに直列接続点を出力端とする複数の増幅段が直流
結合され、受光素子への光入力により発生する光電流を
電圧変換する増幅器と、 増幅器の出力を２値信号に変換するコンパレータとを具
備した光電流・電圧変換回路において、 前記増幅器が、さらに、その入力端に直列接続点が接続
されたゲート・ドレイン間ショートのＭＯＳトランジス
タと定電流源とからなる直列回路を有することを特徴と
する光電流・電圧変換回路。5. A plurality of amplification stages, each of which has a light receiving element, a gate of a MOS transistor of a series circuit including a source-grounded MOS transistor and a constant current source as an input terminal, and a series connection point as an output terminal, are DC-coupled. A photocurrent / voltage conversion circuit comprising an amplifier for converting a photocurrent generated by light input to a light receiving element into a voltage, and a comparator for converting an output of the amplifier into a binary signal, wherein the amplifier further has an input A photocurrent / voltage conversion circuit comprising a series circuit composed of a gate-drain shorted MOS transistor having a series connection point connected to an end thereof and a constant current source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001333651A JP4079621B2 (en) | 2001-10-31 | 2001-10-31 | Photocurrent / voltage converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001333651A JP4079621B2 (en) | 2001-10-31 | 2001-10-31 | Photocurrent / voltage converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003139608A true JP2003139608A (en) | 2003-05-14 |
| JP4079621B2 JP4079621B2 (en) | 2008-04-23 |
Family
ID=19148879
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001333651A Expired - Fee Related JP4079621B2 (en) | 2001-10-31 | 2001-10-31 | Photocurrent / voltage converter |
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| Country | Link |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1630952A2 (en) | 2004-08-31 | 2006-03-01 | NEC Compound Semiconductor Devices, Ltd. | Signal determining apparatus including amplifier circuit with variable response speed |
| JP2007143162A (en) | 2005-11-17 | 2007-06-07 | Avago Technologies Ecbu Ip (Singapore) Pte Ltd | Amplifier circuit and system having built-in amplifier circuit |
| KR101054388B1 (en) | 2009-06-24 | 2011-08-04 | 이화여자대학교 산학협력단 | Transimpedance Amplifier for Optical Receiver |
| JP2013065941A (en) * | 2011-09-15 | 2013-04-11 | Toshiba Corp | Light receiving circuit |
-
2001
- 2001-10-31 JP JP2001333651A patent/JP4079621B2/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1630952A2 (en) | 2004-08-31 | 2006-03-01 | NEC Compound Semiconductor Devices, Ltd. | Signal determining apparatus including amplifier circuit with variable response speed |
| JP2006074086A (en) * | 2004-08-31 | 2006-03-16 | Nec Compound Semiconductor Devices Ltd | Photoelectric current/voltage conversion circuit |
| EP1630952A3 (en) * | 2004-08-31 | 2007-04-04 | NEC Electronics Corporation | Signal determining apparatus including amplifier circuit with variable response speed |
| US7319365B2 (en) | 2004-08-31 | 2008-01-15 | Nec Electronics Corporation | Signal determining apparatus including amplifier circuit with variable response speed |
| JP2007143162A (en) | 2005-11-17 | 2007-06-07 | Avago Technologies Ecbu Ip (Singapore) Pte Ltd | Amplifier circuit and system having built-in amplifier circuit |
| KR101054388B1 (en) | 2009-06-24 | 2011-08-04 | 이화여자대학교 산학협력단 | Transimpedance Amplifier for Optical Receiver |
| JP2013065941A (en) * | 2011-09-15 | 2013-04-11 | Toshiba Corp | Light receiving circuit |
| US8884208B2 (en) | 2011-09-15 | 2014-11-11 | Kabushiki Kaisha Toshiba | Light receiving circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4079621B2 (en) | 2008-04-23 |
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