JP3198482B2 - Optoelectronic circuit elements - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optoelectronic circuit element used for a light receiving section of an optical fiber communication.

[0002]

2. Description of the Related Art FIG. 2 shows an example of a conventional optoelectronic circuit device (hereinafter referred to as OEIC). This O
EIC is formed monolithically on an InP substrate, a photodiode PD, resistor R _G, R _1, composed of R ₂ and transistor _{(FET) Q 1, Q 2} . In the circuit of FIG. 2, the photodiode PD and the resistor _RG constitute a light detection stage, the load resistor R ₁ and the transistor Q ₁ constitute an amplification stage, and the transistor Q ₂ and the resistor R ₂ constitute a source follower stage. ing.

[0003]

SUMMARY OF THE INVENTION Such a conventional OE
In IC, a transistor to Q ₁ amplifier stage the load resistance R
₁ constitutes an inverting amplifier 20.
The gain of 0 is designed to be 1, the transconductance and the product of the load resistance R ₁ of the transistor Q ₁ is 1
So that With this design, when applied to a field-effect transistor composed of an AlInAs layer and a GaInAs layer on an InP substrate, the power supply voltage V _D1 becomes 5
Since a [V], between the source and the drain of the transistor Q _1, so that the 4 [V] or more voltage is applied. This voltage value is to substantially correspond to the breakdown voltage of the transistor Q _1, has a problem that the transistor is likely to break.

The present invention has been made to solve such a drawback of the OEIC. When an inverting amplifier having a gain of 1 is formed on the OEIC, a transistor constituting the inverting amplifier is prevented from dielectric breakdown. The purpose is to:

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned object, and a gist of the invention is that a light receiving element for converting a received optical signal into an electric signal and an output signal of the light receiving element are amplified. An amplifier, and an inverting amplifier having a gain of substantially 1 for inverting the output of the amplifier and outputting the inverted signal. A transistor constituting the inverting amplifier includes a drain or collector side and a source or emitter side. , At least one of which is connected to a level shift means.

[0006]

A level shift means comprising a level shift diode or the like is connected to at least one of a drain (collector) side and a source (emitter) side of a transistor constituting an inverting amplifier. When a power supply voltage is applied to a transistor to which the level shift means is connected, a voltage shift occurs by the level shift means, and a voltage applied between a drain (collector) and a source (emitter) of the transistor is reduced. It is reduced.

[0007]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 shows a circuit diagram of an OEIC according to the present embodiment. The OEIC is monolithically formed on an InP substrate, and a photodiode PD for converting a received optical signal into an electric signal, an amplifier 1 for amplifying an electric signal detected by the photodiode PD, and an amplifier 1 A level shift circuit 2 for shifting the DC level of the output, an output buffer 3 to which the output of the level shift circuit 2 is given, an inverting amplifier 4 for inverting and outputting the output of the level shift circuit 2 and having a gain of 1. And an output buffer 5 to which this output is applied.

The amplifier 1 has a transistor Q ₁ and a resistor R
A load constituted by _1, and the transistor Q ₂ to which is operated by receiving a detection signal from the photodiode PD, and a level shift diode D ₁ to D _3, are connected in series between the power source voltage V _DD and ground configuration I do.

The level shift circuit 2 includes a transistor Q ₃
And a load composed of the level shift diodes D _{4 to} D ₆ , the transistor Q ₄ and the resistor R ₂ , and the power supply voltage V _DD
And constituted by connecting in series between the ground and the gate of the transistor Q ₃ is connected to the drain of the preceding transistor Q _2.

The output buffer 3 includes a transistor Q ₅ ,
A level shift diode D ₇ to D _9, the transistor Q
A load constituted by ₆ and a resistor R _3, and constituted by connecting in series between the power source voltage V _DD and ground, the source of the preceding transistor Q ₃ is connected to the gate of the transistor Q _5.

The inverting amplifier 4 includes level shift diodes D ₁₃ and D ₁₄ , a resistor R ₄ , a transistor Q ₇ , and level shift diodes D _{15 to} D _{17 connected} in series between the power supply voltage V _DD and the ground. And the transistor Q
And ₇ a gate of connected to the drain of the preceding transistor Q _4, the voltage DC level is shifted by the level shift diode D ₄ to D ₆ of the previous stage transistor Q
₇ is applied to the gate.

The output buffer 5 includes a transistor Q ₈ ,
A level shift diode D ₁₀ to D _12, the transistor Q
A load constituted by ₉ and the resistor R _5, constituted by connecting in series between the power source voltage V _DD and ground, the transistor Q
And the gate ₈ is connected to the drain of the preceding transistor Q _7, in which the transistor Q ₈ is operated in response to an output signal of the preceding stage of the inverting amplifier 4.

The outputs of the output buffers 3 and 5 are obtained from output terminals 6 and 7 connected to the sources of the transistors Q ₅ and Q ₈ constituting each buffer. Also, O
Among the elements constituting the EIC, the photodiode PD
, An MSM type or PIN type photodiode is used, and as the transistors Q _{1 to} Q ₉ , a junction field effect transistor (FET), HEMT, MISFET, MESFET, or the like is used.

The basic operation of the OEIC configured as described above will be schematically described.

When an optical signal enters the photodiode PD, the transistor Q ₂ operates according to the detection signal from the photodiode PD, and the amplifier 1 inverts and amplifies the detection signal. Receiving the output of the amplifier 1, the transistor Q ₃ of the level shift circuit 2 is turned off, the transistor Q ₅ of the output buffer 3 receives the output signal is turned off, the output terminal 6 of the "L" level Voltage is applied. On the other hand, the transistor Q ₃ of the level shift circuit 2 is for off state, the transistor Q ₇ of the inverting amplifier 4 is turned off. Therefore, the transistor Q ₈ has the resistance R
_A voltage is applied to the gate via ₄ to turn it on,
Output terminal 7 is supplied with a voltage at the “H” level. In a state where no optical signal is detected by the photodiode PD, each element performs the opposite operation, and the output terminal 6 is supplied with the “H” level voltage, and the output terminal 7 is supplied with the “L” level voltage. Voltage is applied.

Next, among the OEICs configured as described above, the level shift diode D in the inverting amplifier 4
₁₃ a description of the operation of to D _17.

First, the gain of the inverting amplifier 4 is determined by the transconductance and the resistance (load resistance) R of the transistor Q _7.
Is determined by the _fourth product, the value of the transconductance of about 6 [ms], the value of the resistor R ₄ is about 155 ohms, the value of the product, i.e. the gain of the inverting amplifier 4 is substantially 1 Become.

Further, in each level shift diode, a voltage shift of about 0.6 [V] occurs. Therefore,
When two are cascaded, a voltage shift of about 1.2 [V] can be generated, and when three are cascaded, a voltage shift of about 1.8 [V] can be generated. As in the inverting amplifier 4 shown in FIG. 1, three cascaded level shift diodes D ₁₅ , D ₁₆ and D ₁₇ are inserted between the source of the transistor Q ₇ and the ground, and two cascaded level shift diodes D ₁₅ , D ₁₆ and D ₁₇ are provided. The level shift diodes D ₁₃ and D ₁₄ are connected to the resistor R ₄ and 5 [V].
3 between the power supply voltage V _DD
It is possible to generate a voltage shift of [V], in conjunction with the transistor Q ₇ to the resistor R ₄ voltage 2 [V] is applied. On the other hand, the current flowing through the transistor Q ₇ is about 3
A [mA], the voltage drop is about 0.5 in the resistor R ₄
[V]. Therefore, the voltage applied between the source and the drain of the transistor Q ₇ is about 1.5 [V], and the can falls below a sufficient breakdown voltage of the transistor Q _7, to prevent the breakdown of the transistor Q ₇ be able to.

[0020] In this embodiment, three level shift diode connected in cascade to the drain side of the transistor Q ₇ constituting the inverting amplifier 4, an example of cascading two level shifting diodes to the source side Alternatively, a level shift diode, a resistor, or the like may be connected to at least one of the drain side and the source side.

In this embodiment, the inverting amplifier is constituted by using a field-effect transistor. However, even when an inverting amplifier is constituted by using a bipolar transistor, the constitution exemplified in this embodiment is applied. Similar action
It is effective.

[0022]

As described above, according to the optoelectronic circuit device of the present invention, the transistors constituting the inverting amplifier have the level at least one of the drain or collector side and the source or emitter side. Since the shift means is connected, the voltage applied between the source and the drain or between the emitter and the collector of the transistor can be reduced even when an inverting amplifier having a gain of 1 is constituted by this transistor, and the transistor It is possible to prevent dielectric breakdown.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of an OEIC according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of an inverting amplifier in a conventional OEIC.

[Explanation of symbols]

PD ... photodiode (light receiving element), 4 ... inverting amplifier, Q ₁ to Q ₉ ... transistors, D ₁₃ to D ₁₇ ... level shift diode.

Claims (2)

(57) [Claims] 1. A light-receiving element for converting a received optical signal into an electric signal, an amplifier for amplifying an output signal of the light-receiving element, and an inverting amplifier having a gain substantially equal to 1 for inverting and outputting the output of the amplifier. An optoelectronic circuit device comprising: a transistor constituting the inverting amplifier, wherein a level shift means is connected to at least one of the drain or collector side and the source or emitter side. 2. The level shift means includes a plurality of level shift diodes, two level shift diodes connected in series to a drain or a collector of the transistor via a resistive load, and a source or an emitter. 2. The optoelectronic circuit device according to claim 1, wherein three level shift diodes are connected in series between the device and the ground.