JP2003122313A - Liquid crystal display device and driving method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device and a driving method therefor, capable of reducing lateral cross-talk without damaging an advantage of a lowered cost using a multiplexor drive. SOLUTION: In the liquid crystal display device using the multiplexor drive and the driving method therefor, before a part corresponding to each pixel of the last individual source signals Ssq is written (Tmgq), a part corresponding to the other pixels of the same polarity as the part of the individual source signal Ssp is written (Tmgq') in each pixel corresponding to the last individual source signals Ssq in time-division multiplexing of a serial source signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly to a device using a multiplexer drive for a source signal circuit.

[0002]

2. Description of the Related Art In recent years, liquid crystal display devices have rapidly increased in size, increased in definition, and increased in image quality, and efforts have been actively made to meet the requirements. In particular, horizontal crosstalk and reduction of charging error in source signal writing are important issues for higher image quality, and these are becoming more and more serious issues due to the high definition of liquid crystal display devices in recent years. is there.

As the resolution of a liquid crystal display device becomes higher, the number of output terminals (hereinafter referred to as source driver output terminals) of a source driver for supplying an image signal to the display section increases, resulting in higher cost. The problem arises. As a method of solving this, multiplexer driving is often used. Multiplexer drive is a drive method in which the output from one source driver output terminal is distributed to a plurality of source lines, and thus a plurality of source lines are driven by the output of one source driver output terminal. Therefore, the number of source driver output terminals can be reduced. For example, input a serial source signal in which source signals for three lines are time-division multiplexed into a multiplexer element,
When this is converted into a parallel source signal and written into the pixel, the number of source driver output terminals is reduced to one third, so that, for example, three source driver ICs are conventionally provided for one liquid crystal panel. Where it was necessary, it is possible to cover with one. Although the number of distributions can be any number depending on the configuration of the source driver, normally, the distribution of 2 lines or the distribution of 3 lines is common. As the number of distributions increases, the ON period of the multiplexer gate per source line becomes shorter accordingly.
A charge error is likely to occur in writing a source signal to a pixel through each source line. Therefore, it is general to determine the number of line distributions to such an extent that this charging error falls within the allowable range.

[0004]

However, not only the charging error but also the lateral crosstalk is actually a problem when the multiplexer is driven. The horizontal crosstalk phenomenon is shown in FIG.
When a black window pattern is displayed in a constant area 201 in the center of, and a background halftone solid pattern is displayed in the area 202 around it, among the source lines in the screen 200,
Among the pixels belonging to the source line and the pixel potential of the source line SLb (correctly, the pixel electrode potential) such that all the pixels belonging to the source line are located in the halftone pattern display area 202, This is a phenomenon in which the potential of the pixels of the source line SLa is slightly different from that of the pixels belonging to the black window display area 201 and the remaining part of the half tone solid pattern display area 202. The portions 203 located on both sides of the black window display area 201 of the window display area 202 are displayed slightly whitish or blackish as compared with other portions, which may result in poor image quality. The reason why such a difference appears is that the amplitude of the fluctuation of the potential of the source signal is different between the black window display area 201 and the halftone solid pattern display area 202, and therefore the fluctuation amount of the pixel potential is different. Is.

In order to explain the reason for this in detail, the principle of occurrence of lateral crosstalk will be described. In this horizontal crosstalk, as a first step, when the potential of the source signal fluctuates, the fluctuation affects the common capacitance line through the cross capacitance between the wirings, and the potential of the common capacitance line is thereby increased. Fluctuates. Then, as a second step, the potential fluctuation cannot be completely returned to the original potential before the switching element of the pixel is turned off, and as a result, the common capacitance is generated after the switching element is turned off and the pixel potential is held. Since the potential of the line returns to the original potential, the potential of the pixel electrode connected to the common capacitance line also changes via the storage capacitance. As a result, horizontal crosstalk occurs.

From the above, the factors causing the horizontal crosstalk are summarized in the following two points. That is, first, the potential of the common capacitance line fluctuates due to the influence of the variation of the potential of the source signal, and then the varied potential of the common capacitance line is cut off before the switching element of the pixel is turned off. That is not the case.

Next, considering each of these factors in terms of specific parameters, the first point is related to the amplitude of the potential of the source signal and the capacitance between the source line and the common capacitance line. The second point relates to the load on the common capacitance line, that is, the wiring resistance, the storage capacitance, the horizontal period, the timing when the potential of the source signal fluctuates, and the like. Here, again examining the difference between the multiplexer drive and the normal drive from the above factors,
It can be seen that the timing of the potential fluctuation of the source signal is the largest factor.

This will be described with reference to FIGS. 17 and 18. Assuming line inversion drive in normal drive,
The potential Vg of the gate signal of the switching element of the pixel (hereinafter, simply referred to as the pixel gate signal) is generally set so as to change into a rectangular pulse within the inversion period of the potential of the source signal. . Then, in the case of normal driving, the potential Vs of the source line changes with the potential of the source signal. As a result, in the normal frame, as shown in FIG.
As shown in 7 (a), the electric potential Vd of the pixel rises in a charging curve along with the rising of the electric potential Vg of the gate signal of the pixel, and is held at the electric potential at that time by the falling of the electric potential Vg of the gate signal. To be done. At this time, the punch-through voltage ΔVts is generated due to the fall of the potential Vg of the gate signal, and the potential changes accordingly. On the other hand, the potential Vf of the common capacitance line is always held at a predetermined potential, but a fluctuation Vfa occurs due to the rise of the potential Vs of the source line. However, since the potential Vs of the source line rises before the potential Vg of the gate signal of the pixel rises, the gate signal of the pixel changes after the potential Vs of the source line rises and changes. It is possible to secure a certain period of time until the pixel potential Vd of the falling edge is determined. Therefore, since the fluctuation Vfa of the potential Vf of the common capacitance line is returned to the original when the potential Vd of the pixel is fixed, the horizontal crosstalk does not occur. Even in negative frames,
As shown in FIG. 17B, the direction of the potential Vs of the source line and the fluctuation Vfa of the potential Vf of the common capacitance line are reversed, but the direction is the same as in the case of the positive frame. Further, since the punch-through voltage ΔVts is the same between frames having positive and negative polarities, it can be canceled by changing the potential of the counter electrode.

On the other hand, when line inversion drive is assumed in the multiplexer drive, as shown in FIGS. 18 (a) and 18 (b), the timing at which the source line potential Vs fluctuates corresponds to each source line of the multiplexer. It is the time when the gate signal of the switching element is turned on and the corresponding source signal is supplied to each source line. At this time, the timing at which the gate signal of the switching element of the multiplexer corresponding to the source line to which the source signal is finally supplied is turned on is the latest, but from this timing until the gate signal of the pixel is turned off. The period is quite short. Therefore, the fluctuation Vfb of the potential Vf of the common capacitance line due to the fluctuation of the potential of the source line to which the source signal is finally supplied does not completely return to the original by the time the gate signal of the pixel is turned off, and the gate of the pixel After the signal is turned off and the pixel potential Vd is held, the signal returns to the original state. As a result, the variation ΔVd of the pixel potential is generated, and the variation ΔVd causes lateral crosstalk. Moreover, since the polarity variation ΔVd of the pixel differs between positive and negative frames, it cannot be offset by changing the potential of the counter electrode.

As described above, the reason why the horizontal crosstalk appears more markedly in the multiplexer driving than in the normal driving is that, due to the principle of the multiplexer driving, the gate line of the pixel is changed after the potential of the source line is changed. It is considered that this is because the period until the signal is turned off is too short and the potential of the common capacitance line cannot be returned to the original potential level during that period. As a countermeasure against this, for example, as disclosed in Japanese Patent Laid-Open No. 03-2822, in order to cancel this influence at the timing when the potential of the source line changes, a correction pulse having a polarity opposite to that of the source signal is used. There is a method of applying. However, in this method, a correction pulse needs to be newly added, and a new function is added to the signal processing system. Therefore, the cost of the source driver IC is reduced by driving the multiplexer, or the signal processing system is simplified. However, there is a drawback in that the advantage of is impaired.

The present invention has been made in order to solve the above problems, and does not impair the advantage of cost reduction by using a multiplexer drive as a source signal supply method, and a horizontal crosstalk. It is an object of the present invention to provide a liquid crystal display device and a driving method thereof that can reduce the power consumption.

[0012]

In a liquid crystal display device and a driving method thereof according to the present invention, a plurality of pixels forming a display screen can be selected for each gate line through a plurality of source lines and one or more gate lines. The plurality of source lines are connected to one or more source signal output terminals through a multiplexer in a predetermined number of units, the plurality of pixels are sequentially selected through the gate line, and the source signal output is performed according to the selection. A plurality of individual source signals time-division-multiplexed with the multiple source signals output from the terminals are sequentially distributed to the corresponding source lines by the multiplexer, whereby each individual source signal corresponds to the selected pixel. In the driving method of a liquid crystal display device configured to sequentially write in pixels to perform display, the time division multiplexing is performed. Before writing a portion corresponding to each pixel of the individual source signal in each pixel corresponding to the last individual source signal in the above, writing a portion corresponding to another pixel having the same polarity as that portion of the individual source signal (Claims 1 and 18).

With this configuration, the individual source signal for another pixel having the same polarity as that of the individual source signal is once written before the last individual source signal is written to the target pixel, so that the potential of the pixel is determined. Since the potential variation of the source line closest to the end of the sequential selection period is reduced, horizontal crosstalk can be reduced. Moreover,
With this configuration, since it is sufficient to write the individual source signals to the pixels in addition to the original period, it is not necessary to add a new signal processing system. Therefore, the multiplexer is used as the source signal supply method. The advantage of cost reduction by using the drive is not impaired.

In this case, the selection through the gate line is performed before the sequential selection period, which is the period for the sequential selection, so that the last individual source as a portion corresponding to another pixel of the individual source signal. A portion of the signal corresponding to another pixel may be written (claims 2 and 19). With such a configuration, since it is only necessary to add a pixel selection period, it is possible to reduce lateral crosstalk with a simple configuration.

By distributing the individual source signal by the multiplexer in the pre-charge distribution period before the sequential distribution period, which is the sequentially distributed period, a portion of the individual source signal corresponding to another pixel. As an alternative, individual source signals other than the last one in the time division multiplexing may be written (claims 3 and 20). With such a configuration, since it is only necessary to add or shift the distribution period of the individual source signals, it is possible to reduce the horizontal crosstalk with a simple configuration.

In this case, the precharge distribution period is
It may be a period different from the sequential distribution period (claims 4 and 21).

In this case, the precharge distribution period is
The time division multiplexing may be set so as to overlap the sequential distribution period of the individual source signal other than the last one (claims 5 and 22). With such a configuration, the total period of the precharge distribution period and the sequential distribution period of the other individual source signals can be shortened as compared with the case where these do not overlap each other, so that the sequential distribution period is lengthened or shifted forward. be able to. As a result, it becomes possible to more effectively reduce the charging error and the horizontal crosstalk of the pixel.

Further, in the above case, the individual source signals other than the last one in the time division multiplexing are also pre-distributed before the sequential distribution period in the same sequential selection period,
It may be distributed to the corresponding source line (claims 6 and 23). With this configuration, it is possible to reduce the charging error of the pixels corresponding to the individual source signals other than the last one.

In this case, the pre-distribution period may be set to overlap with the pre-charge distribution period (claims 7 and 24). With such a configuration, the total period of the pre-charge distribution period and the pre-distribution period can be shortened as compared with the case where these do not overlap each other, so that the sequential distribution period can be lengthened or shifted forward. As a result, it is possible to effectively reduce the charging error of the pixel and the horizontal crosstalk.

The lengths of the pre-distribution period and the pre-charge distribution period may be set shorter than the lengths of the corresponding sequential distribution periods (claims 8 and 25). With such a configuration, the distribution period can be sequentially lengthened or shifted forward, so that it is possible to effectively reduce pixel charging errors and horizontal crosstalk.

The start of the pre-distribution period corresponding to the first individual source signal in the time division multiplexing may be set before the start of the sequential selection period (claims 9 and 26). With such a configuration, the distribution period can be sequentially lengthened or shifted forward, so that it is possible to effectively reduce pixel charging errors and horizontal crosstalk.

In this case, the length of the sequential distribution period may be set longer than the lengths of the pre-distribution period and the pre-charge distribution period (claims 10 and 2).
7). With such a configuration, the charging error of the pixel can be reduced more effectively.

In this case, the start of the sequential distribution period corresponding to the last individual source signal in the time division multiplexing is set to hang on the period in which the immediately preceding individual source signal in the time division multiplexing is output. It may be provided (Claims 11 and 28). With such a configuration, the horizontal crosstalk can be reduced more effectively.

Further, in the liquid crystal display device and the driving method thereof according to the present invention, a plurality of pixels forming a display screen are connected to a plurality of source lines through one or more gate lines in a selectable manner for each gate line. A plurality of source lines are connected to one or more source signal output terminals through a multiplexer in a predetermined number unit, the plurality of pixels are sequentially selected through the gate line, and are output from the source signal output terminal according to the selection. A plurality of individual source signals time-division-multiplexed with the multiple source signal are sequentially distributed to the corresponding source lines by the multiplexer, so that the individual source signals are sequentially written to the corresponding pixels of the selected pixels. In the driving method of the liquid crystal display device configured to perform the display, the above-described sequentially selected periods are set. The is a period from the beginning of sequential selection period to the end of the period serving first sequential sharing period the first individual source signals in the time-division multiplexed are sequentially distributed 1
The length of the second period, which is the period from the beginning of the last sequential distribution period, which is the period during which the last individual source signal in the time division multiplexing is sequentially distributed, to the end of the sequential selection period. The crest is set longer (claims 12 and 29).

With such a configuration, in the conventional multiplexer drive, generally, the first period and the second period are set to be substantially equal to each other, so that the last sequential distribution in the sequential selection period Tg is performed. The relative start of the period is earlier than before. Therefore, lateral crosstalk can be reduced as compared with the conventional case.

In this case, the start of the last sequential distribution period may be set so as to fall on the period in which the previous individual source signal in the time division multiplexing is output (claims 13 and 30). ). With such a configuration, since it is only necessary to sequentially shift the distribution period forward, it is possible to reduce lateral crosstalk with a simple configuration.

The length of the last sequential distribution period is
It may be set longer than the length of the first sequential distribution period (claims 14 and 31). With such a configuration, horizontal crosstalk can be reduced by simply changing the length of the distribution period.

Further, the start of the first sequential distribution period may be set before the start of the sequential selection period (claims 15 and 32). With such a configuration, lateral crosstalk can be more effectively reduced only by sequentially shifting the distribution period earlier.

Further, at least the start of the last sequential distribution period may be set so as to hang on the sequential distribution period of the immediately preceding individual source signal in the time division multiplexing (claims 16 and 33). . With this configuration,
Since the beginning of the sequential distribution period is located earlier, lateral crosstalk can be effectively reduced.

In the above case, each pixel is connected to the source line through the pixel switching element, and the pixel is selected by turning on the pixel switching element through the gate line.
The predetermined number of source lines are respectively connected to the source signal output terminals via the multiplexer switching elements that form the multiplexer, and the individual source signals are distributed to the source lines to turn on the multiplexer switching elements. Alternatively, it may be performed (claims 17 and 34).

[0031]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. Embodiment 1 FIG. 1 is a block diagram showing the overall configuration of a liquid crystal display device according to Embodiment 1 of the present invention, and FIG. 2 is a block diagram of the liquid crystal display device of FIG.
FIG. 3 is a block diagram showing a configuration of pixels, FIG. 3 is a timing chart showing waveforms of respective signals and potential changes at specific points when the display section is driven by the conventional method in the overall configuration of FIG. 6 is a timing chart showing the waveform of each signal and the potential change at a specific location when the display unit is driven by the method according to the present embodiment in the overall configuration. It should be noted that FIGS. 3 and 4 show ideal signal waveforms.

As shown in FIG. 1, the liquid crystal display device 1 according to the present embodiment has a display unit 2, a horizontal scanning circuit 3, a vertical scanning circuit 4, a plurality of multiplexers 5, a multiplexer controller 6, and And a backlight (not shown).

Referring also to FIG. 2, the display section 2 has a plurality of pixels 7 formed in a matrix form a display screen. Each pixel 7 has a pixel electrode 21, a liquid crystal capacitance Clc is formed between the pixel electrode 21 and the counter electrode 22, and a storage capacitance Cst is provided between the pixel electrode 21 and the common capacitance line 9.
Are formed. In the display unit 2, gate lines GL and source lines SL are further formed so as to be orthogonal to each other for each row and each column of the pixels 7 formed in the matrix. And this gate line GL
The pixels 7 are connected to the source line SL and the source line SL for each row and each column. That is, in each pixel 7, a pixel switching element 8 formed of, for example, a TFT is formed, one main terminal (drain) of the pixel switching element 8 is connected to the pixel electrode 21, and the pixel switching element 8 is connected. 8 other main terminal (source) and control terminal (gate)
Are respectively connected to the corresponding source line SL and gate line GL. Each gate line GL is connected to the vertical scanning circuit 4. The vertical scanning circuit 4 is composed of a gate driver here and each gate line GL.
The pixel gate signal Sgn is output to drive the pixel switching elements 8 on / off for each gate line GL.
The source line SL is connected to the output terminal 3a of the horizontal scanning circuit 3 via the multiplexer 5 for every two adjacent lines. The horizontal scanning circuit 3 is composed of a source driver here, generates a serial source signal (multiple source signal) Smn based on an image signal input from the outside, and uses this as a gate signal Sgn output from the vertical scanning circuit. Output from the output terminal 3a at the same timing. Here, the serial source signal Smn is configured by time-division-multiplexing the corresponding individual source signals Ssn for two source lines SL. The individual source signal Ssn is configured to be included so that the potentials to be written in the pixels 7 belonging to one source line SL are temporally continuous.

The multiplexer 5 here has two switching elements, a first switching element 10 and a second switching element 11. One of the main terminals of the first and second switching elements 10 and 11 is connected to the mutually common output terminal 3a of the horizontal scanning circuit 3, and the other main terminal is
The source lines SL are connected to the respective source lines SL. The control terminals of the first and second switching elements 10 and 11 are connected to the multiplexer controller 6 via the first and second multiplexer gate lines L1 and L2, respectively. The multiplexer controller 6 outputs the first and second multiplexer gate signals to the first and second multiplexer gate lines L1 and L2, respectively, and outputs the first and second switching elements 10 and 1, respectively.
Drive 1 on / off respectively.

The common capacitance line 9 is provided for each row of the pixels 7 in parallel with the gate line GL, and is held at a predetermined potential by a common power source. Further, the counter electrode 22 is arranged in common to each pixel and is held at a predetermined potential. And
A cross capacitance Cgs is formed at the intersection of the source line SL and the gate line GL, and a cross capacitance Csf is formed at the intersection of the source line SL and the common capacitance line 9.

Next, the operation of the liquid crystal display device configured as described above, that is, the driving method of the liquid crystal display device according to the present embodiment will be described with reference to FIGS.

Since the driving method according to the present embodiment includes a conventional driving method as a basic driving method for the multiplexer, here, first, in the overall configuration of FIG. The case of driving will be described as a basic driving method of the multiplexer according to the present embodiment, and then the characteristic configuration of the driving method according to the present embodiment will be described. Further, here, focusing on any one multiplexer 5 shown in FIG. 2, a source line connected to this multiplexer 5, an arbitrary pair of pixels connected to this source line, and signals related thereto are described. The sub-codes of p and q are given in the description.

1 to 4, in the conventional driving method, first, the serial source signal Smn is output from the output terminal 3a of the horizontal scanning circuit 3 to the multiplexer 5. Figure 3
As shown in FIG. 3, the line inversion drive generally used is adopted here, and the serial source signal Smn is 1
The polarity switches every horizontal period Th. Further, in the normal driving, only one signal is written in one source line within one horizontal period, whereas in the multiplexer driving, one signal is written.
It has a signal to be written in a plurality of source lines within the horizontal period Th, and here has a signal for two lines.
That is, the serial source signal Smn is Th for one horizontal period Th.
Is divided into a first half and a second half, and each has an individual source signal (specifically, its signal potential) Ssp, Ssq to be written in the first and second source lines SLp, SLq. In general, the serial source signal Smn is divided so that the first half and the latter half are equal to each other, so that the two individual source signals Ssp and Ssq are switched to each other every half horizontal period. In the case of line inversion drive, all the individual source signals within this one horizontal period have the same polarity, but in the case of dot inversion drive, these individual source signals also have opposite polarities.

Next, as shown in FIG. 3, the vertical scanning circuit 4 outputs a pixel gate signal Sgn having two values of an ON potential Vgon and an OFF potential Vgoff to the gate line GLn. When the serial source signal Smn is switched to the horizontal period Th including the portions corresponding to the pixels 7p and 7q, the pixel gate signal Sgn becomes the ON potential Vgon with a delay of the time Tgg from the switching time point, and the serial source The off potential Vgoff is set to a certain time Tsg before the signal Smn is switched to the next horizontal period Th. When the pixel gate signal Sgn reaches the ON potential Vgon, the pixel switching elements 8p and 8q of the pixels 7p and 7q connected to the gate line GLn are turned on (conducting).

Next, from the multiplexer controller 6, as shown in FIG. 3, the ON potential Vmgon and the OFF potential Vmgof.
The first and second multiplexer gate signals Smg1 and Smg2 that take a binary value of f are output to the multiplexer gate lines L1 and L2, respectively. The first multiplexer gate signal Smg1 becomes the ON potential Vmgon when the pixel gate signal Sgn becomes the ON potential Vgon, and becomes the OFF potential Vmgoff before the serial source signal Smn switches to the next individual source signal Ssq. Further, the second multiplexer gate signal Smg2 becomes the ON potential Vmgon when the serial source signal Smn is switched to the individual source signal Ssq, and becomes the OFF potential Vmgoff before the pixel gate signal Sgn becomes the OFF potential Vgoff.

When the first multiplexer gate signal Smg1 becomes the ON potential Vmgon, the first switching element 10 is turned on, and the individual source signal Ssp of the serial source signal Smn becomes the source line SLp and the pixel switching element 8p. Is written in the electrode 21 of the pixel 7p via.
At this time, the second multiplexer gate signal Smg2 is
Since the potential is off potential Vmgoff, the second switching element 11 is off (cut off), and therefore the individual source signal Ssp is not written to the electrode 21 of the pixel 7p. After that, when the first multiplexer gate signal Smg1 becomes the off potential Vmgoff, the first switching element 10 is turned off, and the writing of the individual source signal Ssp is completed.

Next, when the second multiplexer gate signal Smg2 becomes the ON potential Vmgon, the second switching element 11 is turned on, and the individual source signal Ssq of the serial source signal Smn is changed to the source line SLq and the pixel switching element 8q. Is written in the electrode 21 of the pixel 7q via.
At this time, since the first switching element 10 is off, the individual source signal Ssq is not written in the electrode 21 of the pixel 7p, and the potential of the individual source signal Ssp written immediately before is held. After that, when the second multiplexer gate signal Smg2 becomes the off potential Vmgoff, the second switching element 11 is turned off, and the writing of the individual source signal Ssq is completed.

In this way, the vertical scanning circuit 4 outputs the pixel gate signal Sgn so that the pixels 7p, 7
q is selected, and the individual source signals Ssp and Ssq which are time-division multiplexed with the serial source signal Smn output from the output terminal 3a of the horizontal scanning circuit 3 are distributed by the multiplexer 5 to the corresponding source lines SLp and SLq ( (Hereinafter referred to as distribution), and the selected pixels 7p and 7q are selected.
In the pixel 7 of the distributed individual source signals Ssp and Ssq.
The part corresponding to p, 7q is written. Focusing on the entire display unit 2, this series of operations is performed in parallel for each multiplexer 5, and each pixel 7 is vertically scanned.
The individual source signals Ssn are written in all the pixels 7 by sequentially selecting each of the gate lines GL by, and the transmittance of the light supplied from the backlight is controlled via the liquid crystal, and the image signal The video corresponding to is displayed on the display screen.

Next, the potential Vs of the source lines SLp, SLq
Focusing on the changes in p and Vsq, first, the potential Vsp changes to the potential of the individual source signal Ssp at the timing when the first multiplexer gate signal Smg1 reaches the on-potential Vmgon, and the signal goes through the through state. , The first multiplexer gate signal Smg1 becomes the off-potential Vmgoff and then shifts to the signal hold state as it is, so that the potential Vsp itself is maintained in the initial state of the change. This state is maintained until the first multiplexer gate signal Smg1 again becomes the ON potential Vmgon in the next one horizontal period Th,
At that time, the potential is switched to the new potential of the individual source signal Ssp. The potential Vsq of the source line SLq is also switched in the same manner.

Next, focusing on the change in the potential Vdp of the pixel electrode 21 of the pixel 7p, first, the potential Vs of the source line SLp is shown.
Following the change of p, the potential Vdp changes to the source line SLp.
The potential Vdp itself changes to a specific potential according to the potential Vsp of the signal, passes through the signal through state, and after the pixel gate signal Sgn reaches the off potential Vgoff, the signal directly shifts to the signal hold state. Holds the above specific potential. This state is maintained until the pixel gate signal Sgn reaches the on-potential Vgon again in the next frame, and at that time, it is switched to a specific potential corresponding to the potential Vsp of the new source line SLp. The potential Vdq of the pixel electrode 21 of the pixel 7q is also switched in the same manner.

As can be seen from the above operation, the conditions for writing the individual source signals Ssp and Ssq to the pixel 7 in the multiplexer driving are different from those in the normal driving. That is, in the normal drive, the source signal is written to the pixel at the time when the pixel gate signal is switched to the ON potential, whereas in the multiplexer drive, the first and second multiplexer gates are switched. -G signal Smg1, S
It is a time point when mg2 is switched to the ON potential Vmgon, which is a relative delay. In particular, the second multiplexer gate signal Smg2 switches to the ON potential Vmgon later than the first multiplexer gate signal Smg1. Therefore, the individual source signal Ssq for the pixel electrode 21 of the pixel 7q is charged. Is short, and problems such as charging errors are more likely to occur. Further, the relative delay of the writing timing of the source signal to the pixel can be said to be a severe condition for the horizontal crosstalk. That is, as described above, the occurrence of the horizontal crosstalk is caused by the potentials Vsp and Vsq of the source lines SLp and SLq.
Is changed by the writing of the individual source signals Ssp, Ssq, and the period until the pixel gate signal Sgn is switched to the off potential Vgoff is too short, and the individual source signals Ssp, Ss are changed.
This is because the influence of fluctuations in q cannot be completely eliminated. In FIG. 3, reference numerals Vfa and Vfb
Represents the potential fluctuation of the common capacitance line due to the potential fluctuation of the source line, and the symbol ΔVd + ΔVts represents the potential fluctuation of the pixel electrode due to the potential fluctuations Vfa and Vfb of the common capacitance line.

As described above, it can be seen that if the display unit 2 is driven as it is, the problem such as lateral crosstalk is likely to occur in principle. Then, when this is combined with an increase in the load of the common capacitance line 9 under certain conditions such as a large-sized panel and high definition, and a decrease in the horizontal period Th, lateral crosstalk becomes apparent.

Therefore, in order to solve this problem, the driving method of the display unit 2 of the liquid crystal display device according to the present embodiment is such that the source line SLq corresponding to the individual source signal Ssq after the time division of the serial source signal Smn. Second provided in
The second multiplexer gate signal Smg2 input to the gate of the switching element 11 of
In addition to the original on-potential period, the on-potential period is set also in the first half of the on-potential period of the pixel gate signal Sgn. Specifically, as shown in FIG. 4, the second multiplexer gate signal Smg2 is in the ON potential period (hereinafter referred to as a sequential selection period) Tg of the pixel gate signal Sgn on the time axis. It has an original ON potential period (hereinafter referred to as a sequential distribution period) Tmgq located in the latter half Tgq and an on-potential period for precharge (hereinafter referred to as a precharge distribution period) Tmgq ′ located in the former half Tgp.
According to this setting, in the source line SLq of the display unit 2, first, the second multiplexer gate signal Smg
During the second precharge distribution period Tmgq ′, the second switching element 11 of the multiplexer 5 is turned on, and the individual source signal Ssp of the serial source signal Smn becomes the pixel electrode 21 of the pixel 7q.
Then, the second switching element 11 of the multiplexer 5 is turned on in the same distribution period Tmgq, and the individual source signal Ssq of the serial source signal Smn is written to the pixel electrode 21 of the pixel 7q. As a result, the target individual source signal Ssq is written in the pixel 7q once the individual source signal Ssp for another pixel 7p is written. On the other hand, the potential vf of the common capacitance line 9 is the fluctuation of the potential Vsq of the source line SLq accompanying the writing of the individual source signal Ssp into the pixel 7q at the start of the precharge distribution period Tmgq ′ of the second multiplexer gate signal Smg2. Causes a fluctuation Vfa, and then a fluctuation Vfb due to the fluctuation of the potential Vsp of the source line SLp accompanying the writing of the individual source signal Ssp into the pixel 7p, and then the sequential distribution period Tmgq of the second multiplexer gate signal Smg2. A fluctuation Vfc occurs due to the fluctuation of the potential Vsq of the source line SLq accompanying the writing of the individual source signal Ssq to the pixel 7q at the start. In this case, the precharge distribution period T
Since the swing of the potential Vsq of the source line SLq in mgq 'is accompanied by the inversion of the polarity, the common capacitance line 9 accompanying it is also accompanied.
The fluctuation Vfa of the potential Vf is large. However, this fluctuation Vfa
Is sufficiently far from the timing of ending the sequential selection period Tg of the pixel gate signal Sgn, and therefore does not affect the occurrence of horizontal crosstalk. On the other hand, the fluctuation Vfc of the potential Vf of the common capacitance line 9 in the sequential distribution period Tmgq is close to the timing of the end of the sequential selection period Tg of the pixel gate signal Sgn, and thus has a great influence on the occurrence of horizontal crosstalk. However, in the present embodiment, the line inversion drive is adopted,
The fluctuation of the potential Vsq of the source line SLq which is the basis of the fluctuation Vfc of the potential Vf of the common capacitance line 9 is small because the polarity is not inverted. Therefore, the potential Vf of the common capacitance line 9
Since the variation Vfc of is also small, the lateral crosstalk can be greatly reduced as compared with the conventional driving method of the display section.

What is important in this embodiment is, firstly, for the second multiplexer corresponding to the subsequent individual source signal (hereinafter simply referred to as the subsequent individual source signal) Ssq in the time division of the serial source signal Smn. The gate signal Smg2 is set so as to have the ON potential period Tmgq during the period in which the individual source signal Ssq is output and the ON potential period Tmgq 'during the period in which the other individual source signal Ssp is output. This makes it possible to set the timing when the potential of the source line largely fluctuates earlier. Second, the first ON potential period Tmgq '
Then, although the original individual source signal Ssq cannot be written to the target pixel 7q, the purpose here is to use the potential of the source line and the wiring capacitance of the source line at this point. It means that it is changed once.

Next, a modified example of the driving method of the display unit 2 will be described. 5A and 5B are waveform diagrams showing a modified example of the method for driving the display unit of the liquid crystal display device according to the present embodiment, where FIG. 5A is a diagram showing a first modified example, and FIG. 5B is a second modified example. It is a figure which shows an example.

As shown in FIG. 5A, in the first modification, the previous individual source signal (hereinafter simply referred to as the previous individual source signal) S in the time division of the serial source signal Smn.
First multiplexer gate signal Smg1 corresponding to sp
Is the first half Tg of the sequential selection period Tg of the pixel gate signal Sgn
Within p, there are two ON potential periods Tmgp and Tmgp '. With this configuration, the charging margin of the pixel 7p corresponding to the individual source signal Ssp can be increased. The on-potential period Tmgp 'before the first multiplexer gate signal Smg1 is hereinafter referred to as a pre-distribution period.

As shown in FIG. 5B, in the second modification, the first multiplexer gate signal Smg1 corresponding to the previous individual source signal Ssp is replaced with the subsequent individual source signal Ssq.
Has a long sequential distribution period Tmgp which overlaps the precharge distribution period Tmgq 'of the second multiplexer gate signal Smg2. Even with such a configuration, the charging margin of the pixel 7p corresponding to the individual source signal Ssp can be increased. When the second modified example is compared with the first modified example, in the first modified example, there is no period in which the gate signals Smg1 and Smg2 for both multiplexers are at the ON potential at the same time. Pixels 7p, 7q in the potential period
Although the charging of 1 is advantageous, the charging margin thereof is slightly inferior, whereas the opposite is true in the second modification. Therefore,
The more advantageous one may be adopted depending on the case.

In the above configuration example, the two-line distribution method is adopted as the distribution method of the source driver (horizontal scanning circuit) 3 for the sake of clarity. However, three-line distribution method or more is adopted. It is possible in principle to adopt a number line distribution method, and the basic operation is the same. Therefore, the present invention can be applied to these as well as the above configuration example. Embodiment 2 FIG. 6 is a waveform diagram showing a driving method of a liquid crystal display device according to Embodiment 2 of the present invention. 6, the same reference numerals as those in FIG. 5 indicate the same or corresponding portions. As shown in FIG. 6, in the present embodiment, in one frame period Tf of the serial source signal Smn, the pixel gate signal Sgn of a certain gate line GLn is sequentially selected in addition to the serial selection signal Tmn (Smn ( ON potentials that completely overlap on the time axis during the sequential selection period Tg (not shown) of the pixel gate signal Sgm (not shown) of another gate line GLm (not shown) having the same polarity (not shown). It is set to have a period (hereinafter, referred to as a precharge selection period) Tg '. The other points are similar to those of the first modification of the first embodiment.

With this configuration, the timing of the source line potential fluctuation can be set earlier than in the first embodiment, and the lateral crosstalk and the charging error can be more effectively reduced. . Third Embodiment FIG. 7 is a waveform diagram showing a driving method of a liquid crystal display device according to a third embodiment of the present invention. 7, the same reference numerals as those in FIG. 5 indicate the same or corresponding portions.

As shown in FIG. 7, in the present embodiment, the pre-distribution period Tmgp 'of the first multiplexer gate signal Smg1 and the precharge distribution period Tmgq' of the second multiplexer gate signal Smg2 are time. It is set to overlap completely on the axis. Other points are the same as the first embodiment.
Is the same as the first modified example.

With such a configuration, when the total period of the pre-distribution period Tmgp 'of the first multiplexer gate signal Smg1 and the pre-charge distribution period Tmgq' of the second multiplexer gate signal Smg2 does not overlap. It is possible to set the length of one ON potential period to be longer than that of the above. As a result, the lateral crosstalk and the charging error can be reduced more effectively. Fourth Embodiment FIG. 8 is a waveform diagram showing a driving method of a liquid crystal display device according to a fourth embodiment of the present invention. 8, the same reference numerals as those in FIG. 5 indicate the same or corresponding portions.

As shown in FIG. 8, in the present embodiment, the lengths of the pre-distribution period Tmgp 'and the pre-charge distribution period Tmgq' are sequentially set in the first and second multiplexer gate signals Smg1 and Smg2. It is set to be shorter than the length of the distribution periods Tmgp and Tmgq. That is, Tmgp '<
It is set so that Tmgp and Tmgq '<Tmgq. The other points are similar to those of the first modification of the first embodiment.

With such a configuration, as in the case of the third embodiment, the pre-distribution period Tmgp 'of the first multiplexer gate signal Smg1 and the precharge distribution period Tmgq' of the second multiplexer gate signal Smg2 are set. Since it is possible to shorten the total period of the above compared to the case where they do not overlap, the length of the sequential distribution periods Tmgp, Tmgq can be set longer. As a result, the charging error can be reduced more effectively.

It should be noted that instead of both of the two multiplexer gate signals Smg1 and Smg2, either one of them may be configured as described above.

Fifth Embodiment FIG. 9 is a waveform diagram showing a driving method of a liquid crystal display device according to a fifth embodiment of the present invention, in which (a) is a multiplexer for a source line corresponding to the previous individual source signal. FIG. 7B is a diagram showing a case where the gate signal of FIG. 3 is devised, and FIG. 7B is a diagram showing a case where the gate signal for the multiplexer of the source line corresponding to the subsequent individual source signal is devised. 9, the same reference numerals as those in FIG. 5 indicate the same or corresponding parts.

As shown in FIG. 9, in the present embodiment, in the first modification of the first embodiment, the first multiplexer of the source line corresponding to the previous individual source signal Ssp is used.
Pre-distribution period Tm of the multiplexer gate signal Smg1
gp 'is set to start at a timing before the start of the sequential selection period Tg of the pixel gate signal Sgn.

With such a configuration, the precharge period Tmgp ', of the two multiplexer gate signals Smg1, Smg2,
Of the total period of Tmgq ', the pixel gate is on the time axis.
It is possible to further shorten the portion of the output signal Sgn located within the sequential selection period Tg. As a result, as shown in FIG. 9 (a), the length of the sequential distribution periods Tmgp, Tmgq is lengthened, or, as shown in FIG. 9 (b), the sequential distribution periods Tmgp, Tm.
It is possible to set the start timing of gq earlier. Then, when the length of the sequential distribution periods Tmgp, Tmgq is set to be long, the charging error to the pixels can be reduced by the lengthening of the sequential distribution period Tmgp, Tmgq. On the other hand, when the start timing of the sequential distribution periods Tmgp and Tmgq is set earlier, the timing of the potential variation of the common capacitance line due to the potential variation of the source line is set to the sequential selection period Tg of the pixel gate signal Sgn. Lateral crosstalk can be more effectively reduced by the distance from the end timing. Sixth Embodiment FIG. 10 is a waveform diagram showing a driving method of a liquid crystal display device according to a sixth embodiment of the present invention. 10, the same reference numerals as those in FIG. 6 indicate the same or corresponding portions.

As shown in FIG. 10, in this embodiment, the gate signals Smg1 and Smg2 for the first and second multiplexers in the second embodiment are arranged to have only the sequential distribution periods Tmgp and Tmgq. It is a thing. That is, in the conventional driving method of the multiplexer, the pixel gate signal Sgn of a certain gate line GLn has the same polarity in the serial source signal Smn in one frame period Tf of the serial source signal Smn in addition to the sequential selection period Tg. The precharge selection period Tg 'is set within the sequential selection period Tg (not shown) of the pixel gate signal Sgm (not shown) of the other gate line GLm (not shown). .

With such a structure, it is possible to obtain the same level of effect depending on the conditions with a simpler structure than that of the second embodiment. Further, setting the gate signal for a pixel so as to have the precharge selection period Tg 'is a technique which has been often used conventionally. However, by combining this with the multiplexer driving as in the present embodiment. ,
This is a new effect that can solve the problem of lateral crosstalk. Seventh Embodiment FIG. 11 is a waveform diagram showing a driving method of a liquid crystal display device according to a first embodiment of the present invention, and FIG. 12 is a waveform diagram showing a driving method of the liquid crystal display device according to the second embodiment. , Fig. 13
Is a waveform diagram showing a driving method of the liquid crystal display device according to the third embodiment, FIG. 14 is a waveform diagram showing a driving method of the liquid crystal display device according to the fourth embodiment, and FIG. 15 is a liquid crystal display device similarly according to the fifth embodiment. 6 is a waveform diagram showing a driving method of FIG. 11-
15, the same reference numerals as those in FIG. 3 indicate the same or corresponding portions.

As shown in FIGS. 11 to 15, in the driving method of the liquid crystal display device according to the present embodiment, the sequential selection period Tg of the pixel gate signal Sgn is started in the conventional driving method of the multiplexer. From the beginning to the end of the sequential distribution period Tmgp of the first multiplexer gate signal Smg1 and the start of the sequential distribution period Tmgq of the second multiplexer gate signal Smg2 to the pixel gate. Signal Sgn
During the period T2 until the sequential selection period Tg of
The first and second multiplexer gate signals Smg1 and Smg2 are set so that the relationship 1 <T2 is established.

That is, as shown in FIG. 3, in the conventional driving method of the multiplexer, generally, the first half and the latter half of one horizontal period Th of the serial source signal Smn are set to the same length, and the pixel gate signal Sgn is set. The sequential selection period Tg is set so as to be positioned within the one horizontal period Th of the serial source signal Smn with time intervals Tgg and Tsg substantially equal to the start and end thereof, and the first and second Sequential distribution periods Tmgp, Tmgq of the multiplexer gate signals Smg1, Smg2 of the multiplexer have substantially equal time intervals with respect to the start and end thereof in the first half and the second half of the sequential selection period Tg of the pixel gate signal Sgn. Each is set to be located. Therefore, the above-mentioned pixel gate signal S
A period T1 from the start of the sequential selection period Tg of gn to the end of the sequential distribution period Tmgp of the first multiplexer gate signal Smg1 and the sequential distribution period Tmgq of the second multiplexer gate signal Smg2. From the start to the end of the sequential selection period Tg of the pixel gate signal Sgn is substantially equal to the period T2. Therefore, according to the configuration of the present embodiment, the second multiplexer gate signal Sm within the sequential selection period Tg of the pixel gate signal Sgn.
The relative start of the sequential distribution period Tmgq of g2 is earlier than before. Therefore, the lateral crosstalk can be reduced as compared with the conventional case.

Hereinafter, a specific example of this embodiment will be described as an example. (Embodiment 1) As shown in FIG. 11, in this embodiment, the sequential distribution periods Tmgp and Tmgq of the first and second multiplexer gate signals Smg1 and Smg2 are equal to the sequential selection period Tg of the pixel gate signal Sgn. In the first half and the second half, they are set to be located in front of the conventional example. With such a configuration, the positions of the sequential distribution periods Tmgp and Tmgq need only be slightly shifted forward, so that the method of driving the liquid crystal display device according to the present embodiment can be simply configured. (Embodiment 2) As shown in FIG. 12, in this embodiment, the second
Sequential distribution period Tm of the multiplexer gate signal Smg2
gq is set so as to be applied to the first half of the sequential selection period Tg of the pixel gate signal Sgn. With such a configuration, the previous individual source signal is written, that is, precharged to the corresponding pixel at the beginning of the sequential distribution period Tmgq of the second multiplexer gate signal Smg2, so that the horizontal crosstalk is more effective. Can be reduced to (Embodiment 3) As shown in FIG. 13, in the present embodiment, the second
Sequential distribution period Tm of the multiplexer gate signal Smg2
gq is set longer than the sequential distribution period Tmgp of the first multiplexer gate signal Smg1. That is,
It is lowered so that Tmgp <Tmgq. With such a configuration, it is only necessary to change the lengths of the distribution periods Tmgp and Tmgq sequentially, so that the driving method of the liquid crystal display device according to the present embodiment can be simply configured.

With regard to these Examples 1 to 3, by selecting them according to the conditions, the maximum effect can be obtained under each condition. (Embodiment 4) As shown in FIG. 14, in the present embodiment, in addition to the embodiment 2, the start of the sequential distribution period Tmgp of the first multiplexer gate signal Smg1 is the sequential selection period of the pixel gate signal Sgn. The first and second multiplexer gate signals Smg1, so that they are located before the start of Tg.
The sequential distribution periods Tmgp and Tmgq of Smg2 are set. Comparing the present embodiment and the next embodiment 5 with the above-mentioned embodiments 1 to 3, it is assumed in the embodiments 1 to 3 that both the lateral crosstalk and the charging error have the same weight. In this embodiment and the fifth embodiment, a certain limitation is imposed on the configuration because the configuration that achieves both is adopted.
Then, it is characterized in that the charging margin is sacrificed on the assumption that the charging error has some margin. That is, regarding the present embodiment, as compared with the second embodiment, the sequential distribution period Tmgp of the first multiplexer gate signal Smg1 is effectively shortened, so that the sequential distribution period Tmgp is correspondingly corresponding. While the charging margin to the pixels to be charged decreases, the start of the sequential distribution period Tmgq of the second multiplexer gate signal Smg2 is located earlier, so that the horizontal crosstalk is more effectively correspondingly. It can be reduced. (Fifth Embodiment) As shown in FIG. 15, in the present embodiment, in the second embodiment, the sequential distribution period Tmgq of the second multiplexer gate signal Smg2 is further changed to the sequential distribution of the first multiplexer gate signal Smg1. The second multiplexer gate signal Smg2 is set so that the second multiplexer gate signal Smg2 is positioned before the period Tmgp. In such a configuration, as compared with the second embodiment, the sequential distribution periods Tmgp, Tm of the first and second multiplexer gate signals Smg1, Smg2.
While gq partially overlaps, the charging margin decreases slightly,
Since the beginning of the sequential distribution period Tmgq of the second multiplexer gate signal Smg2 is located earlier,
Lateral crosstalk can be reduced more effectively.

Also in this embodiment and the fourth embodiment, the maximum effect can be obtained under each condition by selecting them according to the condition.

In the above embodiment, the case of adopting the 2-line distribution method as the distribution method of the source driver is shown. However, in the distribution method of a large number of lines, the sequential selection period Tg of the pixel gate signal Sgn is selected. From the start of the first multiplexer until the end of the sequential distribution period of the first multiplexer gate signal and the final multiplexer gate signal.
First and last multiplexers are established so that the relationship of T1 <T2 is established between the start of the sequential distribution period of the gate signal and the end of the sequential selection period Tg of the pixel gate signal Sgn. A gate signal for use may be set.

Further, in the fifth embodiment, in the case of a method of distributing a large number of lines, at least the start of the last sequential distribution period is the sequential distribution period of the previous individual source signal in the time division multiplexing of the serial source signal. It can be set so that

In the above embodiment, the case where the line inversion drive is adopted as the AC drive of the display section has been described, but other AC drive may be adopted.

In the first embodiment, the horizontal scanning circuit and the vertical scanning circuit are composed of the source driver and the gate driver, respectively, but they may be composed of the gate driver and the source driver, respectively.

[0074]

The present invention is embodied in the form as described above, and reduces the horizontal crosstalk without impairing the cost reduction advantage of using the multiplexer drive as the source signal supply method. There is an effect that can be.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of two pixels of the liquid crystal display device of FIG.

3 is a timing chart showing a waveform of each signal and a potential change of a specific portion when the display unit is driven by the conventional method in the overall configuration of FIG.

FIG. 4 is a timing chart showing the waveform of each signal and the potential change at a specific location when the display unit is driven by the method according to the present embodiment in the overall configuration of FIG.

5A and 5B are waveform diagrams showing a modified example of the driving method of the liquid crystal display device according to the first embodiment of the present invention, in which FIG. 5A is a diagram showing a first modified example and FIG. It is a figure which shows a modification.

FIG. 6 is a waveform diagram showing a driving method of the liquid crystal display device according to the second embodiment of the present invention.

FIG. 7 is a waveform diagram showing a driving method of the liquid crystal display device according to the third embodiment of the present invention.

FIG. 8 is a waveform diagram showing a driving method of a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 9 is a waveform diagram showing a driving method of the liquid crystal display device according to the fifth embodiment of the present invention, in which (a) is a device for the gate signal for the multiplexer of the source line corresponding to the previous individual source signal. FIG. 6B is a diagram showing a case where the signal is applied, and FIG. 7B is a diagram showing a case where the gate signal for the multiplexer of the source line corresponding to the subsequent individual source signal is modified.

FIG. 10 is a waveform diagram showing a driving method of a liquid crystal display device according to a sixth embodiment of the present invention.

FIG. 11 is a waveform diagram showing a method for driving a liquid crystal display device according to a first example of the seventh embodiment of the present invention.

FIG. 12 is a waveform diagram showing a method of driving a liquid crystal display device according to a second example of the seventh embodiment of the present invention.

FIG. 13 is a waveform diagram showing a method for driving a liquid crystal display device according to a third example of the seventh embodiment of the present invention.

FIG. 14 is a waveform diagram showing a driving method of a liquid crystal display device according to a fourth example of the seventh embodiment of the present invention.

FIG. 15 is a waveform diagram showing a driving method of a liquid crystal display device according to a fifth example of the seventh embodiment of the present invention.

FIG. 16 is a schematic diagram showing horizontal crosstalk.

FIG. 17 is a waveform diagram showing a potential change of each signal and a specific portion in the normal driving of the conventional liquid crystal display device,
FIG. 6A is a diagram showing a case in a positive frame, and FIG. 7B is a diagram showing a case in a negative frame.

FIG. 18 is a waveform diagram showing the potential change of each signal and a specific portion in the multiplexer driving of the conventional liquid crystal display device, (a) showing a case in a positive frame, and (b) showing a case in a negative frame. FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Liquid crystal display device 2 Display part 3 Horizontal scanning circuit 3a Output terminal 4 Vertical scanning circuit 5 Multiplexer 6 Multiplexer controller 7 Pixel 8 Pixel switching element 9 Common capacitance line 10 First switching element 11 Second switching element 21 Pixel electrode 22 Counter electrodes Cgs, Csf Cross capacitance Clc Liquid crystal capacitance Cst Storage capacitance GL Gate line L1 First multiplexer gate line L2 Second multiplexer gate line Sgn Pixel gate signals SL, SLp, SLq Source line Smg1 First multiplexer Gate signal Smg2 Second multiplexer gate signal Smn Serial source signals Ssp, Ssq Individual source signal T1 Period T2 from the beginning of the sequential selection period to the end of the sequential distribution period of the first multiplexer gate signal T2 Second multiplexer gate From the beginning of the signal sequential distribution period Period until the end of the next selection period Tg Sequential selection period Tg 'Precharge selection period Tgg, Tsg Time interval Tgp First half of the sequential selection period Tgq Second half of the sequential selection period Th Horizontal period Tmgp, Tmgq Sequential distribution period Tmgp' Pre-distribution period Tmgq 'Precharge distribution period Vdp, Vdq Pixel electrode potential Vgon Pixel gate signal ON potential Vf Common capacitance line potential Vfa, Vfb, Vfc Common capacitance line potential fluctuation Vgon Pixel gate signal ON potential Vgoff Pixel gate OFF potential of signal Vmgon ON potential of gate signal for multiplexer Vmgoff OFF potential of multiplexer gate signal Vsp, Vsq Source line potential

Front page continuation (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 642 G09G 3/20 642A (72) Inventor Masanori Kimura 1006 Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. (72) Inventor Katsuhiko Kumakawa 1006, Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. F term (reference) 2H093 NA41 NC09 NC16 NC22 NC34 ND15 ND54 5C006 AA01 AC09 AC21 AF50 BB16 BC03 BC12 BC20 BF03 BF24 FA22 FA36 FA37 5080 AA10 BB05 DD05 DD10 EE28 FF11

Claims (34)

[Claims] 1. A plurality of pixels forming a display screen are connected to a plurality of source lines through one or more gate lines in a selectable manner for each gate line, and the plurality of source lines are connected in a predetermined number unit through a multiplexer. Connected to one or more source signal output terminals, the plurality of pixels are sequentially selected through the gate line, and a plurality of individual time-division multiplexed source signals output from the source signal output terminals according to the selection. The source signal is sequentially distributed to the corresponding source lines by the multiplexer,
As a result, in the liquid crystal display device configured such that each individual source signal is sequentially written to the corresponding pixel among the selected pixels to perform display, each of the individual source signals corresponding to the last individual source signal in the time division multiplexing is A liquid crystal display device, wherein a portion of the individual source signal corresponding to another pixel having the same polarity as that of the individual source signal is written before the portion of the individual source signal corresponding to each pixel is written. 2. The last individual source as a portion corresponding to another pixel of the individual source signal, since the selection through the gate line is performed before the sequential selection period, which is the period of the sequential selection. The liquid crystal display device according to claim 1, wherein a portion of the signal corresponding to another pixel is written. 3. The individual source signals are distributed by the multiplexer in a precharge distribution period before the sequential distribution period, which is a period in which the individual source signals are sequentially distributed, so as to correspond to other pixels of the individual source signals. The liquid crystal display device according to claim 1, wherein an individual source signal other than the last one in the time division multiplexing is written as a part. 4. The liquid crystal display device according to claim 3, wherein the precharge distribution period is a period different from the sequential distribution period. 5. The liquid crystal display device according to claim 4, wherein the precharge distribution period is set so as to overlap the sequential distribution period of the individual source signals other than the last one in the time division multiplexing. 6. The individual source signal other than the last one in the time division multiplexing is distributed to the corresponding source line also in the front distribution period before the sequential distribution period in the same sequential selection period. The described liquid crystal display device. 7. The liquid crystal display device according to claim 6, wherein the front distribution period is set to overlap with the precharge distribution period. 8. The liquid crystal display device according to claim 6, wherein the length of each of the pre-distribution period and the pre-charge distribution period is set shorter than the length of the corresponding sequential distribution period. 9. The liquid crystal display device according to claim 6, wherein the start of the pre-distribution period corresponding to the first individual source signal in the time division multiplexing is set before the start of the sequential selection period. 10. The liquid crystal display device according to claim 9, wherein the length of the sequential distribution period is set longer than the lengths of the pre-distribution period and the pre-charge distribution period. 11. The start of the sequential distribution period corresponding to the last individual source signal in the time division multiplexing is set so as to hang on the period in which the immediately preceding individual source signal in the time division multiplexing is output. Item 10. A liquid crystal display device according to item 10. 12. A plurality of pixels forming a display screen are connected to a plurality of source lines through one or more gate lines in a selectable manner for each gate line, and the plurality of source lines are connected in a predetermined number unit via a multiplexer. Connected to one or more source signal output terminals, the plurality of pixels are sequentially selected through the gate line, and a plurality of individual time-division multiplexed source signals output from the source signal output terminals according to the selection. A liquid crystal display device configured such that source signals are sequentially distributed to corresponding source lines by the multiplexer, and thereby individual source signals are sequentially written to corresponding pixels among the selected pixels for display. In the first individual in the time division multiplexing from the beginning of the sequentially selected period, which is the sequentially selected period. The length of the first period, which is the period until the end of the first sequential distribution period, which is the period during which the source signal is sequentially distributed, is the last period during which the last individual source signal in the time division multiplexing is sequentially distributed. 2. The liquid crystal display device, wherein the length of the second period, which is the period from the beginning of the sequential distribution period to the end of the sequential selection period, is set longer. 13. The liquid crystal display device according to claim 12, wherein the start of the last sequential distribution period is set to be the period in which the immediately previous individual source signal in the time division multiplexing is output. 14. The liquid crystal display device according to claim 12, wherein the length of the last sequential distribution period is set longer than the length of the first sequential distribution period. 15. The liquid crystal display device according to claim 12, wherein the start of the first sequential distribution period is set before the start of the sequential selection period. 16. The method according to claim 12, wherein at least the start of the last sequential distribution period is set to hang on the sequential distribution period of the immediately preceding individual source signal in the time division multiplexing.
The described liquid crystal display device. 17. Each of the pixels is connected to the source line through a pixel switching element, and selection of the pixel is performed by turning on the pixel switching element through the gate line, and the predetermined number of pixels are selected. The source lines are respectively connected to the source signal output terminals through the multiplexer switching elements that form the multiplexer, and the individual source signals are distributed to the source lines by turning on the multiplexer switching elements. The liquid crystal display device according to claim 1. 18. A plurality of pixels forming a display screen are connected to a plurality of source lines through one or more gate lines in a selectable manner for each gate line, and the plurality of source lines are connected in a predetermined number unit through a multiplexer. Connected to one or more source signal output terminals, the plurality of pixels are sequentially selected through the gate line, and a plurality of individual time-division multiplexed source signals output from the source signal output terminals according to the selection. A liquid crystal display device configured such that source signals are sequentially distributed to corresponding source lines by the multiplexer, and thereby individual source signals are sequentially written to corresponding pixels among the selected pixels for display. In the driving method of, the individual pixel corresponding to the last individual source signal in the time division multiplexing is Before writing the portion corresponding to each pixel of over scan signal driving method of a liquid crystal display device and writes the portion corresponding to the other pixels of the same polarity as the partial of said individual source signals. 19. The last individual source signal is provided as a portion corresponding to another pixel of the individual source signal by performing the selection through the gate line before the sequential selection period which is the sequentially selected period. 19. The method for driving a liquid crystal display device according to claim 18, wherein a portion corresponding to another pixel of is written. 20. A portion of the individual source signal corresponding to another pixel by performing the distribution of the individual source signal by the multiplexer also in a precharge distribution period before the sequential distribution period which is the sequentially distributed period. 19. The method of driving a liquid crystal display device according to claim 18, wherein the individual source signals other than the last one in the time division multiplexing are written. 21. The method of driving a liquid crystal display device according to claim 20, wherein the precharge distribution period is a period different from the sequential distribution period. 22. The method of driving a liquid crystal display device according to claim 21, wherein the precharge distribution period is set so as to overlap with a sequential distribution period of individual source signals other than the last one in the time division multiplexing. 23. The individual source signals other than the last one in the time division multiplexing are distributed to the corresponding source lines also in the pre-distribution period before the sequential distribution period in the same sequential selection period. Driving method of the liquid crystal display device. 24. The method of driving a liquid crystal display device according to claim 23, wherein the pre-distribution period is set to overlap with the pre-charge distribution period. 25. The method of driving a liquid crystal display device according to claim 23, wherein the lengths of the pre-distribution period and the pre-charge distribution period are set shorter than the lengths of the corresponding sequential distribution periods, respectively. 26. The driving method of a liquid crystal display device according to claim 23, wherein the start of the pre-distribution period corresponding to the first individual source signal in the time division multiplexing is set before the start of the sequential selection period. 27. The method of driving a liquid crystal display device according to claim 26, wherein the length of the sequential distribution period is set longer than the lengths of the pre-distribution period and the pre-charge distribution period. 28. The start of the sequential distribution period corresponding to the last individual source signal in the time division multiplex is set so as to hang on the period in which the previous individual source signal in the time division multiplex is output. Item 28. A method for driving a liquid crystal display device according to item 27. 29. A plurality of pixels forming a display screen are connected to a plurality of source lines through one or more gate lines in a selectable manner for each gate line, and the plurality of source lines are connected in a predetermined number unit through a multiplexer. Connected to one or more source signal output terminals, the plurality of pixels are sequentially selected through the gate line, and a plurality of individual time-division multiplexed source signals output from the source signal output terminals according to the selection. A liquid crystal display device configured such that source signals are sequentially distributed to corresponding source lines by the multiplexer, and thereby individual source signals are sequentially written to corresponding pixels among the selected pixels for display. In the driving method of the above, in the time division multiplexing from the beginning of the sequential selection period which is the above-mentioned sequentially selected period, A period in which the last individual source signal in the time division multiplexing is sequentially distributed with respect to the length of the first period, which is a period until the end of the first sequential distribution period, which is a period in which the first individual source signal is sequentially distributed. A method for driving a liquid crystal display device, wherein a length of a second period, which is a period from the beginning of the last sequential distribution period to the end of the sequential selection period, is set longer. 30. The method of driving a liquid crystal display device according to claim 29, wherein the start of the last sequential distribution period is set to be a period in which the previous individual source signal in the time division multiplexing is output. . 31. The method of driving a liquid crystal display device according to claim 29, wherein the length of the last sequential distribution period is set longer than the length of the first sequential distribution period. 32. The method of driving a liquid crystal display device according to claim 29, wherein the start of the first sequential distribution period is set before the start of the sequential selection period. 33. The start of at least the last sequential distribution period is set to hang on the sequential distribution period of the immediately preceding individual source signal in the time division multiplexing.
A method for driving the described liquid crystal display device. 34. Each of the pixels is connected to the source line through a pixel switching element, and selection of the pixel is performed by turning on the pixel switching element through the gate line, and the predetermined number of sources are selected. Lines are respectively connected to the source signal output terminals via the multiplexer switching elements that form the multiplexer, and the individual source signals are distributed to the source lines by turning on the multiplexer switching elements. The method for driving a liquid crystal display device according to any one of 18 to 33.