JP2003100198A - Field electron emission element, manufacturing method of same, and image display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture an array of a field electron emission element which is driven with a low voltage applied between an emitter and a gate and converges well to an anode electrode of the emission electron, with the less number of processes and high yields, by using a relatively low-cost fine processing device. SOLUTION: The field electron emission element comprises a substrate, a conductive fixed layer formed on the substrate, a group of needle conductors standing on the fixed layer, a conductor layer thicker than the group of the needle conductors, formed on the fixed layer and the group of the needle conductors, and exposing a part of the group of the needle conductors on an opening part, an insulating layer formed on the conductor layer, and a gate electrode formed on the insulating layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field electron emission device applied to a flat panel display or the like and a method for manufacturing the same.

[0002]

2. Description of the Related Art A field electron emission device using a needle-shaped conductor such as carbon nanotube has been proposed.

Carbon nanotubes are nanometers
Since it has a tip diameter of the order, it can be made into a needle-shaped conductor having a very large aspect ratio without using a fine processing technology. Further, it is chemically stable because it is composed only of carbon sp ² bonds. Furthermore, it is considered to have a negative electron affinity. Therefore, it has properties suitable as an emitter material of a field electron emission device.

In fact, various researches have been actively conducted in various places to apply carbon nanotubes to field electron emission devices used for displays. Rinzler et al. (A.
G. Rinzler et al. , Science
269 (1995) 1550) and de Heer et al. (W.A. de Herr et al., Sc.
270 (1995) 1179) conducted a field emission experiment from carbon nanotubes.
A large emission current was observed. In addition, a display in which a field electron emission device using carbon nanotubes as an emitter is arranged in a plane type is disclosed by Saito et al. Of Mie University and a group of S. Uemura et a.
l. , Proc. Euro Display `99
(19th IDRC), 93). However, the driving voltage between the emitter and the grid was as high as 100V to 800V. This is because the distance between the emitter and the grid is as long as 200 μm.

The electric field strength for extracting electrons from carbon nanotubes is a low value as compared with other emitter materials. However, in order to realize an emitter-grid drive voltage of several tens of V, the emitter-grid gap must be several μm or less. This indicates that when the distance between the emitter and the gate is several μm, the size of the hole of the gate electrode must be several μm or less. Therefore, a fine processing technique with a pattern width of about several μm is required.

On the other hand, it is necessary that the electrons extracted from the carbon nanotube are guided by the gate electrode and efficiently reach the anode electrode. For example, in the case of a display, this contributes to increase in brightness with the same emitter-gate drive voltage. In order to guide electrons efficiently, it is necessary to devise the electric field distribution around the emitter so that an electron beam with high convergence can be obtained. For example, JP 20
In 01-118488, by covering the peripheral part of the emitter and making the exposed part of the emitter smaller than the diameter of the gate hole,
A method for enhancing the focusing of electron beams is described.

However, in order to perform such processing by photolithography, it is necessary to use an exposure apparatus having a positioning accuracy higher than the diameter of the gate hole. For example, when the diameter of the gate hole is 5 μm, it is necessary to perform the alignment accuracy of the exposure device under a strict condition of at least 2.5 μm or less, which causes a problem in the cost of the manufacturing device.

FIG. 12 shows a conventional typical emitter structure. Carbon nanotubes standing on the bottom of the opening of an insulating layer formed on a substrate are provided, and a gate electrode is formed on the insulating layer.

When a voltage is applied between the emitter and the gate,
The equipotential line is convex upward at the center of the gate hole, as shown by the dotted line. Therefore, the emitted electrons spread outward and collide with the wall of the insulating layer or form a wide spot on the anode electrode, resulting in poor convergence of the electron beam.
Further, when the gate hole diameter is small, the gate hole is formed in conformity with the portion where the carbon nanotubes are growing. When the gate hole diameter is small, alignment accuracy higher than the gate hole diameter is required at the time of patterning.

Due to these problems, there has been a demand for an inexpensive manufacturing method for increasing the area of an array of field electron emission devices having a low driving voltage and a high electron focusing degree.

[0011]

SUMMARY OF THE INVENTION An array of field electron emission devices having a low drive voltage applied between an emitter and a gate and having a high degree of convergence of emitted electrons to an anode electrode is manufactured in a relatively small number of steps. It is manufactured by using a fine processing device.

[0012]

According to one aspect of the present invention, a substrate, a conductive fixing layer formed on the substrate, a group of needle-like conductors standing on the fixing layer, and a group of needle-like conductors are provided. Thicker,
A conductor layer formed on the fixed layer and the needle-shaped conductor group, and exposing a part of the needle-shaped conductor group on the entire bottom surface of the conductor opening,
An insulating layer formed on the conductor layer and having an insulating opening continuous with the conductive opening; and a gate electrode formed on the insulating layer and extending to an end of the insulating opening. A field electron emission device is provided.

Here, the needle-shaped conductor may be a carbon nanotube.

The fixed layer may be composed of a base layer formed on a substrate and a catalyst layer provided on the base layer.

According to an aspect of the present invention, a substrate, a conductive fixing layer formed on the substrate, a group of needle-like conductors standing on the fixing layer, and a thicker layer than the group of needle-like conductors, the fixing layer. And a conductor layer formed on the needle-shaped conductor group and exposing a part of the needle-shaped conductor group on the entire bottom surface of the conductor opening, and insulation formed on the conductor layer and continuous to the conductor opening. An insulating layer having an opening, a gate electrode formed on the insulating layer and extending to the end of the insulating opening, and an anode electrode, and the needle-shaped conductor group is formed for each pixel. An image display device is provided.

According to an aspect of the present invention, a step of forming a conductive fixed layer on a substrate, a step of growing a needle-shaped conductor group on the fixed layer, and a step of thicker than the needle-shaped conductor group, the fixed layer And a step of forming a conductor layer on the needle-shaped conductor group, a step of forming an insulating layer on the conductive layer, a step of forming a gate electrode layer on the insulating layer, the insulating layer and the gate electrode An electric field comprising: providing an opening in a layer, exposing the conductive layer at the bottom of the opening; and selectively removing the conductive layer at the bottom of the opening to expose the needle-shaped conductor group. A method for manufacturing an electron-emitting device is provided.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below.

In one embodiment of the present invention, as shown in FIG. 1, a conductive fixing layer 2 is formed on a substrate 1, and the fixing layer 2 is formed.
The needle-shaped conductor group 3 such as carbon nanotube stands up on the top,
Further, a conductive layer 4 covering the needle-shaped conductor group 3 is provided. The conductive layer 4 fills the space between the needle-shaped conductor groups 3. A cathode electrode 5 is provided on the conductive layer 4. Here, a device including the cathode electrode 5 will be described, but the cathode electrode 5 may be omitted because the conductive layer 4 has conductivity. Further, an insulating layer 6 and a gate electrode 7 are provided on the cathode electrode 5.

The needle-shaped conductor group 3 stands up not only on the bottom of the opening 11 of the conductive layer 4 and the like, but also on the periphery thereof. However, the needle-shaped conductor group 3 needs to be provided at least at the bottom of the opening 11, but may be provided around the opening or may not be provided.

In such a structure, the electric potential of the conductive layer 4 is the same as that of the fixed layer 2, the acicular conductor group 3 and the cathode electrode 5. Here, when a voltage is applied between the emitter and the gate, the equipotential line has a substantially horizontal or concave shape as shown by a dotted line. Therefore, the electrons emitted from the emitter reach the anode in a trajectory that is almost perpendicular to the substrate or gathered at the center of the opening 11.
The electron beam convergence is enhanced.

Further, since the side surfaces of the opening of the conductive layer 4 and the opening of the insulating layer 6 are continuous and the gate electrode 7 is provided at the end of the opening, the electric field in the opening is further improved. It is distributed so as to improve convergence. Here, since the needle-shaped conductor group 3 is formed over the entire bottom of the opening 11, it is possible to maximize the area of the opening to emit electrons.

FIG. 2 is a plan view when the field electron emission devices of this embodiment are arranged in an array, and FIG. 3 is an opening 11 in FIG.
FIG. 4 is an enlarged view of the vicinity and FIG. 4 is a partial sectional view taken along the line AB of FIG.

A conductive layer 4 and a cathode electrode 5 are formed in parallel on the substrate 1. Further, the gate electrode 7 is formed in the direction perpendicular to the cathode electrode 5. An insulating layer 6 is provided between the cathode electrode 5 and the gate electrode 7. The insulating layer 6 may cover not only the intersection of the cathode electrode 5 and the gate electrode 7 but also the space between the cathode electrodes 5.

At the intersection of the cathode electrode 5 and the gate electrode 7, a plurality of openings 11 are provided to expose the needle-shaped conductor group 3 standing on the fixed layer 2.

In this way, by providing the conductor layer 4 covering the needle-shaped conductor group 3, as described with reference to FIG.
A recess can be formed on the equipotential surface in the opening 11.
As a result, the electrons emitted from the tip of the needle-shaped conductor 3 are
Due to the electric field in the opening 11, the light is emitted while converging in the central portion.

Next, an example of a method of manufacturing the field electron emission device according to this embodiment will be described with reference to FIGS.

A substrate 1 made of quartz and having a thickness of about 0.5 mm is prepared. Here, the substrate 1 is not limited to quartz as long as it can support an electron-emitting device.

On this substrate 1, Cr is deposited as a base layer 21 to a thickness of about 1 nm and Ni as a catalyst layer 22 is deposited to a thickness of about 20 nm by a sputtering method. Here, Cr has the function of improving the adhesion between Ni and the substrate, and contributes to the improvement of the yield of the element array. However, if the adhesion between the substrate 1 and the catalyst layer 22 can be secured, it is possible to omit the base layer 21 and substitute only the catalyst layer made of Ni. In addition, the underlayer 2
It is also possible to deposit Ta between 1 and the catalyst layer 22 to form a Ta cathode layer. Also at this time, Cr is added to the substrate 1 and T.
a Improves adhesion with the cathode layer.

Subsequently, a positive resist is applied on the catalyst layer 22, and exposure, development and post-baking are performed using a mask pattern such that the positive resist remains on the portion where the catalyst layer 22 is left. The catalyst layer 22 is left in the region where the needle-shaped conductor is formed after that, that is, in the intersection of the cathode electrode and the gate electrode. An etching solution for removing Ni may be an 8 wt% ferric chloride aqueous solution to which nitric acid and phosphoric acid are added. Wet etching may be performed at room temperature. Then, after removing the resist using a resist stripping solution, cleaning is performed with pure water.

Next, in order to pattern the base layer 21 in parallel, wet etching of Cr of the base layer 21 is performed. That is, exposure / exposure is performed by using a mask pattern that leaves a positive resist in accordance with the pattern of the cathode wiring.
Develop and post bake. As an etching solution for removing Cr, a solution of perchloric acid and nitric acid added to an aqueous solution of cerium ammonium nitrate can be used. Wet etching may be performed at room temperature. Then, after removing the resist using a resist stripping solution, cleaning is performed with pure water. FIG. 5 shows a state after patterning the underlayer 21 and the catalyst layer 22 in this manner.

Next, as shown in FIG. 6, plasma CV
Carbon nanotubes are selectively grown on the catalyst layer 22 by the D method to form the needle-shaped conductor group 3. For this reason, first
-14 on the patterned underlayer 21 on the substrate 1
Approximately 3 Torr while applying 0V DC negative bias voltage
Of H ₂ gas, the surface of the catalyst layer 22 is etched by causing plasma discharge with microwaves for 30 minutes. Next, H ₂ : C
In the mixed gas of H4 = 4: 1, the underlayer 21 on the substrate is about −
While applying a DC negative bias voltage of 185 V, plasma discharge is performed by microwaves for 30 minutes under the condition that the total pressure is about 3 Torr, and carbon nanotubes are selectively grown on the surface of the catalyst layer 22.

The carbon nanotubes grown here are
Typical length is about 2 μm and diameter is about 30 nm
~ 70 nm.

In this way, the needle-shaped conductor 3 is fixed on the catalyst layer 22.

Next, as shown in FIG. 7, aluminum having a thickness of about 2 μm to be the conductive layer 4 is deposited on the entire surface of the substrate 1 by the sputtering method.

The conductive layer 4 has the effect of improving the convergence of the emitted electrons from the needle-shaped conductor 3, and also has the effect of reducing damage to the carbon nanotubes in the subsequent step.
That is, the resist is directly applied to the carbon nanotube,
Further, when the resist is peeled off, the carbon nanotubes are easily damaged in the process. However, if a metal such as aluminum is coated on the carbon nanotubes by a sputtering method, then coating / peeling of a resist, sputtering, etching, ashing with oxygen plasma, etc. are performed, and then the carbon is removed by a wet process, the carbon Nanotube processing damage is small.

After that, the deposited conductor layer 4 has a size of about 180 μm × 180 μm in accordance with the size of the pixel.
Patterning is performed by wet etching. The wet etching is performed at about 40 ° C. using, for example, an aqueous solution obtained by adding phosphoric acid and acetic acid to diluted nitric acid. Here, the conductor layer 4 is left according to the size of the pixel, but the conductor layer 4 may be left according to the base layer 21.

In addition, in the carbon nanotube growth step, a small amount of carbon substance such as amorphous carbon particles adheres to not only the catalyst layer 22 but also the exposed portion of the substrate 1 and the underlying layer 21, for example. . This carbon substance may impair the insulation between the cathode wirings or the adhesion of a layer deposited in a later step. Therefore, the plasma asher apparatus is used to perform treatment in oxygen plasma to remove the carbon substance adhering to the portion not covered with the conductive layer 4.

Thereafter, Ta to be the cathode electrode 5 is deposited by sputtering to a thickness of about 200 nm, and the cathode electrode 5 is patterned by photolithography and reactive ion etching with CF4 gas (FIG. 8).

Next, as shown in FIG. 9, the insulating layer 6 is formed by the sputtering method.
As a result, SiO2 is deposited by about 3 μm.

Thereafter, as shown in FIG. 10, Ta of about 200 nm is deposited as the gate electrode 7 on the insulating layer 6.

Subsequently, the gate electrode 7 is patterned in a direction intersecting with the cathode electrode 5 by photolithography and reactive ion etching using CF4 gas.

Thereafter, a photoresist is applied on the gate electrode 7, exposed and developed to form a square opening pattern of about 5 μm × 5 μm in the photoresist. The exposure can be performed by a contact exposure method.

The photolithography used in this process requires the finest precision among all the processes, and is about 5 μm.
Alignment accuracy more precise than m is required. Besides this,
There is no process that requires higher accuracy. Therefore, a proximity exposure device can be used, and the cost of the manufacturing device can be kept low.

Since the carbon nanotube is covered with the conductive layer 4 and then the insulating layer 6 and the gate electrode 7 are deposited to form the opening, it is sufficient to provide a positioning margin determined by the line width of the cathode electrode 5. It is possible to make the alignment accuracy rougher than the gate hole diameter. From this, it is possible to use an exposure apparatus that is relatively inexpensive even though it has a small gate hole diameter.

After that, the opening 11 is formed in the gate electrode 7 and the insulating layer 6 by reactive ion etching using CF4 plasma, as shown in FIG. Here, the conductive layer 4
Aluminum has a property that it is difficult to be etched by CF4 plasma, so increase the etching time,
The etching can be uniformly terminated on the surface of the conductive layer. Subsequently, the photoresist having the opening pattern formed thereon is removed by a resist stripping solution.

Next, the aluminum of the conductive layer 4 covering the needle-shaped conductor group 3 is removed by wet etching. As an etching solution at this time, an aqueous solution of potassium hydroxide having a concentration of about 1% by weight heated to about 40 ° C. may be used, and it may be soaked for about 6 minutes to about 8 minutes while gently stirring to perform wet etching. By using an alkaline solution as an etching solution during the wet etching of the conductive layer 4, the tantalum of the gate electrode 7 and the catalyst layer 2 can be formed.
Only the aluminum of the conductive layer 4 can be selectively etched without attacking the nickel of 2. Most of the catalytic metals of carbon nanotubes are etched by an acidic solution, so the material for the conductive layer 4 is
Those that can be etched with an alkaline solution, such as aluminum, are preferable. In addition, as a combination of the material of the conductive layer that can be etched with the alkaline solution and the etching solution, for example, copper can be used as the conductive layer and an aqueous ammonia solution can be used as the etching solution.

After the completion of the wet etching, it is immersed in acetone and dried on a hot plate to complete a field electron emission device as shown in FIG.

Although the dot matrix type display has been described above as an example, the patterns of the catalyst layer and the grid layer can be appropriately changed according to the use of the electron source.

The field electron emission device formed on the substrate 1 as described above is used as an electron source, and the substrate 1 is provided with the counter electrodes (anode) which are arranged at a predetermined interval so as to form an image display device. be able to. At this time,
An image signal is supplied to one of the cathode electrode 5 and the gate electrode 7, and a scanning signal is supplied to the other.

Although an example using carbon nanotubes has been described above, in addition to this, as the acicular conductor group, for example, an aggregate of β-tungsten columnar crystals as disclosed in Japanese Patent Laid-Open No. 8-264108 can be used. It is also possible to use.

[0051]

The object of the present invention is to provide an array of field electron emission devices which are driven by a low voltage applied between the emitter and the grid and have a high degree of convergence of emitted electrons to the anode electrode, with a small number of steps and a high yield. Moreover, it can be manufactured using a relatively inexpensive fine processing apparatus.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a potential distribution in an opening of a field electron emission device according to an embodiment.

FIG. 2 is a plan view of a field electron emission device according to the embodiment.

FIG. 3 is a partially enlarged view of FIG.

FIG. 4 is a partial cross-sectional view of FIG.

FIG. 5 is an explanatory view of the method for manufacturing the field electron emission device according to the embodiment.

FIG. 6 is an explanatory view of the method for manufacturing the field electron emission device according to the embodiment.

FIG. 7 is an explanatory view of the method for manufacturing the field electron emission device according to the embodiment.

FIG. 8 is an explanatory view of the method for manufacturing the field electron emission device according to the embodiment.

FIG. 9 is an explanatory view of the method for manufacturing the field electron emission device according to the embodiment.

FIG. 10 is an explanatory view of the method for manufacturing the field electron emission device according to the embodiment.

FIG. 11 is an explanatory view of the method for manufacturing the field electron emission device according to the embodiment.

FIG. 12 is a diagram illustrating a potential distribution in an aperture of a conventional field electron emission device.

[Explanation of symbols]

1 ... Substrate 2. Fixed layer 21 ... Underlayer 22 ... Catalyst layer 3 ... Carbon nanotube 4 ... Conductive layer 5 ... Cathode electrode 6 ... Insulating layer 7 ... Gate electrode

Claims (5)

[Claims] 1. A substrate, a conductive fixed layer formed on the substrate, a group of needle-shaped conductors standing on the fixed layer, and a thicker layer than the group of needle-shaped conductors, the fixed layer and the needle-shaped conductor. Insulation having a conductor layer formed on the conductor group and exposing a part of the acicular conductor group on the entire bottom of the conductor opening, and an insulation aperture formed on the conductor layer and continuous with the conductor opening. A field electron emission device comprising a layer and a gate electrode formed on the insulating layer and extending to an end of the insulating opening. 2. The field electron emission device according to claim 1, wherein the needle-shaped conductor is a carbon nanotube. 3. The field electron emission device according to claim 2, wherein the fixed layer comprises an underlayer formed on a substrate and a catalyst layer provided on the underlayer. 4. A substrate, a conductive fixed layer formed on the substrate, a group of needle-shaped conductors standing on the fixed layer, and a thicker layer than the group of needle-shaped conductors, the fixed layer and the needle-shaped conductor. Insulation having a conductor layer formed on the conductor group and exposing a part of the acicular conductor group on the entire bottom of the conductor opening, and an insulation aperture formed on the conductor layer and continuous with the conductor opening. A layer, a gate electrode formed on the insulating layer and extending to the end of the insulating opening, and an anode electrode, and the needle-shaped conductor group is formed for each pixel. . 5. A step of forming a conductive fixing layer on a substrate,
Growing a needle-shaped conductor group on the fixed layer, a step of forming a conductor layer thicker than the needle-shaped conductor group on the fixed layer and the needle-shaped conductor group, and an insulating layer on the conductive layer A step of forming a gate electrode layer on the insulating layer, forming an opening in the insulating layer and the gate electrode layer, exposing the conductive layer at the opening bottom, and And a step of selectively removing the conductive layer to expose the acicular conductor group, the method for manufacturing a field electron emission device.